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mpempe
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Merge branch 'topic/ppc-kvm' into next
Merge in some commits we're sharing with the KVM tree. I manually propagated the change from commit d3d4ffa ("powerpc/powernv/ioda2: Reduce upper limit for DMA window size") into pci-ioda-tce.c. Conflicts: arch/powerpc/include/asm/cputable.h arch/powerpc/platforms/powernv/pci-ioda.c arch/powerpc/platforms/powernv/pci.h
2 parents 9c3250a + a68bd12 commit ce57c66

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lines changed

‎arch/powerpc/include/asm/book3s/64/hugetlb.h

Lines changed: 0 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -32,26 +32,6 @@ static inline int hstate_get_psize(struct hstate *hstate)
3232
}
3333
}
3434

35-
#define arch_make_huge_pte arch_make_huge_pte
36-
static inline pte_t arch_make_huge_pte(pte_t entry, struct vm_area_struct *vma,
37-
struct page *page, int writable)
38-
{
39-
unsigned long page_shift;
40-
41-
if (!cpu_has_feature(CPU_FTR_POWER9_DD1))
42-
return entry;
43-
44-
page_shift = huge_page_shift(hstate_vma(vma));
45-
/*
46-
* We don't support 1G hugetlb pages yet.
47-
*/
48-
VM_WARN_ON(page_shift == mmu_psize_defs[MMU_PAGE_1G].shift);
49-
if (page_shift == mmu_psize_defs[MMU_PAGE_2M].shift)
50-
return __pte(pte_val(entry) | R_PAGE_LARGE);
51-
else
52-
return entry;
53-
}
54-
5535
#ifdef CONFIG_ARCH_HAS_GIGANTIC_PAGE
5636
static inline bool gigantic_page_supported(void)
5737
{

‎arch/powerpc/include/asm/book3s/64/pgtable.h

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -479,9 +479,8 @@ static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
479479
{
480480
if (full && radix_enabled()) {
481481
/*
482-
* Let's skip the DD1 style pte update here. We know that
483-
* this is a full mm pte clear and hence can be sure there is
484-
* no parallel set_pte.
482+
* We know that this is a full mm pte clear and
483+
* hence can be sure there is no parallel set_pte.
485484
*/
486485
return radix__ptep_get_and_clear_full(mm, addr, ptep, full);
487486
}

‎arch/powerpc/include/asm/book3s/64/radix.h

Lines changed: 5 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -12,12 +12,6 @@
1212
#include <asm/book3s/64/radix-4k.h>
1313
#endif
1414

15-
/*
16-
* For P9 DD1 only, we need to track whether the pte's huge.
17-
*/
18-
#define R_PAGE_LARGE _RPAGE_RSV1
19-
20-
2115
#ifndef __ASSEMBLY__
2216
#include <asm/book3s/64/tlbflush-radix.h>
2317
#include <asm/cpu_has_feature.h>
@@ -154,20 +148,7 @@ static inline unsigned long radix__pte_update(struct mm_struct *mm,
154148
{
155149
unsigned long old_pte;
156150

157-
if (cpu_has_feature(CPU_FTR_POWER9_DD1)) {
158-
159-
unsigned long new_pte;
160-
161-
old_pte = __radix_pte_update(ptep, ~0ul, 0);
162-
/*
163-
* new value of pte
164-
*/
165-
new_pte = (old_pte | set) & ~clr;
166-
radix__flush_tlb_pte_p9_dd1(old_pte, mm, addr);
167-
if (new_pte)
168-
__radix_pte_update(ptep, 0, new_pte);
169-
} else
170-
old_pte = __radix_pte_update(ptep, clr, set);
151+
old_pte = __radix_pte_update(ptep, clr, set);
171152
if (!huge)
172153
assert_pte_locked(mm, addr);
173154

@@ -253,8 +234,6 @@ static inline int radix__pmd_trans_huge(pmd_t pmd)
253234

254235
static inline pmd_t radix__pmd_mkhuge(pmd_t pmd)
255236
{
256-
if (cpu_has_feature(CPU_FTR_POWER9_DD1))
257-
return __pmd(pmd_val(pmd) | _PAGE_PTE | R_PAGE_LARGE);
258237
return __pmd(pmd_val(pmd) | _PAGE_PTE);
259238
}
260239

@@ -285,18 +264,14 @@ static inline unsigned long radix__get_tree_size(void)
285264
unsigned long rts_field;
286265
/*
287266
* We support 52 bits, hence:
288-
* DD1 52-28 = 24, 0b11000
289-
* Others 52-31 = 21, 0b10101
267+
* bits 52 - 31 = 21, 0b10101
290268
* RTS encoding details
291269
* bits 0 - 3 of rts -> bits 6 - 8 unsigned long
292270
* bits 4 - 5 of rts -> bits 62 - 63 of unsigned long
293271
*/
294-
if (cpu_has_feature(CPU_FTR_POWER9_DD1))
295-
rts_field = (0x3UL << 61);
296-
else {
297-
rts_field = (0x5UL << 5); /* 6 - 8 bits */
298-
rts_field |= (0x2UL << 61);
299-
}
272+
rts_field = (0x5UL << 5); /* 6 - 8 bits */
273+
rts_field |= (0x2UL << 61);
274+
300275
return rts_field;
301276
}
302277

‎arch/powerpc/include/asm/book3s/64/tlbflush-radix.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -48,8 +48,6 @@ extern void radix__flush_tlb_page_psize(struct mm_struct *mm, unsigned long vmad
4848
extern void radix__flush_tlb_pwc(struct mmu_gather *tlb, unsigned long addr);
4949
extern void radix__flush_tlb_collapsed_pmd(struct mm_struct *mm, unsigned long addr);
5050
extern void radix__flush_tlb_all(void);
51-
extern void radix__flush_tlb_pte_p9_dd1(unsigned long old_pte, struct mm_struct *mm,
52-
unsigned long address);
5351

5452
extern void radix__flush_tlb_lpid_page(unsigned int lpid,
5553
unsigned long addr,

‎arch/powerpc/include/asm/cputable.h

Lines changed: 6 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -210,7 +210,6 @@ static inline void cpu_feature_keys_init(void) { }
210210
#define CPU_FTR_DAWR LONG_ASM_CONST(0x0000008000000000)
211211
#define CPU_FTR_DABRX LONG_ASM_CONST(0x0000010000000000)
212212
#define CPU_FTR_PMAO_BUG LONG_ASM_CONST(0x0000020000000000)
213-
#define CPU_FTR_POWER9_DD1 LONG_ASM_CONST(0x0000040000000000)
214213
#define CPU_FTR_POWER9_DD2_1 LONG_ASM_CONST(0x0000080000000000)
215214
#define CPU_FTR_P9_TM_HV_ASSIST LONG_ASM_CONST(0x0000100000000000)
216215
#define CPU_FTR_P9_TM_XER_SO_BUG LONG_ASM_CONST(0x0000200000000000)
@@ -463,8 +462,6 @@ static inline void cpu_feature_keys_init(void) { }
463462
CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_ARCH_207S | \
464463
CPU_FTR_TM_COMP | CPU_FTR_ARCH_300 | CPU_FTR_PKEY | \
465464
CPU_FTR_P9_TLBIE_BUG | CPU_FTR_P9_TIDR)
466-
#define CPU_FTRS_POWER9_DD1 ((CPU_FTRS_POWER9 | CPU_FTR_POWER9_DD1) & \
467-
(~CPU_FTR_SAO))
468465
#define CPU_FTRS_POWER9_DD2_0 CPU_FTRS_POWER9
469466
#define CPU_FTRS_POWER9_DD2_1 (CPU_FTRS_POWER9 | CPU_FTR_POWER9_DD2_1)
470467
#define CPU_FTRS_POWER9_DD2_2 (CPU_FTRS_POWER9 | CPU_FTR_POWER9_DD2_1 | \
@@ -488,16 +485,14 @@ static inline void cpu_feature_keys_init(void) { }
488485
#define CPU_FTRS_POSSIBLE \
489486
(CPU_FTRS_POWER7 | CPU_FTRS_POWER8E | CPU_FTRS_POWER8 | \
490487
CPU_FTR_ALTIVEC_COMP | CPU_FTR_VSX_COMP | CPU_FTRS_POWER9 | \
491-
CPU_FTRS_POWER9_DD1 | CPU_FTRS_POWER9_DD2_1 | \
492-
CPU_FTRS_POWER9_DD2_2)
488+
CPU_FTRS_POWER9_DD2_1 | CPU_FTRS_POWER9_DD2_2)
493489
#else
494490
#define CPU_FTRS_POSSIBLE \
495491
(CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | \
496492
CPU_FTRS_POWER6 | CPU_FTRS_POWER7 | CPU_FTRS_POWER8E | \
497493
CPU_FTRS_POWER8 | CPU_FTRS_CELL | CPU_FTRS_PA6T | \
498494
CPU_FTR_VSX_COMP | CPU_FTR_ALTIVEC_COMP | CPU_FTRS_POWER9 | \
499-
CPU_FTRS_POWER9_DD1 | CPU_FTRS_POWER9_DD2_1 | \
500-
CPU_FTRS_POWER9_DD2_2)
495+
CPU_FTRS_POWER9_DD2_1 | CPU_FTRS_POWER9_DD2_2)
501496
#endif /* CONFIG_CPU_LITTLE_ENDIAN */
502497
#endif
503498
#else
@@ -565,17 +560,15 @@ enum {
565560
#ifdef CONFIG_CPU_LITTLE_ENDIAN
566561
#define CPU_FTRS_ALWAYS \
567562
(CPU_FTRS_POSSIBLE & ~CPU_FTR_HVMODE & CPU_FTRS_POWER7 & \
568-
CPU_FTRS_POWER8E & CPU_FTRS_POWER8 & \
569-
CPU_FTRS_POWER9 & CPU_FTRS_POWER9_DD1 & CPU_FTRS_POWER9_DD2_1 & \
570-
CPU_FTRS_DT_CPU_BASE)
563+
CPU_FTRS_POWER8E & CPU_FTRS_POWER8 & CPU_FTRS_POWER9 & \
564+
CPU_FTRS_POWER9_DD2_1 & CPU_FTRS_DT_CPU_BASE)
571565
#else
572566
#define CPU_FTRS_ALWAYS \
573567
(CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & \
574568
CPU_FTRS_POWER6 & CPU_FTRS_POWER7 & CPU_FTRS_CELL & \
575569
CPU_FTRS_PA6T & CPU_FTRS_POWER8 & CPU_FTRS_POWER8E & \
576-
~CPU_FTR_HVMODE & CPU_FTRS_POSSIBLE & \
577-
CPU_FTRS_POWER9 & CPU_FTRS_POWER9_DD1 & CPU_FTRS_POWER9_DD2_1 & \
578-
CPU_FTRS_DT_CPU_BASE)
570+
~CPU_FTR_HVMODE & CPU_FTRS_POSSIBLE & CPU_FTRS_POWER9 & \
571+
CPU_FTRS_POWER9_DD2_1 & CPU_FTRS_DT_CPU_BASE)
579572
#endif /* CONFIG_CPU_LITTLE_ENDIAN */
580573
#endif
581574
#else

‎arch/powerpc/include/asm/iommu.h

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -69,6 +69,8 @@ struct iommu_table_ops {
6969
long index,
7070
unsigned long *hpa,
7171
enum dma_data_direction *direction);
72+
73+
__be64 *(*useraddrptr)(struct iommu_table *tbl, long index, bool alloc);
7274
#endif
7375
void (*clear)(struct iommu_table *tbl,
7476
long index, long npages);
@@ -117,15 +119,16 @@ struct iommu_table {
117119
unsigned long *it_map; /* A simple allocation bitmap for now */
118120
unsigned long it_page_shift;/* table iommu page size */
119121
struct list_head it_group_list;/* List of iommu_table_group_link */
120-
unsigned long *it_userspace; /* userspace view of the table */
122+
__be64 *it_userspace; /* userspace view of the table */
121123
struct iommu_table_ops *it_ops;
122124
struct kref it_kref;
125+
int it_nid;
123126
};
124127

128+
#define IOMMU_TABLE_USERSPACE_ENTRY_RM(tbl, entry) \
129+
((tbl)->it_ops->useraddrptr((tbl), (entry), false))
125130
#define IOMMU_TABLE_USERSPACE_ENTRY(tbl, entry) \
126-
((tbl)->it_userspace ? \
127-
&((tbl)->it_userspace[(entry) - (tbl)->it_offset]) : \
128-
NULL)
131+
((tbl)->it_ops->useraddrptr((tbl), (entry), true))
129132

130133
/* Pure 2^n version of get_order */
131134
static inline __attribute_const__

‎arch/powerpc/include/asm/paca.h

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -187,11 +187,6 @@ struct paca_struct {
187187
u8 subcore_sibling_mask;
188188
/* Flag to request this thread not to stop */
189189
atomic_t dont_stop;
190-
/*
191-
* Pointer to an array which contains pointer
192-
* to the sibling threads' paca.
193-
*/
194-
struct paca_struct **thread_sibling_pacas;
195190
/* The PSSCR value that the kernel requested before going to stop */
196191
u64 requested_psscr;
197192

‎arch/powerpc/kernel/asm-offsets.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -766,7 +766,6 @@ int main(void)
766766
OFFSET(PACA_THREAD_IDLE_STATE, paca_struct, thread_idle_state);
767767
OFFSET(PACA_THREAD_MASK, paca_struct, thread_mask);
768768
OFFSET(PACA_SUBCORE_SIBLING_MASK, paca_struct, subcore_sibling_mask);
769-
OFFSET(PACA_SIBLING_PACA_PTRS, paca_struct, thread_sibling_pacas);
770769
OFFSET(PACA_REQ_PSSCR, paca_struct, requested_psscr);
771770
OFFSET(PACA_DONT_STOP, paca_struct, dont_stop);
772771
#define STOP_SPR(x, f) OFFSET(x, paca_struct, stop_sprs.f)

‎arch/powerpc/kernel/cputable.c

Lines changed: 0 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -466,25 +466,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
466466
.machine_check_early = __machine_check_early_realmode_p8,
467467
.platform = "power8",
468468
},
469-
{ /* Power9 DD1*/
470-
.pvr_mask = 0xffffff00,
471-
.pvr_value = 0x004e0100,
472-
.cpu_name = "POWER9 (raw)",
473-
.cpu_features = CPU_FTRS_POWER9_DD1,
474-
.cpu_user_features = COMMON_USER_POWER9,
475-
.cpu_user_features2 = COMMON_USER2_POWER9,
476-
.mmu_features = MMU_FTRS_POWER9,
477-
.icache_bsize = 128,
478-
.dcache_bsize = 128,
479-
.num_pmcs = 6,
480-
.pmc_type = PPC_PMC_IBM,
481-
.oprofile_cpu_type = "ppc64/power9",
482-
.oprofile_type = PPC_OPROFILE_INVALID,
483-
.cpu_setup = __setup_cpu_power9,
484-
.cpu_restore = __restore_cpu_power9,
485-
.machine_check_early = __machine_check_early_realmode_p9,
486-
.platform = "power9",
487-
},
488469
{ /* Power9 DD2.0 */
489470
.pvr_mask = 0xffffefff,
490471
.pvr_value = 0x004e0200,

‎arch/powerpc/kernel/dt_cpu_ftrs.c

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -701,9 +701,7 @@ static __init void cpufeatures_cpu_quirks(void)
701701
/*
702702
* Not all quirks can be derived from the cpufeatures device tree.
703703
*/
704-
if ((version & 0xffffff00) == 0x004e0100)
705-
cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD1;
706-
else if ((version & 0xffffefff) == 0x004e0200)
704+
if ((version & 0xffffefff) == 0x004e0200)
707705
; /* DD2.0 has no feature flag */
708706
else if ((version & 0xffffefff) == 0x004e0201)
709707
cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;

‎arch/powerpc/kernel/exceptions-64s.S

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -276,9 +276,7 @@ BEGIN_FTR_SECTION
276276
*
277277
* This interrupt can wake directly from idle. If that is the case,
278278
* the machine check is handled then the idle wakeup code is called
279-
* to restore state. In that case, the POWER9 DD1 idle PACA workaround
280-
* is not applied in the early machine check code, which will cause
281-
* bugs.
279+
* to restore state.
282280
*/
283281
mr r11,r1 /* Save r1 */
284282
lhz r10,PACA_IN_MCE(r13)

‎arch/powerpc/kernel/idle_book3s.S

Lines changed: 0 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -466,43 +466,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_P9_TM_XER_SO_BUG)
466466
blr /* return 0 for wakeup cause / SRR1 value */
467467
#endif
468468

469-
/*
470-
* On waking up from stop 0,1,2 with ESL=1 on POWER9 DD1,
471-
* HSPRG0 will be set to the HSPRG0 value of one of the
472-
* threads in this core. Thus the value we have in r13
473-
* may not be this thread's paca pointer.
474-
*
475-
* Fortunately, the TIR remains invariant. Since this thread's
476-
* paca pointer is recorded in all its sibling's paca, we can
477-
* correctly recover this thread's paca pointer if we
478-
* know the index of this thread in the core.
479-
*
480-
* This index can be obtained from the TIR.
481-
*
482-
* i.e, thread's position in the core = TIR.
483-
* If this value is i, then this thread's paca is
484-
* paca->thread_sibling_pacas[i].
485-
*/
486-
power9_dd1_recover_paca:
487-
mfspr r4, SPRN_TIR
488-
/*
489-
* Since each entry in thread_sibling_pacas is 8 bytes
490-
* we need to left-shift by 3 bits. Thus r4 = i * 8
491-
*/
492-
sldi r4, r4, 3
493-
/* Get &paca->thread_sibling_pacas[0] in r5 */
494-
ld r5, PACA_SIBLING_PACA_PTRS(r13)
495-
/* Load paca->thread_sibling_pacas[i] into r13 */
496-
ldx r13, r4, r5
497-
SET_PACA(r13)
498-
/*
499-
* Indicate that we have lost NVGPR state
500-
* which needs to be restored from the stack.
501-
*/
502-
li r3, 1
503-
stb r3,PACA_NAPSTATELOST(r13)
504-
blr
505-
506469
/*
507470
* Called from machine check handler for powersave wakeups.
508471
* Low level machine check processing has already been done. Now just
@@ -537,9 +500,6 @@ pnv_powersave_wakeup:
537500
ld r2, PACATOC(r13)
538501

539502
BEGIN_FTR_SECTION
540-
BEGIN_FTR_SECTION_NESTED(70)
541-
bl power9_dd1_recover_paca
542-
END_FTR_SECTION_NESTED_IFSET(CPU_FTR_POWER9_DD1, 70)
543503
bl pnv_restore_hyp_resource_arch300
544504
FTR_SECTION_ELSE
545505
bl pnv_restore_hyp_resource_arch207
@@ -602,22 +562,12 @@ END_FTR_SECTION_IFCLR(CPU_FTR_POWER9_DD2_1)
602562
LOAD_REG_ADDRBASE(r5,pnv_first_deep_stop_state)
603563
ld r4,ADDROFF(pnv_first_deep_stop_state)(r5)
604564

605-
BEGIN_FTR_SECTION_NESTED(71)
606-
/*
607-
* Assume that we are waking up from the state
608-
* same as the Requested Level (RL) in the PSSCR
609-
* which are Bits 60-63
610-
*/
611-
ld r5,PACA_REQ_PSSCR(r13)
612-
rldicl r5,r5,0,60
613-
FTR_SECTION_ELSE_NESTED(71)
614565
/*
615566
* 0-3 bits correspond to Power-Saving Level Status
616567
* which indicates the idle state we are waking up from
617568
*/
618569
mfspr r5, SPRN_PSSCR
619570
rldicl r5,r5,4,60
620-
ALT_FTR_SECTION_END_NESTED_IFSET(CPU_FTR_POWER9_DD1, 71)
621571
li r0, 0 /* clear requested_psscr to say we're awake */
622572
std r0, PACA_REQ_PSSCR(r13)
623573
cmpd cr4,r5,r4

‎arch/powerpc/kernel/process.c

Lines changed: 1 addition & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1250,17 +1250,9 @@ struct task_struct *__switch_to(struct task_struct *prev,
12501250
* mappings. If the new process has the foreign real address
12511251
* mappings, we must issue a cp_abort to clear any state and
12521252
* prevent snooping, corruption or a covert channel.
1253-
*
1254-
* DD1 allows paste into normal system memory so we do an
1255-
* unpaired copy, rather than cp_abort, to clear the buffer,
1256-
* since cp_abort is quite expensive.
12571253
*/
1258-
if (current_thread_info()->task->thread.used_vas) {
1254+
if (current_thread_info()->task->thread.used_vas)
12591255
asm volatile(PPC_CP_ABORT);
1260-
} else if (cpu_has_feature(CPU_FTR_POWER9_DD1)) {
1261-
asm volatile(PPC_COPY(%0, %1)
1262-
: : "r"(dummy_copy_buffer), "r"(0));
1263-
}
12641256
}
12651257
#endif /* CONFIG_PPC_BOOK3S_64 */
12661258

‎arch/powerpc/kvm/book3s_64_mmu_radix.c

Lines changed: 1 addition & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -66,10 +66,7 @@ int kvmppc_mmu_radix_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
6666
bits = root & RPDS_MASK;
6767
root = root & RPDB_MASK;
6868

69-
/* P9 DD1 interprets RTS (radix tree size) differently */
7069
offset = rts + 31;
71-
if (cpu_has_feature(CPU_FTR_POWER9_DD1))
72-
offset -= 3;
7370

7471
/* current implementations only support 52-bit space */
7572
if (offset != 52)
@@ -160,17 +157,7 @@ static unsigned long kvmppc_radix_update_pte(struct kvm *kvm, pte_t *ptep,
160157
unsigned long clr, unsigned long set,
161158
unsigned long addr, unsigned int shift)
162159
{
163-
unsigned long old = 0;
164-
165-
if (!(clr & _PAGE_PRESENT) && cpu_has_feature(CPU_FTR_POWER9_DD1) &&
166-
pte_present(*ptep)) {
167-
/* have to invalidate it first */
168-
old = __radix_pte_update(ptep, _PAGE_PRESENT, 0);
169-
kvmppc_radix_tlbie_page(kvm, addr, shift);
170-
set |= _PAGE_PRESENT;
171-
old &= _PAGE_PRESENT;
172-
}
173-
return __radix_pte_update(ptep, clr, set) | old;
160+
return __radix_pte_update(ptep, clr, set);
174161
}
175162

176163
void kvmppc_radix_set_pte_at(struct kvm *kvm, unsigned long addr,

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