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sparc: Fix single-pcr perf event counter management.
It is important to clear the hw->state value for non-stopped events when they are added into the PMU. Otherwise when the event is scheduled out, we won't read the counter because HES_UPTODATE is still set. This breaks 'perf stat' and similar use cases, causing all the events to show zero. This worked for multi-pcr because we make explicit sparc_pmu_start() calls in calculate_multiple_pcrs(). calculate_single_pcr() doesn't do this because the idea there is to accumulate all of the counter settings into the single pcr value. So we have to add explicit hw->state handling there. Like x86, we use the PERF_HES_ARCH bit to track truly stopped events so that we don't accidently start them on a reload. Related to all of this, sparc_pmu_start() is missing a userpage update so add it. Signed-off-by: David S. Miller <davem@davemloft.net>
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arch/sparc/kernel/perf_event.c

Lines changed: 13 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -927,6 +927,8 @@ static void read_in_all_counters(struct cpu_hw_events *cpuc)
927927
sparc_perf_event_update(cp, &cp->hw,
928928
cpuc->current_idx[i]);
929929
cpuc->current_idx[i] = PIC_NO_INDEX;
930+
if (cp->hw.state & PERF_HES_STOPPED)
931+
cp->hw.state |= PERF_HES_ARCH;
930932
}
931933
}
932934
}
@@ -959,10 +961,12 @@ static void calculate_single_pcr(struct cpu_hw_events *cpuc)
959961

960962
enc = perf_event_get_enc(cpuc->events[i]);
961963
cpuc->pcr[0] &= ~mask_for_index(idx);
962-
if (hwc->state & PERF_HES_STOPPED)
964+
if (hwc->state & PERF_HES_ARCH) {
963965
cpuc->pcr[0] |= nop_for_index(idx);
964-
else
966+
} else {
965967
cpuc->pcr[0] |= event_encoding(enc, idx);
968+
hwc->state = 0;
969+
}
966970
}
967971
out:
968972
cpuc->pcr[0] |= cpuc->event[0]->hw.config_base;
@@ -988,6 +992,9 @@ static void calculate_multiple_pcrs(struct cpu_hw_events *cpuc)
988992

989993
cpuc->current_idx[i] = idx;
990994

995+
if (cp->hw.state & PERF_HES_ARCH)
996+
continue;
997+
991998
sparc_pmu_start(cp, PERF_EF_RELOAD);
992999
}
9931000
out:
@@ -1079,6 +1086,8 @@ static void sparc_pmu_start(struct perf_event *event, int flags)
10791086
event->hw.state = 0;
10801087

10811088
sparc_pmu_enable_event(cpuc, &event->hw, idx);
1089+
1090+
perf_event_update_userpage(event);
10821091
}
10831092

10841093
static void sparc_pmu_stop(struct perf_event *event, int flags)
@@ -1371,9 +1380,9 @@ static int sparc_pmu_add(struct perf_event *event, int ef_flags)
13711380
cpuc->events[n0] = event->hw.event_base;
13721381
cpuc->current_idx[n0] = PIC_NO_INDEX;
13731382

1374-
event->hw.state = PERF_HES_UPTODATE;
1383+
event->hw.state = PERF_HES_UPTODATE | PERF_HES_STOPPED;
13751384
if (!(ef_flags & PERF_EF_START))
1376-
event->hw.state |= PERF_HES_STOPPED;
1385+
event->hw.state |= PERF_HES_ARCH;
13771386

13781387
/*
13791388
* If group events scheduling transaction was started,

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