powerpc: Explicitly disable math features when copying thread

cyrilbur-ibm · mpe · commit d272f6670a0b · 2016-03-02T23:34:47.000+11:00
Currently when threads get scheduled off they always giveup the FPU,
Altivec (VMX) and Vector (VSX) units if they were using them. When they are
scheduled back on a fault is then taken to enable each facility and load
registers. As a result explicitly disabling FPU/VMX/VSX has not been
necessary.

Future changes and optimisations remove this mandatory giveup and fault
which could cause calls such as clone() and fork() to copy threads and run
them later with FPU/VMX/VSX enabled but no registers loaded.

This patch starts the process of having MSR_{FP,VEC,VSX} mean that a
threads registers are hot while not having MSR_{FP,VEC,VSX} means that the
registers must be loaded. This allows for a smarter return to userspace.

Signed-off-by: Cyril Bur &lt;cyrilbur@gmail.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
@@ -1307,6 +1307,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
 
 		f = ret_from_fork;
 	}
+	childregs->msr &= ~(MSR_FP|MSR_VEC|MSR_VSX);
 	sp -= STACK_FRAME_OVERHEAD;
 
 	/*

Original file line number	Diff line number	Diff line change
`@@ -1307,6 +1307,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,`
`1307`	`1307`
`1308`	`1308`	`f = ret_from_fork;`
`1309`	`1309`	`}`
	`1310`	`+ childregs->msr &= ~(MSR_FP\|MSR_VEC\|MSR_VSX);`
`1310`	`1311`	`sp -= STACK_FRAME_OVERHEAD;`
`1311`	`1312`
`1312`	`1313`	`/*`