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pinctrl: at91: convert __raw to endian agnostic IO
Use endian agnostic _relaxed IO accessors instead of the __raw ones. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Cc: Andrew Victor <linux@maxim.org.za> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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‎drivers/pinctrl/pinctrl-at91.c

Lines changed: 25 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -451,74 +451,74 @@ static enum at91_mux at91_mux_get_periph(void __iomem *pio, unsigned mask)
451451

452452
static bool at91_mux_get_deglitch(void __iomem *pio, unsigned pin)
453453
{
454-
return (__raw_readl(pio + PIO_IFSR) >> pin) & 0x1;
454+
return (readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1;
455455
}
456456

457457
static void at91_mux_set_deglitch(void __iomem *pio, unsigned mask, bool is_on)
458458
{
459-
__raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
459+
writel_relaxed(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
460460
}
461461

462462
static bool at91_mux_pio3_get_deglitch(void __iomem *pio, unsigned pin)
463463
{
464-
if ((__raw_readl(pio + PIO_IFSR) >> pin) & 0x1)
465-
return !((__raw_readl(pio + PIO_IFSCSR) >> pin) & 0x1);
464+
if ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1)
465+
return !((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1);
466466

467467
return false;
468468
}
469469

470470
static void at91_mux_pio3_set_deglitch(void __iomem *pio, unsigned mask, bool is_on)
471471
{
472472
if (is_on)
473-
__raw_writel(mask, pio + PIO_IFSCDR);
473+
writel_relaxed(mask, pio + PIO_IFSCDR);
474474
at91_mux_set_deglitch(pio, mask, is_on);
475475
}
476476

477477
static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div)
478478
{
479-
*div = __raw_readl(pio + PIO_SCDR);
479+
*div = readl_relaxed(pio + PIO_SCDR);
480480

481-
return ((__raw_readl(pio + PIO_IFSR) >> pin) & 0x1) &&
482-
((__raw_readl(pio + PIO_IFSCSR) >> pin) & 0x1);
481+
return ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1) &&
482+
((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1);
483483
}
484484

485485
static void at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask,
486486
bool is_on, u32 div)
487487
{
488488
if (is_on) {
489-
__raw_writel(mask, pio + PIO_IFSCER);
490-
__raw_writel(div & PIO_SCDR_DIV, pio + PIO_SCDR);
491-
__raw_writel(mask, pio + PIO_IFER);
489+
writel_relaxed(mask, pio + PIO_IFSCER);
490+
writel_relaxed(div & PIO_SCDR_DIV, pio + PIO_SCDR);
491+
writel_relaxed(mask, pio + PIO_IFER);
492492
} else
493-
__raw_writel(mask, pio + PIO_IFSCDR);
493+
writel_relaxed(mask, pio + PIO_IFSCDR);
494494
}
495495

496496
static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin)
497497
{
498-
return !((__raw_readl(pio + PIO_PPDSR) >> pin) & 0x1);
498+
return !((readl_relaxed(pio + PIO_PPDSR) >> pin) & 0x1);
499499
}
500500

501501
static void at91_mux_pio3_set_pulldown(void __iomem *pio, unsigned mask, bool is_on)
502502
{
503503
if (is_on)
504-
__raw_writel(mask, pio + PIO_PUDR);
504+
writel_relaxed(mask, pio + PIO_PUDR);
505505

506-
__raw_writel(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR));
506+
writel_relaxed(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR));
507507
}
508508

509509
static void at91_mux_pio3_disable_schmitt_trig(void __iomem *pio, unsigned mask)
510510
{
511-
__raw_writel(__raw_readl(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT);
511+
writel_relaxed(readl_relaxed(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT);
512512
}
513513

514514
static bool at91_mux_pio3_get_schmitt_trig(void __iomem *pio, unsigned pin)
515515
{
516-
return (__raw_readl(pio + PIO_SCHMITT) >> pin) & 0x1;
516+
return (readl_relaxed(pio + PIO_SCHMITT) >> pin) & 0x1;
517517
}
518518

519519
static inline u32 read_drive_strength(void __iomem *reg, unsigned pin)
520520
{
521-
unsigned tmp = __raw_readl(reg);
521+
unsigned tmp = readl_relaxed(reg);
522522

523523
tmp = tmp >> two_bit_pin_value_shift_amount(pin);
524524

@@ -554,13 +554,13 @@ static unsigned at91_mux_sam9x5_get_drivestrength(void __iomem *pio,
554554

555555
static void set_drive_strength(void __iomem *reg, unsigned pin, u32 strength)
556556
{
557-
unsigned tmp = __raw_readl(reg);
557+
unsigned tmp = readl_relaxed(reg);
558558
unsigned shift = two_bit_pin_value_shift_amount(pin);
559559

560560
tmp &= ~(DRIVE_STRENGTH_MASK << shift);
561561
tmp |= strength << shift;
562562

563-
__raw_writel(tmp, reg);
563+
writel_relaxed(tmp, reg);
564564
}
565565

566566
static void at91_mux_sama5d3_set_drivestrength(void __iomem *pio, unsigned pin,
@@ -1534,9 +1534,9 @@ void at91_pinctrl_gpio_suspend(void)
15341534

15351535
pio = gpio_chips[i]->regbase;
15361536

1537-
backups[i] = __raw_readl(pio + PIO_IMR);
1538-
__raw_writel(backups[i], pio + PIO_IDR);
1539-
__raw_writel(wakeups[i], pio + PIO_IER);
1537+
backups[i] = readl_relaxed(pio + PIO_IMR);
1538+
writel_relaxed(backups[i], pio + PIO_IDR);
1539+
writel_relaxed(wakeups[i], pio + PIO_IER);
15401540

15411541
if (!wakeups[i])
15421542
clk_disable_unprepare(gpio_chips[i]->clock);
@@ -1561,8 +1561,8 @@ void at91_pinctrl_gpio_resume(void)
15611561
if (!wakeups[i])
15621562
clk_prepare_enable(gpio_chips[i]->clock);
15631563

1564-
__raw_writel(wakeups[i], pio + PIO_IDR);
1565-
__raw_writel(backups[i], pio + PIO_IER);
1564+
writel_relaxed(wakeups[i], pio + PIO_IDR);
1565+
writel_relaxed(backups[i], pio + PIO_IER);
15661566
}
15671567
}
15681568

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