Skip to content

Commit d8efd82

Browse files
torvaldstorvalds
committed
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS fixes from Ralf Baechle: "These are four patches for three construction sites: - Fix register decoding for the combination of multi-core processors and multi-threading. - Two more fixes that are part of the ongoing DECstation resurrection work. One of these touches a DECstation-only network driver. - Finally Markos' trivial build fix for the AP/SP support. (With this applied now all MIPS defconfigs are building again)" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: kernel: vpe: Make vpe_attrs an array of pointers. MIPS: Fix SMP core calculations when using MT support. MIPS: DECstation I/O ASIC DMA interrupt handling fix MIPS: DECstation HRT initialization rearrangement
2 parents cd619e2 + 1b46763 commit d8efd82

File tree

7 files changed

+50
-8
lines changed

7 files changed

+50
-8
lines changed

‎arch/mips/dec/ioasic-irq.c

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,14 @@ static struct irq_chip ioasic_irq_type = {
5151
.irq_unmask = unmask_ioasic_irq,
5252
};
5353

54+
void clear_ioasic_dma_irq(unsigned int irq)
55+
{
56+
u32 sir;
57+
58+
sir = ~(1 << (irq - ioasic_irq_base));
59+
ioasic_write(IO_REG_SIR, sir);
60+
}
61+
5462
static struct irq_chip ioasic_dma_irq_type = {
5563
.name = "IO-ASIC-DMA",
5664
.irq_ack = ack_ioasic_irq,

‎arch/mips/dec/time.c

Lines changed: 19 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -125,12 +125,16 @@ int rtc_mips_set_mmss(unsigned long nowtime)
125125

126126
void __init plat_time_init(void)
127127
{
128+
int ioasic_clock = 0;
128129
u32 start, end;
129130
int i = HZ / 8;
130131

131132
/* Set up the rate of periodic DS1287 interrupts. */
132133
ds1287_set_base_clock(HZ);
133134

135+
/* On some I/O ASIC systems we have the I/O ASIC's counter. */
136+
if (IOASIC)
137+
ioasic_clock = dec_ioasic_clocksource_init() == 0;
134138
if (cpu_has_counter) {
135139
ds1287_timer_state();
136140
while (!ds1287_timer_state())
@@ -147,9 +151,21 @@ void __init plat_time_init(void)
147151
mips_hpt_frequency = (end - start) * 8;
148152
printk(KERN_INFO "MIPS counter frequency %dHz\n",
149153
mips_hpt_frequency);
150-
} else if (IOASIC)
151-
/* For pre-R4k systems we use the I/O ASIC's counter. */
152-
dec_ioasic_clocksource_init();
154+
155+
/*
156+
* All R4k DECstations suffer from the CP0 Count erratum,
157+
* so we can't use the timer as a clock source, and a clock
158+
* event both at a time. An accurate wall clock is more
159+
* important than a high-precision interval timer so only
160+
* use the timer as a clock source, and not a clock event
161+
* if there's no I/O ASIC counter available to serve as a
162+
* clock source.
163+
*/
164+
if (!ioasic_clock) {
165+
init_r4k_clocksource();
166+
mips_hpt_frequency = 0;
167+
}
168+
}
153169

154170
ds1287_clockevent_init(dec_interrupt[DEC_IRQ_RTC]);
155171
}

‎arch/mips/include/asm/dec/ioasic.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,8 +31,10 @@ static inline u32 ioasic_read(unsigned int reg)
3131
return ioasic_base[reg / 4];
3232
}
3333

34+
extern void clear_ioasic_dma_irq(unsigned int irq);
35+
3436
extern void init_ioasic_irqs(int base);
3537

36-
extern void dec_ioasic_clocksource_init(void);
38+
extern int dec_ioasic_clocksource_init(void);
3739

3840
#endif /* __ASM_DEC_IOASIC_H */

‎arch/mips/kernel/csrc-ioasic.c

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,7 @@ static struct clocksource clocksource_dec = {
3737
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
3838
};
3939

40-
void __init dec_ioasic_clocksource_init(void)
40+
int __init dec_ioasic_clocksource_init(void)
4141
{
4242
unsigned int freq;
4343
u32 start, end;
@@ -56,8 +56,14 @@ void __init dec_ioasic_clocksource_init(void)
5656
end = dec_ioasic_hpt_read(&clocksource_dec);
5757

5858
freq = (end - start) * 8;
59+
60+
/* An early revision of the I/O ASIC didn't have the counter. */
61+
if (!freq)
62+
return -ENXIO;
63+
5964
printk(KERN_INFO "I/O ASIC clock frequency %dHz\n", freq);
6065

6166
clocksource_dec.rating = 200 + freq / 10000000;
6267
clocksource_register_hz(&clocksource_dec, freq);
68+
return 0;
6369
}

‎arch/mips/kernel/smp-cmp.c

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -99,7 +99,9 @@ static void cmp_init_secondary(void)
9999

100100
c->core = (read_c0_ebase() >> 1) & 0x1ff;
101101
#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC)
102-
c->vpe_id = (read_c0_tcbind() >> TCBIND_CURVPE_SHIFT) & TCBIND_CURVPE;
102+
if (cpu_has_mipsmt)
103+
c->vpe_id = (read_c0_tcbind() >> TCBIND_CURVPE_SHIFT) &
104+
TCBIND_CURVPE;
103105
#endif
104106
#ifdef CONFIG_MIPS_MT_SMTC
105107
c->tc_id = (read_c0_tcbind() & TCBIND_CURTC) >> TCBIND_CURTC_SHIFT;
@@ -177,9 +179,16 @@ void __init cmp_smp_setup(void)
177179
}
178180

179181
if (cpu_has_mipsmt) {
180-
unsigned int nvpe, mvpconf0 = read_c0_mvpconf0();
182+
unsigned int nvpe = 1;
183+
#ifdef CONFIG_MIPS_MT_SMP
184+
unsigned int mvpconf0 = read_c0_mvpconf0();
185+
186+
nvpe = ((mvpconf0 & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT) + 1;
187+
#elif defined(CONFIG_MIPS_MT_SMTC)
188+
unsigned int mvpconf0 = read_c0_mvpconf0();
181189

182190
nvpe = ((mvpconf0 & MVPCONF0_PTC) >> MVPCONF0_PTC_SHIFT) + 1;
191+
#endif
183192
smp_num_siblings = nvpe;
184193
}
185194
pr_info("Detected %i available secondary CPU(s)\n", ncpu);

‎arch/mips/kernel/vpe.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1368,7 +1368,7 @@ static ssize_t ntcs_store(struct device *dev, struct device_attribute *attr,
13681368
}
13691369
static DEVICE_ATTR_RW(ntcs);
13701370

1371-
static struct attribute vpe_attrs[] = {
1371+
static struct attribute *vpe_attrs[] = {
13721372
&dev_attr_kill.attr,
13731373
&dev_attr_ntcs.attr,
13741374
NULL,

‎drivers/net/ethernet/amd/declance.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -725,6 +725,7 @@ static irqreturn_t lance_dma_merr_int(int irq, void *dev_id)
725725
{
726726
struct net_device *dev = dev_id;
727727

728+
clear_ioasic_dma_irq(irq);
728729
printk(KERN_ERR "%s: DMA error\n", dev->name);
729730
return IRQ_HANDLED;
730731
}

0 commit comments

Comments
 (0)