Skip to content

Commit da612d8

Browse files
pzanoni-inteldanvet
pzanoni-intel
authored and
danvet
committed
drm/i915: add more Haswell PCI IDs
Also properly indent the HB IDs. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
1 parent 5ab3633 commit da612d8

File tree

3 files changed

+123
-7
lines changed

3 files changed

+123
-7
lines changed

‎drivers/char/agp/intel-agp.h

Lines changed: 34 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -239,16 +239,45 @@
239239
#define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_GT2_IG 0x016A
240240
#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_HB 0x0F00 /* VLV1 */
241241
#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_IG 0x0F30
242-
#define PCI_DEVICE_ID_INTEL_HASWELL_HB 0x0400 /* Desktop */
242+
#define PCI_DEVICE_ID_INTEL_HASWELL_HB 0x0400 /* Desktop */
243243
#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT1_IG 0x0402
244244
#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_IG 0x0412
245-
#define PCI_DEVICE_ID_INTEL_HASWELL_M_HB 0x0404 /* Mobile */
245+
#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_PLUS_IG 0x0422
246+
#define PCI_DEVICE_ID_INTEL_HASWELL_M_HB 0x0404 /* Mobile */
246247
#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT1_IG 0x0406
247248
#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_IG 0x0416
248-
#define PCI_DEVICE_ID_INTEL_HASWELL_S_HB 0x0408 /* Server */
249+
#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_PLUS_IG 0x0426
250+
#define PCI_DEVICE_ID_INTEL_HASWELL_S_HB 0x0408 /* Server */
249251
#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT1_IG 0x040a
250252
#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_IG 0x041a
251-
#define PCI_DEVICE_ID_INTEL_HASWELL_SDV 0x0c16 /* SDV */
252-
#define PCI_DEVICE_ID_INTEL_HASWELL_E_HB 0x0c04
253+
#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_PLUS_IG 0x042a
254+
#define PCI_DEVICE_ID_INTEL_HASWELL_E_HB 0x0c04
255+
#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT1_IG 0x0C02
256+
#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT2_IG 0x0C12
257+
#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT2_PLUS_IG 0x0C22
258+
#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT1_IG 0x0C06
259+
#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT2_IG 0x0C16
260+
#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT2_PLUS_IG 0x0C26
261+
#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT1_IG 0x0C0A
262+
#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT2_IG 0x0C1A
263+
#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT2_PLUS_IG 0x0C2A
264+
#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT1_IG 0x0A02
265+
#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT2_IG 0x0A12
266+
#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT2_PLUS_IG 0x0A22
267+
#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT1_IG 0x0A06
268+
#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT2_IG 0x0A16
269+
#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT2_PLUS_IG 0x0A26
270+
#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT1_IG 0x0A0A
271+
#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT2_IG 0x0A1A
272+
#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT2_PLUS_IG 0x0A2A
273+
#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT1_IG 0x0D12
274+
#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT2_IG 0x0D22
275+
#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT2_PLUS_IG 0x0D32
276+
#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT1_IG 0x0D16
277+
#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT2_IG 0x0D26
278+
#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT2_PLUS_IG 0x0D36
279+
#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT1_IG 0x0D1A
280+
#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT2_IG 0x0D2A
281+
#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT2_PLUS_IG 0x0D3A
253282

254283
#endif

‎drivers/char/agp/intel-gtt.c

Lines changed: 59 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1502,15 +1502,73 @@ static const struct intel_gtt_driver_description {
15021502
"Haswell", &sandybridge_gtt_driver },
15031503
{ PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_IG,
15041504
"Haswell", &sandybridge_gtt_driver },
1505+
{ PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_PLUS_IG,
1506+
"Haswell", &sandybridge_gtt_driver },
15051507
{ PCI_DEVICE_ID_INTEL_HASWELL_M_GT1_IG,
15061508
"Haswell", &sandybridge_gtt_driver },
15071509
{ PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_IG,
15081510
"Haswell", &sandybridge_gtt_driver },
1511+
{ PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_PLUS_IG,
1512+
"Haswell", &sandybridge_gtt_driver },
15091513
{ PCI_DEVICE_ID_INTEL_HASWELL_S_GT1_IG,
15101514
"Haswell", &sandybridge_gtt_driver },
15111515
{ PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_IG,
15121516
"Haswell", &sandybridge_gtt_driver },
1513-
{ PCI_DEVICE_ID_INTEL_HASWELL_SDV,
1517+
{ PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_PLUS_IG,
1518+
"Haswell", &sandybridge_gtt_driver },
1519+
{ PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT1_IG,
1520+
"Haswell", &sandybridge_gtt_driver },
1521+
{ PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT2_IG,
1522+
"Haswell", &sandybridge_gtt_driver },
1523+
{ PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT2_PLUS_IG,
1524+
"Haswell", &sandybridge_gtt_driver },
1525+
{ PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT1_IG,
1526+
"Haswell", &sandybridge_gtt_driver },
1527+
{ PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT2_IG,
1528+
"Haswell", &sandybridge_gtt_driver },
1529+
{ PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT2_PLUS_IG,
1530+
"Haswell", &sandybridge_gtt_driver },
1531+
{ PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT1_IG,
1532+
"Haswell", &sandybridge_gtt_driver },
1533+
{ PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT2_IG,
1534+
"Haswell", &sandybridge_gtt_driver },
1535+
{ PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT2_PLUS_IG,
1536+
"Haswell", &sandybridge_gtt_driver },
1537+
{ PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT1_IG,
1538+
"Haswell", &sandybridge_gtt_driver },
1539+
{ PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT2_IG,
1540+
"Haswell", &sandybridge_gtt_driver },
1541+
{ PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT2_PLUS_IG,
1542+
"Haswell", &sandybridge_gtt_driver },
1543+
{ PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT1_IG,
1544+
"Haswell", &sandybridge_gtt_driver },
1545+
{ PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT2_IG,
1546+
"Haswell", &sandybridge_gtt_driver },
1547+
{ PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT2_PLUS_IG,
1548+
"Haswell", &sandybridge_gtt_driver },
1549+
{ PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT1_IG,
1550+
"Haswell", &sandybridge_gtt_driver },
1551+
{ PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT2_IG,
1552+
"Haswell", &sandybridge_gtt_driver },
1553+
{ PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT2_PLUS_IG,
1554+
"Haswell", &sandybridge_gtt_driver },
1555+
{ PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT1_IG,
1556+
"Haswell", &sandybridge_gtt_driver },
1557+
{ PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT2_IG,
1558+
"Haswell", &sandybridge_gtt_driver },
1559+
{ PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT2_PLUS_IG,
1560+
"Haswell", &sandybridge_gtt_driver },
1561+
{ PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT1_IG,
1562+
"Haswell", &sandybridge_gtt_driver },
1563+
{ PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT2_IG,
1564+
"Haswell", &sandybridge_gtt_driver },
1565+
{ PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT2_PLUS_IG,
1566+
"Haswell", &sandybridge_gtt_driver },
1567+
{ PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT1_IG,
1568+
"Haswell", &sandybridge_gtt_driver },
1569+
{ PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT2_IG,
1570+
"Haswell", &sandybridge_gtt_driver },
1571+
{ PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT2_PLUS_IG,
15141572
"Haswell", &sandybridge_gtt_driver },
15151573
{ 0, NULL, NULL }
15161574
};

‎drivers/gpu/drm/i915/i915_drv.c

Lines changed: 30 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -346,11 +346,40 @@ static const struct pci_device_id pciidlist[] = { /* aka */
346346
INTEL_VGA_DEVICE(0x016a, &intel_ivybridge_d_info), /* GT2 server */
347347
INTEL_VGA_DEVICE(0x0402, &intel_haswell_d_info), /* GT1 desktop */
348348
INTEL_VGA_DEVICE(0x0412, &intel_haswell_d_info), /* GT2 desktop */
349+
INTEL_VGA_DEVICE(0x0422, &intel_haswell_d_info), /* GT2 desktop */
349350
INTEL_VGA_DEVICE(0x040a, &intel_haswell_d_info), /* GT1 server */
350351
INTEL_VGA_DEVICE(0x041a, &intel_haswell_d_info), /* GT2 server */
352+
INTEL_VGA_DEVICE(0x042a, &intel_haswell_d_info), /* GT2 server */
351353
INTEL_VGA_DEVICE(0x0406, &intel_haswell_m_info), /* GT1 mobile */
352354
INTEL_VGA_DEVICE(0x0416, &intel_haswell_m_info), /* GT2 mobile */
353-
INTEL_VGA_DEVICE(0x0c16, &intel_haswell_d_info), /* SDV */
355+
INTEL_VGA_DEVICE(0x0426, &intel_haswell_m_info), /* GT2 mobile */
356+
INTEL_VGA_DEVICE(0x0C02, &intel_haswell_d_info), /* SDV GT1 desktop */
357+
INTEL_VGA_DEVICE(0x0C12, &intel_haswell_d_info), /* SDV GT2 desktop */
358+
INTEL_VGA_DEVICE(0x0C22, &intel_haswell_d_info), /* SDV GT2 desktop */
359+
INTEL_VGA_DEVICE(0x0C0A, &intel_haswell_d_info), /* SDV GT1 server */
360+
INTEL_VGA_DEVICE(0x0C1A, &intel_haswell_d_info), /* SDV GT2 server */
361+
INTEL_VGA_DEVICE(0x0C2A, &intel_haswell_d_info), /* SDV GT2 server */
362+
INTEL_VGA_DEVICE(0x0C06, &intel_haswell_m_info), /* SDV GT1 mobile */
363+
INTEL_VGA_DEVICE(0x0C16, &intel_haswell_m_info), /* SDV GT2 mobile */
364+
INTEL_VGA_DEVICE(0x0C26, &intel_haswell_m_info), /* SDV GT2 mobile */
365+
INTEL_VGA_DEVICE(0x0A02, &intel_haswell_d_info), /* ULT GT1 desktop */
366+
INTEL_VGA_DEVICE(0x0A12, &intel_haswell_d_info), /* ULT GT2 desktop */
367+
INTEL_VGA_DEVICE(0x0A22, &intel_haswell_d_info), /* ULT GT2 desktop */
368+
INTEL_VGA_DEVICE(0x0A0A, &intel_haswell_d_info), /* ULT GT1 server */
369+
INTEL_VGA_DEVICE(0x0A1A, &intel_haswell_d_info), /* ULT GT2 server */
370+
INTEL_VGA_DEVICE(0x0A2A, &intel_haswell_d_info), /* ULT GT2 server */
371+
INTEL_VGA_DEVICE(0x0A06, &intel_haswell_m_info), /* ULT GT1 mobile */
372+
INTEL_VGA_DEVICE(0x0A16, &intel_haswell_m_info), /* ULT GT2 mobile */
373+
INTEL_VGA_DEVICE(0x0A26, &intel_haswell_m_info), /* ULT GT2 mobile */
374+
INTEL_VGA_DEVICE(0x0D12, &intel_haswell_d_info), /* CRW GT1 desktop */
375+
INTEL_VGA_DEVICE(0x0D22, &intel_haswell_d_info), /* CRW GT2 desktop */
376+
INTEL_VGA_DEVICE(0x0D32, &intel_haswell_d_info), /* CRW GT2 desktop */
377+
INTEL_VGA_DEVICE(0x0D1A, &intel_haswell_d_info), /* CRW GT1 server */
378+
INTEL_VGA_DEVICE(0x0D2A, &intel_haswell_d_info), /* CRW GT2 server */
379+
INTEL_VGA_DEVICE(0x0D3A, &intel_haswell_d_info), /* CRW GT2 server */
380+
INTEL_VGA_DEVICE(0x0D16, &intel_haswell_m_info), /* CRW GT1 mobile */
381+
INTEL_VGA_DEVICE(0x0D26, &intel_haswell_m_info), /* CRW GT2 mobile */
382+
INTEL_VGA_DEVICE(0x0D36, &intel_haswell_m_info), /* CRW GT2 mobile */
354383
INTEL_VGA_DEVICE(0x0f30, &intel_valleyview_m_info),
355384
INTEL_VGA_DEVICE(0x0157, &intel_valleyview_m_info),
356385
INTEL_VGA_DEVICE(0x0155, &intel_valleyview_d_info),

0 commit comments

Comments
 (0)