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paulusmackmpe
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powerpc/64: More definitions for POWER9
This adds definitions for bits in the DSISR register which are used by POWER9 for various translation-related exception conditions, and for some more bits in the partition table entry that will be needed by KVM. Signed-off-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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arch/powerpc/include/asm/book3s/64/mmu.h

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@@ -44,10 +44,20 @@ struct patb_entry {
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};
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extern struct patb_entry *partition_tb;
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/* Bits in patb0 field */
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#define PATB_HR (1UL << 63)
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#define PATB_GR (1UL << 63)
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#define RPDB_MASK 0x0ffffffffffff00fUL
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#define RPDB_SHIFT (1UL << 8)
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#define RTS1_SHIFT 61 /* top 2 bits of radix tree size */
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#define RTS1_MASK (3UL << RTS1_SHIFT)
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#define RTS2_SHIFT 5 /* bottom 3 bits of radix tree size */
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#define RTS2_MASK (7UL << RTS2_SHIFT)
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#define RPDS_MASK 0x1f /* root page dir. size field */
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/* Bits in patb1 field */
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#define PATB_GR (1UL << 63) /* guest uses radix; must match HR */
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#define PRTS_MASK 0x1f /* process table size field */
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/*
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* Limit process table to PAGE_SIZE table. This
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* also limit the max pid we can support.

arch/powerpc/include/asm/reg.h

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@@ -274,10 +274,14 @@
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#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */
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#define DSISR_NOHPTE 0x40000000 /* no translation found */
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#define DSISR_PROTFAULT 0x08000000 /* protection fault */
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#define DSISR_BADACCESS 0x04000000 /* bad access to CI or G */
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#define DSISR_ISSTORE 0x02000000 /* access was a store */
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#define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */
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#define DSISR_NOSEGMENT 0x00200000 /* SLB miss */
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#define DSISR_KEYFAULT 0x00200000 /* Key fault */
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#define DSISR_UNSUPP_MMU 0x00080000 /* Unsupported MMU config */
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#define DSISR_SET_RC 0x00040000 /* Failed setting of R/C bits */
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#define DSISR_PGDIRFAULT 0x00020000 /* Fault on page directory */
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#define SPRN_TBRL 0x10C /* Time Base Read Lower Register (user, R/O) */
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#define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */
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#define SPRN_CIR 0x11B /* Chip Information Register (hyper, R/0) */

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