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Merge tag 'arc-v4.2-rc6-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull ARC fixes from Vineet Gupta: "Here's a late pull request for accumulated ARC fixes which came out of extended testing of the new ARCv2 port with LTP etc. llock/scond livelock workaround has been reviewed by PeterZ. The changes look a lot but I've crafted them into finer grained patches for better tracking later. I have some more fixes (ARC Futex backend) ready to go but those will have to wait for tglx to return from vacation. Summary: - Enable a reduced config of HS38 (w/o div-rem, ll64...) - Add software workaround for LLOCK/SCOND livelock - Fallout of a recent pt_regs update" * tag 'arc-v4.2-rc6-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARCv2: spinlock/rwlock/atomics: reduce 1 instruction in exponential backoff ARC: Make pt_regs regs unsigned ARCv2: spinlock/rwlock: Reset retry delay when starting a new spin-wait cycle ARCv2: spinlock/rwlock/atomics: Delayed retry of failed SCOND with exponential backoff ARC: LLOCK/SCOND based rwlock ARC: LLOCK/SCOND based spin_lock ARC: refactor atomic inline asm operands with symbolic names Revert "ARCv2: STAR 9000837815 workaround hardware exclusive transactions livelock" ARCv2: [axs103_smp] Reduce clk for Quad FPGA configs ARCv2: Fix the peripheral address space detection ARCv2: allow selection of page size for MMUv4 ARCv2: lib: memset: Don't assume 64-bit load/stores ARCv2: lib: memcpy: Missing PREFETCHW ARCv2: add knob for DIV_REV in Kconfig ARC/time: Migrate to new 'set-state' interface
2 parents b3b98a5 + 1097163 commit dd2384a

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‎arch/arc/Kconfig

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -313,11 +313,11 @@ config ARC_PAGE_SIZE_8K
313313

314314
config ARC_PAGE_SIZE_16K
315315
bool "16KB"
316-
depends on ARC_MMU_V3
316+
depends on ARC_MMU_V3 || ARC_MMU_V4
317317

318318
config ARC_PAGE_SIZE_4K
319319
bool "4KB"
320-
depends on ARC_MMU_V3
320+
depends on ARC_MMU_V3 || ARC_MMU_V4
321321

322322
endchoice
323323

@@ -365,6 +365,11 @@ config ARC_HAS_LLSC
365365
default y
366366
depends on !ARC_CANT_LLSC
367367

368+
config ARC_STAR_9000923308
369+
bool "Workaround for llock/scond livelock"
370+
default y
371+
depends on ISA_ARCV2 && SMP && ARC_HAS_LLSC
372+
368373
config ARC_HAS_SWAPE
369374
bool "Insn: SWAPE (endian-swap)"
370375
default y
@@ -379,6 +384,10 @@ config ARC_HAS_LL64
379384
dest operands with 2 possible source operands.
380385
default y
381386

387+
config ARC_HAS_DIV_REM
388+
bool "Insn: div, divu, rem, remu"
389+
default y
390+
382391
config ARC_HAS_RTC
383392
bool "Local 64-bit r/o cycle counter"
384393
default n

‎arch/arc/Makefile

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,8 +36,16 @@ cflags-$(atleast_gcc44) += -fsection-anchors
3636
cflags-$(CONFIG_ARC_HAS_LLSC) += -mlock
3737
cflags-$(CONFIG_ARC_HAS_SWAPE) += -mswape
3838

39+
ifdef CONFIG_ISA_ARCV2
40+
3941
ifndef CONFIG_ARC_HAS_LL64
40-
cflags-$(CONFIG_ISA_ARCV2) += -mno-ll64
42+
cflags-y += -mno-ll64
43+
endif
44+
45+
ifndef CONFIG_ARC_HAS_DIV_REM
46+
cflags-y += -mno-div-rem
47+
endif
48+
4149
endif
4250

4351
cflags-$(CONFIG_ARC_DW2_UNWIND) += -fasynchronous-unwind-tables

‎arch/arc/include/asm/arcregs.h

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -89,11 +89,10 @@
8989
#define ECR_C_BIT_DTLB_LD_MISS 8
9090
#define ECR_C_BIT_DTLB_ST_MISS 9
9191

92-
9392
/* Auxiliary registers */
9493
#define AUX_IDENTITY 4
9594
#define AUX_INTR_VEC_BASE 0x25
96-
95+
#define AUX_NON_VOL 0x5e
9796

9897
/*
9998
* Floating Pt Registers
@@ -240,9 +239,9 @@ struct bcr_extn_xymem {
240239

241240
struct bcr_perip {
242241
#ifdef CONFIG_CPU_BIG_ENDIAN
243-
unsigned int start:8, pad2:8, sz:8, pad:8;
242+
unsigned int start:8, pad2:8, sz:8, ver:8;
244243
#else
245-
unsigned int pad:8, sz:8, pad2:8, start:8;
244+
unsigned int ver:8, sz:8, pad2:8, start:8;
246245
#endif
247246
};
248247

‎arch/arc/include/asm/atomic.h

Lines changed: 55 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -23,33 +23,60 @@
2323

2424
#define atomic_set(v, i) (((v)->counter) = (i))
2525

26-
#ifdef CONFIG_ISA_ARCV2
27-
#define PREFETCHW " prefetchw [%1] \n"
28-
#else
29-
#define PREFETCHW
26+
#ifdef CONFIG_ARC_STAR_9000923308
27+
28+
#define SCOND_FAIL_RETRY_VAR_DEF \
29+
unsigned int delay = 1, tmp; \
30+
31+
#define SCOND_FAIL_RETRY_ASM \
32+
" bz 4f \n" \
33+
" ; --- scond fail delay --- \n" \
34+
" mov %[tmp], %[delay] \n" /* tmp = delay */ \
35+
"2: brne.d %[tmp], 0, 2b \n" /* while (tmp != 0) */ \
36+
" sub %[tmp], %[tmp], 1 \n" /* tmp-- */ \
37+
" rol %[delay], %[delay] \n" /* delay *= 2 */ \
38+
" b 1b \n" /* start over */ \
39+
"4: ; --- success --- \n" \
40+
41+
#define SCOND_FAIL_RETRY_VARS \
42+
,[delay] "+&r" (delay),[tmp] "=&r" (tmp) \
43+
44+
#else /* !CONFIG_ARC_STAR_9000923308 */
45+
46+
#define SCOND_FAIL_RETRY_VAR_DEF
47+
48+
#define SCOND_FAIL_RETRY_ASM \
49+
" bnz 1b \n" \
50+
51+
#define SCOND_FAIL_RETRY_VARS
52+
3053
#endif
3154

3255
#define ATOMIC_OP(op, c_op, asm_op) \
3356
static inline void atomic_##op(int i, atomic_t *v) \
3457
{ \
35-
unsigned int temp; \
58+
unsigned int val; \
59+
SCOND_FAIL_RETRY_VAR_DEF \
3660
\
3761
__asm__ __volatile__( \
38-
"1: \n" \
39-
PREFETCHW \
40-
" llock %0, [%1] \n" \
41-
" " #asm_op " %0, %0, %2 \n" \
42-
" scond %0, [%1] \n" \
43-
" bnz 1b \n" \
44-
: "=&r"(temp) /* Early clobber, to prevent reg reuse */ \
45-
: "r"(&v->counter), "ir"(i) \
62+
"1: llock %[val], [%[ctr]] \n" \
63+
" " #asm_op " %[val], %[val], %[i] \n" \
64+
" scond %[val], [%[ctr]] \n" \
65+
" \n" \
66+
SCOND_FAIL_RETRY_ASM \
67+
\
68+
: [val] "=&r" (val) /* Early clobber to prevent reg reuse */ \
69+
SCOND_FAIL_RETRY_VARS \
70+
: [ctr] "r" (&v->counter), /* Not "m": llock only supports reg direct addr mode */ \
71+
[i] "ir" (i) \
4672
: "cc"); \
4773
} \
4874

4975
#define ATOMIC_OP_RETURN(op, c_op, asm_op) \
5076
static inline int atomic_##op##_return(int i, atomic_t *v) \
5177
{ \
52-
unsigned int temp; \
78+
unsigned int val; \
79+
SCOND_FAIL_RETRY_VAR_DEF \
5380
\
5481
/* \
5582
* Explicit full memory barrier needed before/after as \
@@ -58,19 +85,21 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \
5885
smp_mb(); \
5986
\
6087
__asm__ __volatile__( \
61-
"1: \n" \
62-
PREFETCHW \
63-
" llock %0, [%1] \n" \
64-
" " #asm_op " %0, %0, %2 \n" \
65-
" scond %0, [%1] \n" \
66-
" bnz 1b \n" \
67-
: "=&r"(temp) \
68-
: "r"(&v->counter), "ir"(i) \
88+
"1: llock %[val], [%[ctr]] \n" \
89+
" " #asm_op " %[val], %[val], %[i] \n" \
90+
" scond %[val], [%[ctr]] \n" \
91+
" \n" \
92+
SCOND_FAIL_RETRY_ASM \
93+
\
94+
: [val] "=&r" (val) \
95+
SCOND_FAIL_RETRY_VARS \
96+
: [ctr] "r" (&v->counter), \
97+
[i] "ir" (i) \
6998
: "cc"); \
7099
\
71100
smp_mb(); \
72101
\
73-
return temp; \
102+
return val; \
74103
}
75104

76105
#else /* !CONFIG_ARC_HAS_LLSC */
@@ -150,6 +179,9 @@ ATOMIC_OP(and, &=, and)
150179
#undef ATOMIC_OPS
151180
#undef ATOMIC_OP_RETURN
152181
#undef ATOMIC_OP
182+
#undef SCOND_FAIL_RETRY_VAR_DEF
183+
#undef SCOND_FAIL_RETRY_ASM
184+
#undef SCOND_FAIL_RETRY_VARS
153185

154186
/**
155187
* __atomic_add_unless - add unless the number is a given value

‎arch/arc/include/asm/ptrace.h

Lines changed: 27 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -20,20 +20,20 @@
2020
struct pt_regs {
2121

2222
/* Real registers */
23-
long bta; /* bta_l1, bta_l2, erbta */
23+
unsigned long bta; /* bta_l1, bta_l2, erbta */
2424

25-
long lp_start, lp_end, lp_count;
25+
unsigned long lp_start, lp_end, lp_count;
2626

27-
long status32; /* status32_l1, status32_l2, erstatus */
28-
long ret; /* ilink1, ilink2 or eret */
29-
long blink;
30-
long fp;
31-
long r26; /* gp */
27+
unsigned long status32; /* status32_l1, status32_l2, erstatus */
28+
unsigned long ret; /* ilink1, ilink2 or eret */
29+
unsigned long blink;
30+
unsigned long fp;
31+
unsigned long r26; /* gp */
3232

33-
long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;
33+
unsigned long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;
3434

35-
long sp; /* user/kernel sp depending on where we came from */
36-
long orig_r0;
35+
unsigned long sp; /* User/Kernel depending on where we came from */
36+
unsigned long orig_r0;
3737

3838
/*
3939
* To distinguish bet excp, syscall, irq
@@ -55,13 +55,13 @@ struct pt_regs {
5555
unsigned long event;
5656
};
5757

58-
long user_r25;
58+
unsigned long user_r25;
5959
};
6060
#else
6161

6262
struct pt_regs {
6363

64-
long orig_r0;
64+
unsigned long orig_r0;
6565

6666
union {
6767
struct {
@@ -76,37 +76,37 @@ struct pt_regs {
7676
unsigned long event;
7777
};
7878

79-
long bta; /* bta_l1, bta_l2, erbta */
79+
unsigned long bta; /* bta_l1, bta_l2, erbta */
8080

81-
long user_r25;
81+
unsigned long user_r25;
8282

83-
long r26; /* gp */
84-
long fp;
85-
long sp; /* user/kernel sp depending on where we came from */
83+
unsigned long r26; /* gp */
84+
unsigned long fp;
85+
unsigned long sp; /* user/kernel sp depending on where we came from */
8686

87-
long r12;
87+
unsigned long r12;
8888

8989
/*------- Below list auto saved by h/w -----------*/
90-
long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11;
90+
unsigned long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11;
9191

92-
long blink;
93-
long lp_end, lp_start, lp_count;
92+
unsigned long blink;
93+
unsigned long lp_end, lp_start, lp_count;
9494

95-
long ei, ldi, jli;
95+
unsigned long ei, ldi, jli;
9696

97-
long ret;
98-
long status32;
97+
unsigned long ret;
98+
unsigned long status32;
9999
};
100100

101101
#endif
102102

103103
/* Callee saved registers - need to be saved only when you are scheduled out */
104104

105105
struct callee_regs {
106-
long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13;
106+
unsigned long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13;
107107
};
108108

109-
#define instruction_pointer(regs) (unsigned long)((regs)->ret)
109+
#define instruction_pointer(regs) ((regs)->ret)
110110
#define profile_pc(regs) instruction_pointer(regs)
111111

112112
/* return 1 if user mode or 0 if kernel mode */
@@ -142,7 +142,7 @@ struct callee_regs {
142142

143143
static inline long regs_return_value(struct pt_regs *regs)
144144
{
145-
return regs->r0;
145+
return (long)regs->r0;
146146
}
147147

148148
#endif /* !__ASSEMBLY__ */

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