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Merge tag 'samsung-pinctrl-4.18-2' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel
Samsung pinctrl drivers changes for v4.18 1. Driver expects specific order of GPIO interrupt banks. For S5Pv220 and Exynos5410 this order was not preserved so fix and document it. 2. Remove support for Exynos5440 (tree-wide, support is dropped because there are no real users of this platform, it also did not get testing since long time). 3. Fix lost state of GPF1..5 pins on Exynos5433 during system suspend.
2 parents 316a67b + 7c24e71 commit de8a6c6

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6 files changed

+51
-1017
lines changed

6 files changed

+51
-1017
lines changed

‎drivers/pinctrl/samsung/Kconfig

Lines changed: 2 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -8,26 +8,20 @@ config PINCTRL_SAMSUNG
88
select PINCONF
99

1010
config PINCTRL_EXYNOS
11-
bool "Pinctrl driver data for Samsung EXYNOS SoCs other than 5440"
11+
bool "Pinctrl driver data for Samsung EXYNOS SoCs"
1212
depends on OF && GPIOLIB && (ARCH_EXYNOS || ARCH_S5PV210)
1313
select PINCTRL_SAMSUNG
1414
select PINCTRL_EXYNOS_ARM if ARM && (ARCH_EXYNOS || ARCH_S5PV210)
1515
select PINCTRL_EXYNOS_ARM64 if ARM64 && ARCH_EXYNOS
1616

1717
config PINCTRL_EXYNOS_ARM
18-
bool "ARMv7-specific pinctrl driver data for Exynos (except Exynos5440)" if COMPILE_TEST
18+
bool "ARMv7-specific pinctrl driver data for Exynos" if COMPILE_TEST
1919
depends on PINCTRL_EXYNOS
2020

2121
config PINCTRL_EXYNOS_ARM64
2222
bool "ARMv8-specific pinctrl driver data for Exynos" if COMPILE_TEST
2323
depends on PINCTRL_EXYNOS
2424

25-
config PINCTRL_EXYNOS5440
26-
bool "Samsung EXYNOS5440 SoC pinctrl driver"
27-
depends on SOC_EXYNOS5440
28-
select PINMUX
29-
select PINCONF
30-
3125
config PINCTRL_S3C24XX
3226
bool "Samsung S3C24XX SoC pinctrl driver"
3327
depends on ARCH_S3C24XX && OF

‎drivers/pinctrl/samsung/Makefile

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,5 @@ obj-$(CONFIG_PINCTRL_SAMSUNG) += pinctrl-samsung.o
55
obj-$(CONFIG_PINCTRL_EXYNOS) += pinctrl-exynos.o
66
obj-$(CONFIG_PINCTRL_EXYNOS_ARM) += pinctrl-exynos-arm.o
77
obj-$(CONFIG_PINCTRL_EXYNOS_ARM64) += pinctrl-exynos-arm64.o
8-
obj-$(CONFIG_PINCTRL_EXYNOS5440) += pinctrl-exynos5440.o
98
obj-$(CONFIG_PINCTRL_S3C24XX) += pinctrl-s3c24xx.o
109
obj-$(CONFIG_PINCTRL_S3C64XX) += pinctrl-s3c64xx.o

‎drivers/pinctrl/samsung/pinctrl-exynos-arm.c

Lines changed: 28 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -88,6 +88,7 @@ static const struct samsung_retention_data s5pv210_retention_data __initconst =
8888

8989
/* pin banks of s5pv210 pin-controller */
9090
static const struct samsung_pin_bank_data s5pv210_pin_bank[] __initconst = {
91+
/* Must start with EINTG banks, ordered by EINT group number. */
9192
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
9293
EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpa1", 0x04),
9394
EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08),
@@ -105,12 +106,12 @@ static const struct samsung_pin_bank_data s5pv210_pin_bank[] __initconst = {
105106
EXYNOS_PIN_BANK_EINTG(7, 0x1c0, "gpg1", 0x38),
106107
EXYNOS_PIN_BANK_EINTG(7, 0x1e0, "gpg2", 0x3c),
107108
EXYNOS_PIN_BANK_EINTG(7, 0x200, "gpg3", 0x40),
108-
EXYNOS_PIN_BANK_EINTN(7, 0x220, "gpi"),
109109
EXYNOS_PIN_BANK_EINTG(8, 0x240, "gpj0", 0x44),
110110
EXYNOS_PIN_BANK_EINTG(6, 0x260, "gpj1", 0x48),
111111
EXYNOS_PIN_BANK_EINTG(8, 0x280, "gpj2", 0x4c),
112112
EXYNOS_PIN_BANK_EINTG(8, 0x2a0, "gpj3", 0x50),
113113
EXYNOS_PIN_BANK_EINTG(5, 0x2c0, "gpj4", 0x54),
114+
EXYNOS_PIN_BANK_EINTN(7, 0x220, "gpi"),
114115
EXYNOS_PIN_BANK_EINTN(8, 0x2e0, "mp01"),
115116
EXYNOS_PIN_BANK_EINTN(4, 0x300, "mp02"),
116117
EXYNOS_PIN_BANK_EINTN(8, 0x320, "mp03"),
@@ -147,6 +148,7 @@ static atomic_t exynos_shared_retention_refcnt;
147148

148149
/* pin banks of exynos3250 pin-controller 0 */
149150
static const struct samsung_pin_bank_data exynos3250_pin_banks0[] __initconst = {
151+
/* Must start with EINTG banks, ordered by EINT group number. */
150152
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
151153
EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04),
152154
EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08),
@@ -158,6 +160,7 @@ static const struct samsung_pin_bank_data exynos3250_pin_banks0[] __initconst =
158160

159161
/* pin banks of exynos3250 pin-controller 1 */
160162
static const struct samsung_pin_bank_data exynos3250_pin_banks1[] __initconst = {
163+
/* Must start with EINTG banks, ordered by EINT group number. */
161164
EXYNOS_PIN_BANK_EINTN(8, 0x120, "gpe0"),
162165
EXYNOS_PIN_BANK_EINTN(8, 0x140, "gpe1"),
163166
EXYNOS_PIN_BANK_EINTN(3, 0x180, "gpe2"),
@@ -232,6 +235,7 @@ const struct samsung_pinctrl_of_match_data exynos3250_of_data __initconst = {
232235

233236
/* pin banks of exynos4210 pin-controller 0 */
234237
static const struct samsung_pin_bank_data exynos4210_pin_banks0[] __initconst = {
238+
/* Must start with EINTG banks, ordered by EINT group number. */
235239
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
236240
EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04),
237241
EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08),
@@ -252,6 +256,7 @@ static const struct samsung_pin_bank_data exynos4210_pin_banks0[] __initconst =
252256

253257
/* pin banks of exynos4210 pin-controller 1 */
254258
static const struct samsung_pin_bank_data exynos4210_pin_banks1[] __initconst = {
259+
/* Must start with EINTG banks, ordered by EINT group number. */
255260
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpj0", 0x00),
256261
EXYNOS_PIN_BANK_EINTG(5, 0x020, "gpj1", 0x04),
257262
EXYNOS_PIN_BANK_EINTG(7, 0x040, "gpk0", 0x08),
@@ -276,6 +281,7 @@ static const struct samsung_pin_bank_data exynos4210_pin_banks1[] __initconst =
276281

277282
/* pin banks of exynos4210 pin-controller 2 */
278283
static const struct samsung_pin_bank_data exynos4210_pin_banks2[] __initconst = {
284+
/* Must start with EINTG banks, ordered by EINT group number. */
279285
EXYNOS_PIN_BANK_EINTN(7, 0x000, "gpz"),
280286
};
281287

@@ -346,6 +352,7 @@ const struct samsung_pinctrl_of_match_data exynos4210_of_data __initconst = {
346352

347353
/* pin banks of exynos4x12 pin-controller 0 */
348354
static const struct samsung_pin_bank_data exynos4x12_pin_banks0[] __initconst = {
355+
/* Must start with EINTG banks, ordered by EINT group number. */
349356
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
350357
EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04),
351358
EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpb", 0x08),
@@ -363,6 +370,7 @@ static const struct samsung_pin_bank_data exynos4x12_pin_banks0[] __initconst =
363370

364371
/* pin banks of exynos4x12 pin-controller 1 */
365372
static const struct samsung_pin_bank_data exynos4x12_pin_banks1[] __initconst = {
373+
/* Must start with EINTG banks, ordered by EINT group number. */
366374
EXYNOS_PIN_BANK_EINTG(7, 0x040, "gpk0", 0x08),
367375
EXYNOS_PIN_BANK_EINTG(7, 0x060, "gpk1", 0x0c),
368376
EXYNOS_PIN_BANK_EINTG(7, 0x080, "gpk2", 0x10),
@@ -390,11 +398,13 @@ static const struct samsung_pin_bank_data exynos4x12_pin_banks1[] __initconst =
390398

391399
/* pin banks of exynos4x12 pin-controller 2 */
392400
static const struct samsung_pin_bank_data exynos4x12_pin_banks2[] __initconst = {
401+
/* Must start with EINTG banks, ordered by EINT group number. */
393402
EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz", 0x00),
394403
};
395404

396405
/* pin banks of exynos4x12 pin-controller 3 */
397406
static const struct samsung_pin_bank_data exynos4x12_pin_banks3[] __initconst = {
407+
/* Must start with EINTG banks, ordered by EINT group number. */
398408
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpv0", 0x00),
399409
EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpv1", 0x04),
400410
EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpv2", 0x08),
@@ -449,6 +459,7 @@ const struct samsung_pinctrl_of_match_data exynos4x12_of_data __initconst = {
449459

450460
/* pin banks of exynos5250 pin-controller 0 */
451461
static const struct samsung_pin_bank_data exynos5250_pin_banks0[] __initconst = {
462+
/* Must start with EINTG banks, ordered by EINT group number. */
452463
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
453464
EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04),
454465
EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpa2", 0x08),
@@ -478,6 +489,7 @@ static const struct samsung_pin_bank_data exynos5250_pin_banks0[] __initconst =
478489

479490
/* pin banks of exynos5250 pin-controller 1 */
480491
static const struct samsung_pin_bank_data exynos5250_pin_banks1[] __initconst = {
492+
/* Must start with EINTG banks, ordered by EINT group number. */
481493
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpe0", 0x00),
482494
EXYNOS_PIN_BANK_EINTG(2, 0x020, "gpe1", 0x04),
483495
EXYNOS_PIN_BANK_EINTG(4, 0x040, "gpf0", 0x08),
@@ -491,6 +503,7 @@ static const struct samsung_pin_bank_data exynos5250_pin_banks1[] __initconst =
491503

492504
/* pin banks of exynos5250 pin-controller 2 */
493505
static const struct samsung_pin_bank_data exynos5250_pin_banks2[] __initconst = {
506+
/* Must start with EINTG banks, ordered by EINT group number. */
494507
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpv0", 0x00),
495508
EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpv1", 0x04),
496509
EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpv2", 0x08),
@@ -500,6 +513,7 @@ static const struct samsung_pin_bank_data exynos5250_pin_banks2[] __initconst =
500513

501514
/* pin banks of exynos5250 pin-controller 3 */
502515
static const struct samsung_pin_bank_data exynos5250_pin_banks3[] __initconst = {
516+
/* Must start with EINTG banks, ordered by EINT group number. */
503517
EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz", 0x00),
504518
};
505519

@@ -550,6 +564,7 @@ const struct samsung_pinctrl_of_match_data exynos5250_of_data __initconst = {
550564

551565
/* pin banks of exynos5260 pin-controller 0 */
552566
static const struct samsung_pin_bank_data exynos5260_pin_banks0[] __initconst = {
567+
/* Must start with EINTG banks, ordered by EINT group number. */
553568
EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpa0", 0x00),
554569
EXYNOS_PIN_BANK_EINTG(7, 0x020, "gpa1", 0x04),
555570
EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpa2", 0x08),
@@ -575,6 +590,7 @@ static const struct samsung_pin_bank_data exynos5260_pin_banks0[] __initconst =
575590

576591
/* pin banks of exynos5260 pin-controller 1 */
577592
static const struct samsung_pin_bank_data exynos5260_pin_banks1[] __initconst = {
593+
/* Must start with EINTG banks, ordered by EINT group number. */
578594
EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpc0", 0x00),
579595
EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpc1", 0x04),
580596
EXYNOS_PIN_BANK_EINTG(7, 0x040, "gpc2", 0x08),
@@ -584,6 +600,7 @@ static const struct samsung_pin_bank_data exynos5260_pin_banks1[] __initconst =
584600

585601
/* pin banks of exynos5260 pin-controller 2 */
586602
static const struct samsung_pin_bank_data exynos5260_pin_banks2[] __initconst = {
603+
/* Must start with EINTG banks, ordered by EINT group number. */
587604
EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz0", 0x00),
588605
EXYNOS_PIN_BANK_EINTG(4, 0x020, "gpz1", 0x04),
589606
};
@@ -619,6 +636,7 @@ const struct samsung_pinctrl_of_match_data exynos5260_of_data __initconst = {
619636

620637
/* pin banks of exynos5410 pin-controller 0 */
621638
static const struct samsung_pin_bank_data exynos5410_pin_banks0[] __initconst = {
639+
/* Must start with EINTG banks, ordered by EINT group number. */
622640
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
623641
EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04),
624642
EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpa2", 0x08),
@@ -630,7 +648,6 @@ static const struct samsung_pin_bank_data exynos5410_pin_banks0[] __initconst =
630648
EXYNOS_PIN_BANK_EINTG(4, 0x100, "gpc3", 0x20),
631649
EXYNOS_PIN_BANK_EINTG(7, 0x120, "gpc1", 0x24),
632650
EXYNOS_PIN_BANK_EINTG(7, 0x140, "gpc2", 0x28),
633-
EXYNOS_PIN_BANK_EINTN(2, 0x160, "gpm5"),
634651
EXYNOS_PIN_BANK_EINTG(8, 0x180, "gpd1", 0x2c),
635652
EXYNOS_PIN_BANK_EINTG(8, 0x1A0, "gpe0", 0x30),
636653
EXYNOS_PIN_BANK_EINTG(2, 0x1C0, "gpe1", 0x34),
@@ -641,6 +658,7 @@ static const struct samsung_pin_bank_data exynos5410_pin_banks0[] __initconst =
641658
EXYNOS_PIN_BANK_EINTG(2, 0x260, "gpg2", 0x48),
642659
EXYNOS_PIN_BANK_EINTG(4, 0x280, "gph0", 0x4c),
643660
EXYNOS_PIN_BANK_EINTG(8, 0x2A0, "gph1", 0x50),
661+
EXYNOS_PIN_BANK_EINTN(2, 0x160, "gpm5"),
644662
EXYNOS_PIN_BANK_EINTN(8, 0x2C0, "gpm7"),
645663
EXYNOS_PIN_BANK_EINTN(6, 0x2E0, "gpy0"),
646664
EXYNOS_PIN_BANK_EINTN(4, 0x300, "gpy1"),
@@ -658,6 +676,7 @@ static const struct samsung_pin_bank_data exynos5410_pin_banks0[] __initconst =
658676

659677
/* pin banks of exynos5410 pin-controller 1 */
660678
static const struct samsung_pin_bank_data exynos5410_pin_banks1[] __initconst = {
679+
/* Must start with EINTG banks, ordered by EINT group number. */
661680
EXYNOS_PIN_BANK_EINTG(5, 0x000, "gpj0", 0x00),
662681
EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpj1", 0x04),
663682
EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpj2", 0x08),
@@ -671,6 +690,7 @@ static const struct samsung_pin_bank_data exynos5410_pin_banks1[] __initconst =
671690

672691
/* pin banks of exynos5410 pin-controller 2 */
673692
static const struct samsung_pin_bank_data exynos5410_pin_banks2[] __initconst = {
693+
/* Must start with EINTG banks, ordered by EINT group number. */
674694
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpv0", 0x00),
675695
EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpv1", 0x04),
676696
EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpv2", 0x08),
@@ -680,6 +700,7 @@ static const struct samsung_pin_bank_data exynos5410_pin_banks2[] __initconst =
680700

681701
/* pin banks of exynos5410 pin-controller 3 */
682702
static const struct samsung_pin_bank_data exynos5410_pin_banks3[] __initconst = {
703+
/* Must start with EINTG banks, ordered by EINT group number. */
683704
EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz", 0x00),
684705
};
685706

@@ -727,6 +748,7 @@ const struct samsung_pinctrl_of_match_data exynos5410_of_data __initconst = {
727748

728749
/* pin banks of exynos5420 pin-controller 0 */
729750
static const struct samsung_pin_bank_data exynos5420_pin_banks0[] __initconst = {
751+
/* Must start with EINTG banks, ordered by EINT group number. */
730752
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpy7", 0x00),
731753
EXYNOS_PIN_BANK_EINTW(8, 0xC00, "gpx0", 0x00),
732754
EXYNOS_PIN_BANK_EINTW(8, 0xC20, "gpx1", 0x04),
@@ -736,6 +758,7 @@ static const struct samsung_pin_bank_data exynos5420_pin_banks0[] __initconst =
736758

737759
/* pin banks of exynos5420 pin-controller 1 */
738760
static const struct samsung_pin_bank_data exynos5420_pin_banks1[] __initconst = {
761+
/* Must start with EINTG banks, ordered by EINT group number. */
739762
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpc0", 0x00),
740763
EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpc1", 0x04),
741764
EXYNOS_PIN_BANK_EINTG(7, 0x040, "gpc2", 0x08),
@@ -753,6 +776,7 @@ static const struct samsung_pin_bank_data exynos5420_pin_banks1[] __initconst =
753776

754777
/* pin banks of exynos5420 pin-controller 2 */
755778
static const struct samsung_pin_bank_data exynos5420_pin_banks2[] __initconst = {
779+
/* Must start with EINTG banks, ordered by EINT group number. */
756780
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpe0", 0x00),
757781
EXYNOS_PIN_BANK_EINTG(2, 0x020, "gpe1", 0x04),
758782
EXYNOS_PIN_BANK_EINTG(6, 0x040, "gpf0", 0x08),
@@ -765,6 +789,7 @@ static const struct samsung_pin_bank_data exynos5420_pin_banks2[] __initconst =
765789

766790
/* pin banks of exynos5420 pin-controller 3 */
767791
static const struct samsung_pin_bank_data exynos5420_pin_banks3[] __initconst = {
792+
/* Must start with EINTG banks, ordered by EINT group number. */
768793
EXYNOS_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),
769794
EXYNOS_PIN_BANK_EINTG(6, 0x020, "gpa1", 0x04),
770795
EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpa2", 0x08),
@@ -778,6 +803,7 @@ static const struct samsung_pin_bank_data exynos5420_pin_banks3[] __initconst =
778803

779804
/* pin banks of exynos5420 pin-controller 4 */
780805
static const struct samsung_pin_bank_data exynos5420_pin_banks4[] __initconst = {
806+
/* Must start with EINTG banks, ordered by EINT group number. */
781807
EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpz", 0x00),
782808
};
783809

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