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juhapekka
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drm/i915: Preparations for enabling P010, P012, P016 formats
Preparations for enabling P010, P012 and P016 formats. These formats will extend NV12 for larger bit depths. Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Signed-off-by: Swati Sharma <swati2.sharma@intel.com> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1551700595-21481-3-git-send-email-swati2.sharma@intel.com
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-17
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‎drivers/gpu/drm/i915/intel_atomic_plane.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -135,7 +135,7 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_
135135
new_crtc_state->active_planes |= BIT(plane->id);
136136

137137
if (new_plane_state->base.visible &&
138-
new_plane_state->base.fb->format->format == DRM_FORMAT_NV12)
138+
is_planar_yuv_format(new_plane_state->base.fb->format->format))
139139
new_crtc_state->nv12_planes |= BIT(plane->id);
140140

141141
if (new_plane_state->base.visible || old_plane_state->base.visible)

‎drivers/gpu/drm/i915/intel_display.c

Lines changed: 21 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -2677,6 +2677,12 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
26772677
return DRM_FORMAT_RGB565;
26782678
case PLANE_CTL_FORMAT_NV12:
26792679
return DRM_FORMAT_NV12;
2680+
case PLANE_CTL_FORMAT_P010:
2681+
return DRM_FORMAT_P010;
2682+
case PLANE_CTL_FORMAT_P012:
2683+
return DRM_FORMAT_P012;
2684+
case PLANE_CTL_FORMAT_P016:
2685+
return DRM_FORMAT_P016;
26802686
default:
26812687
case PLANE_CTL_FORMAT_XRGB_8888:
26822688
if (rgb_order) {
@@ -3176,7 +3182,7 @@ int skl_check_plane_surface(struct intel_plane_state *plane_state)
31763182
* Handle the AUX surface first since
31773183
* the main surface setup depends on it.
31783184
*/
3179-
if (fb->format->format == DRM_FORMAT_NV12) {
3185+
if (is_planar_yuv_format(fb->format->format)) {
31803186
ret = skl_check_nv12_aux_surface(plane_state);
31813187
if (ret)
31823188
return ret;
@@ -3600,6 +3606,12 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
36003606
return PLANE_CTL_FORMAT_YUV422 | PLANE_CTL_YUV422_VYUY;
36013607
case DRM_FORMAT_NV12:
36023608
return PLANE_CTL_FORMAT_NV12;
3609+
case DRM_FORMAT_P010:
3610+
return PLANE_CTL_FORMAT_P010;
3611+
case DRM_FORMAT_P012:
3612+
return PLANE_CTL_FORMAT_P012;
3613+
case DRM_FORMAT_P016:
3614+
return PLANE_CTL_FORMAT_P016;
36033615
default:
36043616
MISSING_CASE(pixel_format);
36053617
}
@@ -5036,9 +5048,9 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
50365048
return 0;
50375049
}
50385050

5039-
if (format && format->format == DRM_FORMAT_NV12 &&
5051+
if (format && is_planar_yuv_format(format->format) &&
50405052
(src_h < SKL_MIN_YUV_420_SRC_H || src_w < SKL_MIN_YUV_420_SRC_W)) {
5041-
DRM_DEBUG_KMS("NV12: src dimensions not met\n");
5053+
DRM_DEBUG_KMS("Planar YUV: src dimensions not met\n");
50425054
return -EINVAL;
50435055
}
50445056

@@ -5112,7 +5124,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
51125124

51135125
/* Pre-gen11 and SDR planes always need a scaler for planar formats. */
51145126
if (!icl_is_hdr_plane(intel_plane) &&
5115-
fb && fb->format->format == DRM_FORMAT_NV12)
5127+
fb && is_planar_yuv_format(fb->format->format))
51165128
need_scaler = true;
51175129

51185130
ret = skl_update_scaler(crtc_state, force_detach,
@@ -5149,6 +5161,9 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
51495161
case DRM_FORMAT_UYVY:
51505162
case DRM_FORMAT_VYUY:
51515163
case DRM_FORMAT_NV12:
5164+
case DRM_FORMAT_P010:
5165+
case DRM_FORMAT_P012:
5166+
case DRM_FORMAT_P016:
51525167
break;
51535168
default:
51545169
DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
@@ -11134,7 +11149,7 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
1113411149
}
1113511150

1113611151
if (!linked_state) {
11137-
DRM_DEBUG_KMS("Need %d free Y planes for NV12\n",
11152+
DRM_DEBUG_KMS("Need %d free Y planes for planar YUV\n",
1113811153
hweight8(crtc_state->nv12_planes));
1113911154

1114011155
return -EINVAL;
@@ -13767,7 +13782,7 @@ skl_max_scale(const struct intel_crtc_state *crtc_state,
1376713782
* or
1376813783
* cdclk/crtc_clock
1376913784
*/
13770-
mult = pixel_format == DRM_FORMAT_NV12 ? 2 : 3;
13785+
mult = is_planar_yuv_format(pixel_format) ? 2 : 3;
1377113786
tmpclk1 = (1 << 16) * mult - 1;
1377213787
tmpclk2 = (1 << 8) * ((max_dotclk << 8) / crtc_clock);
1377313788
max_scale = min(tmpclk1, tmpclk2);

‎drivers/gpu/drm/i915/intel_drv.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2300,6 +2300,7 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
23002300

23012301

23022302
/* intel_sprite.c */
2303+
bool is_planar_yuv_format(u32 pixelformat);
23032304
int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
23042305
int usecs);
23052306
struct intel_plane *intel_sprite_plane_create(struct drm_i915_private *dev_priv,

‎drivers/gpu/drm/i915/intel_pm.c

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -3970,7 +3970,7 @@ skl_ddb_get_hw_plane_state(struct drm_i915_private *dev_priv,
39703970
val = I915_READ(PLANE_BUF_CFG(pipe, plane_id));
39713971
val2 = I915_READ(PLANE_NV12_BUF_CFG(pipe, plane_id));
39723972

3973-
if (fourcc == DRM_FORMAT_NV12)
3973+
if (is_planar_yuv_format(fourcc))
39743974
swap(val, val2);
39753975

39763976
skl_ddb_entry_init_from_hw(dev_priv, ddb_y, val);
@@ -4180,7 +4180,7 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
41804180

41814181
if (intel_plane->id == PLANE_CURSOR)
41824182
return 0;
4183-
if (plane == 1 && format != DRM_FORMAT_NV12)
4183+
if (plane == 1 && !is_planar_yuv_format(format))
41844184
return 0;
41854185

41864186
/*
@@ -4192,7 +4192,7 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
41924192
height = drm_rect_height(&intel_pstate->base.src) >> 16;
41934193

41944194
/* UV plane does 1/2 pixel sub-sampling */
4195-
if (plane == 1 && format == DRM_FORMAT_NV12) {
4195+
if (plane == 1 && is_planar_yuv_format(format)) {
41964196
width /= 2;
41974197
height /= 2;
41984198
}
@@ -4578,9 +4578,9 @@ skl_compute_plane_wm_params(const struct intel_crtc_state *cstate,
45784578
const struct drm_framebuffer *fb = pstate->fb;
45794579
u32 interm_pbpl;
45804580

4581-
/* only NV12 format has two planes */
4582-
if (color_plane == 1 && fb->format->format != DRM_FORMAT_NV12) {
4583-
DRM_DEBUG_KMS("Non NV12 format have single plane\n");
4581+
/* only planar format has two planes */
4582+
if (color_plane == 1 && !is_planar_yuv_format(fb->format->format)) {
4583+
DRM_DEBUG_KMS("Non planar format have single plane\n");
45844584
return -EINVAL;
45854585
}
45864586

@@ -4591,7 +4591,7 @@ skl_compute_plane_wm_params(const struct intel_crtc_state *cstate,
45914591
wp->x_tiled = fb->modifier == I915_FORMAT_MOD_X_TILED;
45924592
wp->rc_surface = fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
45934593
fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
4594-
wp->is_planar = fb->format->format == DRM_FORMAT_NV12;
4594+
wp->is_planar = is_planar_yuv_format(fb->format->format);
45954595

45964596
if (plane->id == PLANE_CURSOR) {
45974597
wp->width = intel_pstate->base.crtc_w;

‎drivers/gpu/drm/i915/intel_sprite.c

Lines changed: 19 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,19 @@
4141
#include "i915_drv.h"
4242
#include <drm/drm_color_mgmt.h>
4343

44+
bool is_planar_yuv_format(u32 pixelformat)
45+
{
46+
switch (pixelformat) {
47+
case DRM_FORMAT_NV12:
48+
case DRM_FORMAT_P010:
49+
case DRM_FORMAT_P012:
50+
case DRM_FORMAT_P016:
51+
return true;
52+
default:
53+
return false;
54+
}
55+
}
56+
4457
int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
4558
int usecs)
4659
{
@@ -335,7 +348,7 @@ skl_program_scaler(struct intel_plane *plane,
335348
0, INT_MAX);
336349

337350
/* TODO: handle sub-pixel coordinates */
338-
if (plane_state->base.fb->format->format == DRM_FORMAT_NV12 &&
351+
if (is_planar_yuv_format(plane_state->base.fb->format->format) &&
339352
!icl_is_hdr_plane(plane)) {
340353
y_hphase = skl_scaler_calc_phase(1, hscale, false);
341354
y_vphase = skl_scaler_calc_phase(1, vscale, false);
@@ -1551,10 +1564,10 @@ static int skl_plane_check_nv12_rotation(const struct intel_plane_state *plane_s
15511564
int src_w = drm_rect_width(&plane_state->base.src) >> 16;
15521565

15531566
/* Display WA #1106 */
1554-
if (fb->format->format == DRM_FORMAT_NV12 && src_w & 3 &&
1567+
if (is_planar_yuv_format(fb->format->format) && src_w & 3 &&
15551568
(rotation == DRM_MODE_ROTATE_270 ||
15561569
rotation == (DRM_MODE_REFLECT_X | DRM_MODE_ROTATE_90))) {
1557-
DRM_DEBUG_KMS("src width must be multiple of 4 for rotated NV12\n");
1570+
DRM_DEBUG_KMS("src width must be multiple of 4 for rotated planar YUV\n");
15581571
return -EINVAL;
15591572
}
15601573

@@ -1945,6 +1958,9 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
19451958
case DRM_FORMAT_UYVY:
19461959
case DRM_FORMAT_VYUY:
19471960
case DRM_FORMAT_NV12:
1961+
case DRM_FORMAT_P010:
1962+
case DRM_FORMAT_P012:
1963+
case DRM_FORMAT_P016:
19481964
if (modifier == I915_FORMAT_MOD_Yf_TILED)
19491965
return true;
19501966
/* fall through */

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