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aabodunrinJeff Kirsher
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igb: M88E1543 PHY downshift implementation
This patch implements downshift mechanism for M88E1543 PHY, so that downshift is disabled first during link setup process, and later enabled if we are master and downshift link is negotiated. Also cleaned up return code implementation. Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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drivers/net/ethernet/intel/igb/e1000_phy.c

Lines changed: 20 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -731,15 +731,13 @@ s32 igb_copper_link_setup_m88_gen2(struct e1000_hw *hw)
731731
s32 ret_val;
732732
u16 phy_data;
733733

734-
if (phy->reset_disable) {
735-
ret_val = 0;
736-
goto out;
737-
}
734+
if (phy->reset_disable)
735+
return 0;
738736

739737
/* Enable CRS on Tx. This must be set for half-duplex operation. */
740738
ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
741739
if (ret_val)
742-
goto out;
740+
return ret_val;
743741

744742
/* Options:
745743
* MDI/MDI-X = 0 (default)
@@ -780,23 +778,36 @@ s32 igb_copper_link_setup_m88_gen2(struct e1000_hw *hw)
780778
phy_data |= M88E1000_PSCR_POLARITY_REVERSAL;
781779

782780
/* Enable downshift and setting it to X6 */
781+
if (phy->id == M88E1543_E_PHY_ID) {
782+
phy_data &= ~I347AT4_PSCR_DOWNSHIFT_ENABLE;
783+
ret_val =
784+
phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
785+
if (ret_val)
786+
return ret_val;
787+
788+
ret_val = igb_phy_sw_reset(hw);
789+
if (ret_val) {
790+
hw_dbg("Error committing the PHY changes\n");
791+
return ret_val;
792+
}
793+
}
794+
783795
phy_data &= ~I347AT4_PSCR_DOWNSHIFT_MASK;
784796
phy_data |= I347AT4_PSCR_DOWNSHIFT_6X;
785797
phy_data |= I347AT4_PSCR_DOWNSHIFT_ENABLE;
786798

787799
ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
788800
if (ret_val)
789-
goto out;
801+
return ret_val;
790802

791803
/* Commit the changes. */
792804
ret_val = igb_phy_sw_reset(hw);
793805
if (ret_val) {
794806
hw_dbg("Error committing the PHY changes\n");
795-
goto out;
807+
return ret_val;
796808
}
797809

798-
out:
799-
return ret_val;
810+
return 0;
800811
}
801812

802813
/**

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