can: c_can: make {read,write}_reg functions const

Pavel Machek · marckleinebudde · commit e07e83ae600e · 2014-05-19T09:38:22.000+02:00
This patch makes the {read,write}_reg functions const, this is a preparation to
make use of {read,write}_reg in the hwinit callback.

Signed-off-by: Thor Thayer &lt;tthayer@altera.com&gt;
Signed-off-by: Pavel Machek &lt;pavel@denx.de&gt;
Signed-off-by: Marc Kleine-Budde &lt;mkl@pengutronix.de&gt;
diff --git a/drivers/net/can/c_can/c_can.h b/drivers/net/can/c_can/c_can.h
@@ -176,8 +176,8 @@ struct c_can_priv {
 	atomic_t tx_active;
 	unsigned long tx_dir;
 	int last_status;
-	u16 (*read_reg) (struct c_can_priv *priv, enum reg index);
-	void (*write_reg) (struct c_can_priv *priv, enum reg index, u16 val);
+	u16 (*read_reg) (const struct c_can_priv *priv, enum reg index);
+	void (*write_reg) (const struct c_can_priv *priv, enum reg index, u16 val);
 	void __iomem *base;
 	const u16 *regs;
 	void *priv;		/* for board-specific data */
diff --git a/drivers/net/can/c_can/c_can_pci.c b/drivers/net/can/c_can/c_can_pci.c
@@ -47,37 +47,37 @@ struct c_can_pci_data {
  * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.
  * Handle the same by providing a common read/write interface.
  */
-static u16 c_can_pci_read_reg_aligned_to_16bit(struct c_can_priv *priv,
+static u16 c_can_pci_read_reg_aligned_to_16bit(const struct c_can_priv *priv,
 						enum reg index)
 {
 	return readw(priv->base + priv->regs[index]);
 }
 
-static void c_can_pci_write_reg_aligned_to_16bit(struct c_can_priv *priv,
+static void c_can_pci_write_reg_aligned_to_16bit(const struct c_can_priv *priv,
 						enum reg index, u16 val)
 {
 	writew(val, priv->base + priv->regs[index]);
 }
 
-static u16 c_can_pci_read_reg_aligned_to_32bit(struct c_can_priv *priv,
+static u16 c_can_pci_read_reg_aligned_to_32bit(const struct c_can_priv *priv,
 						enum reg index)
 {
 	return readw(priv->base + 2 * priv->regs[index]);
 }
 
-static void c_can_pci_write_reg_aligned_to_32bit(struct c_can_priv *priv,
+static void c_can_pci_write_reg_aligned_to_32bit(const struct c_can_priv *priv,
 						enum reg index, u16 val)
 {
 	writew(val, priv->base + 2 * priv->regs[index]);
 }
 
-static u16 c_can_pci_read_reg_32bit(struct c_can_priv *priv,
+static u16 c_can_pci_read_reg_32bit(const struct c_can_priv *priv,
 				    enum reg index)
 {
 	return (u16)ioread32(priv->base + 2 * priv->regs[index]);
 }
 
-static void c_can_pci_write_reg_32bit(struct c_can_priv *priv,
+static void c_can_pci_write_reg_32bit(const struct c_can_priv *priv,
 				      enum reg index, u16 val)
 {
 	iowrite32((u32)val, priv->base + 2 * priv->regs[index]);
diff --git a/drivers/net/can/c_can/c_can_platform.c b/drivers/net/can/c_can/c_can_platform.c
@@ -47,31 +47,31 @@ static DEFINE_SPINLOCK(raminit_lock);
  * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.
  * Handle the same by providing a common read/write interface.
  */
-static u16 c_can_plat_read_reg_aligned_to_16bit(struct c_can_priv *priv,
+static u16 c_can_plat_read_reg_aligned_to_16bit(const struct c_can_priv *priv,
 						enum reg index)
 {
 	return readw(priv->base + priv->regs[index]);
 }
 
-static void c_can_plat_write_reg_aligned_to_16bit(struct c_can_priv *priv,
+static void c_can_plat_write_reg_aligned_to_16bit(const struct c_can_priv *priv,
 						enum reg index, u16 val)
 {
 	writew(val, priv->base + priv->regs[index]);
 }
 
-static u16 c_can_plat_read_reg_aligned_to_32bit(struct c_can_priv *priv,
+static u16 c_can_plat_read_reg_aligned_to_32bit(const struct c_can_priv *priv,
 						enum reg index)
 {
 	return readw(priv->base + 2 * priv->regs[index]);
 }
 
-static void c_can_plat_write_reg_aligned_to_32bit(struct c_can_priv *priv,
+static void c_can_plat_write_reg_aligned_to_32bit(const struct c_can_priv *priv,
 						enum reg index, u16 val)
 {
 	writew(val, priv->base + 2 * priv->regs[index]);
 }
 
-static void c_can_hw_raminit_wait(const struct c_can_priv *priv, u32 mask,
+static void c_can_hw_raminit_wait_ti(const struct c_can_priv *priv, u32 mask,
 				  u32 val)
 {
 	/* We look only at the bits of our instance. */

Original file line number	Diff line number	Diff line change
`@@ -47,37 +47,37 @@ struct c_can_pci_data {`
`47`	`47`	`* registers can be aligned to a 16-bit boundary or 32-bit boundary etc.`
`48`	`48`	`* Handle the same by providing a common read/write interface.`
`49`	`49`	`*/`
`50`		`-static u16 c_can_pci_read_reg_aligned_to_16bit(struct c_can_priv *priv,`
	`50`	`+static u16 c_can_pci_read_reg_aligned_to_16bit(const struct c_can_priv *priv,`
`51`	`51`	`enum reg index)`
`52`	`52`	`{`
`53`	`53`	`return readw(priv->base + priv->regs[index]);`
`54`	`54`	`}`
`55`	`55`
`56`		`-static void c_can_pci_write_reg_aligned_to_16bit(struct c_can_priv *priv,`
	`56`	`+static void c_can_pci_write_reg_aligned_to_16bit(const struct c_can_priv *priv,`
`57`	`57`	`enum reg index, u16 val)`
`58`	`58`	`{`
`59`	`59`	`writew(val, priv->base + priv->regs[index]);`
`60`	`60`	`}`
`61`	`61`
`62`		`-static u16 c_can_pci_read_reg_aligned_to_32bit(struct c_can_priv *priv,`
	`62`	`+static u16 c_can_pci_read_reg_aligned_to_32bit(const struct c_can_priv *priv,`
`63`	`63`	`enum reg index)`
`64`	`64`	`{`
`65`	`65`	`return readw(priv->base + 2 * priv->regs[index]);`
`66`	`66`	`}`
`67`	`67`
`68`		`-static void c_can_pci_write_reg_aligned_to_32bit(struct c_can_priv *priv,`
	`68`	`+static void c_can_pci_write_reg_aligned_to_32bit(const struct c_can_priv *priv,`
`69`	`69`	`enum reg index, u16 val)`
`70`	`70`	`{`
`71`	`71`	`writew(val, priv->base + 2 * priv->regs[index]);`
`72`	`72`	`}`
`73`	`73`
`74`		`-static u16 c_can_pci_read_reg_32bit(struct c_can_priv *priv,`
	`74`	`+static u16 c_can_pci_read_reg_32bit(const struct c_can_priv *priv,`
`75`	`75`	`enum reg index)`
`76`	`76`	`{`
`77`	`77`	`return (u16)ioread32(priv->base + 2 * priv->regs[index]);`
`78`	`78`	`}`
`79`	`79`
`80`		`-static void c_can_pci_write_reg_32bit(struct c_can_priv *priv,`
	`80`	`+static void c_can_pci_write_reg_32bit(const struct c_can_priv *priv,`
`81`	`81`	`enum reg index, u16 val)`
`82`	`82`	`{`
`83`	`83`	`iowrite32((u32)val, priv->base + 2 * priv->regs[index]);`
Original file line number	Diff line number	Diff line change
`@@ -47,31 +47,31 @@ static DEFINE_SPINLOCK(raminit_lock);`
`47`	`47`	`* registers can be aligned to a 16-bit boundary or 32-bit boundary etc.`
`48`	`48`	`* Handle the same by providing a common read/write interface.`
`49`	`49`	`*/`
`50`		`-static u16 c_can_plat_read_reg_aligned_to_16bit(struct c_can_priv *priv,`
	`50`	`+static u16 c_can_plat_read_reg_aligned_to_16bit(const struct c_can_priv *priv,`
`51`	`51`	`enum reg index)`
`52`	`52`	`{`
`53`	`53`	`return readw(priv->base + priv->regs[index]);`
`54`	`54`	`}`
`55`	`55`
`56`		`-static void c_can_plat_write_reg_aligned_to_16bit(struct c_can_priv *priv,`
	`56`	`+static void c_can_plat_write_reg_aligned_to_16bit(const struct c_can_priv *priv,`
`57`	`57`	`enum reg index, u16 val)`
`58`	`58`	`{`
`59`	`59`	`writew(val, priv->base + priv->regs[index]);`
`60`	`60`	`}`
`61`	`61`
`62`		`-static u16 c_can_plat_read_reg_aligned_to_32bit(struct c_can_priv *priv,`
	`62`	`+static u16 c_can_plat_read_reg_aligned_to_32bit(const struct c_can_priv *priv,`
`63`	`63`	`enum reg index)`
`64`	`64`	`{`
`65`	`65`	`return readw(priv->base + 2 * priv->regs[index]);`
`66`	`66`	`}`
`67`	`67`
`68`		`-static void c_can_plat_write_reg_aligned_to_32bit(struct c_can_priv *priv,`
	`68`	`+static void c_can_plat_write_reg_aligned_to_32bit(const struct c_can_priv *priv,`
`69`	`69`	`enum reg index, u16 val)`
`70`	`70`	`{`
`71`	`71`	`writew(val, priv->base + 2 * priv->regs[index]);`
`72`	`72`	`}`
`73`	`73`
`74`		`-static void c_can_hw_raminit_wait(const struct c_can_priv *priv, u32 mask,`
	`74`	`+static void c_can_hw_raminit_wait_ti(const struct c_can_priv *priv, u32 mask,`
`75`	`75`	`u32 val)`
`76`	`76`	`{`
`77`	`77`	`/* We look only at the bits of our instance. */`