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Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle: "This is the main pull request for MIPS for 4.5 plus some 4.4 fixes. The executive summary: - ATH79 platform improvments, use DT bindings for the ATH79 USB PHY. - Avoid useless rebuilds for zboot. - jz4780: Add NEMC, BCH and NAND device tree nodes - Initial support for the MicroChip's DT platform. As all the device drivers are missing this is still of limited use. - Some Loongson3 cleanups. - The unavoidable whitespace polishing. - Reduce clock skew when synchronizing the CPU cycle counters on CPU startup. - Add MIPS R6 fixes. - Lots of cleanups across arch/mips as fallout from KVM. - Lots of minor fixes and changes for IEEE 754-2008 support to the FPU emulator / fp-assist software. - Minor Ralink, BCM47xx and bcm963xx platform support improvments. - Support SMP on BCM63168" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (84 commits) MIPS: zboot: Add support for serial debug using the PROM MIPS: zboot: Avoid useless rebuilds MIPS: BMIPS: Enable ARCH_WANT_OPTIONAL_GPIOLIB MIPS: bcm63xx: nvram: Remove unused bcm63xx_nvram_get_psi_size() function MIPS: bcm963xx: Update bcm_tag field image_sequence MIPS: bcm963xx: Move extended flash address to bcm_tag header file MIPS: bcm963xx: Move Broadcom BCM963xx image tag data structure MIPS: bcm63xx: nvram: Use nvram structure definition from header file MIPS: bcm963xx: Add Broadcom BCM963xx board nvram data structure MAINTAINERS: Add KVM for MIPS entry MIPS: KVM: Add missing newline to kvm_err() MIPS: Move KVM specific opcodes into asm/inst.h MIPS: KVM: Use cacheops.h definitions MIPS: Break down cacheops.h definitions MIPS: Use EXCCODE_ constants with set_except_vector() MIPS: Update trap codes MIPS: Move Cause.ExcCode trap codes to mipsregs.h MIPS: KVM: Make kvm_mips_{init,exit}() static MIPS: KVM: Refactor added offsetof()s MIPS: KVM: Convert EXPORT_SYMBOL to _GPL ...
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‎Documentation/devicetree/bindings/interrupt-controller/microchip,pic32-evic.txt

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Microchip PIC32 Interrupt Controller
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====================================
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The Microchip PIC32 contains an Enhanced Vectored Interrupt Controller (EVIC).
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It handles all internal and external interrupts. This controller exists outside
6+
of the CPU and is the arbitrator of all interrupts (including interrupts from
7+
the CPU itself) before they are presented to the CPU.
8+
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External interrupts have a software configurable edge polarity. Non external
10+
interrupts have a type and polarity that is determined by the source of the
11+
interrupt.
12+
13+
Required properties
14+
-------------------
15+
16+
- compatible: Should be "microchip,pic32mzda-evic"
17+
- reg: Specifies physical base address and size of register range.
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- interrupt-controller: Identifies the node as an interrupt controller.
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- #interrupt cells: Specifies the number of cells used to encode an interrupt
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source connected to this controller. The value shall be 2 and interrupt
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descriptor shall have the following format:
22+
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<hw_irq irq_type>
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hw_irq - represents the hardware interrupt number as in the data sheet.
26+
irq_type - is used to describe the type and polarity of an interrupt. For
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internal interrupts use IRQ_TYPE_EDGE_RISING for non persistent interrupts and
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IRQ_TYPE_LEVEL_HIGH for persistent interrupts. For external interrupts use
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IRQ_TYPE_EDGE_RISING or IRQ_TYPE_EDGE_FALLING to select the desired polarity.
30+
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Optional properties
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-------------------
33+
- microchip,external-irqs: u32 array of external interrupts with software
34+
polarity configuration. This array corresponds to the bits in the INTCON
35+
SFR.
36+
37+
Example
38+
-------
39+
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evic: interrupt-controller@1f810000 {
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compatible = "microchip,pic32mzda-evic";
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x1f810000 0x1000>;
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microchip,external-irqs = <3 8 13 18 23>;
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};
47+
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Each device/peripheral must request its interrupt line with the associated type
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and polarity.
50+
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Internal interrupt DTS snippet
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------------------------------
53+
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device@1f800000 {
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...
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interrupts = <113 IRQ_TYPE_LEVEL_HIGH>;
57+
...
58+
};
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External interrupt DTS snippet
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------------------------------
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device@1f800000 {
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...
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interrupts = <3 IRQ_TYPE_EDGE_RISING>;
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...
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};

‎Documentation/devicetree/bindings/mips/pic32/microchip,pic32mzda.txt

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* Microchip PIC32MZDA Platforms
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PIC32MZDA Starter Kit
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Required root node properties:
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- compatible = "microchip,pic32mzda-sk", "microchip,pic32mzda"
6+
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CPU nodes:
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----------
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A "cpus" node is required. Required properties:
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- #address-cells: Must be 1.
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- #size-cells: Must be 0.
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A CPU sub-node is also required. Required properties:
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- device_type: Must be "cpu".
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- compatible: Must be "mti,mips14KEc".
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Example:
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "mti,mips14KEc";
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};
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};
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Boot protocol
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--------------
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In accordance with Unified Hosting Interface Reference Manual (MD01069), the
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bootloader must pass the following arguments to the kernel:
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- $a0: -2.
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- $a1: KSEG0 address of the flattened device-tree blob.

‎Documentation/devicetree/bindings/net/mediatek,mt7620-gsw.txt

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Mediatek Gigabit Switch
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=======================
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The mediatek gigabit switch can be found on Mediatek SoCs (mt7620, mt7621).
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Required properties:
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- compatible: Should be "mediatek,mt7620-gsw" or "mediatek,mt7621-gsw"
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- reg: Address and length of the register set for the device
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- interrupt-parent: Should be the phandle for the interrupt controller
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that services interrupts for this device
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- interrupts: Should contain the gigabit switches interrupt
12+
- resets: Should contain the gigabit switches resets
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- reset-names: Should contain the reset names "gsw"
14+
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Example:
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gsw@10110000 {
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compatible = "ralink,mt7620-gsw";
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reg = <0x10110000 8000>;
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resets = <&rstctrl 23>;
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reset-names = "gsw";
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interrupt-parent = <&intc>;
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interrupts = <17>;
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};

‎Documentation/devicetree/bindings/net/ralink,rt2880-net.txt

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Ralink Frame Engine Ethernet controller
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=======================================
3+
4+
The Ralink frame engine ethernet controller can be found on Ralink and
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Mediatek SoCs (RT288x, RT3x5x, RT366x, RT388x, rt5350, mt7620, mt7621, mt76x8).
6+
7+
Depending on the SoC, there is a number of ports connected to the CPU port
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directly and/or via a (gigabit-)switch.
9+
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* Ethernet controller node
11+
12+
Required properties:
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- compatible: Should be one of "ralink,rt2880-eth", "ralink,rt3050-eth",
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"ralink,rt3050-eth", "ralink,rt3883-eth", "ralink,rt5350-eth",
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"mediatek,mt7620-eth", "mediatek,mt7621-eth"
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- reg: Address and length of the register set for the device
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- interrupt-parent: Should be the phandle for the interrupt controller
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that services interrupts for this device
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- interrupts: Should contain the frame engines interrupt
20+
- resets: Should contain the frame engines resets
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- reset-names: Should contain the reset names "fe". If a switch is present
22+
"esw" is also required.
23+
24+
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* Ethernet port node
26+
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Required properties:
28+
- compatible: Should be "ralink,eth-port"
29+
- reg: The number of the physical port
30+
- phy-handle: reference to the node describing the phy
31+
32+
Example:
33+
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mdio-bus {
35+
...
36+
phy0: ethernet-phy@0 {
37+
phy-mode = "mii";
38+
reg = <0>;
39+
};
40+
};
41+
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ethernet@400000 {
43+
compatible = "ralink,rt2880-eth";
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reg = <0x00400000 10000>;
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#address-cells = <1>;
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#size-cells = <0>;
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resets = <&rstctrl 18>;
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reset-names = "fe";
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interrupt-parent = <&cpuintc>;
53+
interrupts = <5>;
54+
55+
port@0 {
56+
compatible = "ralink,eth-port";
57+
reg = <0>;
58+
phy-handle = <&phy0>;
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};
60+
61+
};

‎Documentation/devicetree/bindings/net/ralink,rt3050-esw.txt

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Ralink Fast Ethernet Embedded Switch
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====================================
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The ralink fast ethernet embedded switch can be found on Ralink and Mediatek
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SoCs (RT3x5x, RT5350, MT76x8).
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Required properties:
8+
- compatible: Should be "ralink,rt3050-esw"
9+
- reg: Address and length of the register set for the device
10+
- interrupt-parent: Should be the phandle for the interrupt controller
11+
that services interrupts for this device
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- interrupts: Should contain the embedded switches interrupt
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- resets: Should contain the embedded switches resets
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- reset-names: Should contain the reset names "esw"
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16+
Optional properties:
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- ralink,portmap: can be used to choose if the default switch setup is
18+
llllw or wllll
19+
- ralink,led_polarity: override the active high/low settings of the leds
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Example:
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esw@10110000 {
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compatible = "ralink,rt3050-esw";
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reg = <0x10110000 8000>;
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resets = <&rstctrl 23>;
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reset-names = "esw";
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interrupt-parent = <&intc>;
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interrupts = <17>;
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};

‎Documentation/devicetree/bindings/phy/phy-ath79-usb.txt

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* Atheros AR71XX/9XXX USB PHY
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Required properties:
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- compatible: "qca,ar7100-usb-phy"
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- #phys-cells: should be 0
6+
- reset-names: "usb-phy"[, "usb-suspend-override"]
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- resets: references to the reset controllers
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9+
Example:
10+
11+
usb-phy {
12+
compatible = "qca,ar7100-usb-phy";
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14+
reset-names = "usb-phy", "usb-suspend-override";
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resets = <&rst 4>, <&rst 3>;
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#phy-cells = <0>;
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};

‎Documentation/kernel-parameters.txt

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@@ -1454,6 +1454,41 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
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In such case C2/C3 won't be used again.
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idle=nomwait: Disable mwait for CPU C-states
14561456

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ieee754= [MIPS] Select IEEE Std 754 conformance mode
1458+
Format: { strict | legacy | 2008 | relaxed }
1459+
Default: strict
1460+
1461+
Choose which programs will be accepted for execution
1462+
based on the IEEE 754 NaN encoding(s) supported by
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the FPU and the NaN encoding requested with the value
1464+
of an ELF file header flag individually set by each
1465+
binary. Hardware implementations are permitted to
1466+
support either or both of the legacy and the 2008 NaN
1467+
encoding mode.
1468+
1469+
Available settings are as follows:
1470+
strict accept binaries that request a NaN encoding
1471+
supported by the FPU
1472+
legacy only accept legacy-NaN binaries, if supported
1473+
by the FPU
1474+
2008 only accept 2008-NaN binaries, if supported
1475+
by the FPU
1476+
relaxed accept any binaries regardless of whether
1477+
supported by the FPU
1478+
1479+
The FPU emulator is always able to support both NaN
1480+
encodings, so if no FPU hardware is present or it has
1481+
been disabled with 'nofpu', then the settings of
1482+
'legacy' and '2008' strap the emulator accordingly,
1483+
'relaxed' straps the emulator for both legacy-NaN and
1484+
2008-NaN, whereas 'strict' enables legacy-NaN only on
1485+
legacy processors and both NaN encodings on MIPS32 or
1486+
MIPS64 CPUs.
1487+
1488+
The setting for ABS.fmt/NEG.fmt instruction execution
1489+
mode generally follows that for the NaN encoding,
1490+
except where unsupported by hardware.
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14571492
ignore_loglevel [KNL]
14581493
Ignore loglevel setting - this will print /all/
14591494
kernel messages to the console. Useful for debugging.

‎MAINTAINERS

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@@ -2420,6 +2420,8 @@ F: arch/mips/kernel/*bmips*
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F: arch/mips/boot/dts/brcm/bcm*.dts*
24212421
F: drivers/irqchip/irq-bcm7*
24222422
F: drivers/irqchip/irq-brcmstb*
2423+
F: include/linux/bcm963xx_nvram.h
2424+
F: include/linux/bcm963xx_tag.h
24232425

24242426
BROADCOM TG3 GIGABIT ETHERNET DRIVER
24252427
M: Prashant Sreedharan <prashant@broadcom.com>
@@ -6216,6 +6218,14 @@ F: arch/arm64/include/uapi/asm/kvm*
62166218
F: arch/arm64/include/asm/kvm*
62176219
F: arch/arm64/kvm/
62186220

6221+
KERNEL VIRTUAL MACHINE FOR MIPS (KVM/mips)
6222+
M: James Hogan <james.hogan@imgtec.com>
6223+
L: linux-mips@linux-mips.org
6224+
S: Supported
6225+
F: arch/mips/include/uapi/asm/kvm*
6226+
F: arch/mips/include/asm/kvm*
6227+
F: arch/mips/kvm/
6228+
62196229
KEXEC
62206230
M: Eric Biederman <ebiederm@xmission.com>
62216231
W: http://kernel.org/pub/linux/utils/kernel/kexec/
@@ -6313,6 +6323,12 @@ S: Maintained
63136323
F: net/l3mdev
63146324
F: include/net/l3mdev.h
63156325

6326+
LANTIQ MIPS ARCHITECTURE
6327+
M: John Crispin <blogic@openwrt.org>
6328+
L: linux-mips@linux-mips.org
6329+
S: Maintained
6330+
F: arch/mips/lantiq
6331+
63166332
LAPB module
63176333
L: linux-x25@vger.kernel.org
63186334
S: Orphan
@@ -8997,6 +9013,12 @@ L: linux-fbdev@vger.kernel.org
89979013
S: Maintained
89989014
F: drivers/video/fbdev/aty/aty128fb.c
89999015

9016+
RALINK MIPS ARCHITECTURE
9017+
M: John Crispin <blogic@openwrt.org>
9018+
L: linux-mips@linux-mips.org
9019+
S: Maintained
9020+
F: arch/mips/ralink
9021+
90009022
RALINK RT2X00 WIRELESS LAN DRIVER
90019023
P: rt2x00 project
90029024
M: Stanislaw Gruszka <sgruszka@redhat.com>

‎arch/mips/Kbuild.platforms

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@@ -21,6 +21,7 @@ platforms += mti-malta
2121
platforms += mti-sead3
2222
platforms += netlogic
2323
platforms += paravirt
24+
platforms += pic32
2425
platforms += pistachio
2526
platforms += pmcs-msp71xx
2627
platforms += pnx833x

‎arch/mips/Kconfig

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@@ -169,6 +169,7 @@ config BMIPS_GENERIC
169169
select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
170170
select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
171171
select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
172+
select ARCH_WANT_OPTIONAL_GPIOLIB
172173
help
173174
Build a generic DT-based kernel image that boots on select
174175
BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
@@ -480,6 +481,14 @@ config MIPS_MALTA
480481
This enables support for the MIPS Technologies Malta evaluation
481482
board.
482483

484+
config MACH_PIC32
485+
bool "Microchip PIC32 Family"
486+
help
487+
This enables support for the Microchip PIC32 family of platforms.
488+
489+
Microchip PIC32 is a family of general-purpose 32 bit MIPS core
490+
microcontrollers.
491+
483492
config MIPS_SEAD3
484493
bool "MIPS SEAD3 board"
485494
select BOOT_ELF32
@@ -979,6 +988,7 @@ source "arch/mips/jazz/Kconfig"
979988
source "arch/mips/jz4740/Kconfig"
980989
source "arch/mips/lantiq/Kconfig"
981990
source "arch/mips/lasat/Kconfig"
991+
source "arch/mips/pic32/Kconfig"
982992
source "arch/mips/pistachio/Kconfig"
983993
source "arch/mips/pmcs-msp71xx/Kconfig"
984994
source "arch/mips/ralink/Kconfig"
@@ -1755,6 +1765,10 @@ config SYS_SUPPORTS_ZBOOT_UART16550
17551765
bool
17561766
select SYS_SUPPORTS_ZBOOT
17571767

1768+
config SYS_SUPPORTS_ZBOOT_UART_PROM
1769+
bool
1770+
select SYS_SUPPORTS_ZBOOT
1771+
17581772
config CPU_LOONGSON2
17591773
bool
17601774
select CPU_SUPPORTS_32BIT_KERNEL
@@ -2017,7 +2031,8 @@ config KVM_GUEST
20172031
bool "KVM Guest Kernel"
20182032
depends on BROKEN_ON_SMP
20192033
help
2020-
Select this option if building a guest kernel for KVM (Trap & Emulate) mode
2034+
Select this option if building a guest kernel for KVM (Trap & Emulate)
2035+
mode.
20212036

20222037
config KVM_GUEST_TIMER_FREQ
20232038
int "Count/Compare Timer Frequency (MHz)"

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