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30 | 30 | #include "pwrseq.h"
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31 | 31 |
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32 | 32 | #define DEFAULT_CMD6_TIMEOUT_MS 500
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| 33 | +#define MIN_CACHE_EN_TIMEOUT_MS 1600 |
33 | 34 |
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34 | 35 | static const unsigned int tran_exp[] = {
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35 | 36 | 10000, 100000, 1000000, 10000000,
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@@ -1789,13 +1790,18 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
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1789 | 1790 | }
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1790 | 1791 |
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1791 | 1792 | /*
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1792 |
| - * If cache size is higher than 0, this indicates |
1793 |
| - * the existence of cache and it can be turned on. |
| 1793 | + * If cache size is higher than 0, this indicates the existence of cache |
| 1794 | + * and it can be turned on. Note that some eMMCs from Micron has been |
| 1795 | + * reported to need ~800 ms timeout, while enabling the cache after |
| 1796 | + * sudden power failure tests. Let's extend the timeout to a minimum of |
| 1797 | + * DEFAULT_CACHE_EN_TIMEOUT_MS and do it for all cards. |
1794 | 1798 | */
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1795 | 1799 | if (card->ext_csd.cache_size > 0) {
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| 1800 | + unsigned int timeout_ms = MIN_CACHE_EN_TIMEOUT_MS; |
| 1801 | + |
| 1802 | + timeout_ms = max(card->ext_csd.generic_cmd6_time, timeout_ms); |
1796 | 1803 | err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
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1797 |
| - EXT_CSD_CACHE_CTRL, 1, |
1798 |
| - card->ext_csd.generic_cmd6_time); |
| 1804 | + EXT_CSD_CACHE_CTRL, 1, timeout_ms); |
1799 | 1805 | if (err && err != -EBADMSG)
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1800 | 1806 | goto free_card;
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1801 | 1807 |
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