Skip to content

Commit e501b3d

Browse files
bjorn-helgaasbjorn-helgaas
committed
agp: Support 64-bit APBASE
Per the AGP 3.0 spec, APBASE is a standard PCI BAR and may be either 32 bits or 64 bits wide. Many drivers read APBASE directly, but they only handled 32-bit BARs. The PCI core reads APBASE at enumeration-time. Use pci_bus_address() instead of reading it again in the driver. This works correctly for both 32-bit and 64-bit BARs. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
1 parent 06cf56e commit e501b3d

File tree

11 files changed

+43
-60
lines changed

11 files changed

+43
-60
lines changed

‎drivers/char/agp/agp.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -239,6 +239,7 @@ long compat_agp_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
239239

240240
/* Chipset independent registers (from AGP Spec) */
241241
#define AGP_APBASE 0x10
242+
#define AGP_APERTURE_BAR 0
242243

243244
#define AGPSTAT 0x4
244245
#define AGPCMD 0x8

‎drivers/char/agp/ali-agp.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -85,8 +85,8 @@ static int ali_configure(void)
8585
pci_write_config_dword(agp_bridge->dev, ALI_TLBCTRL, ((temp & 0xffffff00) | 0x00000010));
8686

8787
/* address to map to */
88-
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
89-
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
88+
agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
89+
AGP_APERTURE_BAR);
9090

9191
#if 0
9292
if (agp_bridge->type == ALI_M1541) {

‎drivers/char/agp/amd-k7-agp.c

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -126,7 +126,6 @@ static int amd_create_gatt_table(struct agp_bridge_data *bridge)
126126
unsigned long __iomem *cur_gatt;
127127
unsigned long addr;
128128
int retval;
129-
u32 temp;
130129
int i;
131130

132131
value = A_SIZE_LVL2(agp_bridge->current_size);
@@ -149,8 +148,7 @@ static int amd_create_gatt_table(struct agp_bridge_data *bridge)
149148
* used to program the agp master not the cpu
150149
*/
151150

152-
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
153-
addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
151+
addr = pci_bus_address(agp_bridge->dev, AGP_APERTURE_BAR);
154152
agp_bridge->gart_bus_addr = addr;
155153

156154
/* Calculate the agp offset */

‎drivers/char/agp/amd64-agp.c

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -269,7 +269,6 @@ static int agp_aperture_valid(u64 aper, u32 size)
269269
*/
270270
static int fix_northbridge(struct pci_dev *nb, struct pci_dev *agp, u16 cap)
271271
{
272-
u32 aper_low, aper_hi;
273272
u64 aper, nb_aper;
274273
int order = 0;
275274
u32 nb_order, nb_base;
@@ -295,9 +294,7 @@ static int fix_northbridge(struct pci_dev *nb, struct pci_dev *agp, u16 cap)
295294
apsize |= 0xf00;
296295
order = 7 - hweight16(apsize);
297296

298-
pci_read_config_dword(agp, 0x10, &aper_low);
299-
pci_read_config_dword(agp, 0x14, &aper_hi);
300-
aper = (aper_low & ~((1<<22)-1)) | ((u64)aper_hi << 32);
297+
aper = pci_bus_address(agp, AGP_APERTURE_BAR);
301298

302299
/*
303300
* On some sick chips APSIZE is 0. This means it wants 4G

‎drivers/char/agp/ati-agp.c

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -211,10 +211,10 @@ static int ati_configure(void)
211211
else
212212
pci_write_config_dword(agp_bridge->dev, ATI_RS300_IG_AGPMODE, 0x20000);
213213

214-
/* address to map too */
214+
/* address to map to */
215215
/*
216-
pci_read_config_dword(agp_bridge.dev, AGP_APBASE, &temp);
217-
agp_bridge.gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
216+
agp_bridge.gart_bus_addr = pci_bus_address(agp_bridge.dev,
217+
AGP_APERTURE_BAR);
218218
printk(KERN_INFO PFX "IGP320 gart_bus_addr: %x\n", agp_bridge.gart_bus_addr);
219219
*/
220220
writel(0x60000, ati_generic_private.registers+ATI_GART_FEATURE_ID);
@@ -385,8 +385,7 @@ static int ati_create_gatt_table(struct agp_bridge_data *bridge)
385385
* This is a bus address even on the alpha, b/c its
386386
* used to program the agp master not the cpu
387387
*/
388-
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
389-
addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
388+
addr = pci_bus_address(agp_bridge->dev, AGP_APERTURE_BAR);
390389
agp_bridge->gart_bus_addr = addr;
391390

392391
/* Calculate the agp offset */

‎drivers/char/agp/efficeon-agp.c

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -128,7 +128,6 @@ static void efficeon_cleanup(void)
128128

129129
static int efficeon_configure(void)
130130
{
131-
u32 temp;
132131
u16 temp2;
133132
struct aper_size_info_lvl2 *current_size;
134133

@@ -141,8 +140,8 @@ static int efficeon_configure(void)
141140
current_size->size_value);
142141

143142
/* address to map to */
144-
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
145-
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
143+
agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
144+
AGP_APERTURE_BAR);
146145

147146
/* agpctrl */
148147
pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);

‎drivers/char/agp/generic.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1396,8 +1396,8 @@ int agp3_generic_configure(void)
13961396

13971397
current_size = A_SIZE_16(agp_bridge->current_size);
13981398

1399-
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
1400-
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
1399+
agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
1400+
AGP_APERTURE_BAR);
14011401

14021402
/* set aperture size */
14031403
pci_write_config_word(agp_bridge->dev, agp_bridge->capndx+AGPAPSIZE, current_size->size_value);

‎drivers/char/agp/intel-agp.c

Lines changed: 20 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -118,7 +118,6 @@ static void intel_8xx_cleanup(void)
118118

119119
static int intel_configure(void)
120120
{
121-
u32 temp;
122121
u16 temp2;
123122
struct aper_size_info_16 *current_size;
124123

@@ -128,8 +127,8 @@ static int intel_configure(void)
128127
pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
129128

130129
/* address to map to */
131-
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
132-
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
130+
agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
131+
AGP_APERTURE_BAR);
133132

134133
/* attbase - aperture base */
135134
pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
@@ -148,7 +147,7 @@ static int intel_configure(void)
148147

149148
static int intel_815_configure(void)
150149
{
151-
u32 temp, addr;
150+
u32 addr;
152151
u8 temp2;
153152
struct aper_size_info_8 *current_size;
154153

@@ -167,8 +166,8 @@ static int intel_815_configure(void)
167166
current_size->size_value);
168167

169168
/* address to map to */
170-
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
171-
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
169+
agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
170+
AGP_APERTURE_BAR);
172171

173172
pci_read_config_dword(agp_bridge->dev, INTEL_ATTBASE, &addr);
174173
addr &= INTEL_815_ATTBASE_MASK;
@@ -208,7 +207,6 @@ static void intel_820_cleanup(void)
208207

209208
static int intel_820_configure(void)
210209
{
211-
u32 temp;
212210
u8 temp2;
213211
struct aper_size_info_8 *current_size;
214212

@@ -218,8 +216,8 @@ static int intel_820_configure(void)
218216
pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
219217

220218
/* address to map to */
221-
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
222-
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
219+
agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
220+
AGP_APERTURE_BAR);
223221

224222
/* attbase - aperture base */
225223
pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
@@ -239,7 +237,6 @@ static int intel_820_configure(void)
239237

240238
static int intel_840_configure(void)
241239
{
242-
u32 temp;
243240
u16 temp2;
244241
struct aper_size_info_8 *current_size;
245242

@@ -249,8 +246,8 @@ static int intel_840_configure(void)
249246
pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
250247

251248
/* address to map to */
252-
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
253-
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
249+
agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
250+
AGP_APERTURE_BAR);
254251

255252
/* attbase - aperture base */
256253
pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
@@ -268,7 +265,6 @@ static int intel_840_configure(void)
268265

269266
static int intel_845_configure(void)
270267
{
271-
u32 temp;
272268
u8 temp2;
273269
struct aper_size_info_8 *current_size;
274270

@@ -282,9 +278,9 @@ static int intel_845_configure(void)
282278
agp_bridge->apbase_config);
283279
} else {
284280
/* address to map to */
285-
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
286-
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
287-
agp_bridge->apbase_config = temp;
281+
agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
282+
AGP_APERTURE_BAR);
283+
agp_bridge->apbase_config = agp_bridge->gart_bus_addr;
288284
}
289285

290286
/* attbase - aperture base */
@@ -303,7 +299,6 @@ static int intel_845_configure(void)
303299

304300
static int intel_850_configure(void)
305301
{
306-
u32 temp;
307302
u16 temp2;
308303
struct aper_size_info_8 *current_size;
309304

@@ -313,8 +308,8 @@ static int intel_850_configure(void)
313308
pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
314309

315310
/* address to map to */
316-
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
317-
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
311+
agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
312+
AGP_APERTURE_BAR);
318313

319314
/* attbase - aperture base */
320315
pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
@@ -332,7 +327,6 @@ static int intel_850_configure(void)
332327

333328
static int intel_860_configure(void)
334329
{
335-
u32 temp;
336330
u16 temp2;
337331
struct aper_size_info_8 *current_size;
338332

@@ -342,8 +336,8 @@ static int intel_860_configure(void)
342336
pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
343337

344338
/* address to map to */
345-
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
346-
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
339+
agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
340+
AGP_APERTURE_BAR);
347341

348342
/* attbase - aperture base */
349343
pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
@@ -361,7 +355,6 @@ static int intel_860_configure(void)
361355

362356
static int intel_830mp_configure(void)
363357
{
364-
u32 temp;
365358
u16 temp2;
366359
struct aper_size_info_8 *current_size;
367360

@@ -371,8 +364,8 @@ static int intel_830mp_configure(void)
371364
pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
372365

373366
/* address to map to */
374-
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
375-
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
367+
agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
368+
AGP_APERTURE_BAR);
376369

377370
/* attbase - aperture base */
378371
pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
@@ -390,7 +383,6 @@ static int intel_830mp_configure(void)
390383

391384
static int intel_7505_configure(void)
392385
{
393-
u32 temp;
394386
u16 temp2;
395387
struct aper_size_info_8 *current_size;
396388

@@ -400,8 +392,8 @@ static int intel_7505_configure(void)
400392
pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
401393

402394
/* address to map to */
403-
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
404-
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
395+
agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
396+
AGP_APERTURE_BAR);
405397

406398
/* attbase - aperture base */
407399
pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);

‎drivers/char/agp/nvidia-agp.c

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -115,9 +115,8 @@ static int nvidia_configure(void)
115115
pci_write_config_byte(agp_bridge->dev, NVIDIA_0_APSIZE,
116116
current_size->size_value);
117117

118-
/* address to map to */
119-
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &apbase);
120-
apbase &= PCI_BASE_ADDRESS_MEM_MASK;
118+
/* address to map to */
119+
apbase = pci_bus_address(agp_bridge->dev, AGP_APERTURE_BAR);
121120
agp_bridge->gart_bus_addr = apbase;
122121
aplimit = apbase + (current_size->size * 1024 * 1024) - 1;
123122
pci_write_config_dword(nvidia_private.dev_2, NVIDIA_2_APBASE, apbase);

‎drivers/char/agp/sis-agp.c

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -50,13 +50,12 @@ static void sis_tlbflush(struct agp_memory *mem)
5050

5151
static int sis_configure(void)
5252
{
53-
u32 temp;
5453
struct aper_size_info_8 *current_size;
5554

5655
current_size = A_SIZE_8(agp_bridge->current_size);
5756
pci_write_config_byte(agp_bridge->dev, SIS_TLBCNTRL, 0x05);
58-
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
59-
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
57+
agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
58+
AGP_APERTURE_BAR);
6059
pci_write_config_dword(agp_bridge->dev, SIS_ATTBASE,
6160
agp_bridge->gatt_bus_addr);
6261
pci_write_config_byte(agp_bridge->dev, SIS_APSIZE,

‎drivers/char/agp/via-agp.c

Lines changed: 6 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -43,16 +43,15 @@ static int via_fetch_size(void)
4343

4444
static int via_configure(void)
4545
{
46-
u32 temp;
4746
struct aper_size_info_8 *current_size;
4847

4948
current_size = A_SIZE_8(agp_bridge->current_size);
5049
/* aperture size */
5150
pci_write_config_byte(agp_bridge->dev, VIA_APSIZE,
5251
current_size->size_value);
53-
/* address to map too */
54-
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
55-
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
52+
/* address to map to */
53+
agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
54+
AGP_APERTURE_BAR);
5655

5756
/* GART control register */
5857
pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, 0x0000000f);
@@ -132,9 +131,9 @@ static int via_configure_agp3(void)
132131

133132
current_size = A_SIZE_16(agp_bridge->current_size);
134133

135-
/* address to map too */
136-
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
137-
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
134+
/* address to map to */
135+
agp_bridge->gart_bus_addr = pci_bus_address(agp_bridge->dev,
136+
AGP_APERTURE_BAR);
138137

139138
/* attbase - aperture GATT base */
140139
pci_write_config_dword(agp_bridge->dev, VIA_AGP3_ATTBASE,

0 commit comments

Comments
 (0)