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mcgrofaegl
mcgrof
authored and
aegl
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ia64: remove paravirt code
All the ia64 pvops code is now dead code since both xen and kvm support have been ripped out [0] [1]. Just that no one had troubled to rip this stuff out. The only useful remaining pieces were the old pvops docs but that was recently also generalized and moved out from ia64 [2]. This has been run time tested on an ia64 Madison system. [0] 003f7de "KVM: ia64: remove" since v3.19-rc1 [1] d52eefb "ia64/xen: Remove Xen support for ia64" since v3.14-rc1 [2] "virtual: Documentation: simplify and generalize paravirt_ops.txt" Signed-off-by: Luis R. Rodriguez <mcgrof@suse.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
1 parent c65b99f commit e55645e

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+68
-3317
lines changed

‎arch/ia64/Kconfig

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Original file line numberDiff line numberDiff line change
@@ -137,29 +137,6 @@ config AUDIT_ARCH
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bool
138138
default y
139139

140-
menuconfig PARAVIRT_GUEST
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bool "Paravirtualized guest support"
142-
depends on BROKEN
143-
help
144-
Say Y here to get to see options related to running Linux under
145-
various hypervisors. This option alone does not add any kernel code.
146-
147-
If you say N, all options in this submenu will be skipped and disabled.
148-
149-
if PARAVIRT_GUEST
150-
151-
config PARAVIRT
152-
bool "Enable paravirtualization code"
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depends on PARAVIRT_GUEST
154-
default y
155-
help
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This changes the kernel so it can modify itself when it is run
157-
under a hypervisor, potentially improving performance significantly
158-
over full virtualization. However, when run without a hypervisor
159-
the kernel is theoretically slower and slightly larger.
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161-
endif
162-
163140
choice
164141
prompt "System type"
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default IA64_GENERIC

‎arch/ia64/include/asm/hw_irq.h

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@@ -15,11 +15,7 @@
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#include <asm/ptrace.h>
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#include <asm/smp.h>
1717

18-
#ifndef CONFIG_PARAVIRT
1918
typedef u8 ia64_vector;
20-
#else
21-
typedef u16 ia64_vector;
22-
#endif
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2420
/*
2521
* 0 special
@@ -114,15 +110,11 @@ DECLARE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq);
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115111
extern struct irq_chip irq_type_ia64_lsapic; /* CPU-internal interrupt controller */
116112

117-
#ifdef CONFIG_PARAVIRT_GUEST
118-
#include <asm/paravirt.h>
119-
#else
120113
#define ia64_register_ipi ia64_native_register_ipi
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#define assign_irq_vector ia64_native_assign_irq_vector
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#define free_irq_vector ia64_native_free_irq_vector
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#define register_percpu_irq ia64_native_register_percpu_irq
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#define ia64_resend_irq ia64_native_resend_irq
125-
#endif
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127119
extern void ia64_native_register_ipi(void);
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extern int bind_irq_vector(int irq, int vector, cpumask_t domain);

‎arch/ia64/include/asm/intrinsics.h

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Original file line numberDiff line numberDiff line change
@@ -7,19 +7,6 @@
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#ifndef _ASM_IA64_INTRINSICS_H
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#define _ASM_IA64_INTRINSICS_H
99

10-
#include <asm/paravirt_privop.h>
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#include <uapi/asm/intrinsics.h>
1211

13-
#ifndef __ASSEMBLY__
14-
#if defined(CONFIG_PARAVIRT)
15-
# undef IA64_INTRINSIC_API
16-
# undef IA64_INTRINSIC_MACRO
17-
# ifdef ASM_SUPPORTED
18-
# define IA64_INTRINSIC_API(name) paravirt_ ## name
19-
# else
20-
# define IA64_INTRINSIC_API(name) pv_cpu_ops.name
21-
# endif
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#define IA64_INTRINSIC_MACRO(name) paravirt_ ## name
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#endif
24-
#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_IA64_INTRINSICS_H */

‎arch/ia64/include/asm/iosapic.h

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Original file line numberDiff line numberDiff line change
@@ -55,14 +55,10 @@
5555

5656
#define NR_IOSAPICS 256
5757

58-
#ifdef CONFIG_PARAVIRT_GUEST
59-
#include <asm/paravirt.h>
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#else
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#define iosapic_pcat_compat_init ia64_native_iosapic_pcat_compat_init
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#define __iosapic_read __ia64_native_iosapic_read
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#define __iosapic_write __ia64_native_iosapic_write
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#define iosapic_get_irq_chip ia64_native_iosapic_get_irq_chip
65-
#endif
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6763
extern void __init ia64_native_iosapic_pcat_compat_init(void);
6864
extern struct irq_chip *ia64_native_iosapic_get_irq_chip(unsigned long trigger);

‎arch/ia64/include/asm/module.h

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Original file line numberDiff line numberDiff line change
@@ -18,12 +18,6 @@ struct mod_arch_specific {
1818
struct elf64_shdr *got; /* global offset table */
1919
struct elf64_shdr *opd; /* official procedure descriptors */
2020
struct elf64_shdr *unwind; /* unwind-table section */
21-
#ifdef CONFIG_PARAVIRT
22-
struct elf64_shdr *paravirt_bundles;
23-
/* paravirt_alt_bundle_patch table */
24-
struct elf64_shdr *paravirt_insts;
25-
/* paravirt_alt_inst_patch table */
26-
#endif
2721
unsigned long gp; /* global-pointer for module */
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2923
void *core_unw_table; /* core unwind-table cookie returned by unwinder */

‎arch/ia64/include/asm/native/inst.h

Lines changed: 21 additions & 82 deletions
Original file line numberDiff line numberDiff line change
@@ -22,32 +22,6 @@
2222

2323
#define DO_SAVE_MIN IA64_NATIVE_DO_SAVE_MIN
2424

25-
#define __paravirt_switch_to ia64_native_switch_to
26-
#define __paravirt_leave_syscall ia64_native_leave_syscall
27-
#define __paravirt_work_processed_syscall ia64_native_work_processed_syscall
28-
#define __paravirt_leave_kernel ia64_native_leave_kernel
29-
#define __paravirt_pending_syscall_end ia64_work_pending_syscall_end
30-
#define __paravirt_work_processed_syscall_target \
31-
ia64_work_processed_syscall
32-
33-
#define paravirt_fsyscall_table ia64_native_fsyscall_table
34-
#define paravirt_fsys_bubble_down ia64_native_fsys_bubble_down
35-
36-
#ifdef CONFIG_PARAVIRT_GUEST_ASM_CLOBBER_CHECK
37-
# define PARAVIRT_POISON 0xdeadbeefbaadf00d
38-
# define CLOBBER(clob) \
39-
;; \
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movl clob = PARAVIRT_POISON; \
41-
;;
42-
# define CLOBBER_PRED(pred_clob) \
43-
;; \
44-
cmp.eq pred_clob, p0 = r0, r0 \
45-
;;
46-
#else
47-
# define CLOBBER(clob) /* nothing */
48-
# define CLOBBER_PRED(pred_clob) /* nothing */
49-
#endif
50-
5125
#define MOV_FROM_IFA(reg) \
5226
mov reg = cr.ifa
5327

@@ -70,122 +44,87 @@
7044
mov reg = cr.iip
7145

7246
#define MOV_FROM_IVR(reg, clob) \
73-
mov reg = cr.ivr \
74-
CLOBBER(clob)
47+
mov reg = cr.ivr
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7649
#define MOV_FROM_PSR(pred, reg, clob) \
77-
(pred) mov reg = psr \
78-
CLOBBER(clob)
50+
(pred) mov reg = psr
7951

8052
#define MOV_FROM_ITC(pred, pred_clob, reg, clob) \
81-
(pred) mov reg = ar.itc \
82-
CLOBBER(clob) \
83-
CLOBBER_PRED(pred_clob)
53+
(pred) mov reg = ar.itc
8454

8555
#define MOV_TO_IFA(reg, clob) \
86-
mov cr.ifa = reg \
87-
CLOBBER(clob)
56+
mov cr.ifa = reg
8857

8958
#define MOV_TO_ITIR(pred, reg, clob) \
90-
(pred) mov cr.itir = reg \
91-
CLOBBER(clob)
59+
(pred) mov cr.itir = reg
9260

9361
#define MOV_TO_IHA(pred, reg, clob) \
94-
(pred) mov cr.iha = reg \
95-
CLOBBER(clob)
62+
(pred) mov cr.iha = reg
9663

9764
#define MOV_TO_IPSR(pred, reg, clob) \
98-
(pred) mov cr.ipsr = reg \
99-
CLOBBER(clob)
65+
(pred) mov cr.ipsr = reg
10066

10167
#define MOV_TO_IFS(pred, reg, clob) \
102-
(pred) mov cr.ifs = reg \
103-
CLOBBER(clob)
68+
(pred) mov cr.ifs = reg
10469

10570
#define MOV_TO_IIP(reg, clob) \
106-
mov cr.iip = reg \
107-
CLOBBER(clob)
71+
mov cr.iip = reg
10872

10973
#define MOV_TO_KR(kr, reg, clob0, clob1) \
110-
mov IA64_KR(kr) = reg \
111-
CLOBBER(clob0) \
112-
CLOBBER(clob1)
74+
mov IA64_KR(kr) = reg
11375

11476
#define ITC_I(pred, reg, clob) \
115-
(pred) itc.i reg \
116-
CLOBBER(clob)
77+
(pred) itc.i reg
11778

11879
#define ITC_D(pred, reg, clob) \
119-
(pred) itc.d reg \
120-
CLOBBER(clob)
80+
(pred) itc.d reg
12181

12282
#define ITC_I_AND_D(pred_i, pred_d, reg, clob) \
12383
(pred_i) itc.i reg; \
124-
(pred_d) itc.d reg \
125-
CLOBBER(clob)
84+
(pred_d) itc.d reg
12685

12786
#define THASH(pred, reg0, reg1, clob) \
128-
(pred) thash reg0 = reg1 \
129-
CLOBBER(clob)
87+
(pred) thash reg0 = reg1
13088

13189
#define SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(clob0, clob1) \
13290
ssm psr.ic | PSR_DEFAULT_BITS \
133-
CLOBBER(clob0) \
134-
CLOBBER(clob1) \
13591
;; \
13692
srlz.i /* guarantee that interruption collectin is on */ \
13793
;;
13894

13995
#define SSM_PSR_IC_AND_SRLZ_D(clob0, clob1) \
14096
ssm psr.ic \
141-
CLOBBER(clob0) \
142-
CLOBBER(clob1) \
14397
;; \
14498
srlz.d
14599

146100
#define RSM_PSR_IC(clob) \
147-
rsm psr.ic \
148-
CLOBBER(clob)
101+
rsm psr.ic
149102

150103
#define SSM_PSR_I(pred, pred_clob, clob) \
151-
(pred) ssm psr.i \
152-
CLOBBER(clob) \
153-
CLOBBER_PRED(pred_clob)
104+
(pred) ssm psr.i
154105

155106
#define RSM_PSR_I(pred, clob0, clob1) \
156-
(pred) rsm psr.i \
157-
CLOBBER(clob0) \
158-
CLOBBER(clob1)
107+
(pred) rsm psr.i
159108

160109
#define RSM_PSR_I_IC(clob0, clob1, clob2) \
161-
rsm psr.i | psr.ic \
162-
CLOBBER(clob0) \
163-
CLOBBER(clob1) \
164-
CLOBBER(clob2)
110+
rsm psr.i | psr.ic
165111

166112
#define RSM_PSR_DT \
167113
rsm psr.dt
168114

169115
#define RSM_PSR_BE_I(clob0, clob1) \
170-
rsm psr.be | psr.i \
171-
CLOBBER(clob0) \
172-
CLOBBER(clob1)
116+
rsm psr.be | psr.i
173117

174118
#define SSM_PSR_DT_AND_SRLZ_I \
175119
ssm psr.dt \
176120
;; \
177121
srlz.i
178122

179123
#define BSW_0(clob0, clob1, clob2) \
180-
bsw.0 \
181-
CLOBBER(clob0) \
182-
CLOBBER(clob1) \
183-
CLOBBER(clob2)
124+
bsw.0
184125

185126
#define BSW_1(clob0, clob1) \
186-
bsw.1 \
187-
CLOBBER(clob0) \
188-
CLOBBER(clob1)
127+
bsw.1
189128

190129
#define COVER \
191130
cover

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