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torvaldstorvalds
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Merge tag 'drm-fixes-2019-04-05' of git://anongit.freedesktop.org/drm/drm
Pull drm fixes from Dave Airlie: "Pretty quiet week, just some amdgpu and i915 fixes. i915: - deadlock fix - gvt fixes amdgpu: - PCIE dpm feature fix - Powerplay fixes" * tag 'drm-fixes-2019-04-05' of git://anongit.freedesktop.org/drm/drm: drm/i915/gvt: Fix kerneldoc typo for intel_vgpu_emulate_hotplug drm/i915/gvt: Correct the calculation of plane size drm/amdgpu: remove unnecessary rlc reset function on gfx9 drm/i915: Always backoff after a drm_modeset_lock() deadlock drm/i915/gvt: do not let pin count of shadow mm go negative drm/i915/gvt: do not deliver a workload if its creation fails drm/amd/display: VBIOS can't be light up HDMI when restart system drm/amd/powerplay: fix possible hang with 3+ 4K monitors drm/amd/powerplay: correct data type to avoid overflow drm/amd/powerplay: add ECC feature bit drm/amd/amdgpu: fix PCIe dpm feature issue (v3)
2 parents 0548740 + 23b5f42 commit ea2cec2

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‎drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3625,13 +3625,18 @@ static void amdgpu_device_get_min_pci_speed_width(struct amdgpu_device *adev,
36253625
struct pci_dev *pdev = adev->pdev;
36263626
enum pci_bus_speed cur_speed;
36273627
enum pcie_link_width cur_width;
3628+
u32 ret = 1;
36283629

36293630
*speed = PCI_SPEED_UNKNOWN;
36303631
*width = PCIE_LNK_WIDTH_UNKNOWN;
36313632

36323633
while (pdev) {
36333634
cur_speed = pcie_get_speed_cap(pdev);
36343635
cur_width = pcie_get_width_cap(pdev);
3636+
ret = pcie_bandwidth_available(adev->pdev, NULL,
3637+
NULL, &cur_width);
3638+
if (!ret)
3639+
cur_width = PCIE_LNK_WIDTH_RESRV;
36353640

36363641
if (cur_speed != PCI_SPEED_UNKNOWN) {
36373642
if (*speed == PCI_SPEED_UNKNOWN)

‎drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2405,8 +2405,6 @@ static int gfx_v9_0_rlc_resume(struct amdgpu_device *adev)
24052405
/* disable CG */
24062406
WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, 0);
24072407

2408-
adev->gfx.rlc.funcs->reset(adev);
2409-
24102408
gfx_v9_0_init_pg(adev);
24112409

24122410
if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) {

‎drivers/gpu/drm/amd/display/dc/core/dc_link.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2660,12 +2660,18 @@ void core_link_enable_stream(
26602660
void core_link_disable_stream(struct pipe_ctx *pipe_ctx, int option)
26612661
{
26622662
struct dc *core_dc = pipe_ctx->stream->ctx->dc;
2663+
struct dc_stream_state *stream = pipe_ctx->stream;
26632664

26642665
core_dc->hwss.blank_stream(pipe_ctx);
26652666

26662667
if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)
26672668
deallocate_mst_payload(pipe_ctx);
26682669

2670+
if (dc_is_hdmi_signal(pipe_ctx->stream->signal))
2671+
dal_ddc_service_write_scdc_data(
2672+
stream->link->ddc, 0,
2673+
stream->timing.flags.LTE_340MCSC_SCRAMBLE);
2674+
26692675
core_dc->hwss.disable_stream(pipe_ctx, option);
26702676

26712677
disable_link(pipe_ctx->stream->link, pipe_ctx->stream->signal);

‎drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

Lines changed: 18 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -91,6 +91,12 @@ static void vega20_set_default_registry_data(struct pp_hwmgr *hwmgr)
9191
* MP0CLK DS
9292
*/
9393
data->registry_data.disallowed_features = 0xE0041C00;
94+
/* ECC feature should be disabled on old SMUs */
95+
smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetSmuVersion);
96+
hwmgr->smu_version = smum_get_argument(hwmgr);
97+
if (hwmgr->smu_version < 0x282100)
98+
data->registry_data.disallowed_features |= FEATURE_ECC_MASK;
99+
94100
data->registry_data.od_state_in_dc_support = 0;
95101
data->registry_data.thermal_support = 1;
96102
data->registry_data.skip_baco_hardware = 0;
@@ -357,6 +363,7 @@ static void vega20_init_dpm_defaults(struct pp_hwmgr *hwmgr)
357363
data->smu_features[GNLD_DS_MP1CLK].smu_feature_id = FEATURE_DS_MP1CLK_BIT;
358364
data->smu_features[GNLD_DS_MP0CLK].smu_feature_id = FEATURE_DS_MP0CLK_BIT;
359365
data->smu_features[GNLD_XGMI].smu_feature_id = FEATURE_XGMI_BIT;
366+
data->smu_features[GNLD_ECC].smu_feature_id = FEATURE_ECC_BIT;
360367

361368
for (i = 0; i < GNLD_FEATURES_MAX; i++) {
362369
data->smu_features[i].smu_feature_bitmap =
@@ -3020,7 +3027,8 @@ static int vega20_get_ppfeature_status(struct pp_hwmgr *hwmgr, char *buf)
30203027
"FCLK_DS",
30213028
"MP1CLK_DS",
30223029
"MP0CLK_DS",
3023-
"XGMI"};
3030+
"XGMI",
3031+
"ECC"};
30243032
static const char *output_title[] = {
30253033
"FEATURES",
30263034
"BITMASK",
@@ -3462,6 +3470,7 @@ static int vega20_apply_clocks_adjust_rules(struct pp_hwmgr *hwmgr)
34623470
struct vega20_single_dpm_table *dpm_table;
34633471
bool vblank_too_short = false;
34643472
bool disable_mclk_switching;
3473+
bool disable_fclk_switching;
34653474
uint32_t i, latency;
34663475

34673476
disable_mclk_switching = ((1 < hwmgr->display_config->num_display) &&
@@ -3537,13 +3546,20 @@ static int vega20_apply_clocks_adjust_rules(struct pp_hwmgr *hwmgr)
35373546
if (hwmgr->display_config->nb_pstate_switch_disable)
35383547
dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;
35393548

3549+
if ((disable_mclk_switching &&
3550+
(dpm_table->dpm_state.hard_min_level == dpm_table->dpm_levels[dpm_table->count - 1].value)) ||
3551+
hwmgr->display_config->min_mem_set_clock / 100 >= dpm_table->dpm_levels[dpm_table->count - 1].value)
3552+
disable_fclk_switching = true;
3553+
else
3554+
disable_fclk_switching = false;
3555+
35403556
/* fclk */
35413557
dpm_table = &(data->dpm_table.fclk_table);
35423558
dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[0].value;
35433559
dpm_table->dpm_state.soft_max_level = VG20_CLOCK_MAX_DEFAULT;
35443560
dpm_table->dpm_state.hard_min_level = dpm_table->dpm_levels[0].value;
35453561
dpm_table->dpm_state.hard_max_level = VG20_CLOCK_MAX_DEFAULT;
3546-
if (hwmgr->display_config->nb_pstate_switch_disable)
3562+
if (hwmgr->display_config->nb_pstate_switch_disable || disable_fclk_switching)
35473563
dpm_table->dpm_state.soft_min_level = dpm_table->dpm_levels[dpm_table->count - 1].value;
35483564

35493565
/* vclk */

‎drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -80,6 +80,7 @@ enum {
8080
GNLD_DS_MP1CLK,
8181
GNLD_DS_MP0CLK,
8282
GNLD_XGMI,
83+
GNLD_ECC,
8384

8485
GNLD_FEATURES_MAX
8586
};

‎drivers/gpu/drm/amd/powerplay/inc/smu11_driver_if.h

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -99,7 +99,7 @@
9999
#define FEATURE_DS_MP1CLK_BIT 30
100100
#define FEATURE_DS_MP0CLK_BIT 31
101101
#define FEATURE_XGMI_BIT 32
102-
#define FEATURE_SPARE_33_BIT 33
102+
#define FEATURE_ECC_BIT 33
103103
#define FEATURE_SPARE_34_BIT 34
104104
#define FEATURE_SPARE_35_BIT 35
105105
#define FEATURE_SPARE_36_BIT 36
@@ -165,7 +165,8 @@
165165
#define FEATURE_DS_FCLK_MASK (1 << FEATURE_DS_FCLK_BIT )
166166
#define FEATURE_DS_MP1CLK_MASK (1 << FEATURE_DS_MP1CLK_BIT )
167167
#define FEATURE_DS_MP0CLK_MASK (1 << FEATURE_DS_MP0CLK_BIT )
168-
#define FEATURE_XGMI_MASK (1 << FEATURE_XGMI_BIT )
168+
#define FEATURE_XGMI_MASK (1ULL << FEATURE_XGMI_BIT )
169+
#define FEATURE_ECC_MASK (1ULL << FEATURE_ECC_BIT )
169170

170171
#define DPM_OVERRIDE_DISABLE_SOCCLK_PID 0x00000001
171172
#define DPM_OVERRIDE_DISABLE_UCLK_PID 0x00000002

‎drivers/gpu/drm/i915/gvt/display.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -448,7 +448,7 @@ void intel_gvt_emulate_vblank(struct intel_gvt *gvt)
448448
/**
449449
* intel_vgpu_emulate_hotplug - trigger hotplug event for vGPU
450450
* @vgpu: a vGPU
451-
* @conncted: link state
451+
* @connected: link state
452452
*
453453
* This function is used to trigger hotplug interrupt for vGPU
454454
*

‎drivers/gpu/drm/i915/gvt/dmabuf.c

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -238,9 +238,6 @@ static int vgpu_get_plane_info(struct drm_device *dev,
238238
default:
239239
gvt_vgpu_err("invalid tiling mode: %x\n", p.tiled);
240240
}
241-
242-
info->size = (((p.stride * p.height * p.bpp) / 8) +
243-
(PAGE_SIZE - 1)) >> PAGE_SHIFT;
244241
} else if (plane_id == DRM_PLANE_TYPE_CURSOR) {
245242
ret = intel_vgpu_decode_cursor_plane(vgpu, &c);
246243
if (ret)
@@ -262,14 +259,13 @@ static int vgpu_get_plane_info(struct drm_device *dev,
262259
info->x_hot = UINT_MAX;
263260
info->y_hot = UINT_MAX;
264261
}
265-
266-
info->size = (((info->stride * c.height * c.bpp) / 8)
267-
+ (PAGE_SIZE - 1)) >> PAGE_SHIFT;
268262
} else {
269263
gvt_vgpu_err("invalid plane id:%d\n", plane_id);
270264
return -EINVAL;
271265
}
272266

267+
info->size = (info->stride * info->height + PAGE_SIZE - 1)
268+
>> PAGE_SHIFT;
273269
if (info->size == 0) {
274270
gvt_vgpu_err("fb size is zero\n");
275271
return -EINVAL;

‎drivers/gpu/drm/i915/gvt/gtt.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1946,7 +1946,7 @@ void _intel_vgpu_mm_release(struct kref *mm_ref)
19461946
*/
19471947
void intel_vgpu_unpin_mm(struct intel_vgpu_mm *mm)
19481948
{
1949-
atomic_dec(&mm->pincount);
1949+
atomic_dec_if_positive(&mm->pincount);
19501950
}
19511951

19521952
/**

‎drivers/gpu/drm/i915/gvt/scheduler.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1486,8 +1486,9 @@ intel_vgpu_create_workload(struct intel_vgpu *vgpu, int ring_id,
14861486
intel_runtime_pm_put_unchecked(dev_priv);
14871487
}
14881488

1489-
if (ret && (vgpu_is_vm_unhealthy(ret))) {
1490-
enter_failsafe_mode(vgpu, GVT_FAILSAFE_GUEST_ERR);
1489+
if (ret) {
1490+
if (vgpu_is_vm_unhealthy(ret))
1491+
enter_failsafe_mode(vgpu, GVT_FAILSAFE_GUEST_ERR);
14911492
intel_vgpu_destroy_workload(workload);
14921493
return ERR_PTR(ret);
14931494
}

‎drivers/gpu/drm/i915/i915_debugfs.c

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4830,7 +4830,10 @@ static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
48304830
ret = drm_modeset_lock(&dev->mode_config.connection_mutex,
48314831
&ctx);
48324832
if (ret) {
4833-
ret = -EINTR;
4833+
if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) {
4834+
try_again = true;
4835+
continue;
4836+
}
48344837
break;
48354838
}
48364839
crtc = connector->state->crtc;

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