@@ -2553,14 +2553,14 @@ static int amd64_toggle_ecc_err_reporting(struct amd64_pvt *pvt, bool on)
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if (on ) {
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if (reg -> l & K8_MSR_MCGCTL_NBE )
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- pvt -> flags .ecc_report = 1 ;
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+ pvt -> flags .nb_mce_enable = 1 ;
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reg -> l |= K8_MSR_MCGCTL_NBE ;
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} else {
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/*
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- * Turn off ECC reporting only when it was off before
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+ * Turn off NB MCE reporting only when it was off before
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*/
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- if (!pvt -> flags .ecc_report )
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+ if (!pvt -> flags .nb_mce_enable )
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reg -> l &= ~K8_MSR_MCGCTL_NBE ;
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}
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}
@@ -2571,22 +2571,11 @@ static int amd64_toggle_ecc_err_reporting(struct amd64_pvt *pvt, bool on)
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return 0 ;
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}
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- /*
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- * Only if 'ecc_enable_override' is set AND BIOS had ECC disabled, do "we"
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- * enable it.
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- */
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static void amd64_enable_ecc_error_reporting (struct mem_ctl_info * mci )
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{
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struct amd64_pvt * pvt = mci -> pvt_info ;
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u32 value , mask = K8_NBCTL_CECCEn | K8_NBCTL_UECCEn ;
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- if (!ecc_enable_override )
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- return ;
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-
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- amd64_printk (KERN_WARNING ,
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- "'ecc_enable_override' parameter is active, "
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- "Enabling AMD ECC hardware now: CAUTION\n" );
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-
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amd64_read_pci_cfg (pvt -> misc_f3_ctl , K8_NBCTL , & value );
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/* turn on UECCn and CECCEn bits */
@@ -2611,6 +2600,8 @@ static void amd64_enable_ecc_error_reporting(struct mem_ctl_info *mci)
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"This node reports that DRAM ECC is "
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"currently Disabled; ENABLING now\n" );
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+ pvt -> flags .nb_ecc_prev = 0 ;
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+
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/* Attempt to turn on DRAM ECC Enable */
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value |= K8_NBCFG_ECC_ENABLE ;
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pci_write_config_dword (pvt -> misc_f3_ctl , K8_NBCFG , value );
@@ -2625,7 +2616,10 @@ static void amd64_enable_ecc_error_reporting(struct mem_ctl_info *mci)
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amd64_printk (KERN_DEBUG ,
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"Hardware accepted DRAM ECC Enable\n" );
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}
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+ } else {
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+ pvt -> flags .nb_ecc_prev = 1 ;
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}
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+
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debugf0 ("NBCFG(2)= 0x%x CHIPKILL= %s ECC_ENABLE= %s\n" , value ,
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(value & K8_NBCFG_CHIPKILL ) ? "Enabled" : "Disabled" ,
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(value & K8_NBCFG_ECC_ENABLE ) ? "Enabled" : "Disabled" );
@@ -2644,12 +2638,18 @@ static void amd64_restore_ecc_error_reporting(struct amd64_pvt *pvt)
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value &= ~mask ;
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value |= pvt -> old_nbctl ;
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- /* restore the NB Enable MCGCTL bit */
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pci_write_config_dword (pvt -> misc_f3_ctl , K8_NBCTL , value );
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+ /* restore previous BIOS DRAM ECC "off" setting which we force-enabled */
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+ if (!pvt -> flags .nb_ecc_prev ) {
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+ amd64_read_pci_cfg (pvt -> misc_f3_ctl , K8_NBCFG , & value );
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+ value &= ~K8_NBCFG_ECC_ENABLE ;
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+ pci_write_config_dword (pvt -> misc_f3_ctl , K8_NBCFG , value );
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+ }
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+
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+ /* restore the NB Enable MCGCTL bit */
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if (amd64_toggle_ecc_err_reporting (pvt , OFF ))
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- amd64_printk (KERN_WARNING , "Error restoring ECC reporting over "
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- "MCGCTL!\n" );
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+ amd64_printk (KERN_WARNING , "Error restoring NB MCGCTL settings!\n" );
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}
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/*
@@ -2690,8 +2690,9 @@ static int amd64_check_ecc_enabled(struct amd64_pvt *pvt)
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if (!ecc_enable_override ) {
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amd64_printk (KERN_NOTICE , "%s" , ecc_msg );
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return - ENODEV ;
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+ } else {
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+ amd64_printk (KERN_WARNING , "Forcing ECC checking on!\n" );
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}
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- ecc_enable_override = 0 ;
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}
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return 0 ;
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