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anjutsudhakarmpe
anjutsudhakar
authored and
mpe
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powerpc/perf: Add support for sampling interrupt register state
The perf infrastructure uses a bit mask to find out valid registers to display. Define a register mask for supported registers defined in uapi/asm/perf_regs.h. The bit positions also correspond to register IDs which is used by perf infrastructure to fetch the register values. CONFIG_HAVE_PERF_REGS enables sampling of the interrupted machine state. Signed-off-by: Anju T <anju@linux.vnet.ibm.com> [mpe: Add license, use CONFIG_PPC64, fix 32-bit build] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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‎arch/powerpc/Kconfig

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@@ -116,6 +116,7 @@ config PPC
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select GENERIC_ATOMIC64 if PPC32
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select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
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select HAVE_PERF_EVENTS
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select HAVE_PERF_REGS
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select HAVE_REGS_AND_STACK_ACCESS_API
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select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S_64
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select ARCH_WANT_IPC_PARSE_VERSION

‎arch/powerpc/perf/Makefile

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@@ -1,6 +1,6 @@
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subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
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obj-$(CONFIG_PERF_EVENTS) += callchain.o
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obj-$(CONFIG_PERF_EVENTS) += callchain.o perf_regs.o
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obj-$(CONFIG_PPC_PERF_CTRS) += core-book3s.o bhrb.o
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obj64-$(CONFIG_PPC_PERF_CTRS) += power4-pmu.o ppc970-pmu.o power5-pmu.o \

‎arch/powerpc/perf/perf_regs.c

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/*
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* Copyright 2016 Anju T, IBM Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/perf_event.h>
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#include <linux/bug.h>
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#include <linux/stddef.h>
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#include <asm/ptrace.h>
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#include <asm/perf_regs.h>
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#define PT_REGS_OFFSET(id, r) [id] = offsetof(struct pt_regs, r)
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#define REG_RESERVED (~((1ULL << PERF_REG_POWERPC_MAX) - 1))
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static unsigned int pt_regs_offset[PERF_REG_POWERPC_MAX] = {
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PT_REGS_OFFSET(PERF_REG_POWERPC_R0, gpr[0]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R1, gpr[1]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R2, gpr[2]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R3, gpr[3]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R4, gpr[4]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R5, gpr[5]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R6, gpr[6]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R7, gpr[7]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R8, gpr[8]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R9, gpr[9]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R10, gpr[10]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R11, gpr[11]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R12, gpr[12]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R13, gpr[13]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R14, gpr[14]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R15, gpr[15]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R16, gpr[16]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R17, gpr[17]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R18, gpr[18]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R19, gpr[19]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R20, gpr[20]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R21, gpr[21]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R22, gpr[22]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R23, gpr[23]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R24, gpr[24]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R25, gpr[25]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R26, gpr[26]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R27, gpr[27]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R28, gpr[28]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R29, gpr[29]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R30, gpr[30]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_R31, gpr[31]),
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PT_REGS_OFFSET(PERF_REG_POWERPC_NIP, nip),
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PT_REGS_OFFSET(PERF_REG_POWERPC_MSR, msr),
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PT_REGS_OFFSET(PERF_REG_POWERPC_ORIG_R3, orig_gpr3),
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PT_REGS_OFFSET(PERF_REG_POWERPC_CTR, ctr),
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PT_REGS_OFFSET(PERF_REG_POWERPC_LINK, link),
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PT_REGS_OFFSET(PERF_REG_POWERPC_XER, xer),
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PT_REGS_OFFSET(PERF_REG_POWERPC_CCR, ccr),
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#ifdef CONFIG_PPC64
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PT_REGS_OFFSET(PERF_REG_POWERPC_SOFTE, softe),
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#else
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PT_REGS_OFFSET(PERF_REG_POWERPC_SOFTE, mq),
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#endif
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PT_REGS_OFFSET(PERF_REG_POWERPC_TRAP, trap),
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PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar),
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PT_REGS_OFFSET(PERF_REG_POWERPC_DSISR, dsisr),
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};
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u64 perf_reg_value(struct pt_regs *regs, int idx)
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{
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if (WARN_ON_ONCE(idx >= PERF_REG_POWERPC_MAX))
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return 0;
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return regs_get_register(regs, pt_regs_offset[idx]);
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}
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int perf_reg_validate(u64 mask)
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{
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if (!mask || mask & REG_RESERVED)
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return -EINVAL;
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return 0;
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}
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u64 perf_reg_abi(struct task_struct *task)
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{
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#ifdef CONFIG_PPC64
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if (!test_tsk_thread_flag(task, TIF_32BIT))
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return PERF_SAMPLE_REGS_ABI_64;
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else
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#endif
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return PERF_SAMPLE_REGS_ABI_32;
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}
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void perf_get_regs_user(struct perf_regs *regs_user,
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struct pt_regs *regs,
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struct pt_regs *regs_user_copy)
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{
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regs_user->regs = task_pt_regs(current);
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regs_user->abi = perf_reg_abi(current);
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}

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