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Eugeniy Paltsevvineetgarc
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ARC: [plat-hsdk] use actual clk driver to manage cpu clk
With corresponding clk driver now merged upstream, switch to it. - core_clk now represent the PLL (vs. fixed clk before) - input_clk represent the clk signal src for PLL (basically xtal) Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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arch/arc/boot/dts/hsdk.dts

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -57,10 +57,10 @@
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};
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};
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60-
core_clk: core-clk {
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input_clk: input-clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <500000000>;
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clock-frequency = <33333333>;
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};
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cpu_intc: cpu-interrupt-controller {
@@ -102,6 +102,13 @@
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ranges = <0x00000000 0xf0000000 0x10000000>;
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core_clk: core-clk@0 {
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compatible = "snps,hsdk-core-pll-clock";
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reg = <0x00 0x10>, <0x14B8 0x4>;
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#clock-cells = <0>;
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clocks = <&input_clk>;
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};
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serial: serial@5000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x5000 0x100>;

arch/arc/plat-hsdk/Kconfig

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,4 +6,5 @@
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#
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menuconfig ARC_SOC_HSDK
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bool "ARC HS Development Kit SOC"
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bool "ARC HS Development Kit SOC"
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select CLK_HSDK

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