Skip to content

Commit f2e600c

Browse files
committed
arm64: Implement arch_counter_get_cntpct to read the physical counter
As we are about to use the physical counter on arm64 systems that have KVM support, implement arch_counter_get_cntpct() and the associated errata workaround functionality for stable timer reads. Cc: Will Deacon <will.deacon@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
1 parent 8a5776a commit f2e600c

File tree

2 files changed

+26
-5
lines changed

2 files changed

+26
-5
lines changed

arch/arm64/include/asm/arch_timer.h

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -52,6 +52,7 @@ struct arch_timer_erratum_workaround {
5252
const char *desc;
5353
u32 (*read_cntp_tval_el0)(void);
5454
u32 (*read_cntv_tval_el0)(void);
55+
u64 (*read_cntpct_el0)(void);
5556
u64 (*read_cntvct_el0)(void);
5657
int (*set_next_event_phys)(unsigned long, struct clock_event_device *);
5758
int (*set_next_event_virt)(unsigned long, struct clock_event_device *);
@@ -148,11 +149,8 @@ static inline void arch_timer_set_cntkctl(u32 cntkctl)
148149

149150
static inline u64 arch_counter_get_cntpct(void)
150151
{
151-
/*
152-
* AArch64 kernel and user space mandate the use of CNTVCT.
153-
*/
154-
BUG();
155-
return 0;
152+
isb();
153+
return arch_timer_reg_read_stable(cntpct_el0);
156154
}
157155

158156
static inline u64 arch_counter_get_cntvct(void)

drivers/clocksource/arm_arch_timer.c

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -217,6 +217,11 @@ static u32 notrace fsl_a008585_read_cntv_tval_el0(void)
217217
return __fsl_a008585_read_reg(cntv_tval_el0);
218218
}
219219

220+
static u64 notrace fsl_a008585_read_cntpct_el0(void)
221+
{
222+
return __fsl_a008585_read_reg(cntpct_el0);
223+
}
224+
220225
static u64 notrace fsl_a008585_read_cntvct_el0(void)
221226
{
222227
return __fsl_a008585_read_reg(cntvct_el0);
@@ -258,6 +263,11 @@ static u32 notrace hisi_161010101_read_cntv_tval_el0(void)
258263
return __hisi_161010101_read_reg(cntv_tval_el0);
259264
}
260265

266+
static u64 notrace hisi_161010101_read_cntpct_el0(void)
267+
{
268+
return __hisi_161010101_read_reg(cntpct_el0);
269+
}
270+
261271
static u64 notrace hisi_161010101_read_cntvct_el0(void)
262272
{
263273
return __hisi_161010101_read_reg(cntvct_el0);
@@ -288,6 +298,15 @@ static struct ate_acpi_oem_info hisi_161010101_oem_info[] = {
288298
#endif
289299

290300
#ifdef CONFIG_ARM64_ERRATUM_858921
301+
static u64 notrace arm64_858921_read_cntpct_el0(void)
302+
{
303+
u64 old, new;
304+
305+
old = read_sysreg(cntpct_el0);
306+
new = read_sysreg(cntpct_el0);
307+
return (((old ^ new) >> 32) & 1) ? old : new;
308+
}
309+
291310
static u64 notrace arm64_858921_read_cntvct_el0(void)
292311
{
293312
u64 old, new;
@@ -346,6 +365,7 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
346365
.desc = "Freescale erratum a005858",
347366
.read_cntp_tval_el0 = fsl_a008585_read_cntp_tval_el0,
348367
.read_cntv_tval_el0 = fsl_a008585_read_cntv_tval_el0,
368+
.read_cntpct_el0 = fsl_a008585_read_cntpct_el0,
349369
.read_cntvct_el0 = fsl_a008585_read_cntvct_el0,
350370
.set_next_event_phys = erratum_set_next_event_tval_phys,
351371
.set_next_event_virt = erratum_set_next_event_tval_virt,
@@ -358,6 +378,7 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
358378
.desc = "HiSilicon erratum 161010101",
359379
.read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0,
360380
.read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0,
381+
.read_cntpct_el0 = hisi_161010101_read_cntpct_el0,
361382
.read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
362383
.set_next_event_phys = erratum_set_next_event_tval_phys,
363384
.set_next_event_virt = erratum_set_next_event_tval_virt,
@@ -368,6 +389,7 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
368389
.desc = "HiSilicon erratum 161010101",
369390
.read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0,
370391
.read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0,
392+
.read_cntpct_el0 = hisi_161010101_read_cntpct_el0,
371393
.read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
372394
.set_next_event_phys = erratum_set_next_event_tval_phys,
373395
.set_next_event_virt = erratum_set_next_event_tval_virt,
@@ -378,6 +400,7 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = {
378400
.match_type = ate_match_local_cap_id,
379401
.id = (void *)ARM64_WORKAROUND_858921,
380402
.desc = "ARM erratum 858921",
403+
.read_cntpct_el0 = arm64_858921_read_cntpct_el0,
381404
.read_cntvct_el0 = arm64_858921_read_cntvct_el0,
382405
},
383406
#endif

0 commit comments

Comments
 (0)