mtd: onenand: omap2: Do not make delay for GPIO OMAP3 specific

3x380V · Boris Brezillon · commit f5229331f13b · 2018-01-12T15:34:23.000+01:00
Second commit in driver history (782b7a3: "[MTD] [OneNAND] OMAP3: add delay for GPIO") added quirk for waiting until GPIO line settle. As DMA was disabled for OMAP2 boards, chances are this problem was not OMAP3 specific and as it is just one register read, previous test for SoC type is approximately as expensive as read itself. Make delay unconditional, which allows removing SoC specific code alltogether. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Acked-by: Roger Quadros <rogerq@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c
@@ -57,7 +57,6 @@ struct omap2_onenand {
 	struct dma_chan *dma_chan;
 	int freq;
 	int (*setup)(void __iomem *base, int *freq_ptr);
-	u8 flags;
 };
 
 static void omap2_onenand_dma_complete_func(void *completion)
@@ -148,9 +147,8 @@ static int omap2_onenand_wait(struct mtd_info *mtd, int state)
 		if (!(syscfg & ONENAND_SYS_CFG1_IOBE)) {
 			syscfg |= ONENAND_SYS_CFG1_IOBE;
 			write_reg(c, syscfg, ONENAND_REG_SYS_CFG1);
-			if (c->flags & ONENAND_IN_OMAP34XX)
-				/* Add a delay to let GPIO settle */
-				syscfg = read_reg(c, ONENAND_REG_SYS_CFG1);
+			/* Add a delay to let GPIO settle */
+			syscfg = read_reg(c, ONENAND_REG_SYS_CFG1);
 		}
 
 		reinit_completion(&c->irq_done);
@@ -470,7 +468,6 @@ static int omap2_onenand_probe(struct platform_device *pdev)
 
 	init_completion(&c->irq_done);
 	init_completion(&c->dma_done);
-	c->flags = pdata->flags;
 	c->gpmc_cs = pdata->cs;
 	c->gpio_irq = pdata->gpio_irq;
 	if (pdata->dma_channel < 0) {
