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ARM: LPAE: Add fault handling support
The DFSR and IFSR register format is different when LPAE is enabled. In addition, DFSR and IFSR have similar definitions for the fault type. This modifies the fault code to correctly handle the new format. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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6 files changed

+104
-5
lines changed

6 files changed

+104
-5
lines changed

‎arch/arm/include/asm/system.h

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -80,6 +80,14 @@ struct siginfo;
8080
void arm_notify_die(const char *str, struct pt_regs *regs, struct siginfo *info,
8181
unsigned long err, unsigned long trap);
8282

83+
#ifdef CONFIG_ARM_LPAE
84+
#define FAULT_CODE_ALIGNMENT 33
85+
#define FAULT_CODE_DEBUG 34
86+
#else
87+
#define FAULT_CODE_ALIGNMENT 1
88+
#define FAULT_CODE_DEBUG 2
89+
#endif
90+
8391
void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
8492
struct pt_regs *),
8593
int sig, int code, const char *name);

‎arch/arm/kernel/hw_breakpoint.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1016,10 +1016,10 @@ static int __init arch_hw_breakpoint_init(void)
10161016
}
10171017

10181018
/* Register debug fault handler. */
1019-
hook_fault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT,
1020-
"watchpoint debug exception");
1021-
hook_ifault_code(2, hw_breakpoint_pending, SIGTRAP, TRAP_HWBKPT,
1022-
"breakpoint debug exception");
1019+
hook_fault_code(FAULT_CODE_DEBUG, hw_breakpoint_pending, SIGTRAP,
1020+
TRAP_HWBKPT, "watchpoint debug exception");
1021+
hook_ifault_code(FAULT_CODE_DEBUG, hw_breakpoint_pending, SIGTRAP,
1022+
TRAP_HWBKPT, "breakpoint debug exception");
10231023

10241024
/* Register hotplug notifier. */
10251025
register_cpu_notifier(&dbg_reset_nb);

‎arch/arm/mm/alignment.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -968,7 +968,7 @@ static int __init alignment_init(void)
968968
ai_usermode = safe_usermode(ai_usermode, false);
969969
}
970970

971-
hook_fault_code(1, do_alignment, SIGBUS, BUS_ADRALN,
971+
hook_fault_code(FAULT_CODE_ALIGNMENT, do_alignment, SIGBUS, BUS_ADRALN,
972972
"alignment exception");
973973

974974
/*

‎arch/arm/mm/fault.c

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -110,8 +110,10 @@ void show_pte(struct mm_struct *mm, unsigned long addr)
110110

111111
pte = pte_offset_map(pmd, addr);
112112
printk(", *pte=%08llx", (long long)pte_val(*pte));
113+
#ifndef CONFIG_ARM_LPAE
113114
printk(", *ppte=%08llx",
114115
(long long)pte_val(pte[PTE_HWTABLE_PTRS]));
116+
#endif
115117
pte_unmap(pte);
116118
} while(0);
117119

@@ -428,6 +430,12 @@ do_translation_fault(unsigned long addr, unsigned int fsr,
428430
pmd = pmd_offset(pud, addr);
429431
pmd_k = pmd_offset(pud_k, addr);
430432

433+
#ifdef CONFIG_ARM_LPAE
434+
/*
435+
* Only one hardware entry per PMD with LPAE.
436+
*/
437+
index = 0;
438+
#else
431439
/*
432440
* On ARM one Linux PGD entry contains two hardware entries (see page
433441
* tables layout in pgtable.h). We normally guarantee that we always
@@ -437,6 +445,7 @@ do_translation_fault(unsigned long addr, unsigned int fsr,
437445
* for the first of pair.
438446
*/
439447
index = (addr >> SECTION_SHIFT) & 1;
448+
#endif
440449
if (pmd_none(pmd_k[index]))
441450
goto bad_area;
442451

@@ -484,7 +493,11 @@ struct fsr_info {
484493
};
485494

486495
/* FSR definition */
496+
#ifdef CONFIG_ARM_LPAE
497+
#include "fsr-3level.c"
498+
#else
487499
#include "fsr-2level.c"
500+
#endif
488501

489502
void __init
490503
hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, struct pt_regs *),
@@ -553,6 +566,7 @@ do_PrefetchAbort(unsigned long addr, unsigned int ifsr, struct pt_regs *regs)
553566
arm_notify_die("", regs, &info, ifsr, 0);
554567
}
555568

569+
#ifndef CONFIG_ARM_LPAE
556570
static int __init exceptions_init(void)
557571
{
558572
if (cpu_architecture() >= CPU_ARCH_ARMv6) {
@@ -575,3 +589,4 @@ static int __init exceptions_init(void)
575589
}
576590

577591
arch_initcall(exceptions_init);
592+
#endif

‎arch/arm/mm/fault.h

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,11 +8,19 @@
88
#define FSR_WRITE (1 << 11)
99
#define FSR_FS4 (1 << 10)
1010
#define FSR_FS3_0 (15)
11+
#define FSR_FS5_0 (0x3f)
1112

13+
#ifdef CONFIG_ARM_LPAE
14+
static inline int fsr_fs(unsigned int fsr)
15+
{
16+
return fsr & FSR_FS5_0;
17+
}
18+
#else
1219
static inline int fsr_fs(unsigned int fsr)
1320
{
1421
return (fsr & FSR_FS3_0) | (fsr & FSR_FS4) >> 6;
1522
}
23+
#endif
1624

1725
void do_bad_area(unsigned long addr, unsigned int fsr, struct pt_regs *regs);
1826
unsigned long search_exception_table(unsigned long addr);

‎arch/arm/mm/fsr-3level.c

Lines changed: 68 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,68 @@
1+
static struct fsr_info fsr_info[] = {
2+
{ do_bad, SIGBUS, 0, "unknown 0" },
3+
{ do_bad, SIGBUS, 0, "unknown 1" },
4+
{ do_bad, SIGBUS, 0, "unknown 2" },
5+
{ do_bad, SIGBUS, 0, "unknown 3" },
6+
{ do_bad, SIGBUS, 0, "reserved translation fault" },
7+
{ do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 1 translation fault" },
8+
{ do_translation_fault, SIGSEGV, SEGV_MAPERR, "level 2 translation fault" },
9+
{ do_page_fault, SIGSEGV, SEGV_MAPERR, "level 3 translation fault" },
10+
{ do_bad, SIGBUS, 0, "reserved access flag fault" },
11+
{ do_bad, SIGSEGV, SEGV_ACCERR, "level 1 access flag fault" },
12+
{ do_bad, SIGSEGV, SEGV_ACCERR, "level 2 access flag fault" },
13+
{ do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 access flag fault" },
14+
{ do_bad, SIGBUS, 0, "reserved permission fault" },
15+
{ do_bad, SIGSEGV, SEGV_ACCERR, "level 1 permission fault" },
16+
{ do_sect_fault, SIGSEGV, SEGV_ACCERR, "level 2 permission fault" },
17+
{ do_page_fault, SIGSEGV, SEGV_ACCERR, "level 3 permission fault" },
18+
{ do_bad, SIGBUS, 0, "synchronous external abort" },
19+
{ do_bad, SIGBUS, 0, "asynchronous external abort" },
20+
{ do_bad, SIGBUS, 0, "unknown 18" },
21+
{ do_bad, SIGBUS, 0, "unknown 19" },
22+
{ do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" },
23+
{ do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" },
24+
{ do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" },
25+
{ do_bad, SIGBUS, 0, "synchronous abort (translation table walk)" },
26+
{ do_bad, SIGBUS, 0, "synchronous parity error" },
27+
{ do_bad, SIGBUS, 0, "asynchronous parity error" },
28+
{ do_bad, SIGBUS, 0, "unknown 26" },
29+
{ do_bad, SIGBUS, 0, "unknown 27" },
30+
{ do_bad, SIGBUS, 0, "synchronous parity error (translation table walk" },
31+
{ do_bad, SIGBUS, 0, "synchronous parity error (translation table walk" },
32+
{ do_bad, SIGBUS, 0, "synchronous parity error (translation table walk" },
33+
{ do_bad, SIGBUS, 0, "synchronous parity error (translation table walk" },
34+
{ do_bad, SIGBUS, 0, "unknown 32" },
35+
{ do_bad, SIGBUS, BUS_ADRALN, "alignment fault" },
36+
{ do_bad, SIGBUS, 0, "debug event" },
37+
{ do_bad, SIGBUS, 0, "unknown 35" },
38+
{ do_bad, SIGBUS, 0, "unknown 36" },
39+
{ do_bad, SIGBUS, 0, "unknown 37" },
40+
{ do_bad, SIGBUS, 0, "unknown 38" },
41+
{ do_bad, SIGBUS, 0, "unknown 39" },
42+
{ do_bad, SIGBUS, 0, "unknown 40" },
43+
{ do_bad, SIGBUS, 0, "unknown 41" },
44+
{ do_bad, SIGBUS, 0, "unknown 42" },
45+
{ do_bad, SIGBUS, 0, "unknown 43" },
46+
{ do_bad, SIGBUS, 0, "unknown 44" },
47+
{ do_bad, SIGBUS, 0, "unknown 45" },
48+
{ do_bad, SIGBUS, 0, "unknown 46" },
49+
{ do_bad, SIGBUS, 0, "unknown 47" },
50+
{ do_bad, SIGBUS, 0, "unknown 48" },
51+
{ do_bad, SIGBUS, 0, "unknown 49" },
52+
{ do_bad, SIGBUS, 0, "unknown 50" },
53+
{ do_bad, SIGBUS, 0, "unknown 51" },
54+
{ do_bad, SIGBUS, 0, "implementation fault (lockdown abort)" },
55+
{ do_bad, SIGBUS, 0, "unknown 53" },
56+
{ do_bad, SIGBUS, 0, "unknown 54" },
57+
{ do_bad, SIGBUS, 0, "unknown 55" },
58+
{ do_bad, SIGBUS, 0, "unknown 56" },
59+
{ do_bad, SIGBUS, 0, "unknown 57" },
60+
{ do_bad, SIGBUS, 0, "implementation fault (coprocessor abort)" },
61+
{ do_bad, SIGBUS, 0, "unknown 59" },
62+
{ do_bad, SIGBUS, 0, "unknown 60" },
63+
{ do_bad, SIGBUS, 0, "unknown 61" },
64+
{ do_bad, SIGBUS, 0, "unknown 62" },
65+
{ do_bad, SIGBUS, 0, "unknown 63" },
66+
};
67+
68+
#define ifsr_info fsr_info

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