ARM: 7128/1: vic: Don't write to the read-only register VIC_IRQ_STATUS

Zoltan Devai · Russell King · commit f8be12d15374 · 2011-10-15T11:04:22.000+01:00
This is unneeded and causes an abort on the SPMP8000 platform.

Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Zoltan Devai &lt;zoss@devai.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
@@ -259,7 +259,6 @@ static void __init vic_disable(void __iomem *base)
 	writel(0, base + VIC_INT_SELECT);
 	writel(0, base + VIC_INT_ENABLE);
 	writel(~0, base + VIC_INT_ENABLE_CLEAR);
-	writel(0, base + VIC_IRQ_STATUS);
 	writel(0, base + VIC_ITCR);
 	writel(~0, base + VIC_INT_SOFT_CLEAR);
 }

Original file line number	Diff line number	Diff line change
`@@ -259,7 +259,6 @@ static void __init vic_disable(void __iomem *base)`
`259`	`259`	`writel(0, base + VIC_INT_SELECT);`
`260`	`260`	`writel(0, base + VIC_INT_ENABLE);`
`261`	`261`	`writel(~0, base + VIC_INT_ENABLE_CLEAR);`
`262`		`- writel(0, base + VIC_IRQ_STATUS);`
`263`	`262`	`writel(0, base + VIC_ITCR);`
`264`	`263`	`writel(~0, base + VIC_INT_SOFT_CLEAR);`
`265`	`264`	`}`