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Merge tag 'irqchip-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip updates from Marc Zyngier: - A bunch of new irqchip drivers (RDA8810PL, Madera, imx-irqsteer) - Updates for new (and old) platforms (i.MX8MQ, F1C100s) - A number of SPDX cleanups - A workaround for a very broken GICv3 implementation - A platform-msi fix - Various cleanups
2 parents c5f48c0 + fb94109 commit ff3730a

28 files changed

+1190
-127
lines changed

Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,9 @@ Allwinner Sunxi Interrupt Controller
22

33
Required properties:
44

5-
- compatible : should be "allwinner,sun4i-a10-ic"
5+
- compatible : should be one of the following:
6+
"allwinner,sun4i-a10-ic"
7+
"allwinner,suniv-f1c100s-ic"
68
- reg : Specifies base physical address and size of the registers.
79
- interrupt-controller : Identifies the node as an interrupt controller
810
- #interrupt-cells : Specifies the number of cells needed to encode an

Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,9 @@ Interrupts (LPI).
77

88
Main node required properties:
99

10-
- compatible : should at least contain "arm,gic-v3".
10+
- compatible : should at least contain "arm,gic-v3" or either
11+
"qcom,msm8996-gic-v3", "arm,gic-v3" for msm8996 SoCs
12+
to address SoC specific bugs/quirks
1113
- interrupt-controller : Identifies the node as an interrupt controller
1214
- #interrupt-cells : Specifies the number of cells needed to encode an
1315
interrupt source. Must be a single cell with a value of at least 3.
Lines changed: 34 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,34 @@
1+
Freescale IRQSTEER Interrupt multiplexer
2+
3+
Required properties:
4+
5+
- compatible: should be:
6+
- "fsl,imx8m-irqsteer"
7+
- "fsl,imx-irqsteer"
8+
- reg: Physical base address and size of registers.
9+
- interrupts: Should contain the parent interrupt line used to multiplex the
10+
input interrupts.
11+
- clocks: Should contain one clock for entry in clock-names
12+
see Documentation/devicetree/bindings/clock/clock-bindings.txt
13+
- clock-names:
14+
- "ipg": main logic clock
15+
- interrupt-controller: Identifies the node as an interrupt controller.
16+
- #interrupt-cells: Specifies the number of cells needed to encode an
17+
interrupt source. The value must be 1.
18+
- fsl,channel: The output channel that all input IRQs should be steered into.
19+
- fsl,irq-groups: Number of IRQ groups managed by this controller instance.
20+
Each group manages 64 input interrupts.
21+
22+
Example:
23+
24+
interrupt-controller@32e2d000 {
25+
compatible = "fsl,imx8m-irqsteer", "fsl,imx-irqsteer";
26+
reg = <0x32e2d000 0x1000>;
27+
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
28+
clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>;
29+
clock-names = "ipg";
30+
fsl,channel = <0>;
31+
fsl,irq-groups = <1>;
32+
interrupt-controller;
33+
#interrupt-cells = <1>;
34+
};
Lines changed: 61 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,61 @@
1+
RDA Micro RDA8810PL Interrupt Controller
2+
3+
The interrupt controller in RDA8810PL SoC is a custom interrupt controller
4+
which supports up to 32 interrupts.
5+
6+
Required properties:
7+
8+
- compatible: Should be "rda,8810pl-intc".
9+
- reg: Specifies base physical address of the registers set.
10+
- interrupt-controller: Identifies the node as an interrupt controller.
11+
- #interrupt-cells: Specifies the number of cells needed to encode an
12+
interrupt source. The value shall be 2.
13+
14+
The interrupt sources are as follows:
15+
16+
ID Name
17+
------------
18+
0: PULSE_DUMMY
19+
1: I2C
20+
2: NAND_NFSC
21+
3: SDMMC1
22+
4: SDMMC2
23+
5: SDMMC3
24+
6: SPI1
25+
7: SPI2
26+
8: SPI3
27+
9: UART1
28+
10: UART2
29+
11: UART3
30+
12: GPIO1
31+
13: GPIO2
32+
14: GPIO3
33+
15: KEYPAD
34+
16: TIMER
35+
17: TIMEROS
36+
18: COMREG0
37+
19: COMREG1
38+
20: USB
39+
21: DMC
40+
22: DMA
41+
23: CAMERA
42+
24: GOUDA
43+
25: GPU
44+
26: VPU_JPG
45+
27: VPU_HOST
46+
28: VOC
47+
29: AUIFC0
48+
30: AUIFC1
49+
31: L2CC
50+
51+
Example:
52+
apb@20800000 {
53+
compatible = "simple-bus";
54+
...
55+
intc: interrupt-controller@0 {
56+
compatible = "rda,8810pl-intc";
57+
reg = <0x0 0x1000>;
58+
interrupt-controller;
59+
#interrupt-cells = <2>;
60+
};
61+
};

Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,10 @@ Required properties:
1414
(only needed for exti controller with multiple exti under
1515
same parent interrupt: st,stm32-exti and st,stm32h7-exti)
1616

17+
Optional properties:
18+
19+
- hwlocks: reference to a phandle of a hardware spinlock provider node.
20+
1721
Example:
1822

1923
exti: interrupt-controller@40013c00 {

MAINTAINERS

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3669,8 +3669,10 @@ W: https://github.com/CirrusLogic/linux-drivers/wiki
36693669
S: Supported
36703670
F: Documentation/devicetree/bindings/mfd/madera.txt
36713671
F: Documentation/devicetree/bindings/pinctrl/cirrus,madera-pinctrl.txt
3672+
F: include/linux/irqchip/irq-madera*
36723673
F: include/linux/mfd/madera/*
36733674
F: drivers/gpio/gpio-madera*
3675+
F: drivers/irqchip/irq-madera*
36743676
F: drivers/mfd/madera*
36753677
F: drivers/mfd/cs47l*
36763678
F: drivers/pinctrl/cirrus/*

drivers/base/platform-msi.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -368,14 +368,16 @@ void platform_msi_domain_free(struct irq_domain *domain, unsigned int virq,
368368
unsigned int nvec)
369369
{
370370
struct platform_msi_priv_data *data = domain->host_data;
371-
struct msi_desc *desc;
372-
for_each_msi_entry(desc, data->dev) {
371+
struct msi_desc *desc, *tmp;
372+
for_each_msi_entry_safe(desc, tmp, data->dev) {
373373
if (WARN_ON(!desc->irq || desc->nvec_used != 1))
374374
return;
375375
if (!(desc->irq >= virq && desc->irq < (virq + nvec)))
376376
continue;
377377

378378
irq_domain_free_irqs_common(domain, desc->irq, 1);
379+
list_del(&desc->list);
380+
free_msi_entry(desc);
379381
}
380382
}
381383

drivers/irqchip/Kconfig

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -150,6 +150,9 @@ config IMGPDC_IRQ
150150
select GENERIC_IRQ_CHIP
151151
select IRQ_DOMAIN
152152

153+
config MADERA_IRQ
154+
tristate
155+
153156
config IRQ_MIPS_CPU
154157
bool
155158
select GENERIC_IRQ_CHIP
@@ -195,6 +198,10 @@ config JCORE_AIC
195198
help
196199
Support for the J-Core integrated AIC.
197200

201+
config RDA_INTC
202+
bool
203+
select IRQ_DOMAIN
204+
198205
config RENESAS_INTC_IRQPIN
199206
bool
200207
select IRQ_DOMAIN
@@ -391,6 +398,14 @@ config CSKY_APB_INTC
391398
by C-SKY single core SOC system. It use mmio map apb-bus to visit
392399
the controller's register.
393400

401+
config IMX_IRQSTEER
402+
bool "i.MX IRQSTEER support"
403+
depends on ARCH_MXC || COMPILE_TEST
404+
default ARCH_MXC
405+
select IRQ_DOMAIN
406+
help
407+
Support for the i.MX IRQSTEER interrupt multiplexer/remapper.
408+
394409
endmenu
395410

396411
config SIFIVE_PLIC

drivers/irqchip/Makefile

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -43,6 +43,7 @@ obj-$(CONFIG_IMGPDC_IRQ) += irq-imgpdc.o
4343
obj-$(CONFIG_IRQ_MIPS_CPU) += irq-mips-cpu.o
4444
obj-$(CONFIG_SIRF_IRQ) += irq-sirfsoc.o
4545
obj-$(CONFIG_JCORE_AIC) += irq-jcore-aic.o
46+
obj-$(CONFIG_RDA_INTC) += irq-rda-intc.o
4647
obj-$(CONFIG_RENESAS_INTC_IRQPIN) += irq-renesas-intc-irqpin.o
4748
obj-$(CONFIG_RENESAS_IRQC) += irq-renesas-irqc.o
4849
obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o
@@ -91,3 +92,5 @@ obj-$(CONFIG_QCOM_PDC) += qcom-pdc.o
9192
obj-$(CONFIG_CSKY_MPINTC) += irq-csky-mpintc.o
9293
obj-$(CONFIG_CSKY_APB_INTC) += irq-csky-apb-intc.o
9394
obj-$(CONFIG_SIFIVE_PLIC) += irq-sifive-plic.o
95+
obj-$(CONFIG_IMX_IRQSTEER) += irq-imx-irqsteer.o
96+
obj-$(CONFIG_MADERA_IRQ) += irq-madera.o

drivers/irqchip/irq-bcm2835.c

Lines changed: 1 addition & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1,17 +1,8 @@
1+
// SPDX-License-Identifier: GPL-2.0+
12
/*
23
* Copyright 2010 Broadcom
34
* Copyright 2012 Simon Arlott, Chris Boot, Stephen Warren
45
*
5-
* This program is free software; you can redistribute it and/or modify
6-
* it under the terms of the GNU General Public License as published by
7-
* the Free Software Foundation; either version 2 of the License, or
8-
* (at your option) any later version.
9-
*
10-
* This program is distributed in the hope that it will be useful,
11-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
12-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13-
* GNU General Public License for more details.
14-
*
156
* Quirk 1: Shortcut interrupts don't set the bank 1/2 register pending bits
167
*
178
* If an interrupt fires on bank 1 that isn't in the shortcuts list, bit 8

drivers/irqchip/irq-bcm2836.c

Lines changed: 1 addition & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1,17 +1,8 @@
1+
// SPDX-License-Identifier: GPL-2.0+
12
/*
23
* Root interrupt controller for the BCM2836 (Raspberry Pi 2).
34
*
45
* Copyright 2015 Broadcom
5-
*
6-
* This program is free software; you can redistribute it and/or modify
7-
* it under the terms of the GNU General Public License as published by
8-
* the Free Software Foundation; either version 2 of the License, or
9-
* (at your option) any later version.
10-
*
11-
* This program is distributed in the hope that it will be useful,
12-
* but WITHOUT ANY WARRANTY; without even the implied warranty of
13-
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14-
* GNU General Public License for more details.
156
*/
167

178
#include <linux/cpu.h>

drivers/irqchip/irq-gic-common.c

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,18 @@ void gic_set_kvm_info(const struct gic_kvm_info *info)
3636
gic_kvm_info = info;
3737
}
3838

39+
void gic_enable_of_quirks(const struct device_node *np,
40+
const struct gic_quirk *quirks, void *data)
41+
{
42+
for (; quirks->desc; quirks++) {
43+
if (!of_device_is_compatible(np, quirks->compatible))
44+
continue;
45+
if (quirks->init(data))
46+
pr_info("GIC: enabling workaround for %s\n",
47+
quirks->desc);
48+
}
49+
}
50+
3951
void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks,
4052
void *data)
4153
{

drivers/irqchip/irq-gic-common.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,7 @@
2323

2424
struct gic_quirk {
2525
const char *desc;
26+
const char *compatible;
2627
bool (*init)(void *data);
2728
u32 iidr;
2829
u32 mask;
@@ -35,6 +36,8 @@ void gic_dist_config(void __iomem *base, int gic_irqs,
3536
void gic_cpu_config(void __iomem *base, void (*sync_access)(void));
3637
void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks,
3738
void *data);
39+
void gic_enable_of_quirks(const struct device_node *np,
40+
const struct gic_quirk *quirks, void *data);
3841

3942
void gic_set_kvm_info(const struct gic_kvm_info *info);
4043

drivers/irqchip/irq-gic-v3.c

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,8 @@
4141

4242
#include "irq-gic-common.h"
4343

44+
#define FLAGS_WORKAROUND_GICR_WAKER_MSM8996 (1ULL << 0)
45+
4446
struct redist_region {
4547
void __iomem *redist_base;
4648
phys_addr_t phys_base;
@@ -55,6 +57,7 @@ struct gic_chip_data {
5557
struct irq_domain *domain;
5658
u64 redist_stride;
5759
u32 nr_redist_regions;
60+
u64 flags;
5861
bool has_rss;
5962
unsigned int irq_nr;
6063
struct partition_desc *ppi_descs[16];
@@ -139,6 +142,9 @@ static void gic_enable_redist(bool enable)
139142
u32 count = 1000000; /* 1s! */
140143
u32 val;
141144

145+
if (gic_data.flags & FLAGS_WORKAROUND_GICR_WAKER_MSM8996)
146+
return;
147+
142148
rbase = gic_data_rdist_rd_base();
143149

144150
val = readl_relaxed(rbase + GICR_WAKER);
@@ -1067,6 +1073,15 @@ static const struct irq_domain_ops partition_domain_ops = {
10671073
.select = gic_irq_domain_select,
10681074
};
10691075

1076+
static bool gic_enable_quirk_msm8996(void *data)
1077+
{
1078+
struct gic_chip_data *d = data;
1079+
1080+
d->flags |= FLAGS_WORKAROUND_GICR_WAKER_MSM8996;
1081+
1082+
return true;
1083+
}
1084+
10701085
static int __init gic_init_bases(void __iomem *dist_base,
10711086
struct redist_region *rdist_regs,
10721087
u32 nr_redist_regions,
@@ -1271,6 +1286,16 @@ static void __init gic_of_setup_kvm_info(struct device_node *node)
12711286
gic_set_kvm_info(&gic_v3_kvm_info);
12721287
}
12731288

1289+
static const struct gic_quirk gic_quirks[] = {
1290+
{
1291+
.desc = "GICv3: Qualcomm MSM8996 broken firmware",
1292+
.compatible = "qcom,msm8996-gic-v3",
1293+
.init = gic_enable_quirk_msm8996,
1294+
},
1295+
{
1296+
}
1297+
};
1298+
12741299
static int __init gic_of_init(struct device_node *node, struct device_node *parent)
12751300
{
12761301
void __iomem *dist_base;
@@ -1318,6 +1343,8 @@ static int __init gic_of_init(struct device_node *node, struct device_node *pare
13181343
if (of_property_read_u64(node, "redistributor-stride", &redist_stride))
13191344
redist_stride = 0;
13201345

1346+
gic_enable_of_quirks(node, gic_quirks, &gic_data);
1347+
13211348
err = gic_init_bases(dist_base, rdist_regs, nr_redist_regions,
13221349
redist_stride, &node->fwnode);
13231350
if (err)

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