Skip to content

Commit 97ef22e

Browse files
wujiangangwujiangang
committed
feat: Modify file mode
1 parent 4c58d9e commit 97ef22e

File tree

229 files changed

+48360
-48360
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

229 files changed

+48360
-48360
lines changed

‎bin/boot_v1.6.bin

100755100644
File mode changed.

‎bin/esp_init_data_default.bin

100755100644
File mode changed.

‎driver_lib/Makefile

100755100644
File mode changed.

‎driver_lib/README.md

100755100644
File mode changed.

‎driver_lib/driver/Makefile

+43-43
Original file line numberDiff line numberDiff line change
@@ -1,43 +1,43 @@
1-
2-
#############################################################
3-
# Required variables for each makefile
4-
# Discard this section from all parent makefiles
5-
# Expected variables (with automatic defaults):
6-
# CSRCS (all "C" files in the dir)
7-
# SUBDIRS (all subdirs with a Makefile)
8-
# GEN_LIBS - list of libs to be generated ()
9-
# GEN_IMAGES - list of images to be generated ()
10-
# COMPONENTS_xxx - a list of libs/objs in the form
11-
# subdir/lib to be extracted and rolled up into
12-
# a generated lib/image xxx.a ()
13-
#
14-
ifndef PDIR
15-
GEN_LIBS = libdriver.a
16-
endif
17-
18-
19-
#############################################################
20-
# Configuration i.e. compile options etc.
21-
# Target specific stuff (defines etc.) goes in here!
22-
# Generally values applying to a tree are captured in the
23-
# makefile at its root level - these are then overridden
24-
# for a subtree within the makefile rooted therein
25-
#
26-
#DEFINES +=
27-
28-
#############################################################
29-
# Recursion Magic - Don't touch this!!
30-
#
31-
# Each subtree potentially has an include directory
32-
# corresponding to the common APIs applicable to modules
33-
# rooted at that subtree. Accordingly, the INCLUDE PATH
34-
# of a module can only contain the include directories up
35-
# its parent path, and not its siblings
36-
#
37-
# Required for each makefile to inherit from the parent
38-
#
39-
40-
INCLUDES := $(INCLUDES) -I $(PDIR)include
41-
PDIR := ../$(PDIR)
42-
sinclude $(PDIR)Makefile
43-
1+
2+
#############################################################
3+
# Required variables for each makefile
4+
# Discard this section from all parent makefiles
5+
# Expected variables (with automatic defaults):
6+
# CSRCS (all "C" files in the dir)
7+
# SUBDIRS (all subdirs with a Makefile)
8+
# GEN_LIBS - list of libs to be generated ()
9+
# GEN_IMAGES - list of images to be generated ()
10+
# COMPONENTS_xxx - a list of libs/objs in the form
11+
# subdir/lib to be extracted and rolled up into
12+
# a generated lib/image xxx.a ()
13+
#
14+
ifndef PDIR
15+
GEN_LIBS = libdriver.a
16+
endif
17+
18+
19+
#############################################################
20+
# Configuration i.e. compile options etc.
21+
# Target specific stuff (defines etc.) goes in here!
22+
# Generally values applying to a tree are captured in the
23+
# makefile at its root level - these are then overridden
24+
# for a subtree within the makefile rooted therein
25+
#
26+
#DEFINES +=
27+
28+
#############################################################
29+
# Recursion Magic - Don't touch this!!
30+
#
31+
# Each subtree potentially has an include directory
32+
# corresponding to the common APIs applicable to modules
33+
# rooted at that subtree. Accordingly, the INCLUDE PATH
34+
# of a module can only contain the include directories up
35+
# its parent path, and not its siblings
36+
#
37+
# Required for each makefile to inherit from the parent
38+
#
39+
40+
INCLUDES := $(INCLUDES) -I $(PDIR)include
41+
PDIR := ../$(PDIR)
42+
sinclude $(PDIR)Makefile
43+

‎driver_lib/driver/hw_timer.c

+116-116
Original file line numberDiff line numberDiff line change
@@ -1,116 +1,116 @@
1-
/*
2-
* ESPRSSIF MIT License
3-
*
4-
* Copyright (c) 2015 <ESPRESSIF SYSTEMS (SHANGHAI) PTE LTD>
5-
*
6-
* Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case,
7-
* it is free of charge, to any person obtaining a copy of this software and associated
8-
* documentation files (the "Software"), to deal in the Software without restriction, including
9-
* without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
10-
* and/or sell copies of the Software, and to permit persons to whom the Software is furnished
11-
* to do so, subject to the following conditions:
12-
*
13-
* The above copyright notice and this permission notice shall be included in all copies or
14-
* substantial portions of the Software.
15-
*
16-
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17-
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
18-
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
19-
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
20-
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21-
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22-
*
23-
*/
24-
25-
#include "esp_common.h"
26-
27-
#define US_TO_RTC_TIMER_TICKS(t) \
28-
((t) ? \
29-
(((t) > 0x35A) ? \
30-
(((t) >> 2) * ((APB_CLK_FREQ >> 4) / 250000) + ((t)&0x3) * ((APB_CLK_FREQ >> 4) / 1000000)) : \
31-
(((t) *(APB_CLK_FREQ>>4)) / 1000000)) : \
32-
0)
33-
34-
#define FRC1_ENABLE_TIMER BIT7
35-
#define FRC1_AUTO_LOAD BIT6
36-
37-
typedef enum { // timer provided mode
38-
DIVDED_BY_1 = 0, // timer clock
39-
DIVDED_BY_16 = 4, // divided by 16
40-
DIVDED_BY_256 = 8, // divided by 256
41-
} TIMER_PREDIVED_MODE;
42-
43-
typedef enum { // timer interrupt mode
44-
TM_LEVEL_INT = 1, // level interrupt
45-
TM_EDGE_INT = 0, // edge interrupt
46-
} TIMER_INT_MODE;
47-
48-
#define RTC_REG_WRITE(addr, val) WRITE_PERI_REG(addr, val)
49-
50-
static void (* user_hw_timer_cb)(void) = NULL;
51-
52-
static void hw_timer_isr_cb(void *arg)
53-
{
54-
if (user_hw_timer_cb != NULL) {
55-
(*(user_hw_timer_cb))();
56-
}
57-
}
58-
59-
void hw_timer_arm(uint32 val)
60-
{
61-
RTC_REG_WRITE(FRC1_LOAD_ADDRESS, US_TO_RTC_TIMER_TICKS(val));
62-
}
63-
64-
void hw_timer_set_func(void (* user_hw_timer_cb_set)(void))
65-
{
66-
user_hw_timer_cb = user_hw_timer_cb_set;
67-
}
68-
69-
void hw_timer_init(uint8 req)
70-
{
71-
if (req == 1) {
72-
RTC_REG_WRITE(FRC1_CTRL_ADDRESS,
73-
FRC1_AUTO_LOAD | DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT);
74-
} else {
75-
RTC_REG_WRITE(FRC1_CTRL_ADDRESS,
76-
DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT);
77-
}
78-
79-
_xt_isr_attach(ETS_FRC_TIMER1_INUM, hw_timer_isr_cb, NULL);
80-
81-
TM1_EDGE_INT_ENABLE();
82-
_xt_isr_unmask(1 << ETS_FRC_TIMER1_INUM);
83-
}
84-
85-
//-------------------------------Test Code Below--------------------------------------
86-
#if 0
87-
#include "hw_timer.h"
88-
89-
#define REG_WRITE(_r,_v) (*(volatile uint32 *)(_r)) = (_v)
90-
#define REG_READ(_r) (*(volatile uint32 *)(_r))
91-
#define WDEV_NOW() REG_READ(0x3ff20c00)
92-
93-
uint32 tick_now2 = 0;
94-
void hw_test_timer_cb(void)
95-
{
96-
static uint16 j = 0;
97-
j++;
98-
99-
if ((WDEV_NOW() - tick_now2) >= 1000000) {
100-
static uint32 idx = 1;
101-
tick_now2 = WDEV_NOW();
102-
os_printf("b%u:%d\n", idx++, j);
103-
j = 0;
104-
}
105-
106-
//hw_timer_arm(50);
107-
}
108-
109-
void user_init(void)
110-
{
111-
hw_timer_init(1);
112-
hw_timer_set_func(hw_test_timer_cb);
113-
hw_timer_arm(100);
114-
}
115-
#endif
116-
1+
/*
2+
* ESPRSSIF MIT License
3+
*
4+
* Copyright (c) 2015 <ESPRESSIF SYSTEMS (SHANGHAI) PTE LTD>
5+
*
6+
* Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case,
7+
* it is free of charge, to any person obtaining a copy of this software and associated
8+
* documentation files (the "Software"), to deal in the Software without restriction, including
9+
* without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
10+
* and/or sell copies of the Software, and to permit persons to whom the Software is furnished
11+
* to do so, subject to the following conditions:
12+
*
13+
* The above copyright notice and this permission notice shall be included in all copies or
14+
* substantial portions of the Software.
15+
*
16+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
18+
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
19+
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
20+
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21+
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22+
*
23+
*/
24+
25+
#include "esp_common.h"
26+
27+
#define US_TO_RTC_TIMER_TICKS(t) \
28+
((t) ? \
29+
(((t) > 0x35A) ? \
30+
(((t) >> 2) * ((APB_CLK_FREQ >> 4) / 250000) + ((t)&0x3) * ((APB_CLK_FREQ >> 4) / 1000000)) : \
31+
(((t) *(APB_CLK_FREQ>>4)) / 1000000)) : \
32+
0)
33+
34+
#define FRC1_ENABLE_TIMER BIT7
35+
#define FRC1_AUTO_LOAD BIT6
36+
37+
typedef enum { // timer provided mode
38+
DIVDED_BY_1 = 0, // timer clock
39+
DIVDED_BY_16 = 4, // divided by 16
40+
DIVDED_BY_256 = 8, // divided by 256
41+
} TIMER_PREDIVED_MODE;
42+
43+
typedef enum { // timer interrupt mode
44+
TM_LEVEL_INT = 1, // level interrupt
45+
TM_EDGE_INT = 0, // edge interrupt
46+
} TIMER_INT_MODE;
47+
48+
#define RTC_REG_WRITE(addr, val) WRITE_PERI_REG(addr, val)
49+
50+
static void (* user_hw_timer_cb)(void) = NULL;
51+
52+
static void hw_timer_isr_cb(void *arg)
53+
{
54+
if (user_hw_timer_cb != NULL) {
55+
(*(user_hw_timer_cb))();
56+
}
57+
}
58+
59+
void hw_timer_arm(uint32 val)
60+
{
61+
RTC_REG_WRITE(FRC1_LOAD_ADDRESS, US_TO_RTC_TIMER_TICKS(val));
62+
}
63+
64+
void hw_timer_set_func(void (* user_hw_timer_cb_set)(void))
65+
{
66+
user_hw_timer_cb = user_hw_timer_cb_set;
67+
}
68+
69+
void hw_timer_init(uint8 req)
70+
{
71+
if (req == 1) {
72+
RTC_REG_WRITE(FRC1_CTRL_ADDRESS,
73+
FRC1_AUTO_LOAD | DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT);
74+
} else {
75+
RTC_REG_WRITE(FRC1_CTRL_ADDRESS,
76+
DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT);
77+
}
78+
79+
_xt_isr_attach(ETS_FRC_TIMER1_INUM, hw_timer_isr_cb, NULL);
80+
81+
TM1_EDGE_INT_ENABLE();
82+
_xt_isr_unmask(1 << ETS_FRC_TIMER1_INUM);
83+
}
84+
85+
//-------------------------------Test Code Below--------------------------------------
86+
#if 0
87+
#include "hw_timer.h"
88+
89+
#define REG_WRITE(_r,_v) (*(volatile uint32 *)(_r)) = (_v)
90+
#define REG_READ(_r) (*(volatile uint32 *)(_r))
91+
#define WDEV_NOW() REG_READ(0x3ff20c00)
92+
93+
uint32 tick_now2 = 0;
94+
void hw_test_timer_cb(void)
95+
{
96+
static uint16 j = 0;
97+
j++;
98+
99+
if ((WDEV_NOW() - tick_now2) >= 1000000) {
100+
static uint32 idx = 1;
101+
tick_now2 = WDEV_NOW();
102+
os_printf("b%u:%d\n", idx++, j);
103+
j = 0;
104+
}
105+
106+
//hw_timer_arm(50);
107+
}
108+
109+
void user_init(void)
110+
{
111+
hw_timer_init(1);
112+
hw_timer_set_func(hw_test_timer_cb);
113+
hw_timer_arm(100);
114+
}
115+
#endif
116+

0 commit comments

Comments
 (0)