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Espressif Systems
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NEW VERSION: 1.3.0
 1. Add libssc.a, simple serial console lib. 2. Add libspiffs.a, SPI file system. 3. Add libwps.a to support WPS. 4. Add libespconn.a, Espressif connection lib. 5. Add libespnow.a to support Espressif ESP-NOW. 6. Add libmesh.a, Espressif mesh. 7. Add libnopoll.a, websocket. 8. Add make_lib.sh in "third_party" folder. 9. Add modem-sleep & light-sleep supported. 10. Update libcirom.a to support float IO. 11. Update gen_misc.sh & gen_misc.bat. 12. Update header files, add comments in doxygen style. 13. Update libsmartconfig.a to version 2.5.2. 14. Update libssl.a. 15. Updates driver (PWM/UART/GPIO/SPI/Hardware timer). 16. Update open source codes of third_party. 17. Modify "ld" files, "dram0 len" should be 0x18000 in RTOS SDK. 18. Remove header files in extra_include, which are already in compile folder. 19. Other APIs sync from non-OS SDK, more details in documentation "20B-ESP8266__RTOS_SDK_API Reference". 20. Other optimization to make the SDK more stable.
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‎Makefile

+1
Original file line numberDiff line numberDiff line change
@@ -398,3 +398,4 @@ $(foreach image,$(GEN_IMAGES),$(eval $(call MakeImage,$(basename $(image)))))
398398
INCLUDES := $(INCLUDES) -I $(SDK_PATH)/include -I $(SDK_PATH)/extra_include
399399
INCLUDES += -I $(SDK_PATH)/include/lwip -I $(SDK_PATH)/include/lwip/ipv4 -I $(SDK_PATH)/include/lwip/ipv6
400400
INCLUDES += -I $(SDK_PATH)/include/espressif
401+
INCLUDES += -I $(SDK_PATH)/include/spiffs

‎README.md

+18-14
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,12 @@
1-
# esp_iot_rtos_sdk #
1+
# ESP8266_RTOS_SDK #
22

33
----------
44

55
ESP8266 SDK based on FreeRTOS.
66

77
## Note ##
88

9-
APIs of "esp_iot_rtos_sdk" are same as "esp_iot_sdk"
9+
APIs of "ESP8266_RTOS_SDK" are same as "ESP8266_NONOS_SDK"
1010

1111
More details in "Wiki" !
1212

@@ -18,27 +18,31 @@ For gcc, please refer to [esp-open-sdk](https://github.com/pfalcon/esp-open-sdk)
1818

1919
## Compile ##
2020

21-
Clone esp_iot_rtos_sdk, e.g., to ~/esp_iot_rtos_sdk.
21+
Clone ESP8266_RTOS_SDK, e.g., to ~/ESP8266_RTOS_SDK.
2222

23-
$git clone https://github.com/espressif/esp_iot_rtos_sdk.git
23+
$git clone https://github.com/espressif/ESP8266_RTOS_SDK.git
2424

25-
Set sdk path:
25+
Modify gen_misc.sh or gen_misc.bat:
26+
For Linux£º
2627

27-
$export SDK_PATH=~/esp_iot_rtos_sdk
28+
$export SDK_PATH=~/ESP8266_RTOS_SDK
29+
$export BIN_PATH=~/ESP8266_BIN
2830

29-
Set bin path:
31+
For Windows:
3032

31-
$export BIN_PATH=~/esp8266_bin
33+
set SDK_PATH=/c/ESP8266_RTOS_SDK
34+
set BIN_PATH=/c/ESP8266_BIN
3235

33-
Generated bins will be located here.
36+
ESP8266_RTOS_SDK/examples/project_template is a project template, you can copy this to anywhere, e.g., to ~/workspace/project_template.
3437

35-
SDK_PATH and BIN_PATH **MUST** be set firstly, you can write to .bashrc or other shell init sript.
38+
Generate bin:
39+
For Linux:
3640

37-
esp_iot_rtos_sdk/examples/project_template is a project template, you can copy this to anywhere, e.g., to ~/workspace/project_template.
41+
./gen_misc.sh
3842

39-
Generate bin:
40-
41-
./gen_misc.sh
43+
For Windows:
44+
45+
gen_misc.bat
4246

4347
Just follow the tips and steps.
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‎bin/esp_init_data_default.bin

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‎examples/driver_lib/driver/gpio.c

+32-26
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,24 @@
11
/*
2-
* Copyright (C) 2014 -2016 Espressif System
2+
* ESPRSSIF MIT License
3+
*
4+
* Copyright (c) 2015 <ESPRESSIF SYSTEMS (SHANGHAI) PTE LTD>
5+
*
6+
* Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case,
7+
* it is free of charge, to any person obtaining a copy of this software and associated
8+
* documentation files (the "Software"), to deal in the Software without restriction, including
9+
* without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
10+
* and/or sell copies of the Software, and to permit persons to whom the Software is furnished
11+
* to do so, subject to the following conditions:
12+
*
13+
* The above copyright notice and this permission notice shall be included in all copies or
14+
* substantial portions of the Software.
15+
*
16+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
18+
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
19+
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
20+
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21+
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
322
*
423
*/
524

@@ -8,8 +27,7 @@
827

928
#include "gpio.h"
1029

11-
void ICACHE_FLASH_ATTR
12-
gpio_config(GPIO_ConfigTypeDef *pGPIOConfig)
30+
void gpio_config(GPIO_ConfigTypeDef *pGPIOConfig)
1331
{
1432
uint16 gpio_pin_mask = pGPIOConfig->GPIO_Pin;
1533
uint32 io_reg;
@@ -66,7 +84,6 @@ gpio_config(GPIO_ConfigTypeDef *pGPIOConfig)
6684
} while (io_num < 16);
6785
}
6886

69-
7087
/*
7188
* Change GPIO pin output by setting, clearing, or disabling pins.
7289
* In general, it is expected that a bit will be set in at most one
@@ -77,8 +94,7 @@ gpio_config(GPIO_ConfigTypeDef *pGPIOConfig)
7794
* writes is significant, calling code should divide a single call
7895
* into multiple calls.
7996
*/
80-
void ICACHE_FLASH_ATTR
81-
gpio_output_conf(uint32 set_mask, uint32 clear_mask, uint32 enable_mask, uint32 disable_mask)
97+
void gpio_output_conf(uint32 set_mask, uint32 clear_mask, uint32 enable_mask, uint32 disable_mask)
8298
{
8399
GPIO_REG_WRITE(GPIO_OUT_W1TS_ADDRESS, set_mask);
84100
GPIO_REG_WRITE(GPIO_OUT_W1TC_ADDRESS, clear_mask);
@@ -89,8 +105,7 @@ gpio_output_conf(uint32 set_mask, uint32 clear_mask, uint32 enable_mask, uint32
89105
/*
90106
* Sample the value of GPIO input pins and returns a bitmask.
91107
*/
92-
uint32 ICACHE_FLASH_ATTR
93-
gpio_input_get(void)
108+
uint32 gpio_input_get(void)
94109
{
95110
return GPIO_REG_READ(GPIO_IN_ADDRESS);
96111
}
@@ -106,17 +121,15 @@ gpio_input_get(void)
106121
* application-specific handler may wish to use gpio_intr_pending
107122
* to check for any additional pending interrupts before it returns.
108123
*/
109-
void ICACHE_FLASH_ATTR
110-
gpio_intr_handler_register(void *fn)
124+
void gpio_intr_handler_register(void *fn, void *arg)
111125
{
112-
_xt_isr_attach(ETS_GPIO_INUM, fn);
126+
_xt_isr_attach(ETS_GPIO_INUM, fn, arg);
113127
}
114128

115129
/*
116130
only highlevel and lowlevel intr can use for wakeup
117131
*/
118-
void ICACHE_FLASH_ATTR
119-
gpio_pin_wakeup_enable(uint32 i, GPIO_INT_TYPE intr_state)
132+
void gpio_pin_wakeup_enable(uint32 i, GPIO_INT_TYPE intr_state)
120133
{
121134
uint32 pin_reg;
122135

@@ -133,8 +146,7 @@ gpio_pin_wakeup_enable(uint32 i, GPIO_INT_TYPE intr_state)
133146
}
134147
}
135148

136-
void ICACHE_FLASH_ATTR
137-
gpio_pin_wakeup_disable(void)
149+
void gpio_pin_wakeup_disable(void)
138150
{
139151
uint8 i;
140152
uint32 pin_reg;
@@ -151,8 +163,7 @@ gpio_pin_wakeup_disable(void)
151163
}
152164
}
153165

154-
void ICACHE_FLASH_ATTR
155-
gpio_pin_intr_state_set(uint32 i, GPIO_INT_TYPE intr_state)
166+
void gpio_pin_intr_state_set(uint32 i, GPIO_INT_TYPE intr_state)
156167
{
157168
uint32 pin_reg;
158169

@@ -166,8 +177,7 @@ gpio_pin_intr_state_set(uint32 i, GPIO_INT_TYPE intr_state)
166177
portEXIT_CRITICAL();
167178
}
168179

169-
void ICACHE_FLASH_ATTR
170-
gpio16_output_conf(void)
180+
void gpio16_output_conf(void)
171181
{
172182
WRITE_PERI_REG(PAD_XPD_DCDC_CONF,
173183
(READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | (uint32)0x1); // mux configuration for XPD_DCDC to output rtc_gpio0
@@ -179,15 +189,13 @@ gpio16_output_conf(void)
179189
(READ_PERI_REG(RTC_GPIO_ENABLE) & (uint32)0xfffffffe) | (uint32)0x1); //out enable
180190
}
181191

182-
void ICACHE_FLASH_ATTR
183-
gpio16_output_set(uint8 value)
192+
void gpio16_output_set(uint8 value)
184193
{
185194
WRITE_PERI_REG(RTC_GPIO_OUT,
186195
(READ_PERI_REG(RTC_GPIO_OUT) & (uint32)0xfffffffe) | (uint32)(value & 1));
187196
}
188197

189-
void ICACHE_FLASH_ATTR
190-
gpio16_input_conf(void)
198+
void gpio16_input_conf(void)
191199
{
192200
WRITE_PERI_REG(PAD_XPD_DCDC_CONF,
193201
(READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | (uint32)0x1); // mux configuration for XPD_DCDC and rtc_gpio0 connection
@@ -199,9 +207,7 @@ gpio16_input_conf(void)
199207
READ_PERI_REG(RTC_GPIO_ENABLE) & (uint32)0xfffffffe); //out disable
200208
}
201209

202-
uint8 ICACHE_FLASH_ATTR
203-
gpio16_input_get(void)
210+
uint8 gpio16_input_get(void)
204211
{
205212
return (uint8)(READ_PERI_REG(RTC_GPIO_IN_DATA) & 1);
206213
}
207-

‎examples/driver_lib/driver/hw_timer.c

+116
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,116 @@
1+
/*
2+
* ESPRSSIF MIT License
3+
*
4+
* Copyright (c) 2015 <ESPRESSIF SYSTEMS (SHANGHAI) PTE LTD>
5+
*
6+
* Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case,
7+
* it is free of charge, to any person obtaining a copy of this software and associated
8+
* documentation files (the "Software"), to deal in the Software without restriction, including
9+
* without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
10+
* and/or sell copies of the Software, and to permit persons to whom the Software is furnished
11+
* to do so, subject to the following conditions:
12+
*
13+
* The above copyright notice and this permission notice shall be included in all copies or
14+
* substantial portions of the Software.
15+
*
16+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
18+
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
19+
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
20+
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21+
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22+
*
23+
*/
24+
25+
#include "esp_common.h"
26+
27+
#define US_TO_RTC_TIMER_TICKS(t) \
28+
((t) ? \
29+
(((t) > 0x35A) ? \
30+
(((t) >> 2) * ((APB_CLK_FREQ >> 4) / 250000) + ((t)&0x3) * ((APB_CLK_FREQ >> 4) / 1000000)) : s\
31+
(((t) *(APB_CLK_FREQ>>4)) / 1000000)) : \
32+
0)
33+
34+
#define FRC1_ENABLE_TIMER BIT7
35+
#define FRC1_AUTO_LOAD BIT6
36+
37+
typedef enum { // timer provided mode
38+
DIVDED_BY_1 = 0, // timer clock
39+
DIVDED_BY_16 = 4, // divided by 16
40+
DIVDED_BY_256 = 8, // divided by 256
41+
} TIMER_PREDIVED_MODE;
42+
43+
typedef enum { // timer interrupt mode
44+
TM_LEVEL_INT = 1, // level interrupt
45+
TM_EDGE_INT = 0, // edge interrupt
46+
} TIMER_INT_MODE;
47+
48+
#define RTC_REG_WRITE(addr, val) WRITE_PERI_REG(addr, val)
49+
50+
static void (* user_hw_timer_cb)(void) = NULL;
51+
52+
static void hw_timer_isr_cb(void)
53+
{
54+
if (user_hw_timer_cb != NULL) {
55+
(*(user_hw_timer_cb))();
56+
}
57+
}
58+
59+
void hw_timer_arm(uint32 val)
60+
{
61+
RTC_REG_WRITE(FRC1_LOAD_ADDRESS, US_TO_RTC_TIMER_TICKS(val));
62+
}
63+
64+
void hw_timer_set_func(void (* user_hw_timer_cb_set)(void))
65+
{
66+
user_hw_timer_cb = user_hw_timer_cb_set;
67+
}
68+
69+
void hw_timer_init(uint8 req)
70+
{
71+
if (req == 1) {
72+
RTC_REG_WRITE(FRC1_CTRL_ADDRESS,
73+
FRC1_AUTO_LOAD | DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT);
74+
} else {
75+
RTC_REG_WRITE(FRC1_CTRL_ADDRESS,
76+
DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT);
77+
}
78+
79+
_xt_isr_attach(ETS_FRC_TIMER1_INUM, hw_timer_isr_cb, NULL);
80+
81+
TM1_EDGE_INT_ENABLE();
82+
_xt_isr_unmask(1 << ETS_FRC_TIMER1_INUM);
83+
}
84+
85+
//-------------------------------Test Code Below--------------------------------------
86+
#if 0
87+
#include "hw_timer.h"
88+
89+
#define REG_WRITE(_r,_v) (*(volatile uint32 *)(_r)) = (_v)
90+
#define REG_READ(_r) (*(volatile uint32 *)(_r))
91+
#define WDEV_NOW() REG_READ(0x3ff20c00)
92+
93+
uint32 tick_now2 = 0;
94+
void hw_test_timer_cb(void)
95+
{
96+
static uint16 j = 0;
97+
j++;
98+
99+
if ((WDEV_NOW() - tick_now2) >= 1000000) {
100+
static uint32 idx = 1;
101+
tick_now2 = WDEV_NOW();
102+
os_printf("b%u:%d\n", idx++, j);
103+
j = 0;
104+
}
105+
106+
//hw_timer_arm(50);
107+
}
108+
109+
void user_init(void)
110+
{
111+
hw_timer_init(1);
112+
hw_timer_set_func(hw_test_timer_cb);
113+
hw_timer_arm(100);
114+
}
115+
#endif
116+

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