Skip to content

Commit eac93dd

Browse files
author
Espressif Systems
committed
add a simple uart driver, uart0 input ---> uart1 output
1 parent 81cacc6 commit eac93dd

File tree

2 files changed

+168
-0
lines changed

2 files changed

+168
-0
lines changed

‎examples/driver_lib/driver/uart.c

+166
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,166 @@
1+
/*
2+
* Copyright (C) 2014 -2016 Espressif System
3+
*
4+
*/
5+
6+
#include "esp_common.h"
7+
8+
#include "freertos/FreeRTOS.h"
9+
#include "freertos/task.h"
10+
#include "freertos/queue.h"
11+
12+
#include "uart.h"
13+
14+
enum {
15+
UART_EVENT_RX_CHAR,
16+
UART_EVENT_MAX
17+
};
18+
19+
typedef struct _os_event_ {
20+
uint32 event;
21+
uint32 param;
22+
} os_event_t;
23+
24+
25+
xTaskHandle xUartTaskHandle;
26+
xQueueHandle xQueueUart;
27+
28+
LOCAL STATUS
29+
uart_tx_one_char(uint8 uart, uint8 TxChar)
30+
{
31+
while (true) {
32+
uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S);
33+
34+
if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) {
35+
break;
36+
}
37+
}
38+
39+
WRITE_PERI_REG(UART_FIFO(uart) , TxChar);
40+
return OK;
41+
}
42+
43+
LOCAL void
44+
uart1_write_char(char c)
45+
{
46+
if (c == '\n') {
47+
uart_tx_one_char(UART1, '\r');
48+
uart_tx_one_char(UART1, '\n');
49+
} else if (c == '\r') {
50+
} else {
51+
uart_tx_one_char(UART1, c);
52+
}
53+
}
54+
55+
LOCAL void uart_rx_intr_handler_ssc(void)
56+
{
57+
/* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
58+
* uart1 and uart0 respectively
59+
*/
60+
os_event_t e;
61+
portBASE_TYPE xHigherPriorityTaskWoken;
62+
63+
uint8 RcvChar;
64+
uint8 uart_no = 0;
65+
66+
if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST)) {
67+
return;
68+
}
69+
70+
RcvChar = READ_PERI_REG(UART_FIFO(uart_no)) & 0xFF;
71+
72+
WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_FULL_INT_CLR);
73+
74+
e.event = UART_EVENT_RX_CHAR;
75+
e.param = RcvChar;
76+
77+
xQueueSendFromISR(xQueueUart, (void *)&e, &xHigherPriorityTaskWoken);
78+
portEND_SWITCHING_ISR(xHigherPriorityTaskWoken);
79+
}
80+
81+
LOCAL void ICACHE_FLASH_ATTR
82+
uart_config(uint8 uart_no, UartDevice *uart)
83+
{
84+
if (uart_no == UART1) {
85+
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);
86+
} else {
87+
/* rcv_buff size if 0x100 */
88+
_xt_isr_attach(ETS_UART_INUM, uart_rx_intr_handler_ssc);
89+
PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
90+
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
91+
}
92+
93+
uart_div_modify(uart_no, UART_CLK_FREQ / (uart->baut_rate));
94+
95+
WRITE_PERI_REG(UART_CONF0(uart_no), uart->exist_parity
96+
| uart->parity
97+
| (uart->stop_bits << UART_STOP_BIT_NUM_S)
98+
| (uart->data_bits << UART_BIT_NUM_S));
99+
100+
//clear rx and tx fifo,not ready
101+
SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
102+
CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
103+
104+
if (uart_no == UART0) {
105+
//set rx fifo trigger
106+
WRITE_PERI_REG(UART_CONF1(uart_no),
107+
((0x01 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S));
108+
} else {
109+
WRITE_PERI_REG(UART_CONF1(uart_no),
110+
((0x01 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S));
111+
}
112+
113+
//clear all interrupt
114+
WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff);
115+
//enable rx_interrupt
116+
SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA);
117+
}
118+
119+
LOCAL void ICACHE_FLASH_ATTR
120+
uart_task(void *pvParameters)
121+
{
122+
os_event_t e;
123+
124+
for (;;) {
125+
if (xQueueReceive(xQueueUart, (void *)&e, (portTickType)portMAX_DELAY)) {
126+
switch (e.event) {
127+
case UART_EVENT_RX_CHAR:
128+
printf("%c", e.param);
129+
break;
130+
131+
default:
132+
break;
133+
}
134+
}
135+
}
136+
137+
vTaskDelete(NULL);
138+
}
139+
140+
void ICACHE_FLASH_ATTR
141+
uart_init(void)
142+
{
143+
while (READ_PERI_REG(UART_STATUS(0)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S));
144+
while (READ_PERI_REG(UART_STATUS(1)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S));
145+
146+
UartDevice uart;
147+
148+
uart.baut_rate = BIT_RATE_74880;
149+
uart.data_bits = EIGHT_BITS;
150+
uart.flow_ctrl = NONE_CTRL;
151+
uart.exist_parity = STICK_PARITY_DIS;
152+
uart.parity = NONE_BITS;
153+
uart.stop_bits = ONE_STOP_BIT;
154+
155+
uart_config(UART0, &uart);
156+
uart_config(UART1, &uart);
157+
158+
os_install_putc1(uart1_write_char);
159+
160+
_xt_isr_unmask(1 << ETS_UART_INUM);
161+
162+
xQueueUart = xQueueCreate(32, sizeof(os_event_t));
163+
164+
xTaskCreate(uart_task, (uint8 const *)"uTask", 512, NULL, tskIDLE_PRIORITY + 2, &xUartTaskHandle);
165+
}
166+

‎examples/driver_lib/include/uart.h

+2
Original file line numberDiff line numberDiff line change
@@ -60,4 +60,6 @@ typedef struct {
6060
UartFlowCtrl flow_ctrl;
6161
} UartDevice;
6262

63+
void uart_init();
64+
6365
#endif

0 commit comments

Comments
 (0)