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Commits on May 8, 2025

• [bazel] Port 92cc31b0f7737408dffd38c2384dff825abb8e3a for Lanai

  d0k

  committed
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• Propagate DebugLocs on phis in BreakCriticalEdges (#133492)

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  OCHyams

  authored
  60d0bc1

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• [lldb] Expose QueueThreadPlanForStepSingleInstruction function to SBThreadPlan (#137904)

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  eronnen

  authored
  4132141

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• [AMDGPU][NFC] Remove unused operand types. (#139062)

  kosarev

  authored
  c290f48

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• [lldb] Fixed TestProcessModificationIdOnExpr to work on both x86 and x64 architectures (#138941)

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  real-mikhail

  and

  Mikhail Zakharov

  authored
  ea7e23c

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• [ARM][Compiler-RT] Add optional exclusion of libc provided ARM AEABI builtins from compiler-rt. (#137952)

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  simpal01

  authored
  d178340

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• [RISCV][TII] Add and use new hook to simplify/canonicalize instructions after MachineCopyPropagation (#137973)

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  asb

  authored
  52b345d

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• [Clang][NFC] Put potentially expensive check behind NDEBUG

  cor3ntin

  committed
  245def9

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• (reland) [GlobalISel] Diagnose inline assembly constraint lowering errors (#139049)

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  Pierre-vh

  authored
  534d221

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• [lldb][DataFormatters] Change ExtractIndexFromString to return std::optional (#138297)

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  charles-zablit

  authored
  0d47a45

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• [RISCV][test] Precommit test for #137973 simplifyInstruction support

  asb

  committed
  5f1c556

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• [AMDGPU][Scheduler] Refactor ArchVGPR rematerialization during scheduling (#125885)

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  lucas-rami

  authored
  067caaa

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• [LV] Strip unmaintainable MinBWs assert (#136858)

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  artagnon

  authored
  c4f723a

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• [VPlan] Add VPInstruction::StepVector and use it in VPWidenIntOrFpInductionRecipe (#129508)

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  lukel97

  authored
  1484f82

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• [AMDGPU][Disassembler][NFCI] Always defer immediate operands. (#138885)

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  kosarev

  authored
  d9bdc2d

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• [ARC][CSKY][Lanai] TableGen-erate SDNode descriptions (#138874)

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  s-barannikov

  authored
  92cc31b

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• [LSR] Replace casts with an equivalent std::as_const (NFC) (#138980)

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  s-barannikov

  authored
  cedeef6

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• [mlir][tosa] Allow unsigned types for rescale ops during validation (#138253)

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  lhutton1

  authored
  356bd2c

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• [RISCV] Fix generation of DWARF info for vector segmented types (#137941)

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  kr-sc

  authored
  b3ef15a

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• [DenseMap] Introduce emplace_or_assign (#138886)

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  artagnon

  authored
  20169cb

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• [PatternMatch] Mark various matchers const (NFC) (#138834)

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  artagnon

  authored
  4eebc8d

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• [DenseMap] Introduce lookup_or (#138887)

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  artagnon

  authored
  358ebdd

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• [mlir][OpenMP] cancel(lation point) taskgroup LLVMIR (#137841)

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  tblah

  authored
  e402009

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• [Clang] Ignore -fchar8_t in C (#138716)

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  cor3ntin

  authored
  ce7c196

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• [LV] Add test showing incorrect metadata merging when narrowing IGs.

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  fhahn

  committed
  127f486

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• [mlir][OpenMP] Convert omp.cancellation_point to LLVMIR (#137205)

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  tblah

  authored
  8338a3c

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• [mlir][OpenMP] convert wsloop cancellation to LLVMIR (#137194)

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  tblah

  authored
  a385c47

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• [LLVM][CodeGen][SVE] Add ISel for bfloat scalable vector compares. (#138707)

  paulwalker-arm

  authored
  160abfb

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• [mlir][tosa] Canonicalize slice over overlapped or inside a pad. (#138900)

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  GeorgeARM

  authored
  2a88feb

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• [NFC][DebugInfo] Expand coverage of a RISCV test

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  jmorse

  committed
  a3f58f3

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• [KeyInstr] Add MIR parser support (#133494)

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  OCHyams

  authored
  fc2ec06

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• [mlir][tosa] Fix mul folder conformance to the spec (#137601)

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  lhutton1

  and

  Tai78641

  authored
  18f8928

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• [flang][OpenMP] fix predetermined privatization inside section (#138159)

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  tblah

  authored
  2a32d73

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• [lldb] Disable some lldb-dap tests on Windows

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  DavidSpickett

  committed
  2668167

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• [CodeGen] Parse nusw flag (#138856)

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  Pierre-vh

  authored
  2b14093

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