rp2/machine_uart.c: Add an IRQ_BREAK event for UART.irq().

robert-hh · robert-hh · commit b18b64b03955 · 2024-03-11T08:13:47.000+01:00
Just for test. Properties:
- After a BREAK, a valid character must be received before another
  break can be detected.
- Each break puts a 0xff character into the input buffer.

Signed-off-by: robert-hh &lt;robert@hammelrath.com&gt;
diff --git a/ports/rp2/machine_uart.c b/ports/rp2/machine_uart.c
@@ -81,7 +81,7 @@
 #define UART_HWCONTROL_CTS  (1)
 #define UART_HWCONTROL_RTS  (2)
 // OR-ed IRQ flags which are allowed to be used by the user
-#define MP_UART_ALLOWED_FLAGS (UART_UARTMIS_RTMIS_BITS | UART_UARTMIS_TXMIS_BITS)
+#define MP_UART_ALLOWED_FLAGS (UART_UARTMIS_RTMIS_BITS | UART_UARTMIS_TXMIS_BITS | UART_UARTMIS_BEMIS_BITS)
 #define UART_FIFO_SIZE_RX           (32)
 #define UART_FIFO_TRIGGER_LEVEL_RX  (UART_FIFO_SIZE_RX / 2)
 
@@ -198,20 +198,24 @@ static void uart_fill_tx_fifo(machine_uart_obj_t *self) {
 static inline void uart_service_interrupt(machine_uart_obj_t *self) {
     self->mp_irq_flags = uart_get_hw(self->uart)->mis & (UART_UARTMIS_RXMIS_BITS | UART_UARTMIS_RTMIS_BITS);
     if (self->mp_irq_flags) { // rx interrupt?
-        // clear all interrupt bits but tx
-        uart_get_hw(self->uart)->icr = UART_UARTICR_BITS & (~UART_UARTICR_TXIC_BITS);
+        // clear all interrupt bits but tx and break
+        uart_get_hw(self->uart)->icr = UART_UARTICR_BITS & ~(UART_UARTICR_TXIC_BITS | UART_UARTICR_BEIC_BITS);
         uart_drain_rx_fifo(self, UART_FIFO_TRIGGER_LEVEL_RX - 1);
     }
     if (uart_get_hw(self->uart)->mis & UART_UARTMIS_TXMIS_BITS) { // tx interrupt?
-        // clear all interrupt bits but rx
-        uart_get_hw(self->uart)->icr = UART_UARTICR_BITS & ~(UART_UARTICR_RXIC_BITS | UART_UARTICR_RTIC_BITS);
+        // clear all interrupt bits but rx and break
+        uart_get_hw(self->uart)->icr = UART_UARTICR_BITS & ~(UART_UARTICR_RXIC_BITS | UART_UARTICR_RTIC_BITS | UART_UARTICR_BEIC_BITS);
         if (ringbuf_avail(&self->write_buffer) == 0) {
             self->mp_irq_flags |= UART_UARTMIS_TXMIS_BITS;
         } else {
             uart_fill_tx_fifo(self);
         }
     }
-
+    if (uart_get_hw(self->uart)->mis & UART_UARTMIS_BEMIS_BITS) { // break interrupt?
+        // CLear the event
+        hw_set_bits(&uart_get_hw(self->uart)->icr, UART_UARTICR_BEIC_BITS);
+        self->mp_irq_flags |= UART_UARTMIS_BEMIS_BITS;
+    }
     // Check the flags to see if the user handler should be called
     if (self->mp_irq_trigger & self->mp_irq_flags) {
         mp_irq_handler(self->mp_irq_obj);
@@ -236,6 +240,7 @@ static void uart1_irq_handler(void) {
     { MP_ROM_QSTR(MP_QSTR_RTS), MP_ROM_INT(UART_HWCONTROL_RTS) }, \
     { MP_ROM_QSTR(MP_QSTR_IRQ_RXIDLE), MP_ROM_INT(UART_UARTMIS_RTMIS_BITS) }, \
     { MP_ROM_QSTR(MP_QSTR_IRQ_TXIDLE), MP_ROM_INT(UART_UARTMIS_TXMIS_BITS) }, \
+    { MP_ROM_QSTR(MP_QSTR_IRQ_BREAK), MP_ROM_INT(UART_UARTMIS_BEMIS_BITS) }, \
 
 static void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
     machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
@@ -429,6 +434,9 @@ static void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args,
 
         // Enable the uart irq; this macro sets the rx irq level to 4.
         uart_set_irq_enables(self->uart, true, true);
+        // Enable the break Interrupt
+        hw_write_masked(&uart_get_hw(self->uart)->imsc, 1 << UART_UARTIMSC_BEIM_LSB,
+                        UART_UARTIMSC_BEIM_BITS);
         // Set the RX trigger level to FIFO_size / 2
         hw_write_masked(&uart_get_hw(self->uart)->ifls, 0b010 << UART_UARTIFLS_RXIFLSEL_LSB,
                 UART_UARTIFLS_RXIFLSEL_BITS);
