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autoconf: Unify CFLAGS_SSE42 and CFLAGS_ARMV8_CRC32C
Until now we emitted the cflags to build the CRC objects into architecture specific variables. That doesn't make a whole lot of sense to me - we're never going to target x86 and arm at the same time, so they don't need to be separate variables. It might be better to instead continue to have CFLAGS_SSE42 / CFLAGS_ARMV8_CRC32C be computed by PGAC_ARMV8_CRC32C_INTRINSICS / PGAC_SSE42_CRC32_INTRINSICS and then set CFLAGS_CRC based on those. But it seems unlikely that we'd need other sets of CRC specific flags for those two architectures at the same time. This simplifies the upcoming meson PGXS compatibility. Reviewed-by: Peter Eisentraut <peter.eisentraut@enterprisedb.com> Discussion: https://postgr.es/m/20221005200710.luvw5evhwf6clig6@awork3.anarazel.de
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‎config/c-compiler.m4

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -597,7 +597,7 @@ fi])# PGAC_HAVE_GCC__ATOMIC_INT64_CAS
597597
# the other ones are, on x86-64 platforms)
598598
#
599599
# An optional compiler flag can be passed as argument (e.g. -msse4.2). If the
600-
# intrinsics are supported, sets pgac_sse42_crc32_intrinsics, and CFLAGS_SSE42.
600+
# intrinsics are supported, sets pgac_sse42_crc32_intrinsics, and CFLAGS_CRC.
601601
AC_DEFUN([PGAC_SSE42_CRC32_INTRINSICS],
602602
[define([Ac_cachevar], [AS_TR_SH([pgac_cv_sse42_crc32_intrinsics_$1])])dnl
603603
AC_CACHE_CHECK([for _mm_crc32_u8 and _mm_crc32_u32 with CFLAGS=$1], [Ac_cachevar],
@@ -613,7 +613,7 @@ AC_LINK_IFELSE([AC_LANG_PROGRAM([#include <nmmintrin.h>],
613613
[Ac_cachevar=no])
614614
CFLAGS="$pgac_save_CFLAGS"])
615615
if test x"$Ac_cachevar" = x"yes"; then
616-
CFLAGS_SSE42="$1"
616+
CFLAGS_CRC="$1"
617617
pgac_sse42_crc32_intrinsics=yes
618618
fi
619619
undefine([Ac_cachevar])dnl
@@ -629,7 +629,7 @@ undefine([Ac_cachevar])dnl
629629
#
630630
# An optional compiler flag can be passed as argument (e.g.
631631
# -march=armv8-a+crc). If the intrinsics are supported, sets
632-
# pgac_armv8_crc32c_intrinsics, and CFLAGS_ARMV8_CRC32C.
632+
# pgac_armv8_crc32c_intrinsics, and CFLAGS_CRC.
633633
AC_DEFUN([PGAC_ARMV8_CRC32C_INTRINSICS],
634634
[define([Ac_cachevar], [AS_TR_SH([pgac_cv_armv8_crc32c_intrinsics_$1])])dnl
635635
AC_CACHE_CHECK([for __crc32cb, __crc32ch, __crc32cw, and __crc32cd with CFLAGS=$1], [Ac_cachevar],
@@ -647,7 +647,7 @@ AC_LINK_IFELSE([AC_LANG_PROGRAM([#include <arm_acle.h>],
647647
[Ac_cachevar=no])
648648
CFLAGS="$pgac_save_CFLAGS"])
649649
if test x"$Ac_cachevar" = x"yes"; then
650-
CFLAGS_ARMV8_CRC32C="$1"
650+
CFLAGS_CRC="$1"
651651
pgac_armv8_crc32c_intrinsics=yes
652652
fi
653653
undefine([Ac_cachevar])dnl

‎configure

Lines changed: 9 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -645,8 +645,7 @@ MSGMERGE
645645
MSGFMT_FLAGS
646646
MSGFMT
647647
PG_CRC32C_OBJS
648-
CFLAGS_ARMV8_CRC32C
649-
CFLAGS_SSE42
648+
CFLAGS_CRC
650649
LIBOBJS
651650
OPENSSL
652651
ZSTD
@@ -17957,7 +17956,7 @@ fi
1795717956
#
1795817957
# First check if the _mm_crc32_u8 and _mm_crc32_u64 intrinsics can be used
1795917958
# with the default compiler flags. If not, check if adding the -msse4.2
17960-
# flag helps. CFLAGS_SSE42 is set to -msse4.2 if that's required.
17959+
# flag helps. CFLAGS_CRC is set to -msse4.2 if that's required.
1796117960
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for _mm_crc32_u8 and _mm_crc32_u32 with CFLAGS=" >&5
1796217961
$as_echo_n "checking for _mm_crc32_u8 and _mm_crc32_u32 with CFLAGS=... " >&6; }
1796317962
if ${pgac_cv_sse42_crc32_intrinsics_+:} false; then :
@@ -17992,7 +17991,7 @@ fi
1799217991
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $pgac_cv_sse42_crc32_intrinsics_" >&5
1799317992
$as_echo "$pgac_cv_sse42_crc32_intrinsics_" >&6; }
1799417993
if test x"$pgac_cv_sse42_crc32_intrinsics_" = x"yes"; then
17995-
CFLAGS_SSE42=""
17994+
CFLAGS_CRC=""
1799617995
pgac_sse42_crc32_intrinsics=yes
1799717996
fi
1799817997

@@ -18031,13 +18030,12 @@ fi
1803118030
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $pgac_cv_sse42_crc32_intrinsics__msse4_2" >&5
1803218031
$as_echo "$pgac_cv_sse42_crc32_intrinsics__msse4_2" >&6; }
1803318032
if test x"$pgac_cv_sse42_crc32_intrinsics__msse4_2" = x"yes"; then
18034-
CFLAGS_SSE42="-msse4.2"
18033+
CFLAGS_CRC="-msse4.2"
1803518034
pgac_sse42_crc32_intrinsics=yes
1803618035
fi
1803718036

1803818037
fi
1803918038

18040-
1804118039
# Are we targeting a processor that supports SSE 4.2? gcc, clang and icc all
1804218040
# define __SSE4_2__ in that case.
1804318041
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
@@ -18064,7 +18062,7 @@ rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
1806418062
#
1806518063
# First check if __crc32c* intrinsics can be used with the default compiler
1806618064
# flags. If not, check if adding -march=armv8-a+crc flag helps.
18067-
# CFLAGS_ARMV8_CRC32C is set if the extra flag is required.
18065+
# CFLAGS_CRC is set if the extra flag is required.
1806818066
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for __crc32cb, __crc32ch, __crc32cw, and __crc32cd with CFLAGS=" >&5
1806918067
$as_echo_n "checking for __crc32cb, __crc32ch, __crc32cw, and __crc32cd with CFLAGS=... " >&6; }
1807018068
if ${pgac_cv_armv8_crc32c_intrinsics_+:} false; then :
@@ -18101,7 +18099,7 @@ fi
1810118099
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $pgac_cv_armv8_crc32c_intrinsics_" >&5
1810218100
$as_echo "$pgac_cv_armv8_crc32c_intrinsics_" >&6; }
1810318101
if test x"$pgac_cv_armv8_crc32c_intrinsics_" = x"yes"; then
18104-
CFLAGS_ARMV8_CRC32C=""
18102+
CFLAGS_CRC=""
1810518103
pgac_armv8_crc32c_intrinsics=yes
1810618104
fi
1810718105

@@ -18142,13 +18140,14 @@ fi
1814218140
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $pgac_cv_armv8_crc32c_intrinsics__march_armv8_apcrc" >&5
1814318141
$as_echo "$pgac_cv_armv8_crc32c_intrinsics__march_armv8_apcrc" >&6; }
1814418142
if test x"$pgac_cv_armv8_crc32c_intrinsics__march_armv8_apcrc" = x"yes"; then
18145-
CFLAGS_ARMV8_CRC32C="-march=armv8-a+crc"
18143+
CFLAGS_CRC="-march=armv8-a+crc"
1814618144
pgac_armv8_crc32c_intrinsics=yes
1814718145
fi
1814818146

1814918147
fi
1815018148

1815118149

18150+
1815218151
# Select CRC-32C implementation.
1815318152
#
1815418153
# If we are targeting a processor that has Intel SSE 4.2 instructions, we can
@@ -18176,7 +18175,7 @@ if test x"$USE_SLICING_BY_8_CRC32C" = x"" && test x"$USE_SSE42_CRC32C" = x"" &&
1817618175
USE_SSE42_CRC32C_WITH_RUNTIME_CHECK=1
1817718176
else
1817818177
# Use ARM CRC Extension if available.
18179-
if test x"$pgac_armv8_crc32c_intrinsics" = x"yes" && test x"$CFLAGS_ARMV8_CRC32C" = x""; then
18178+
if test x"$pgac_armv8_crc32c_intrinsics" = x"yes" && test x"$CFLAGS_CRC" = x""; then
1818018179
USE_ARMV8_CRC32C=1
1818118180
else
1818218181
# ARM CRC Extension, with runtime check?

‎configure.ac

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -2091,12 +2091,11 @@ fi
20912091
#
20922092
# First check if the _mm_crc32_u8 and _mm_crc32_u64 intrinsics can be used
20932093
# with the default compiler flags. If not, check if adding the -msse4.2
2094-
# flag helps. CFLAGS_SSE42 is set to -msse4.2 if that's required.
2094+
# flag helps. CFLAGS_CRC is set to -msse4.2 if that's required.
20952095
PGAC_SSE42_CRC32_INTRINSICS([])
20962096
if test x"$pgac_sse42_crc32_intrinsics" != x"yes"; then
20972097
PGAC_SSE42_CRC32_INTRINSICS([-msse4.2])
20982098
fi
2099-
AC_SUBST(CFLAGS_SSE42)
21002099

21012100
# Are we targeting a processor that supports SSE 4.2? gcc, clang and icc all
21022101
# define __SSE4_2__ in that case.
@@ -2110,12 +2109,13 @@ AC_COMPILE_IFELSE([AC_LANG_PROGRAM([], [
21102109
#
21112110
# First check if __crc32c* intrinsics can be used with the default compiler
21122111
# flags. If not, check if adding -march=armv8-a+crc flag helps.
2113-
# CFLAGS_ARMV8_CRC32C is set if the extra flag is required.
2112+
# CFLAGS_CRC is set if the extra flag is required.
21142113
PGAC_ARMV8_CRC32C_INTRINSICS([])
21152114
if test x"$pgac_armv8_crc32c_intrinsics" != x"yes"; then
21162115
PGAC_ARMV8_CRC32C_INTRINSICS([-march=armv8-a+crc])
21172116
fi
2118-
AC_SUBST(CFLAGS_ARMV8_CRC32C)
2117+
2118+
AC_SUBST(CFLAGS_CRC)
21192119

21202120
# Select CRC-32C implementation.
21212121
#
@@ -2144,7 +2144,7 @@ if test x"$USE_SLICING_BY_8_CRC32C" = x"" && test x"$USE_SSE42_CRC32C" = x"" &&
21442144
USE_SSE42_CRC32C_WITH_RUNTIME_CHECK=1
21452145
else
21462146
# Use ARM CRC Extension if available.
2147-
if test x"$pgac_armv8_crc32c_intrinsics" = x"yes" && test x"$CFLAGS_ARMV8_CRC32C" = x""; then
2147+
if test x"$pgac_armv8_crc32c_intrinsics" = x"yes" && test x"$CFLAGS_CRC" = x""; then
21482148
USE_ARMV8_CRC32C=1
21492149
else
21502150
# ARM CRC Extension, with runtime check?

‎src/Makefile.global.in

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -262,8 +262,7 @@ CFLAGS_SL_MODULE = @CFLAGS_SL_MODULE@
262262
CXXFLAGS_SL_MODULE = @CXXFLAGS_SL_MODULE@
263263
CFLAGS_UNROLL_LOOPS = @CFLAGS_UNROLL_LOOPS@
264264
CFLAGS_VECTORIZE = @CFLAGS_VECTORIZE@
265-
CFLAGS_SSE42 = @CFLAGS_SSE42@
266-
CFLAGS_ARMV8_CRC32C = @CFLAGS_ARMV8_CRC32C@
265+
CFLAGS_CRC = @CFLAGS_CRC@
267266
PERMIT_DECLARATION_AFTER_STATEMENT = @PERMIT_DECLARATION_AFTER_STATEMENT@
268267
CXXFLAGS = @CXXFLAGS@
269268

‎src/port/Makefile

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -88,15 +88,15 @@ libpgport.a: $(OBJS)
8888
thread.o: CFLAGS+=$(PTHREAD_CFLAGS)
8989
thread_shlib.o: CFLAGS+=$(PTHREAD_CFLAGS)
9090

91-
# all versions of pg_crc32c_sse42.o need CFLAGS_SSE42
92-
pg_crc32c_sse42.o: CFLAGS+=$(CFLAGS_SSE42)
93-
pg_crc32c_sse42_shlib.o: CFLAGS+=$(CFLAGS_SSE42)
94-
pg_crc32c_sse42_srv.o: CFLAGS+=$(CFLAGS_SSE42)
95-
96-
# all versions of pg_crc32c_armv8.o need CFLAGS_ARMV8_CRC32C
97-
pg_crc32c_armv8.o: CFLAGS+=$(CFLAGS_ARMV8_CRC32C)
98-
pg_crc32c_armv8_shlib.o: CFLAGS+=$(CFLAGS_ARMV8_CRC32C)
99-
pg_crc32c_armv8_srv.o: CFLAGS+=$(CFLAGS_ARMV8_CRC32C)
91+
# all versions of pg_crc32c_sse42.o need CFLAGS_CRC
92+
pg_crc32c_sse42.o: CFLAGS+=$(CFLAGS_CRC)
93+
pg_crc32c_sse42_shlib.o: CFLAGS+=$(CFLAGS_CRC)
94+
pg_crc32c_sse42_srv.o: CFLAGS+=$(CFLAGS_CRC)
95+
96+
# all versions of pg_crc32c_armv8.o need CFLAGS_CRC
97+
pg_crc32c_armv8.o: CFLAGS+=$(CFLAGS_CRC)
98+
pg_crc32c_armv8_shlib.o: CFLAGS+=$(CFLAGS_CRC)
99+
pg_crc32c_armv8_srv.o: CFLAGS+=$(CFLAGS_CRC)
100100

101101
#
102102
# Shared library versions of object files

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