From d5b132a502d6f7a0d9dfa7fcddd9c1be819e0b2c Mon Sep 17 00:00:00 2001
From: Ayappan P <ayappap2@in.ibm.com>
Date: Fri, 24 Feb 2023 03:33:49 -0500
Subject: [PATCH 1/2] pythongh-102204: Fix endianness issue in AIX

---
 Modules/_hacl/include/krml/lowstar_endianness.h | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/Modules/_hacl/include/krml/lowstar_endianness.h b/Modules/_hacl/include/krml/lowstar_endianness.h
index 32a7391e817ebb..d386dfa719e2fe 100644
--- a/Modules/_hacl/include/krml/lowstar_endianness.h
+++ b/Modules/_hacl/include/krml/lowstar_endianness.h
@@ -95,8 +95,9 @@
 #  define be64toh(x) __builtin_bswap64(x)
 #  define le64toh(x) (x)
 
-/* ... generic big-endian fallback code */
-#elif defined(__BYTE_ORDER__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+/* ... generic big-endian fallback code
+   ... AIX doesn't have __BYTE_ORDER__ (with XLC compiler) & is always big-endian */
+#elif (defined(__BYTE_ORDER__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__) || defined(_AIX)
 
 /* byte swapping code inspired by:
  * https://github.com/rweather/arduinolibs/blob/master/libraries/Crypto/utility/EndianUtil.h

From d73e44f9860bd3d55433b67080337420fa36c72f Mon Sep 17 00:00:00 2001
From: Ayappan P <ayappap2@in.ibm.com>
Date: Fri, 24 Feb 2023 03:56:16 -0500
Subject: [PATCH 2/2] Add NEWS entry

---
 .../Library/2023-02-24-03-54-39.gh-issue-102204.EV1GPP.rst     | 3 +++
 1 file changed, 3 insertions(+)
 create mode 100644 Misc/NEWS.d/next/Library/2023-02-24-03-54-39.gh-issue-102204.EV1GPP.rst

diff --git a/Misc/NEWS.d/next/Library/2023-02-24-03-54-39.gh-issue-102204.EV1GPP.rst b/Misc/NEWS.d/next/Library/2023-02-24-03-54-39.gh-issue-102204.EV1GPP.rst
new file mode 100644
index 00000000000000..3a43f6c584375c
--- /dev/null
+++ b/Misc/NEWS.d/next/Library/2023-02-24-03-54-39.gh-issue-102204.EV1GPP.rst
@@ -0,0 +1,3 @@
+AIX doesn't have ``__BYTE_ORDER__`` defined when XLC compiler is used which
+breaks ``_hacl`` module build. So define _AIX in the generic big-endian
+fallback code.