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Copy file name to clipboardExpand all lines: documentation/asciidoc/computers/raspberry-pi/eeprom-bootloader.adoc
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@@ -650,6 +650,42 @@ XHCI_DEBUG=0x3
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Default: `0x0` (no USB debug messages enabled)
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[[SDRAM_BANKLOW]]
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==== `SDRAM_BANKLOW`
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SDRAM_BANKLOW controls how the SDRAM banks are arranged within the system address space. The number of bank bits may be selectively mapped to being located in the MSBs of the address, or being located between the row and column address bits.
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This setting can significantly affect SDRAM performance.
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When unset, the bootloader will choose the preferred option. This is currently 3 on Pi 4 family and 1 on Pi 5 family.
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[cols="1m,3"]
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|===
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| BANKLOW | Address Bit Mapping
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| 0
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| Address = {bank[3:0], row, column}
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| 1
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| Address = {bank[3:1], row, bank[0], column}
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| 2
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| Address = {bank[3:2], row, bank[1:0], column}
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| 3
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| Address = {bank[3], row, bank[2:0], column}
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| 4
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| Address = {row, bank[3:0], column}
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|===
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This setting also causes the bootloader to add a setting for the number of NUMA regions to be used by the kernel ("numa=fake=<n>").
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For best performance these settings should be left as default.
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Note: on a Pi 5 family device, if NUMA is not available in the kernel then performance will be adversely affected.
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Manually choosing SDRAM_BANKLOW=3 will mitigate this performance hit, although for highest performance, ensure NUMA is available.
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