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base repository: riscv-software-src/riscv-isa-sim
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head repository: riscv-software-src/riscv-isa-sim
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  • 10 commits
  • 929 files changed
  • 1 contributor

Commits on Oct 31, 2024

  1. Use BODY guards in insn headers

    @jerryz123
    jerryz123 committed Oct 31, 2024
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  2. Un-inline refill_icache 

    This is a big function - the overhead of un-inlining it should be negligible
    @jerryz123
    jerryz123 committed Oct 31, 2024
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  3. Pass insn_bits to processor->decode_insn

    @jerryz123
    jerryz123 committed Oct 31, 2024
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  4. working partially

    @jerryz123
    jerryz123 committed Oct 31, 2024
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  5. predecode rvi instructions

    @jerryz123
    jerryz123 committed Oct 31, 2024
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  6. Predecode common instructions

    @jerryz123
    jerryz123 committed Oct 31, 2024
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Commits on Nov 5, 2024

  1. Reduce cache footprint of insn_t

    @jerryz123
    jerryz123 committed Nov 5, 2024
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  2. Accurately rename opcode_cache_entry_t to opcode_cache_set_t

    @jerryz123
    jerryz123 committed Nov 5, 2024
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  3. Rename opcode_cache_set_t fields to be more descriptive

    @jerryz123
    jerryz123 committed Nov 5, 2024
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  4. Split off opcode_cache_entry_t

    @jerryz123
    jerryz123 committed Nov 5, 2024
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