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Commit 0bd7248

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f7: Move RCC patch to another file
1 parent 953b2ef commit 0bd7248

4 files changed

+44
-45
lines changed
Lines changed: 2 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -1,26 +1,4 @@
1-
RCC:
2-
APB1RSTR:
3-
_delete:
4-
- SPDIFRXRST
5-
- I2C4RST
6-
- CAN2RST
7-
- CECRST
8-
AHB1LPENR:
9-
_delete:
10-
- ETH*
11-
- DMA2DLPEN
12-
- GPIOKLPEN
13-
- GPIOJLPEN
14-
APB1LPENR:
15-
_delete:
16-
- CAN2LPEN
17-
_add:
18-
RTCAPBLPEN:
19-
description: RTCAPB clock enable during Sleep mode
20-
bitOffset: 10
21-
bitWidth: 1
22-
23-
241
_include:
252
- f730_f7x2_f7x3_syscfg.yaml
26-
- f730_f7x2_f7x3_tim.yaml
3+
- f730_f7x2_f7x3_tim.yaml
4+
- f730_f7x2_f7x3_rcc.yaml
Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,21 @@
1+
RCC:
2+
APB1RSTR:
3+
_delete:
4+
- SPDIFRXRST
5+
- I2C4RST
6+
- CAN2RST
7+
- CECRST
8+
AHB1LPENR:
9+
_delete:
10+
- ETH*
11+
- DMA2DLPEN
12+
- GPIOKLPEN
13+
- GPIOJLPEN
14+
APB1LPENR:
15+
_delete:
16+
- CAN2LPEN
17+
_add:
18+
RTCAPBLPEN:
19+
description: RTCAPB clock enable during Sleep mode
20+
bitOffset: 10
21+
bitWidth: 1
Lines changed: 2 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -1,23 +1,4 @@
1-
RCC:
2-
AHB1ENR:
3-
_modify:
4-
CCMDATARAMEN:
5-
name: DTCMRAMEN
6-
APB1ENR:
7-
_modify:
8-
LPTMI1EN:
9-
name: LPTIM1EN
10-
AHB1LPENR:
11-
_add:
12-
AXILPEN:
13-
description: AXI to AHB bridge clock enable during Sleep mode
14-
bitOffset: 13
15-
bitWidth: 1
16-
DTCMLPEN:
17-
description: DTCM RAM interface clock enable during Sleep mode
18-
bitOffset: 20
19-
bitWidth: 1
20-
211
_include:
222
- f745_f750_f765_f7x6_f7x7_f7x9_tim.yaml
23-
- f745_f750_f765_f7x6_f7x7_f7x9_syscfg.yaml
3+
- f745_f750_f765_f7x6_f7x7_f7x9_syscfg.yaml
4+
- f745_f750_f765_f7x6_f7x7_f7x9_rcc.yaml
Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,19 @@
1+
RCC:
2+
AHB1ENR:
3+
_modify:
4+
CCMDATARAMEN:
5+
name: DTCMRAMEN
6+
APB1ENR:
7+
_modify:
8+
LPTMI1EN:
9+
name: LPTIM1EN
10+
AHB1LPENR:
11+
_add:
12+
AXILPEN:
13+
description: AXI to AHB bridge clock enable during Sleep mode
14+
bitOffset: 13
15+
bitWidth: 1
16+
DTCMLPEN:
17+
description: DTCM RAM interface clock enable during Sleep mode
18+
bitOffset: 20
19+
bitWidth: 1

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