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use "v3" to refer to STM32GO,L0 and L5 families gpio style
This allows to do some factorisation between STM32G0 and L0 on one side and STM32L5 on the other. Note: v3 is basically the same as v2 but ST seems to have decided to change some names starting from STM32L0.
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5 files changed

+80
-118
lines changed

5 files changed

+80
-118
lines changed

peripherals/gpio/gpio_g0_l0.yaml

Lines changed: 2 additions & 55 deletions
Original file line numberDiff line numberDiff line change
@@ -1,59 +1,6 @@
11
# This GPIO is used on the STM32G0 and L0 families.
22

33
_include:
4+
- v3/common.yaml
5+
- v3/af0-7.yaml
46
- gpio_with_brr.yaml
5-
6-
"GPIO*":
7-
MODER:
8-
"MODE*":
9-
Input: [0, "Input mode (reset state)"]
10-
Output: [1, "General purpose output mode"]
11-
Alternate: [2, "Alternate function mode"]
12-
Analog: [3, "Analog mode"]
13-
OTYPER:
14-
"OT*":
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PushPull: [0, "Output push-pull (reset state)"]
16-
OpenDrain: [1, "Output open-drain"]
17-
OSPEEDR:
18-
"OSPEED*":
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LowSpeed: [0, "Low speed"]
20-
MediumSpeed: [1, "Medium speed"]
21-
HighSpeed: [2, "High speed"]
22-
VeryHighSpeed: [3, "Very high speed"]
23-
PUPDR:
24-
"PUPD*":
25-
Floating: [0, "No pull-up, pull-down"]
26-
PullUp: [1, "Pull-up"]
27-
PullDown: [2, "Pull-down"]
28-
IDR:
29-
"ID*":
30-
High: [1, "Input is logic high"]
31-
Low: [0, "Input is logic low"]
32-
ODR:
33-
"OD*":
34-
High: [1, "Set output to logic high"]
35-
Low: [0, "Set output to logic low"]
36-
BSRR:
37-
"BR*":
38-
_write:
39-
Reset: [1, "Resets the corresponding ODx bit"]
40-
"BS*":
41-
_write:
42-
Set: [1, "Sets the corresponding ODx bit"]
43-
LCKR:
44-
"LCK[0123456789],LCK1[012345]":
45-
Unlocked: [0, "Port configuration not locked"]
46-
Locked: [1, "Port configuration locked"]
47-
"LCKK":
48-
NotActive: [0, "Port configuration lock key not active"]
49-
Active: [1, "Port configuration lock key active"]
50-
"AFR[LH]":
51-
"AFSEL*":
52-
AF0: [0, "AF0"]
53-
AF1: [1, "AF1"]
54-
AF2: [2, "AF2"]
55-
AF3: [3, "AF3"]
56-
AF4: [4, "AF4"]
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AF5: [5, "AF5"]
58-
AF6: [6, "AF6"]
59-
AF7: [7, "AF7"]

peripherals/gpio/gpio_l5.yaml

Lines changed: 2 additions & 63 deletions
Original file line numberDiff line numberDiff line change
@@ -1,67 +1,6 @@
11
# This GPIO is used on the STM32L5 families.
22

33
_include:
4+
- v3/common.yaml
5+
- v3/af0-15.yaml
46
- gpio_with_brr.yaml
5-
6-
"GPIO*":
7-
MODER:
8-
"MODE*":
9-
Input: [0, "Input mode"]
10-
Output: [1, "General purpose output mode"]
11-
Alternate: [2, "Alternate function mode"]
12-
Analog: [3, "Analog mode (reset state)"]
13-
OTYPER:
14-
"OT*":
15-
PushPull: [0, "Output push-pull (reset state)"]
16-
OpenDrain: [1, "Output open-drain"]
17-
OSPEEDR:
18-
"OSPEED*":
19-
LowSpeed: [0, "Low speed"]
20-
MediumSpeed: [1, "Medium speed"]
21-
HighSpeed: [2, "High speed"]
22-
VeryHighSpeed: [3, "Very high speed"]
23-
PUPDR:
24-
"PUPD*":
25-
Floating: [0, "No pull-up, pull-down"]
26-
PullUp: [1, "Pull-up"]
27-
PullDown: [2, "Pull-down"]
28-
IDR:
29-
"ID*":
30-
High: [1, "Input is logic high"]
31-
Low: [0, "Input is logic low"]
32-
ODR:
33-
"OD*":
34-
High: [1, "Set output to logic high"]
35-
Low: [0, "Set output to logic low"]
36-
BSRR:
37-
"BR*":
38-
_write:
39-
Reset: [1, "Resets the corresponding ODx bit"]
40-
"BS*":
41-
_write:
42-
Set: [1, "Sets the corresponding ODx bit"]
43-
LCKR:
44-
"LCK[0123456789],LCK1[012345]":
45-
Unlocked: [0, "Port configuration not locked"]
46-
Locked: [1, "Port configuration locked"]
47-
"LCKK":
48-
NotActive: [0, "Port configuration lock key not active"]
49-
Active: [1, "Port configuration lock key active"]
50-
"AFR[LH]":
51-
"AFSEL*":
52-
AF0: [0, "AF0"]
53-
AF1: [1, "AF1"]
54-
AF2: [2, "AF2"]
55-
AF3: [3, "AF3"]
56-
AF4: [4, "AF4"]
57-
AF5: [5, "AF5"]
58-
AF6: [6, "AF6"]
59-
AF7: [7, "AF7"]
60-
AF8: [8, "AF8"]
61-
AF9: [9, "AF9"]
62-
AF10: [10, "AF10"]
63-
AF11: [11, "AF11"]
64-
AF12: [12, "AF12"]
65-
AF13: [13, "AF13"]
66-
AF14: [14, "AF14"]
67-
AF15: [15, "AF15"]

peripherals/gpio/v3/af0-15.yaml

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,19 @@
1+
"GPIO*":
2+
"AFR[LH]":
3+
"AFSEL*":
4+
AF0: [0, "AF0"]
5+
AF1: [1, "AF1"]
6+
AF2: [2, "AF2"]
7+
AF3: [3, "AF3"]
8+
AF4: [4, "AF4"]
9+
AF5: [5, "AF5"]
10+
AF6: [6, "AF6"]
11+
AF7: [7, "AF7"]
12+
AF8: [8, "AF8"]
13+
AF9: [9, "AF9"]
14+
AF10: [10, "AF10"]
15+
AF11: [11, "AF11"]
16+
AF12: [12, "AF12"]
17+
AF13: [13, "AF13"]
18+
AF14: [14, "AF14"]
19+
AF15: [15, "AF15"]

peripherals/gpio/v3/af0-7.yaml

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,11 @@
1+
"GPIO*":
2+
"AFR[LH]":
3+
"AFSEL*":
4+
AF0: [0, "AF0"]
5+
AF1: [1, "AF1"]
6+
AF2: [2, "AF2"]
7+
AF3: [3, "AF3"]
8+
AF4: [4, "AF4"]
9+
AF5: [5, "AF5"]
10+
AF6: [6, "AF6"]
11+
AF7: [7, "AF7"]

peripherals/gpio/v3/common.yaml

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,46 @@
1+
# This GPIO is used on the STM32G0, L0 and L5 families.
2+
3+
"GPIO*":
4+
MODER:
5+
"MODE*":
6+
Input: [0, "Input mode"]
7+
Output: [1, "General purpose output mode"]
8+
Alternate: [2, "Alternate function mode"]
9+
Analog: [3, "Analog mode"]
10+
OTYPER:
11+
"OT*":
12+
PushPull: [0, "Output push-pull (reset state)"]
13+
OpenDrain: [1, "Output open-drain"]
14+
OSPEEDR:
15+
"OSPEED*":
16+
LowSpeed: [0, "Low speed"]
17+
MediumSpeed: [1, "Medium speed"]
18+
HighSpeed: [2, "High speed"]
19+
VeryHighSpeed: [3, "Very high speed"]
20+
PUPDR:
21+
"PUPD*":
22+
Floating: [0, "No pull-up, pull-down"]
23+
PullUp: [1, "Pull-up"]
24+
PullDown: [2, "Pull-down"]
25+
IDR:
26+
"ID*":
27+
High: [1, "Input is logic high"]
28+
Low: [0, "Input is logic low"]
29+
ODR:
30+
"OD*":
31+
High: [1, "Set output to logic high"]
32+
Low: [0, "Set output to logic low"]
33+
BSRR:
34+
"BR*":
35+
_write:
36+
Reset: [1, "Resets the corresponding ODx bit"]
37+
"BS*":
38+
_write:
39+
Set: [1, "Sets the corresponding ODx bit"]
40+
LCKR:
41+
"LCK[0123456789],LCK1[012345]":
42+
Unlocked: [0, "Port configuration not locked"]
43+
Locked: [1, "Port configuration locked"]
44+
"LCKK":
45+
NotActive: [0, "Port configuration lock key not active"]
46+
Active: [1, "Port configuration lock key active"]

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