Skip to content

Commit 6de9be7

Browse files
committed
[stm32f7] Fix all timers
1 parent 17b1a71 commit 6de9be7

15 files changed

+299
-60
lines changed
Lines changed: 39 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,39 @@
1+
TIM*:
2+
_delete:
3+
- CCR6
4+
5+
TIM1:
6+
CCMR3_Output:
7+
_modify:
8+
OC5M3:
9+
name: OC5M_3
10+
OC6M3:
11+
name: OC6M_3
12+
13+
TIM[39]:
14+
CNT:
15+
_add:
16+
UIFCPY:
17+
description: >
18+
UIF copy
19+
This bit is a read-only copy of the UIF bit of the TIMx_ISR register.
20+
If the UIFREMAP bit in the TIMxCR1 is reset, bit 31 is reserved and read at 0
21+
bitOffset: 31
22+
bitWidth: 1
23+
access: read-only
24+
25+
TIM[18]:
26+
SR:
27+
_add:
28+
CC5IF:
29+
description: Compare 5 interrupt flag
30+
bitOffset: 16
31+
bitWidth: 1
32+
CC6IF:
33+
description: Compare 6 interrupt flag
34+
bitOffset: 17
35+
bitWidth: 1
36+
CCER:
37+
_delete:
38+
- CC4NP
39+
Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,26 @@
1+
TIM5:
2+
OR:
3+
_modify:
4+
TI4_RMP:
5+
bitOffset: 6
6+
7+
TIM10:
8+
CR1:
9+
_add:
10+
OPM:
11+
description: One-pulse mode
12+
bitOffset: 3
13+
bitWidth: 1
14+
access: read-write
15+
16+
TIM[1346-9],TIM12:
17+
CNT:
18+
_add:
19+
UIFCPY:
20+
description: >
21+
UIF copy
22+
This bit is a read-only copy of the UIF bit of the TIMx_ISR register.
23+
If the UIFREMAP bit in the TIMxCR1 is reset, bit 31 is reserved and read at 0
24+
bitOffset: 31
25+
bitWidth: 1
26+
access: read-only
Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,26 @@
1+
TIM[18]:
2+
BDTR:
3+
_add:
4+
BKF:
5+
description: Break filter
6+
bitOffset: 16
7+
bitWidth: 4
8+
BK2F:
9+
description: Break 2 filter
10+
bitOffset: 20
11+
bitWidth: 4
12+
BK2E:
13+
description: Break 2 enable
14+
bitOffset: 24
15+
bitWidth: 1
16+
BK2P:
17+
description: Break 2 polarity
18+
bitOffset: 25
19+
bitWidth: 1
20+
21+
TIM2:
22+
OR:
23+
_modify:
24+
ITR1_RMP:
25+
bitOffset: 10
26+
bitWidth: 2
Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,40 @@
1+
TIM[18]:
2+
_add:
3+
AF1:
4+
description: alternate function option register 1
5+
addressOffset: "0x60"
6+
size: 0x20
7+
resetValue: 0x00000000
8+
access: read-write
9+
fields:
10+
BKINE:
11+
description: BRK BKIN input enable
12+
bitOffset: 0
13+
bitWidth: 1
14+
BKDFBKE:
15+
description: BRK DFSDM_BREAK[0] enable
16+
bitOffset: 8
17+
bitWidth: 1
18+
BKINP:
19+
description: BRK BKIN input polarity
20+
bitOffset: 9
21+
bitWidth: 1
22+
AF2:
23+
description: alternate function option register 1
24+
addressOffset: "0x64"
25+
size: 0x20
26+
resetValue: 0x00000000
27+
access: read-write
28+
fields:
29+
BK2INE:
30+
description: BRK2 BKIN input enable
31+
bitOffset: 0
32+
bitWidth: 1
33+
BK2DFBKE:
34+
description: BRK2 DFSDM_BREAK[0] enable
35+
bitOffset: 8
36+
bitWidth: 1
37+
BK2INP:
38+
description: BRK2 BKIN input polarity
39+
bitOffset: 9
40+
bitWidth: 1

devices/common_patches/f7_tim.yaml

Lines changed: 52 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,52 @@
1+
TIM*:
2+
_delete:
3+
- CRR6
4+
CR1:
5+
_delete:
6+
- UIFREMAP
7+
_add:
8+
UIFREMAP:
9+
description: UIF status bit remapping
10+
bitOffset: 11
11+
bitWidth: 1
12+
13+
TIM1[0134]:
14+
_delete:
15+
- SMCR
16+
CNT:
17+
_add:
18+
UIFCPY:
19+
description: >
20+
UIF copy
21+
This bit is a read-only copy of the UIF bit of the TIMx_ISR register.
22+
If the UIFREMAP bit in the TIMxCR1 is reset, bit 31 is reserved and read at 0
23+
bitOffset: 31
24+
bitWidth: 1
25+
access: read-only
26+
27+
TIM3:
28+
CNT:
29+
_delete:
30+
- CNT_H
31+
ARR:
32+
_delete:
33+
- ARR_H
34+
CCR%s:
35+
_delete:
36+
- CCR1_H
37+
38+
TIM9:
39+
SMCR:
40+
_add:
41+
SMS_3:
42+
description: Slave mode selection - bit 3
43+
bitOffset: 16
44+
bitWidth: 1
45+
46+
TIM[1-58]:
47+
DMAR:
48+
_modify:
49+
# Self-inconsistency between the register map and the
50+
# specific register field documentation in RMs
51+
DMAB:
52+
bitWidth: 32

devices/common_patches/tim/v2/f7.yaml

Lines changed: 62 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -30,44 +30,14 @@ TIM5:
3030
- ITR1_RMP
3131

3232
TIM1:
33-
CCMR1_Output:
34-
_add:
35-
OC1M_3:
36-
description: "Output Compare 1 mode, bit 3"
37-
bitOffset: 16
38-
bitWidth: 1
39-
OC2M_3:
40-
description: "Output Compare 2 mode, bit 3"
41-
bitOffset: 24
42-
bitWidth: 1
43-
CCMR2_Output:
44-
_add:
45-
OC3M_3:
46-
description: "Output Compare 3 mode, bit 3"
47-
bitOffset: 16
48-
bitWidth: 1
49-
OC4M_3:
50-
description: "Output Compare 4 mode, bit 3"
51-
bitOffset: 24
52-
bitWidth: 1
5333
CCMR3_Output:
5434
_modify:
5535
OC5M3:
5636
name: OC5M_3
5737
OC6M3:
5838
name: OC6M_3
5939

60-
TIM[235]:
61-
CCMR1_Output:
62-
_add:
63-
OC1M_3:
64-
description: "Output Compare 1 mode, bit 3"
65-
bitOffset: 16
66-
bitWidth: 1
67-
OC2M_3:
68-
description: "Output Compare 2 mode, bit 3"
69-
bitOffset: 24
70-
bitWidth: 1
40+
TIM[1235]:
7141
CCMR2_Output:
7242
_add:
7343
OC3M_3:
@@ -79,16 +49,72 @@ TIM[235]:
7949
bitOffset: 24
8050
bitWidth: 1
8151

82-
TIM9:
52+
TIM[12359]:
8353
CCMR1_Output:
8454
_add:
85-
OC1M_3:
86-
description: "Output Compare 1 mode, bit 3"
87-
bitOffset: 16
88-
bitWidth: 1
8955
OC2M_3:
9056
description: "Output Compare 2 mode, bit 3"
9157
bitOffset: 24
9258
bitWidth: 1
9359

60+
TIM[12359],TIM10:
61+
CCMR1_Output:
62+
_add:
63+
OC1M_3:
64+
description: "Output Compare 1 mode, bit 3"
65+
bitOffset: 16
66+
bitWidth: 1
9467

68+
TIM[18]:
69+
CR2:
70+
_add:
71+
OIS5:
72+
description: Output Idle state 5 (OC5 output)
73+
bitOffset: 16
74+
bitWidth: 1
75+
OIS6:
76+
description: Output Idle state 6 (OC6 output)
77+
bitOffset: 18
78+
bitWidth: 1
79+
MMS2:
80+
description: Master mode selection 2
81+
bitOffset: 20
82+
bitWidth: 4
83+
SR:
84+
_add:
85+
B2IF:
86+
description: Break 2 interrupt flag
87+
bitOffset: 8
88+
bitWidth: 1
89+
CC5IF:
90+
description: Compare 5 interrupt flag
91+
bitOffset: 16
92+
bitWidth: 1
93+
CC6IF:
94+
description: Compare 6 interrupt flag
95+
bitOffset: 17
96+
bitWidth: 1
97+
EGR:
98+
_add:
99+
B2G:
100+
description: Break 2 generation
101+
bitOffset: 8
102+
bitWidth: 1
103+
CCER:
104+
_add:
105+
CC5E:
106+
description: Capture/Compare 5 output enable
107+
bitOffset: 16
108+
bitWidth: 1
109+
CC5P:
110+
description: Capture/Compare 5 output polarity
111+
bitOffset: 17
112+
bitWidth: 1
113+
CC6E:
114+
description: Capture/Compare 6 output enable
115+
bitOffset: 20
116+
bitWidth: 1
117+
CC6P:
118+
description: Capture/Compare 6 output polarity
119+
bitOffset: 21
120+
bitWidth: 1

devices/stm32f730.yaml

Lines changed: 2 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -12,14 +12,6 @@ _modify:
1212
C_ADC:
1313
name: ADC_Common
1414

15-
TIM1:
16-
CCMR3_Output:
17-
_modify:
18-
OC5M3:
19-
name: OC5M_3
20-
OC6M3:
21-
name: OC6M_3
22-
2315
_include:
2416
- common_patches/f7x23_pllsai.yaml
2517
- common_patches/dma_fcr_wo.yaml
@@ -63,6 +55,8 @@ _include:
6355
- common_patches/tim/tim2345_mixed_l.yaml
6456
- ../peripherals/tim/tim_advanced.yaml
6557
- common_patches/tim/tim_ccr.yaml
58+
- common_patches/f7_tim.yaml
59+
- common_patches/f730_f7x2_f7x3_tim.yaml
6660
- ../peripherals/tim/v2/ccm.yaml
6761
- ../peripherals/iwdg/iwdg_with_WINR.yaml
6862
- ../peripherals/exti/exti.yaml

devices/stm32f745.yaml

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -155,7 +155,10 @@ _include:
155155
- common_patches/tim/tim2345_mixed_l.yaml
156156
- ../peripherals/tim/tim_advanced.yaml
157157
- common_patches/tim/tim_ccr.yaml
158+
- common_patches/f7_tim.yaml
158159
- common_patches/tim/v2/f7.yaml
160+
- common_patches/f745_f750_f765_f7x6_f7x7_f7x9_tim.yaml
161+
- common_patches/f745_f750_f765_f7x6_f7x9_tim.yaml
159162
- ../peripherals/tim/v2/ccm.yaml
160163
- ../peripherals/iwdg/iwdg_with_WINR.yaml
161164
- ../peripherals/exti/exti.yaml

devices/stm32f750.yaml

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -81,7 +81,10 @@ _include:
8181
- ../peripherals/tim/tim2345_mixed.yaml
8282
- ../peripherals/tim/tim_advanced.yaml
8383
- common_patches/tim/tim_ccr.yaml
84+
- common_patches/f7_tim.yaml
8485
- common_patches/tim/v2/f7.yaml
86+
- common_patches/f745_f750_f765_f7x6_f7x7_f7x9_tim.yaml
87+
- common_patches/f745_f750_f765_f7x6_f7x9_tim.yaml
8588
- ../peripherals/tim/v2/ccm.yaml
8689
- ../peripherals/iwdg/iwdg_with_WINR.yaml
8790
- ../peripherals/exti/exti.yaml

devices/stm32f765.yaml

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -169,7 +169,11 @@ _include:
169169
- common_patches/tim/common.yaml
170170
- ../peripherals/tim/tim_advanced.yaml
171171
- common_patches/tim/tim_ccr.yaml
172+
- common_patches/f7_tim.yaml
172173
- common_patches/tim/v2/f7.yaml
174+
- common_patches/f745_f750_f765_f7x6_f7x7_f7x9_tim.yaml
175+
- common_patches/f745_f750_f765_f7x6_f7x9_tim.yaml
176+
- common_patches/f765_f7x6_f7x9_tim.yaml
173177
- ../peripherals/tim/v2/ccm.yaml
174178
- ../peripherals/iwdg/iwdg_with_WINR.yaml
175179
- ../peripherals/exti/exti.yaml

devices/stm32f7x2.yaml

Lines changed: 2 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -12,14 +12,6 @@ _modify:
1212
C_ADC:
1313
name: ADC_Common
1414

15-
TIM1:
16-
CCMR3_Output:
17-
_modify:
18-
OC5M3:
19-
name: OC5M_3
20-
OC6M3:
21-
name: OC6M_3
22-
2315
_include:
2416
- common_patches/f7x23_pllsai.yaml
2517
- common_patches/dma_fcr_wo.yaml
@@ -64,6 +56,8 @@ _include:
6456
- common_patches/tim/tim2345_mixed_l.yaml
6557
- ../peripherals/tim/tim_advanced.yaml
6658
- common_patches/tim/tim_ccr.yaml
59+
- common_patches/f7_tim.yaml
60+
- common_patches/f730_f7x2_f7x3_tim.yaml
6761
- ../peripherals/tim/v2/ccm.yaml
6862
- ../peripherals/iwdg/iwdg_with_WINR.yaml
6963
- ../peripherals/exti/exti.yaml

0 commit comments

Comments
 (0)