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Merge pull request #1220 from stm32-rs/rng
RNG enums
2 parents d6c98d0 + ef87fbe commit 77458a7

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‎CHANGELOG.md

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@@ -79,6 +79,7 @@
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* Add DAC enums
8080
* DCMI enums
8181
* DFSDM enums and fixes
82+
* RNG enums
8283
* SDIO/SDMMC v1
8384
* TSC enums and arrays
8485
* USB v2

‎devices/fields/rng/rng_f4.yaml

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‎devices/fields/rng/rng_f4_ced.yaml

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‎devices/fields/rng/rng_v1.yaml

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‎devices/fields/rng/rng_v1_ced.yaml

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This file was deleted.

‎devices/fields/rng/v1.yaml

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@@ -0,0 +1,51 @@
1+
CR:
2+
RNGEN:
3+
Disabled: [0, Random number generator is disabled]
4+
Enabled: [1, Random number generator is enabled]
5+
IE:
6+
Disabled: [0, RNG interrupt is disabled]
7+
Enabled: [1, RNG interrupt is enabled]
8+
"?~CED":
9+
Enabled: [0, Clock error detection is enabled]
10+
Disabled: [1, Clock error detection is disabled]
11+
12+
SR:
13+
"[CS]EIS":
14+
_W0C:
15+
Clear: [0, Clear flag]
16+
SEIS:
17+
_read:
18+
NoFault: [0, No faulty sequence detected]
19+
Fault:
20+
[
21+
1,
22+
"At least one faulty sequence has been detected. See **SECS** bit description for details.\nAn interrupt is pending if IE = 1 in the RNG_CR register.",
23+
]
24+
CEIS:
25+
_read:
26+
Correct: [0, The RNG clock is correct]
27+
Slow: [1, "The RNG has been detected too slow\nAn interrupt is pending if IE = 1 in the RNG_CR register"]
28+
SECS:
29+
NoFault:
30+
[
31+
0,
32+
"No faulty sequence has currently been detected. If the SEIS bit is set, this means that a faulty sequence was detected and the situation has been recovered.",
33+
]
34+
Fault: [1, At least one faulty sequence has been detected - see ref manual for details]
35+
CECS:
36+
Correct:
37+
[
38+
0,
39+
"The RNG clock is correct. If the CEIS bit is set, this means that a slow clock was detected and the situation has been recovered.",
40+
]
41+
Slow: [1, The RNG clock is too slow]
42+
DRDY:
43+
Invalid: [0, "The RNG_DR register is not yet valid, no random data is available"]
44+
Valid:
45+
[
46+
1,
47+
"The RNG_DR register contains valid random data.\nOnce the RNG_DR register has been read, this bit returns to 0 until a new random value is generated.",
48+
]
49+
50+
DR:
51+
RNDATA: [0, 0xFFFFFFFF]

‎devices/fields/rng/rng_wl.yaml renamed to ‎devices/fields/rng/v2.yaml

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@@ -1,6 +1,5 @@
11
_include:
2-
- ./rng_v1.yaml
3-
- ./rng_v1_ced.yaml
2+
- ./v1.yaml
43

54
CR:
65
CONFIGLOCK:
@@ -40,28 +39,6 @@ CR:
4039
]
4140
Custom: [1, Custom values for NIST compliant RNG]
4241

43-
SR:
44-
SEIS:
45-
NoFault: [0, No faulty sequence detected]
46-
Fault: [1, At least one faulty sequence has been detected]
47-
CEIS:
48-
Correct: [0, "The RNG clock is correct (fRNGCLK> fHCLK/32)"]
49-
Slow: [1, "The RNG clock before internal divider has been detected too slow (fRNGCLK< fHCLK/32)"]
50-
SECS:
51-
_read:
52-
NoFault:
53-
[
54-
0,
55-
"No faulty sequence has currently been detected. If the SEIS bit is set, this means that a faulty sequence was detected and the situation has been recovered",
56-
]
57-
Fault: [1, At least one faulty sequence has been detected - see ref manual for details]
58-
CECS:
59-
_read:
60-
Correct: [0, "The RNG clock is correct (fRNGCLK> fHCLK/32)"]
61-
Slow: [1, "The RNG clock before internal divider has been detected too slow (fRNGCLK< fHCLK/32)"]
62-
DRDY:
63-
Invalid: [0, "The RNG_DR register is not yet valid, no random data is available"]
64-
Valid: [1, The RNG_DR register contains valid random data]
6542
HTCR:
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HTCFG:
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Magic: [0x1759_0ABC, Magic number to be written before any write (0x1759_0ABC)]

‎devices/patches/rcc/h7_common_singlecore.yaml

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_include: h7_usb1otghs.yaml
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_modify:
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CIFR:
34
access: read-only

‎devices/stm32f215.yaml

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@@ -184,7 +184,9 @@ RCC:
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- fields/rcc/v2/i2s.yaml
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- fields/rcc/v2/i2s_pll.yaml
186186

187-
RNG: {}
187+
RNG:
188+
_include:
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- fields/rng/v1.yaml
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RTC:
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_derive:

‎devices/stm32f217.yaml

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@@ -184,7 +184,9 @@ RCC:
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- fields/rcc/v2/i2s.yaml
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- fields/rcc/v2/i2s_pll.yaml
186186

187-
RNG: {}
187+
RNG:
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_include:
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- fields/rng/v1.yaml
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RTC:
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_derive:

‎devices/stm32f405.yaml

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- fields/rcc/v2/i2s_pll.yaml
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RNG:
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_include: fields/rng/rng_f4.yaml
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_include: fields/rng/v1.yaml
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RTC:
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_include:

‎devices/stm32f407.yaml

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- fields/rcc/v2/i2s_pll.yaml
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RNG:
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_include: fields/rng/rng_f4.yaml
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_include: fields/rng/v1.yaml
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RTC:
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_include:

‎devices/stm32f410.yaml

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- fields/rcc/v2/dckcfgr2_i2csel.yaml
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RNG:
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_include: fields/rng/rng_f4_ced.yaml
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_include: fields/rng/v1.yaml
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CR:
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_add:
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CED:

‎devices/stm32f412.yaml

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- fields/rcc/v2/ckgatenr.yaml
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RNG:
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_include: fields/rng/rng_f4_ced.yaml
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_include: fields/rng/v1.yaml
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CR:
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_add:
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CED:

‎devices/stm32f427.yaml

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RNG:
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_include:
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- fields/rng/rng_v1.yaml
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- fields/rng/v1.yaml
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_include:

‎devices/stm32f429.yaml

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RNG:
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_include:
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- fields/rng/rng_v1.yaml
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- fields/rng/v1.yaml
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_include:

‎devices/stm32f469.yaml

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- fields/rcc/v2/dckcfgr_dsisel.yaml
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RNG:
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_include: fields/rng/rng_f4_ced.yaml
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_include: fields/rng/v1.yaml
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CR:
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_add:
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CED:

‎devices/stm32f722.yaml

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- patches/rcc/rcc_merge_rtcsel.yaml
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- fields/rcc/v2/f7.yaml
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RNG: {}
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RNG:
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_include:
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- fields/rng/v1.yaml
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RTC:
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‎devices/stm32f723.yaml

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- patches/rcc/rcc_merge_rtcsel.yaml
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- fields/rcc/v2/f7.yaml
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RNG: {}
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RNG:
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_include:
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- fields/rng/v1.yaml
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RTC:
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‎devices/stm32f730.yaml

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- patches/rcc/rcc_merge_rtcsel.yaml
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- fields/rcc/v2/f7.yaml
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RNG:
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_include:
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- fields/rng/v1.yaml
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RTC:
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- patches/rtc/alarm.yaml

‎devices/stm32f732.yaml

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- patches/rcc/rcc_merge_rtcsel.yaml
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- fields/rcc/v2/f7.yaml
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RNG: {}
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RNG:
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_include:
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- fields/rng/v1.yaml
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RTC:
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‎devices/stm32f733.yaml

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- collect/rtc/alarm.yaml
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- collect/rtc/bkpr.yaml
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RNG: {}
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RNG:
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_include:
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- fields/rng/v1.yaml
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SAI1:
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_include:

‎devices/stm32f745.yaml

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- fields/rcc/v2/dckcfgr_saidivr.yaml
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- fields/rcc/v2/dckcfgr2_cecsel.yaml
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RNG: {}
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RNG:
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_include:
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- fields/rng/v1.yaml
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RTC:
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_include:

‎devices/stm32f746.yaml

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- fields/rcc/v2/dckcfgr_saidivr.yaml
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- fields/rcc/v2/dckcfgr2_cecsel.yaml
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RNG: {}
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RNG:
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_include:
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- fields/rng/v1.yaml
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RTC:
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‎devices/stm32f750.yaml

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- fields/rcc/v2/dckcfgr_saidivr.yaml
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- fields/rcc/v2/dckcfgr2_cecsel.yaml
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RNG: {}
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RNG:
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- fields/rng/v1.yaml
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RTC:
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_include:

‎devices/stm32f756.yaml

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- fields/rcc/v2/dckcfgr_saidivr.yaml
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- fields/rcc/v2/dckcfgr2_cecsel.yaml
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RNG: {}
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RNG:
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- fields/rng/v1.yaml
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RTC:
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_include:

‎devices/stm32f765.yaml

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- fields/rcc/v2/dckcfgr_dsisel.yaml
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- fields/rcc/v2/dckcfgr2_cecsel.yaml
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RNG: {}
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RNG:
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- fields/rng/v1.yaml
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RTC:
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‎devices/stm32f767.yaml

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- fields/rcc/v2/dckcfgr_dsisel.yaml
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- fields/rcc/v2/dckcfgr2_cecsel.yaml
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RNG: {}
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RNG:
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- fields/rng/v1.yaml
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_include:

‎devices/stm32f769.yaml

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- fields/rcc/v2/dckcfgr_dsisel.yaml
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- fields/rcc/v2/dckcfgr2_cecsel.yaml
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315-
RNG: {}
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RNG:
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_include:
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- fields/rng/v1.yaml
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RTC:
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_include:

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