@@ -55,26 +55,26 @@ HRTIM_Master:
55
55
CKPSC : [0, 7]
56
56
ISR :
57
57
UPD :
58
- NoEvent : [0, No master update interrupt occurred]
59
- Event : [1, Master update interrupt occurred]
58
+ NoEvent : [0, No timer update interrupt occurred]
59
+ Event : [1, Timer update interrupt occurred]
60
60
SYNC :
61
61
NoEvent : [0, No sync input interrupt occurred]
62
62
Event : [1, Sync input interrupt occurred]
63
63
REP :
64
- NoEvent : [0, No master repetition interrupt occurred]
65
- Event : [1, Master repetition interrupt occurred]
64
+ NoEvent : [0, No timer repetition interrupt occurred]
65
+ Event : [1, Timer repetition interrupt occurred]
66
66
" CMP[1-4] " :
67
- NoEvent : [0, No master compare interrupt occurred]
68
- Event : [1, Master compare interrupt occurred]
67
+ NoEvent : [0, No compare interrupt occurred]
68
+ Event : [1, Compare interrupt occurred]
69
69
ICR :
70
70
" *C " :
71
71
_W1C :
72
72
Clear : [1, Clears associated flag in ISR register]
73
73
DIER :
74
- " M *DE,SYNCDE " :
74
+ " *DE " :
75
75
Disabled : [0, DMA request disabled]
76
76
Enabled : [1, DMA request enabled]
77
- " M *IE,SYNCIE " :
77
+ " *IE " :
78
78
Disabled : [0, Interrupt disabled]
79
79
Enabled : [1, Interrupt enabled]
80
80
CNTR :
@@ -193,54 +193,12 @@ HRTIM_Master:
193
193
_W1C :
194
194
Clear : [1, Clears associated flag in ISR register]
195
195
DIER :
196
- DLYPRTDE :
197
- Disabled : [0, Delayed protection DMA request disabled]
198
- Enabled : [1, Delayed protection DMA request enabled]
199
- RSTDE :
200
- Disabled : [0, Timer x counter reset/roll-over DMA request disabled]
201
- Enabled : [1, Timer x counter reset/roll-over DMA request enabled]
202
- " RST[12]DE " :
203
- Disabled : [0, Tx output reset DMA request disabled]
204
- Enabled : [1, Tx output reset DMA request enabled]
205
- " SET[12]DE " :
206
- Disabled : [0, Tx output set DMA request disabled]
207
- Enabled : [1, Tx output set DMA request enabled]
208
- " CPT[12]DE " :
209
- Disabled : [0, Capture DMA request disabled]
210
- Enabled : [1, Capture DMA request enabled]
211
- UPDDE :
212
- Disabled : [0, Update DMA request disabled]
213
- Enabled : [1, Update DMA request enabled]
214
- REPDE :
215
- Disabled : [0, Repetition DMA request disabled]
216
- Enabled : [1, Repetition DMA request enabled]
217
- " CMP[1-4]DE " :
218
- Disabled : [0, Compare DMA request disabled]
219
- Enabled : [1, Compare DMA request enabled]
220
- DLYPRTIE :
221
- Disabled : [0, Delayed protection interrupt disabled]
222
- Enabled : [1, Delayed protection interrupt enabled]
223
- RSTIE :
224
- Disabled : [0, Timer x counter/reset roll-over interrupt disabled]
225
- Enabled : [1, Timer x counter/reset roll-over interrupt enabled]
226
- " RST[12]IE " :
227
- Disabled : [0, Tx output reset interrupt disabled]
228
- Enabled : [1, Tx output reset interrupt enabled]
229
- " SET[12]IE " :
230
- Disabled : [0, Tx output set interrupt disabled]
231
- Enabled : [1, Tx output set interrupt enabled]
232
- " CPT[12]IE " :
233
- Disabled : [0, Capture interrupt disabled]
234
- Enabled : [1, Capture interrupt enabled]
235
- UPDIE :
236
- Disabled : [0, Update interrupt disabled]
237
- Enabled : [1, Update interrupt enabled]
238
- REPIE :
239
- Disabled : [0, Repetition interrupt disabled]
240
- Enabled : [1, Repetition interrupt enabled]
241
- " CMP[1-4]IE " :
242
- Disabled : [0, Compare interrupt disabled]
243
- Enabled : [1, Compare interrupt enabled]
196
+ " *DE " :
197
+ Disabled : [0, DMA request disabled]
198
+ Enabled : [1, DMA request enabled]
199
+ " *IE " :
200
+ Disabled : [0, Interrupt disabled]
201
+ Enabled : [1, Interrupt enabled]
244
202
CNTR :
245
203
CNT : [0, 0xFFFF]
246
204
PERR :
0 commit comments