Merge pull request #1189 from z-av/s2r-0.36.1

burrbull · web-flow · commit c83b5d97e4f1 · 2025-04-05T05:05:16.000Z
update svd2rust
diff --git a/.gitignore b/.gitignore
@@ -14,3 +14,4 @@ svdconv/
 
 # automatically generated crates
 /stm32*/
+.zed
diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -2,7 +2,8 @@
 
 ## [Unreleased]
 
-* Updated to `svd2rust` 0.36.0, `svdtools` 0.4.5, `form` 0.12.1, use tools binaries for CI (#1174)
+* Updated to `svd2rust` 0.36.1, `svdtools` 0.4.6, `form` 0.12.1, use tools binaries for CI (#1174)
+* bump `defmt` depencency to 1.0
 * Use `svd2rust.toml` config, use custom ident suffixes (#948)
 * Replace `makehtml.py` with `svdtools html` (#881)
 * Remove workaround for bug in duckscript's `mv` (#981)
diff --git a/README.md b/README.md
@@ -96,8 +96,8 @@ contain the latest patches and updates.
       current version used by stm32-rs
     * Otherwise, build using `cargo` (double check versions against `scripts/tool_install.sh`):
         * `cargo install form --version 0.12.1`
-        * `cargo install svdtools --version 0.4.5`
-        * `cargo install svd2rust --version 0.36.0`
+        * `cargo install svdtools --version 0.4.6`
+        * `cargo install svd2rust --version 0.36.1`
 * Install rustfmt: `rustup component add rustfmt`
 * Generate patched SVD files: `make patch` (you probably want `-j` for all `make` invocations)
     * Alternatively you could install `cargo-make` runner and then use it instead of `make`. Works on MS Windows natively:
diff --git a/devices/collect/tim/tim11_derive.yaml b/devices/collect/tim/tim11_derive.yaml
@@ -9,4 +9,4 @@ _derive:
   CNT: TIM10.CNT
   PSC: TIM10.PSC
   ARR: TIM10.ARR
-  #CCR%s: TIM10.CCR%s
+  CCR%s: TIM10.CCR%s
diff --git a/devices/collect/tim/tim14_derive.yaml b/devices/collect/tim/tim14_derive.yaml
@@ -9,4 +9,4 @@ _derive:
   CNT: TIM13.CNT
   PSC: TIM13.PSC
   ARR: TIM13.ARR
-  #CCR%s: TIM13.CCR%s
+  CCR%s: TIM13.CCR%s
diff --git a/devices/collect/tim/tim17_derive.yaml b/devices/collect/tim/tim17_derive.yaml
@@ -11,7 +11,7 @@ _derive:
   PSC: TIM16.PSC
   ARR: TIM16.ARR
   RCR: TIM16.RCR
-  #CCR%s: TIM16.CCR%s
+  CCR%s: TIM16.CCR%s
   BDTR: TIM16.BDTR
   "?~DTR2": TIM16.DTR2
   DCR: TIM16.DCR
diff --git a/devices/collect/tim/tim22_derive.yaml b/devices/collect/tim/tim22_derive.yaml
@@ -1,7 +1,6 @@
 _derive:
   CR1: TIM21.CR1
   CR2: TIM21.CR2
-  SMCR: TIM21.SMCR
   DIER: TIM21.DIER
   SR: TIM21.SR
   EGR: TIM21.EGR
@@ -11,4 +10,13 @@ _derive:
   CNT: TIM21.CNT
   PSC: TIM21.PSC
   ARR: TIM21.ARR
-  #CCR%s: TIM21.CCR%s
+  CCR%s: TIM21.CCR%s
+
+SMCR:
+  _derive:
+    MSM: TIM21.SMCR.MSM
+    ETF: TIM21.SMCR.ETF
+    ETPS: TIM21.SMCR.ETPS
+    ECE: TIM21.SMCR.ECE
+    ETP: TIM21.SMCR.ETP
+    SMS: TIM21.SMCR.SMS
diff --git a/devices/collect/tim/tim4_derive.yaml b/devices/collect/tim/tim4_derive.yaml
@@ -1,7 +1,6 @@
 _derive:
   CR1: TIM3.CR1
   CR2: TIM3.CR2
-  SMCR: TIM3.SMCR
   DIER: TIM3.DIER
   SR: TIM3.SR
   EGR: TIM3.EGR
@@ -13,7 +12,20 @@ _derive:
   CNT: TIM3.CNT
   PSC: TIM3.PSC
   ARR: TIM3.ARR
-  #CCR%s: TIM3.CCR%s
+  CCR%s: TIM3.CCR%s
   DCR: TIM3.DCR
   DMAR: TIM3.DMAR
   "?~ECR": TIM3.ECR
+
+SMCR:
+  _derive:
+    "?~OCCS": TIM3.SMCR.OCCS
+    MSM: TIM3.SMCR.MSM
+    ETF: TIM3.SMCR.ETF
+    ETPS: TIM3.SMCR.ETPS
+    ECE: TIM3.SMCR.ECE
+    ETP: TIM3.SMCR.ETP
+    "?~SMSPE": TIM3.SMCR.SMSPE
+    "?~SMSPS": TIM3.SMCR.SMSPS
+    #SMS: TIM3.SMCR.SMS
+    #"?~SMS_3": TIM3.SMCR.SMS_3
diff --git a/devices/collect/tim/tim5_derive.yaml b/devices/collect/tim/tim5_derive.yaml
@@ -1,7 +1,6 @@
 _derive:
   CR1: TIM2.CR1
   CR2: TIM2.CR2
-  SMCR: TIM2.SMCR
   DIER: TIM2.DIER
   SR: TIM2.SR
   EGR: TIM2.EGR
@@ -13,7 +12,20 @@ _derive:
   CNT: TIM2.CNT
   PSC: TIM2.PSC
   ARR: TIM2.ARR
-  #CCR%s: TIM2.CCR%s
+  CCR%s: TIM2.CCR%s
   DCR: TIM2.DCR
   DMAR: TIM2.DMAR
   "?~ECR": TIM2.ECR
+
+SMCR:
+  _derive:
+    "?~OCCS": TIM2.SMCR.OCCS
+    MSM: TIM2.SMCR.MSM
+    ETF: TIM2.SMCR.ETF
+    ETPS: TIM2.SMCR.ETPS
+    ECE: TIM2.SMCR.ECE
+    ETP: TIM2.SMCR.ETP
+    "?~SMSPE": TIM2.SMCR.SMSPE
+    "?~SMSPS": TIM2.SMCR.SMSPS
+    #SMS: TIM2.SMCR.SMS
+    #"?~SMS_3": TIM2.SMCR.SMS_3
diff --git a/devices/collect/tim/tim8_derive.yaml b/devices/collect/tim/tim8_derive.yaml
@@ -1,7 +1,6 @@
 _derive:
   CR1: TIM1.CR1
   CR2: TIM1.CR2
-  SMCR: TIM1.SMCR
   DIER: TIM1.DIER
   SR: TIM1.SR
   EGR: TIM1.EGR
@@ -14,7 +13,7 @@ _derive:
   PSC: TIM1.PSC
   ARR: TIM1.ARR
   RCR: TIM1.RCR
-  #CCR%s: TIM1.CCR%s
+  CCR%s: TIM1.CCR%s
   BDTR: TIM1.BDTR
   DCR: TIM1.DCR
   DMAR: TIM1.DMAR
@@ -23,3 +22,16 @@ _derive:
   "?~ECR": TIM1.ECR
   CCR5: TIM1.CCR5
   CCR6: TIM1.CCR6
+
+SMCR:
+  _derive:
+    "?~OCCS": TIM1.SMCR.OCCS
+    MSM: TIM1.SMCR.MSM
+    ETF: TIM1.SMCR.ETF
+    ETPS: TIM1.SMCR.ETPS
+    ECE: TIM1.SMCR.ECE
+    ETP: TIM1.SMCR.ETP
+    "?~SMSPE": TIM1.SMCR.SMSPE
+    "?~SMSPS": TIM1.SMCR.SMSPS
+    #SMS: TIM1.SMCR.SMS
+    #"?~SMS_3": TIM1.SMCR.SMS_3
diff --git a/scripts/makecrates.py b/scripts/makecrates.py
@@ -19,7 +19,7 @@
 VERSION = {
     "default": "0.16.0",
 }
-SVD2RUST_VERSION = "0.36.0"
+SVD2RUST_VERSION = "0.36.1"
 
 CRATE_DOC_FEATURES = {
     "stm32c0": ["atomics", "critical-section", "defmt", "rt", "stm32c011", "stm32c031", "stm32c071"],
@@ -84,8 +84,8 @@
 [dependencies]
 critical-section = {{ version = "1.0", optional = true }}
 cortex-m = "0.7.7"
-cortex-m-rt = {{ version = "0.7.3", optional = true }}
-defmt = {{ version = "0.3.5", optional = true }}
+cortex-m-rt = {{ version = "0.7.5", optional = true }}
+defmt = {{ version = "1", optional = true }}
 vcell = "0.1.3"
 portable-atomic = {{ version = "1", default-features = false, optional = true }}
 
diff --git a/scripts/tool_install.sh b/scripts/tool_install.sh
@@ -5,8 +5,8 @@ set -euo pipefail
 CARGO_HOME="${CARGO_HOME:-$HOME/.cargo/}"
 
 FORM_VERSION="${FORM_VERSION:-v0.12.1}"
-SVDTOOLS_VERSION="${SVDTOOLS_VERSION:-v0.4.5}"
-SVD2RUST_VERSION="${SVD2RUST_VERSION:-v0.36.0}"
+SVDTOOLS_VERSION="${SVDTOOLS_VERSION:-v0.4.6}"
+SVD2RUST_VERSION="${SVD2RUST_VERSION:-v0.36.1}"
 SVDCONV_VERSION="${SVDCONV_VERSION:-3.3.46}"
 
 case "${1:-}" in

Original file line number	Diff line number	Diff line change
`@@ -14,3 +14,4 @@ svdconv/`
`14`	`14`
`15`	`15`	`# automatically generated crates`
`16`	`16`	`/stm32*/`
	`17`	`+.zed`