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L5 TIM15 SVD error #511

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David-OConnor opened this issue Mar 11, 2021 · 0 comments · Fixed by #518
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L5 TIM15 SVD error #511

David-OConnor opened this issue Mar 11, 2021 · 0 comments · Fixed by #518

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@David-OConnor
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David-OConnor commented Mar 11, 2021 •
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As @adamgreig pointed out in Matrix, TIM15 on the L5 SVD has an error that should be manually corrected: The TIM15 CCR2 offset is listed at 0x28, when it should be 0x38. 0x28 is the PSC register. Neither registers work as a result.

Is the way to fix this PRing this file in the stm32-nightlies repo?
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Fix TIM15 CCR2 address offset for STM32L5xx wallacejohn/stm32-rs
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