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STM32L433 RCC AHB1 CRC Enable bit incorrect #516

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cyrusmetcalf opened this issue Mar 17, 2021 · 2 comments
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STM32L433 RCC AHB1 CRC Enable bit incorrect #516

cyrusmetcalf opened this issue Mar 17, 2021 · 2 comments

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@cyrusmetcalf
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The bit set in RCC->AHB1 for crc enable is shifting (1 << 11). Needs to be shifting (1 << 12) according to CMSIS implementation.

from STM32L4x3.svd

            <field>
              <name>CRCEN</name>
              <description>CRC clock enable</description>
              <bitOffset>11</bitOffset>
              <bitWidth>1</bitWidth>
            </field>

from CMSIS/Device/ST/STM32L4xx/Include/stm32l433xx.h

#define RCC_AHB1ENR_CRCEN_Pos (12U)
#define RCC_AHB1ENR_CRCEN_Msk(0x1UL << RCCAHB1ENR_CRCEN_Pos)
#define RCC_AHB1ENR_CRCEN   RCC_AHB1ENR_CRCEN_Msk
@cyrusmetcalf
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cyrusmetcalf commented Mar 18, 2021 •
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I opened a PR on it. #517

@hellow554
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the PR was merged, please close this issue :)

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@adamgreig @cyrusmetcalf @hellow554