Skip to content

Commit 102ade5

Browse files
fpistmfpistm
authored
Merge pull request #1932 from fpistm/H723ZG_USB
fix: USB configuration STM32H723ZG
2 parents a95f7c5 + bec0296 commit 102ade5

File tree

3 files changed

+86
-0
lines changed

3 files changed

+86
-0
lines changed

‎cores/arduino/stm32/usb/usbd_conf.h

+4
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,10 @@ extern "C" {
3535
#if defined(USE_USB_HS) && !defined(USB_OTG_HS)
3636
#error "This board does not support USB High Speed! Select 'Full Speed' in the 'Tools->USB interface' menu"
3737
#endif
38+
#if !defined(USB_BASE) && !defined(USB_OTG_FS) && defined(USB_OTG_HS) && !defined(USE_USB_HS)
39+
#error "This board support only USB High Speed! Select 'High Speed' or 'High Speed in Full Speed mode' in the 'Tools->USB interface' menu"
40+
#endif
41+
3842

3943
#include <stdio.h>
4044
#include <stdlib.h>

‎variants/STM32H7xx/H723Z(E-G)T_H730ZBT_H733ZGT/generic_clock.c

+41
Original file line numberDiff line numberDiff line change
@@ -23,6 +23,8 @@ WEAK void SystemClock_Config(void)
2323
{
2424
RCC_OscInitTypeDef RCC_OscInitStruct = {};
2525
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
26+
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
27+
RCC_CRSInitTypeDef RCC_CRSInitStruct = {};
2628

2729
/** Supply configuration update enable
2830
*/
@@ -71,5 +73,44 @@ WEAK void SystemClock_Config(void)
7173
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
7274
Error_Handler();
7375
}
76+
77+
/** Initializes the peripherals clock
78+
*/
79+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC | RCC_PERIPHCLK_USB;
80+
PeriphClkInitStruct.PLL2.PLL2M = 32;
81+
PeriphClkInitStruct.PLL2.PLL2N = 96;
82+
PeriphClkInitStruct.PLL2.PLL2P = 2;
83+
PeriphClkInitStruct.PLL2.PLL2Q = 2;
84+
PeriphClkInitStruct.PLL2.PLL2R = 4;
85+
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_1;
86+
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
87+
PeriphClkInitStruct.PLL2.PLL2FRACN = 0.0;
88+
PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL2;
89+
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
90+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
91+
Error_Handler();
92+
}
93+
94+
/*Configure the clock recovery system (CRS)**********************************/
95+
96+
/*Enable CRS Clock*/
97+
__HAL_RCC_CRS_CLK_ENABLE();
98+
99+
/* Default Synchro Signal division factor (not divided) */
100+
RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
101+
102+
/* Set the SYNCSRC[1:0] bits according to CRS_Source value */
103+
RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB1;
104+
105+
/* HSI48 is synchronized with USB SOF at 1KHz rate */
106+
RCC_CRSInitStruct.ReloadValue = RCC_CRS_RELOADVALUE_DEFAULT;
107+
RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT;
108+
RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
109+
110+
/* Set the TRIM[5:0] to the default value */
111+
RCC_CRSInitStruct.HSI48CalibrationValue = RCC_CRS_HSI48CALIBRATION_DEFAULT;
112+
113+
/* Start automatic synchronization */
114+
HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
74115
}
75116
#endif /* ARDUINO_GENERIC_* */

‎variants/STM32H7xx/H723Z(E-G)T_H730ZBT_H733ZGT/variant_NUCLEO_H723ZG.cpp

+41
Original file line numberDiff line numberDiff line change
@@ -183,6 +183,8 @@ WEAK void SystemClock_Config(void)
183183
{
184184
RCC_OscInitTypeDef RCC_OscInitStruct = {};
185185
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
186+
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
187+
RCC_CRSInitTypeDef RCC_CRSInitStruct = {};
186188

187189
/** Supply configuration update enable
188190
*/
@@ -230,6 +232,45 @@ WEAK void SystemClock_Config(void)
230232
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
231233
Error_Handler();
232234
}
235+
236+
/** Initializes the peripherals clock
237+
*/
238+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC | RCC_PERIPHCLK_USB;
239+
PeriphClkInitStruct.PLL2.PLL2M = 1;
240+
PeriphClkInitStruct.PLL2.PLL2N = 24;
241+
PeriphClkInitStruct.PLL2.PLL2P = 2;
242+
PeriphClkInitStruct.PLL2.PLL2Q = 2;
243+
PeriphClkInitStruct.PLL2.PLL2R = 4;
244+
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
245+
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
246+
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
247+
PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL2;
248+
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
249+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
250+
Error_Handler();
251+
}
252+
253+
/*Configure the clock recovery system (CRS)**********************************/
254+
255+
/*Enable CRS Clock*/
256+
__HAL_RCC_CRS_CLK_ENABLE();
257+
258+
/* Default Synchro Signal division factor (not divided) */
259+
RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
260+
261+
/* Set the SYNCSRC[1:0] bits according to CRS_Source value */
262+
RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB1;
263+
264+
/* HSI48 is synchronized with USB SOF at 1KHz rate */
265+
RCC_CRSInitStruct.ReloadValue = RCC_CRS_RELOADVALUE_DEFAULT;
266+
RCC_CRSInitStruct.ErrorLimitValue = RCC_CRS_ERRORLIMIT_DEFAULT;
267+
RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
268+
269+
/* Set the TRIM[5:0] to the default value */
270+
RCC_CRSInitStruct.HSI48CalibrationValue = RCC_CRS_HSI48CALIBRATION_DEFAULT;
271+
272+
/* Start automatic synchronization */
273+
HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
233274
}
234275

235276
#ifdef __cplusplus

0 commit comments

Comments
 (0)