Correct PLL Freq from 25 to 8 to fix USB

BennehBoy · fpistm · commit 6df20c5e97d5 · 2019-01-05T20:03:17.000+01:00
diff --git a/variants/DIYMROE_F407VGT/variant.cpp b/variants/DIYMROE_F407VGT/variant.cpp
@@ -184,7 +184,7 @@ WEAK void SystemClock_Config(void)
   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-  RCC_OscInitStruct.PLL.PLLM = 25;
+  RCC_OscInitStruct.PLL.PLLM = 8;
   RCC_OscInitStruct.PLL.PLLN = 336;
   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
   RCC_OscInitStruct.PLL.PLLQ = 7;
