diff --git a/CI/build/arduino-cli.py b/CI/build/arduino-cli.py index d4ec5797bc..9af0f81838 100644 --- a/CI/build/arduino-cli.py +++ b/CI/build/arduino-cli.py @@ -297,16 +297,27 @@ def check_config(): else: cli_config = json.loads(output) if cli_config is not None: - if cli_config["directories"]["data"] is not None: - sketches_path_list.append(Path(cli_config["directories"]["data"])) - else: - print("No data directory") - quit(1) - if cli_config["directories"]["user"] is not None: - sketches_path_list.append(Path(cli_config["directories"]["user"])) + # Since arduino-cli 1.x new level "config" + if "config" in cli_config.keys(): + cli_config = cli_config["config"] + # Since arduino-cli 1.x config init does not create full config + if "directories" in cli_config.keys(): + if "data" in cli_config["directories"].key(): + if cli_config["directories"]["data"] is not None: + sketches_path_list.append( + Path(cli_config["directories"]["data"]) + ) + else: + print("No data directory") + if "user" in cli_config["directories"].key(): + if cli_config["directories"]["user"] is not None: + sketches_path_list.append( + Path(cli_config["directories"]["user"]) + ) + else: + print("No user directory!") else: - print("No user directory!") - quit(1) + print("No directories in config!") # Fill search_path_list to avoid search on the same path sorted_spl = sorted(set(sketches_path_list)) search_path_list = [] @@ -526,7 +537,11 @@ def find_board(): print(e.stdout.decode("utf-8")) quit(e.returncode) else: - fqbn_list_tmp = [board["fqbn"] for board in json.loads(output)] + boards = json.loads(output) + # Since arduino-cli 1.x new level "boards" and is a dict + if type(boards) is dict: + boards = boards["boards"] + fqbn_list_tmp = [board["fqbn"] for board in boards] if not len(fqbn_list_tmp): print(f"No boards found for {arduino_platform}") quit(1) diff --git a/CI/build/conf/cores_config.json b/CI/build/conf/cores_config.json index 00c86968d8..9a0f081e29 100644 --- a/CI/build/conf/cores_config.json +++ b/CI/build/conf/cores_config.json @@ -542,6 +542,8 @@ "GENERIC_G4A1REIX", "GENERIC_G4A1RETX", "GENERIC_H563IIKXQ", + "GENERIC_H563RGTX", + "GENERIC_H563RITX", "GENERIC_H563ZGTX", "GENERIC_H563ZITX", "GENERIC_H723ZETX", @@ -735,6 +737,9 @@ "GENERIC_L412KBTX", "GENERIC_L412KBUX", "GENERIC_L422KBTX", + "GENERIC_L431CBTX", + "GENERIC_L431CBUX", + "GENERIC_L431CCTX", "GENERIC_L431RBIX", "GENERIC_L431RBTX", "GENERIC_L431RBYX", diff --git a/CI/build/conf/cores_config_ci.json b/CI/build/conf/cores_config_ci.json index dfb3b21987..a0299ed2a6 100644 --- a/CI/build/conf/cores_config_ci.json +++ b/CI/build/conf/cores_config_ci.json @@ -542,6 +542,8 @@ "GENERIC_G4A1REIX", "GENERIC_G4A1RETX", "GENERIC_H563IIKXQ", + "GENERIC_H563RGTX", + "GENERIC_H563RITX", "GENERIC_H563ZGTX", "GENERIC_H563ZITX", "GENERIC_H723ZETX", @@ -735,6 +737,9 @@ "GENERIC_L412KBTX", "GENERIC_L412KBUX", "GENERIC_L422KBTX", + "GENERIC_L431CBTX", + "GENERIC_L431CBUX", + "GENERIC_L431CCTX", "GENERIC_L431RBIX", "GENERIC_L431RBTX", "GENERIC_L431RBYX", diff --git a/CI/update/stm32variant.py b/CI/update/stm32variant.py index 85d4ac14de..4a19cea1cc 100644 --- a/CI/update/stm32variant.py +++ b/CI/update/stm32variant.py @@ -2514,7 +2514,14 @@ def manage_repo(): templates_dir = script_path / "templates" mcu_family_dir = "" filtered_family = "" -refname_filter = ["STM32MP13", "STM32H7R", "STM32H7S"] +refname_filter = [ + "STM32H7R", + "STM32H7S", + "STM32MP13", + "STM32MP2", + "STM32U0", + "STM32WB0", +] periph_c_filename = "PeripheralPins.c" pinvar_h_filename = "PinNamesVar.h" config_filename = script_path / "update_config.json" @@ -2640,6 +2647,11 @@ def manage_repo(): if args.family: filtered_family = args.family.upper() + filtered_family = filtered_family.removeprefix("STM32") + while filtered_family.endswith("X"): + filtered_family = filtered_family.rstrip("X") + filtered_family = f"STM32{filtered_family}" + # Get all xml files mcu_list = sorted(dirMCU.glob("STM32*.xml")) @@ -2657,7 +2669,7 @@ def manage_repo(): # Clean temporary dir deleteFolder(tmp_dir) -package_regex = re.compile(r"[\w][\w]([ANPQX])?$") +package_regex = re.compile(r"[\w][\w]([ANPQSXZ])?$") flash_group_regex = re.compile(r"(.*)\((.*)\)(.*)") for mcu_file in mcu_list: @@ -2671,6 +2683,13 @@ def manage_repo(): and filtered_family not in mcu_family or any(skp in mcu_refname for skp in refname_filter) ): + # Add a warning if filtered family is requested + if filtered_family and filtered_family not in refname_filter: + for skp in refname_filter: + if skp == filtered_family: + print(f"Requested family {filtered_family} is filtered!") + print("Please update the refname_filter list.") + quit() xml_mcu.unlink() continue @@ -2736,7 +2755,7 @@ def manage_repo(): update_regex = re.compile(r"defined\(ARDUINO_GENERIC_.+\)") board_entry_regex = re.compile(r"(Gen.+\..+variant=STM32.+xx/)\S+") # P T E -mcu_PE_regex = re.compile(r"([\w])([\w])([ANPQSX])?$") +mcu_PE_regex = re.compile(r"([\w])([\w])([ANPQSXZ])?$") aggregate_dir() # Clean temporary dir diff --git a/README.md b/README.md index 00182db921..02807e6529 100644 --- a/README.md +++ b/README.md @@ -9,7 +9,7 @@ [![GitHub release](https://img.shields.io/github/release/stm32duino/Arduino_Core_STM32.svg)](https://github.com/stm32duino/Arduino_Core_STM32/releases/latest) ![GitHub All Releases](https://img.shields.io/github/downloads/stm32duino/Arduino_Core_STM32/total.svg?label=downloads%20since%201.4.0) -[![GitHub commits since latest release](https://img.shields.io/github/commits-since/stm32duino/Arduino_Core_STM32/latest/main)](https://github.com/stm32duino/Arduino_Core_STM32/compare/2.8.0...main) +[![GitHub commits since latest release](https://img.shields.io/github/commits-since/stm32duino/Arduino_Core_STM32/latest/main)](https://github.com/stm32duino/Arduino_Core_STM32/compare/2.8.1...main) * [Introduction](https://github.com/stm32duino/Arduino_Core_STM32#Introduction)
@@ -20,7 +20,7 @@ ## Introduction -This repo adds the support of STM32 MCU in Arduino IDE.
+This repo adds the support of STM32 MCU in Arduino IDE 2.x.
This porting is based on: * [STM32Cube MCU Packages](https://www.st.com/en/embedded-software/stm32cube-mcu-packages.html) including: @@ -29,17 +29,17 @@ This porting is based on: * CMSIS device definition for STM32 * [CMSIS](https://developer.arm.com/embedded/cmsis): Cortex Microcontroller Software Interface Standard (CMSIS) is a vendor-independent hardware abstraction layer for the Cortex®-M processor series and defines generic tool interfaces. It has been packaged as a module for Arduino IDE: https://github.com/stm32duino/ArduinoModule-CMSIS * [GNU Arm Embedded Toolchain](https://developer.arm.com/open-source/gnu-toolchain/gnu-rm): Arm Embedded GCC compiler, libraries and other GNU tools necessary for bare-metal software development on devices based on the Arm Cortex-M. Packages are provided thanks [The xPack GNU Arm Embedded GCC](https://xpack.github.io/arm-none-eabi-gcc/): https://github.com/xpack-dev-tools/arm-none-eabi-gcc-xpack + ## Getting Started -This repo is available as a package usable with [Arduino Boards Manager](https://www.arduino.cc/en/guide/cores). +This repo is available as a package usable with [Arduino Boards Manager](https://docs.arduino.cc/learn/starting-guide/cores/). Add this link in the "*Additional Boards Managers URLs*" field: https://github.com/stm32duino/BoardManagerFiles/raw/main/package_stmicroelectronics_index.json -**Warning**: -* Default branch has changed to *main*. -* Since core release 2.0.0 this link has changed. +> [!WARNING] +> Since core release 2.8.0, only Arduino IDE 2 is supported. For full instructions on using the "**Boards Manager**", see the [Getting Started](https://github.com/stm32duino/Arduino_Core_STM32/wiki/Getting-Started) page. @@ -86,9 +86,10 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d - [SparkFun boards](#sparkfun-boards) - [ELV Boards](#elv-boards) -**Note about Status**: - - :green_heart: board support is available since the specified release version. - - :yellow_heart: board support is available in the main branch and will be available in the specified release version. +> [!Note] +> - :green_heart: board support is available since the specified release version. +> - :yellow_heart: board support is available in the main branch and will be available in the specified release version. + ### [Nucleo 144](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-nucleo-boards.html) boards @@ -540,10 +541,13 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | Status | Device(s) | Name | Release | Notes | | :----: | :-------: | ---- | :-----: | :---- | +| :green_heart: | STM32H503KB | Generic Board | *2.8.1* | | | :green_heart: | STM32H503RB | Generic Board | *2.7.0* | | | :green_heart: | STM32H563IIKxQ | Generic Board | *2.6.0* | | +| :green_heart: | STM32H563RG
STM32H563RI | Generic Board | *2.8.1* | | | :green_heart: | STM32H563ZG
STM32H563ZI | Generic Board | *2.6.0* | | | :green_heart: | STM32H573IIKxQ | Generic Board | *2.6.0* | | +| :green_heart: | STM32H573RI | Generic Board | *2.8.1* | | | :green_heart: | STM32H573ZI | Generic Board | *2.6.0* | | ### Generic STM32H7 boards @@ -676,6 +680,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | Status | Device(s) | Name | Release | Notes | | :----: | :-------: | ---- | :-----: | :---- | | :green_heart: | STM32L412K8
STM32L412KB
STM32L422KB | Generic Board | *2.0.0* | | +| :green_heart: | STM32L431CB
STM32L431CC | Generic Board | *2.8.1* | | | :green_heart: | STM32L431RB
STM32L431RC | Generic Board | *2.3.0* | | | :green_heart: | STM32L432KB
STM32L432KC
STM32L442KC | Generic Board | *2.0.0* | | | :green_heart: | STM32L433CBT
STM32L433CCT | Generic Board | *2.1.0* | | @@ -771,7 +776,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32F401VE | [STEVAL-3DP001V1](https://www.st.com/en/evaluation-tools/steval-3dp001v1.html) | *1.6.0* | | | :green_heart: | STM32F446RE | [VAkE v1.0](https://www.facebook.com/pages/category/Product-Service/VAkE-Board-2290066274575218/) | *1.6.0* | | | :green_heart: | STM32F446VE | [FYSETC_S6](https://wiki.fysetc.com/FYSETC_S6/) | *1.9.0* | | -| :green_heart: | STM32G0B1CB | [BTT EBB42 CAN V1.1](https://github.com/bigtreetech/EBB/tree/master/EBB%20CAN%20V1.1%20(STM32G0B1)/EBB42%20CAN%20V1.1) | *2.4.0* | | +| :green_heart: | STM32G0B1CB | [BTT EBB42 CAN V1.1](https://github.com/bigtreetech/EBB/tree/master) | *2.4.0* | | ### [Blues](https://blues.com/) boards @@ -823,6 +828,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d | :green_heart: | STM32F072C8
STM32F072CB | [Elektor LoRa Node](https://github.com/ElektorLabs/180516-Elektor_LoRa_Node) | *1.8.0* | [More info](https://www.elektormagazine.com/labs/lorawan-node-experimental-platform) | | :green_heart: | STM32WLE5JC | [LoRa-E5 mini](https://wiki.seeedstudio.com/LoRa_E5_mini/) | *2.6.0* | | | :green_heart: | STM32WLE5CC | [RAK3172 Module](https://github.com/RAKWireless/rakwireless-docs/tree/master/docs/Product-Categories/WisDuo/RAK3172-Module) | *2.6.0* | | +| :green_heart: | STM32WLE5CC | [RAK3172T Module](https://github.com/RAKWireless/rakwireless-docs/tree/master/docs/Product-Categories/WisDuo/RAK3172-Module) | *2.8.1* | RAK3172 Module with TCXO | | :green_heart: | STM32L151CB | [RAK811 LoRa Tracker](https://www.rakwireless.com/en/) | *1.4.0* | [Wiki](https://github.com/stm32duino/Arduino_Core_STM32/wiki/Connectivities#lora) | | :green_heart: | STM32L051C8 | [RHF76-052](https://lora-alliance.org/lora_products/rhf76-052/) | *1.7.0* | Basic support | diff --git a/boards.txt b/boards.txt index 1ac2d92cd2..60cc71bb1a 100644 --- a/boards.txt +++ b/boards.txt @@ -23,11 +23,10 @@ Nucleo_144.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build Nucleo_144.build.flash_offset=0x0 Nucleo_144.upload.maximum_size=0 Nucleo_144.upload.maximum_data_size=0 -Nucleo_144.programmer.default=stlink Nucleo_144.vid.0=0x0483 Nucleo_144.pid.0=0x5740 -Nucleo_144.vid.1=0x0483 # STlink V1/V2.1/V3 +Nucleo_144.vid.1=0x0483 Nucleo_144.pid.1=0x3744 Nucleo_144.vid.2=0x0483 Nucleo_144.pid.2=0x3748 @@ -395,10 +394,10 @@ Nucleo_64.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build. Nucleo_64.build.flash_offset=0x0 Nucleo_64.upload.maximum_size=0 Nucleo_64.upload.maximum_data_size=0 -Nucleo_64.programmer.default=stlink Nucleo_64.vid.0=0x0483 Nucleo_64.pid.0=0x5740 # STlink V1/V2.1/V3 +Nucleo_64.vid.1=0x0483 Nucleo_64.pid.1=0x3744 Nucleo_64.vid.2=0x0483 Nucleo_64.pid.2=0x3748 @@ -875,10 +874,10 @@ Nucleo_32.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build. Nucleo_32.build.flash_offset=0x0 Nucleo_32.upload.maximum_size=0 Nucleo_32.upload.maximum_data_size=0 -Nucleo_32.programmer.default=stlink Nucleo_32.vid.0=0x0483 Nucleo_32.pid.0=0x5740 # STlink V1/V2.1/V3 +Nucleo_32.vid.1=0x0483 Nucleo_32.pid.1=0x3744 Nucleo_32.vid.2=0x0483 Nucleo_32.pid.2=0x3748 @@ -1038,10 +1037,10 @@ Disco.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSer Disco.build.flash_offset=0x0 Disco.upload.maximum_size=0 Disco.upload.maximum_data_size=0 -Disco.programmer.default=stlink Disco.vid.0=0x0483 Disco.pid.0=0x5740 # STlink V1/V2.1/V3 +Disco.vid.1=0x0483 Disco.pid.1=0x3744 Disco.vid.2=0x0483 Disco.pid.2=0x3748 @@ -1359,10 +1358,10 @@ Eval.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSeri Eval.build.flash_offset=0x0 Eval.upload.maximum_size=0 Eval.upload.maximum_data_size=0 -Eval.programmer.default=stlink Eval.vid.0=0x0483 Eval.pid.0=0x5740 # STlink V1/V2.1/V3 +Eval.vid.1=0x0483 Eval.pid.1=0x3744 Eval.vid.2=0x0483 Eval.pid.2=0x3748 @@ -1425,9 +1424,6 @@ STM32MP1.name=STM32MP1 series coprocessor STM32MP1.build.flash_offset=0x0 STM32MP1.upload.maximum_size=0 STM32MP1.upload.maximum_data_size=0 -STM32MP1.programmer.default=stlink -STM32MP1.vid.0=0x0483 -STM32MP1.pid.0=0x5740 STM32MP1.build.core=arduino STM32MP1.build.board=STM32MP1 @@ -1474,10 +1470,7 @@ GenC0.build.st_extra_flags=-D{build.product_line} {build.xSerial} -D__CORTEX_SC= GenC0.build.flash_offset=0x0 GenC0.upload.maximum_size=0 GenC0.upload.maximum_data_size=0 -GenC0.programmer.default=stlink GenC0.debug.server.openocd.scripts.2=target/stm32c0x.cfg -GenC0.vid.0=0x0483 -GenC0.pid.0=0x5740 # Generic C011D6Yx GenC0.menu.pnum.GENERIC_C011D6YX=Generic C011D6Yx @@ -1619,7 +1612,6 @@ GenF0.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSer GenF0.build.flash_offset=0x0 GenF0.upload.maximum_size=0 GenF0.upload.maximum_data_size=0 -GenF0.programmer.default=stlink GenF0.debug.server.openocd.scripts.2=target/stm32f0x.cfg GenF0.vid.0=0x0483 GenF0.pid.0=0x5740 @@ -2528,12 +2520,11 @@ GenF1.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSer GenF1.build.flash_offset=0x0 GenF1.upload.maximum_size=0 GenF1.upload.maximum_data_size=0 -GenF1.programmer.default=stlink GenF1.debug.server.openocd.scripts.2=target/stm32f1x.cfg GenF1.vid.0=0x0483 GenF1.pid.0=0x5740 # DFU mode on built-in bootloader not available, assuming using STM32duino-bootloader -GenF1.upload.vid.0=0xleaf +GenF1.upload.vid.0=0x1eaf GenF1.upload.pid.0=0x0003 # BLUEPILL_F103C6 board @@ -3373,7 +3364,6 @@ GenF2.build.series=STM32F2xx GenF2.build.flash_offset=0x0 GenF2.upload.maximum_size=0 GenF2.upload.maximum_data_size=0 -GenF2.programmer.default=stlink GenF2.debug.server.openocd.scripts.2=target/stm32f2x.cfg GenF2.vid.0=0x0483 GenF2.pid.0=0x5740 @@ -3832,7 +3822,6 @@ GenF3.build.series=STM32F3xx GenF3.build.flash_offset=0x0 GenF3.upload.maximum_size=0 GenF3.upload.maximum_data_size=0 -GenF3.programmer.default=stlink GenF3.debug.server.openocd.scripts.2=target/stm32f3x.cfg GenF3.vid.0=0x0483 GenF3.pid.0=0x5740 @@ -4288,7 +4277,6 @@ GenF4.build.series=STM32F4xx GenF4.build.flash_offset=0x0 GenF4.upload.maximum_size=0 GenF4.upload.maximum_data_size=0 -GenF4.programmer.default=stlink GenF4.debug.server.openocd.scripts.2=target/stm32f4x.cfg GenF4.vid.0=0x0483 GenF4.pid.0=0x5740 @@ -5304,7 +5292,6 @@ GenF7.build.series=STM32F7xx GenF7.build.flash_offset=0x0 GenF7.upload.maximum_size=0 GenF7.upload.maximum_data_size=0 -GenF7.programmer.default=stlink GenF7.debug.server.openocd.scripts.2=target/stm32f7x.cfg GenF7.vid.0=0x0483 GenF7.pid.0=0x5740 @@ -5832,7 +5819,6 @@ GenG0.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSer GenG0.build.flash_offset=0x0 GenG0.upload.maximum_size=0 GenG0.upload.maximum_data_size=0 -GenG0.programmer.default=stlink GenG0.debug.server.openocd.scripts.2=target/stm32g0x.cfg GenG0.vid.0=0x0483 GenG0.pid.0=0x5740 @@ -7246,7 +7232,6 @@ GenG4.build.series=STM32G4xx GenG4.build.flash_offset=0x0 GenG4.upload.maximum_size=0 GenG4.upload.maximum_data_size=0 -GenG4.programmer.default=stlink GenG4.debug.server.openocd.scripts.2=target/stm32g4x.cfg GenG4.vid.0=0x0483 GenG4.pid.0=0x5740 @@ -8415,12 +8400,20 @@ GenH5.build.series=STM32H5xx GenH5.build.flash_offset=0x0 GenH5.upload.maximum_size=0 GenH5.upload.maximum_data_size=0 -GenH5.programmer.default=stlink # Current openocd version does not support H5 # GenH5.debug.server.openocd.scripts.2=target/stm32h5x.cfg GenH5.vid.0=0x0483 GenH5.pid.0=0x5740 +# Generic H503KBUx +GenH5.menu.pnum.GENERIC_H503KBUX=Generic H503KBUx +GenH5.menu.pnum.GENERIC_H503KBUX.upload.maximum_size=131072 +GenH5.menu.pnum.GENERIC_H503KBUX.upload.maximum_data_size=32768 +GenH5.menu.pnum.GENERIC_H503KBUX.build.board=GENERIC_H503KBUX +GenH5.menu.pnum.GENERIC_H503KBUX.build.product_line=STM32H503xx +GenH5.menu.pnum.GENERIC_H503KBUX.build.variant=STM32H5xx/H503KBU +GenH5.menu.pnum.GENERIC_H503KBUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H503.svd + # Generic H503RBTx GenH5.menu.pnum.GENERIC_H503RBTX=Generic H503RBTx GenH5.menu.pnum.GENERIC_H503RBTX.upload.maximum_size=131072 @@ -8439,6 +8432,24 @@ GenH5.menu.pnum.GENERIC_H563IIKXQ.build.product_line=STM32H563xx GenH5.menu.pnum.GENERIC_H563IIKXQ.build.variant=STM32H5xx/H563IIKxQ_H573IIKxQ GenH5.menu.pnum.GENERIC_H563IIKXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H563.svd +# Generic H563RGTx +GenH5.menu.pnum.GENERIC_H563RGTX=Generic H563RGTx +GenH5.menu.pnum.GENERIC_H563RGTX.upload.maximum_size=1048576 +GenH5.menu.pnum.GENERIC_H563RGTX.upload.maximum_data_size=655360 +GenH5.menu.pnum.GENERIC_H563RGTX.build.board=GENERIC_H563RGTX +GenH5.menu.pnum.GENERIC_H563RGTX.build.product_line=STM32H563xx +GenH5.menu.pnum.GENERIC_H563RGTX.build.variant=STM32H5xx/H563R(G-I)T_H573RIT +GenH5.menu.pnum.GENERIC_H563RGTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H563.svd + +# Generic H563RITx +GenH5.menu.pnum.GENERIC_H563RITX=Generic H563RITx +GenH5.menu.pnum.GENERIC_H563RITX.upload.maximum_size=2097152 +GenH5.menu.pnum.GENERIC_H563RITX.upload.maximum_data_size=655360 +GenH5.menu.pnum.GENERIC_H563RITX.build.board=GENERIC_H563RITX +GenH5.menu.pnum.GENERIC_H563RITX.build.product_line=STM32H563xx +GenH5.menu.pnum.GENERIC_H563RITX.build.variant=STM32H5xx/H563R(G-I)T_H573RIT +GenH5.menu.pnum.GENERIC_H563RITX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H563.svd + # Generic H563ZGTx GenH5.menu.pnum.GENERIC_H563ZGTX=Generic H563ZGTx GenH5.menu.pnum.GENERIC_H563ZGTX.upload.maximum_size=1048576 @@ -8466,6 +8477,15 @@ GenH5.menu.pnum.GENERIC_H573IIKXQ.build.product_line=STM32H573xx GenH5.menu.pnum.GENERIC_H573IIKXQ.build.variant=STM32H5xx/H563IIKxQ_H573IIKxQ GenH5.menu.pnum.GENERIC_H573IIKXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H573.svd +# Generic H573RITx +GenH5.menu.pnum.GENERIC_H573RITX=Generic H573RITx +GenH5.menu.pnum.GENERIC_H573RITX.upload.maximum_size=2097152 +GenH5.menu.pnum.GENERIC_H573RITX.upload.maximum_data_size=655360 +GenH5.menu.pnum.GENERIC_H573RITX.build.board=GENERIC_H573RITX +GenH5.menu.pnum.GENERIC_H573RITX.build.product_line=STM32H573xx +GenH5.menu.pnum.GENERIC_H573RITX.build.variant=STM32H5xx/H563R(G-I)T_H573RIT +GenH5.menu.pnum.GENERIC_H573RITX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H5xx/STM32H573.svd + # Generic H573ZITx GenH5.menu.pnum.GENERIC_H573ZITX=Generic H573ZITx GenH5.menu.pnum.GENERIC_H573ZITX.upload.maximum_size=2097152 @@ -8505,7 +8525,6 @@ GenH7.build.mcu=cortex-m7 GenH7.build.flash_offset=0x0 GenH7.upload.maximum_size=0 GenH7.upload.maximum_data_size=0 -GenH7.programmer.default=stlink GenH7.debug.server.openocd.scripts.2=target/stm32h7x.cfg GenH7.vid.0=0x0483 GenH7.pid.0=0x5740 @@ -9140,7 +9159,6 @@ GenL0.build.series=STM32L0xx GenL0.build.flash_offset=0x0 GenL0.upload.maximum_size=0 GenL0.upload.maximum_data_size=0 -GenL0.programmer.default=stlink GenL0.debug.server.openocd.scripts.2=target/stm32l0x.cfg GenL0.vid.0=0x0483 GenL0.pid.0=0x5740 @@ -10423,7 +10441,6 @@ GenL1.build.series=STM32L1xx GenL1.build.flash_offset=0x0 GenL1.upload.maximum_size=0 GenL1.upload.maximum_data_size=0 -GenL1.programmer.default=stlink GenL1.debug.server.openocd.scripts.2=target/stm32l1x.cfg GenL1.vid.0=0x0483 GenL1.pid.0=0x5740 @@ -10746,7 +10763,6 @@ GenL4.build.series=STM32L4xx GenL4.build.flash_offset=0x0 GenL4.upload.maximum_size=0 GenL4.upload.maximum_data_size=0 -GenL4.programmer.default=stlink GenL4.debug.server.openocd.scripts.2=target/stm32l4x.cfg GenL4.vid.0=0x0483 GenL4.pid.0=0x5740 @@ -10815,6 +10831,42 @@ GenL4.menu.pnum.GENERIC_L422KBUX.build.product_line=STM32L422xx GenL4.menu.pnum.GENERIC_L422KBUX.build.variant=STM32L4xx/L412K(8-B)(T-U)_L422KB(T-U) GenL4.menu.pnum.GENERIC_L422KBUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L4x2.svd +# Generic L431CBTx +GenL4.menu.pnum.GENERIC_L431CBTX=Generic L431CBTx +GenL4.menu.pnum.GENERIC_L431CBTX.upload.maximum_size=131072 +GenL4.menu.pnum.GENERIC_L431CBTX.upload.maximum_data_size=65536 +GenL4.menu.pnum.GENERIC_L431CBTX.build.board=GENERIC_L431CBTX +GenL4.menu.pnum.GENERIC_L431CBTX.build.product_line=STM32L431xx +GenL4.menu.pnum.GENERIC_L431CBTX.build.variant=STM32L4xx/L431C(B-C)(T-U) +GenL4.menu.pnum.GENERIC_L431CBTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L4x1.svd + +# Generic L431CBUx +GenL4.menu.pnum.GENERIC_L431CBUX=Generic L431CBUx +GenL4.menu.pnum.GENERIC_L431CBUX.upload.maximum_size=131072 +GenL4.menu.pnum.GENERIC_L431CBUX.upload.maximum_data_size=65536 +GenL4.menu.pnum.GENERIC_L431CBUX.build.board=GENERIC_L431CBUX +GenL4.menu.pnum.GENERIC_L431CBUX.build.product_line=STM32L431xx +GenL4.menu.pnum.GENERIC_L431CBUX.build.variant=STM32L4xx/L431C(B-C)(T-U) +GenL4.menu.pnum.GENERIC_L431CBUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L4x1.svd + +# Generic L431CCTx +GenL4.menu.pnum.GENERIC_L431CCTX=Generic L431CCTx +GenL4.menu.pnum.GENERIC_L431CCTX.upload.maximum_size=262144 +GenL4.menu.pnum.GENERIC_L431CCTX.upload.maximum_data_size=65536 +GenL4.menu.pnum.GENERIC_L431CCTX.build.board=GENERIC_L431CCTX +GenL4.menu.pnum.GENERIC_L431CCTX.build.product_line=STM32L431xx +GenL4.menu.pnum.GENERIC_L431CCTX.build.variant=STM32L4xx/L431C(B-C)(T-U) +GenL4.menu.pnum.GENERIC_L431CCTX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L4x1.svd + +# Generic L431CCUx +GenL4.menu.pnum.GENERIC_L431CCUX=Generic L431CCUx +GenL4.menu.pnum.GENERIC_L431CCUX.upload.maximum_size=262144 +GenL4.menu.pnum.GENERIC_L431CCUX.upload.maximum_data_size=65536 +GenL4.menu.pnum.GENERIC_L431CCUX.build.board=GENERIC_L431CCUX +GenL4.menu.pnum.GENERIC_L431CCUX.build.product_line=STM32L431xx +GenL4.menu.pnum.GENERIC_L431CCUX.build.variant=STM32L4xx/L431C(B-C)(T-U) +GenL4.menu.pnum.GENERIC_L431CCUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L4x1.svd + # Generic L431RBIx GenL4.menu.pnum.GENERIC_L431RBIX=Generic L431RBIx GenL4.menu.pnum.GENERIC_L431RBIX.upload.maximum_size=131072 @@ -11511,7 +11563,6 @@ GenL5.build.series=STM32L5xx GenL5.build.flash_offset=0x0 GenL5.upload.maximum_size=0 GenL5.upload.maximum_data_size=0 -GenL5.programmer.default=stlink GenL5.debug.server.openocd.scripts.2=target/stm32l5x.cfg GenL5.vid.0=0x0483 GenL5.pid.0=0x5740 @@ -11573,7 +11624,6 @@ GenU5.build.series=STM32U5xx GenU5.build.flash_offset=0x0 GenU5.upload.maximum_size=0 GenU5.upload.maximum_data_size=0 -GenU5.programmer.default=stlink GenU5.debug.server.openocd.scripts.2=target/stm32u5x.cfg GenU5.vid.0=0x0483 GenU5.pid.0=0x5740 @@ -11698,7 +11748,6 @@ GenWB.build.series=STM32WBxx GenWB.build.flash_offset=0x0 GenWB.upload.maximum_size=0 GenWB.upload.maximum_data_size=0 -GenWB.programmer.default=stlink GenWB.debug.server.openocd.scripts.2=target/stm32wbx.cfg GenWB.vid.0=0x0483 GenWB.pid.0=0x5740 @@ -11805,10 +11854,7 @@ GenWBA.build.series=STM32WBAxx GenWBA.build.flash_offset=0x0 GenWBA.upload.maximum_size=0 GenWBA.upload.maximum_data_size=0 -GenWBA.programmer.default=stlink GenWBA.debug.server.openocd.scripts.2=target/stm32wbax.cfg -GenWBA.vid.0=0x0483 -GenWBA.pid.0=0x5740 # Generic WBA55CEUx GenWBA.menu.pnum.GENERIC_WBA55CEUX=Generic WBA55CEUx @@ -11853,10 +11899,7 @@ GenWL.build.series=STM32WLxx GenWL.build.flash_offset=0x0 GenWL.upload.maximum_size=0 GenWL.upload.maximum_data_size=0 -GenWL.programmer.default=stlink GenWL.debug.server.openocd.scripts.2=target/stm32wlx.cfg -GenWL.vid.0=0x0483 -GenWL.pid.0=0x5740 # Generic WL54CCUx GenWL.menu.pnum.GENERIC_WL54CCUX=Generic WL54CCUx @@ -12030,7 +12073,6 @@ GenWL.menu.upload_method.dfuMethod.upload.tool=stm32CubeProg 3dprinter.build.flash_offset=0x0 3dprinter.upload.maximum_size=0 3dprinter.upload.maximum_data_size=0 -3dprinter.programmer.default=stlink 3dprinter.vid.0=0x0483 3dprinter.pid.0=0x5740 @@ -12262,7 +12304,6 @@ Blues.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSer Blues.build.flash_offset=0x0 Blues.upload.maximum_size=0 Blues.upload.maximum_data_size=0 -Blues.programmer.default=stlink Blues.vid.0=0x30A4 # Swan R5 board @@ -12325,7 +12366,6 @@ Elecgator.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build. Elecgator.build.flash_offset=0x0 Elecgator.upload.maximum_size=0 Elecgator.upload.maximum_data_size=0 -Elecgator.programmer.default=stlink Elecgator.vid.0=0x0483 Elecgator.pid.0=0x5740 @@ -12367,7 +12407,6 @@ ESC_board.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build. ESC_board.build.flash_offset=0x0 ESC_board.upload.maximum_size=0 ESC_board.upload.maximum_data_size=0 -ESC_board.programmer.default=stlink ESC_board.vid.0=0x0483 ESC_board.pid.0=0x5740 @@ -12425,7 +12464,6 @@ Garatronic.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build Garatronic.build.flash_offset=0x0 Garatronic.upload.maximum_size=0 Garatronic.upload.maximum_data_size=0 -Garatronic.programmer.default=stlink Garatronic.vid.0=0x0483 Garatronic.pid.0=0x5740 @@ -12505,7 +12543,6 @@ GenFlight.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build. GenFlight.build.flash_offset=0x0 GenFlight.upload.maximum_size=0 GenFlight.upload.maximum_data_size=0 -GenFlight.programmer.default=stlink GenFlight.vid.0=0x0483 GenFlight.pid.0=0x5740 @@ -12519,7 +12556,7 @@ GenFlight.menu.pnum.AFROFLIGHT_F103CB.build.board=AFROFLIGHT_F103CB GenFlight.menu.pnum.AFROFLIGHT_F103CB.build.product_line=STM32F103xB GenFlight.menu.pnum.AFROFLIGHT_F103CB.build.variant=STM32F1xx/F103C8T_F103CB(T-U) GenFlight.menu.pnum.AFROFLIGHT_F103CB.build.variant_h=variant_AFROFLIGHT_F103CB_XX.h -GenFlight.menu.pnum.AFROFLIGHT_F103CB.upload.vid.0=0xleaf +GenFlight.menu.pnum.AFROFLIGHT_F103CB.upload.vid.0=0x1eaf GenFlight.menu.pnum.AFROFLIGHT_F103CB.upload.pid.0=0x0003 GenFlight.menu.pnum.AFROFLIGHT_F103CB.debug.server.openocd.scripts.2=target/stm32f1x.cfg GenFlight.menu.pnum.AFROFLIGHT_F103CB.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F1xx/STM32F103.svd @@ -12533,7 +12570,7 @@ GenFlight.menu.pnum.AFROFLIGHT_F103CB_12M.build.board=AFROFLIGHT_F103CB_12M GenFlight.menu.pnum.AFROFLIGHT_F103CB_12M.build.product_line=STM32F103xB GenFlight.menu.pnum.AFROFLIGHT_F103CB_12M.build.variant=STM32F1xx/F103C8T_F103CB(T-U) GenFlight.menu.pnum.AFROFLIGHT_F103CB_12M.build.variant_h=variant_AFROFLIGHT_F103CB_XX.h -GenFlight.menu.pnum.AFROFLIGHT_F103CB_12M.upload.vid.0=0xleaf +GenFlight.menu.pnum.AFROFLIGHT_F103CB_12M.upload.vid.0=0x1eaf GenFlight.menu.pnum.AFROFLIGHT_F103CB_12M.upload.pid.0=0x0003 GenFlight.menu.pnum.AFROFLIGHT_F103CB_12M.debug.server.openocd.scripts.2=target/stm32f1x.cfg GenFlight.menu.pnum.AFROFLIGHT_F103CB_12M.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F1xx/STM32F103.svd @@ -12605,9 +12642,6 @@ IotContinuum.build.st_extra_flags=-D{build.product_line} {build.xSerial} IotContinuum.build.flash_offset=0x0 IotContinuum.upload.maximum_size=0 IotContinuum.upload.maximum_data_size=0 -IotContinuum.programmer.default=stlink -IotContinuum.vid.0=0x0483 -IotContinuum.pid.0=0x5740 # IoT continuum Dev Kit Board IotContinuum.menu.pnum.DEVKIT_IOT_CONTINUUM=IoT continuum Dev Kit @@ -12651,7 +12685,6 @@ LoRa.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSeri LoRa.build.flash_offset=0x0 LoRa.upload.maximum_size=0 LoRa.upload.maximum_data_size=0 -LoRa.programmer.default=stlink LoRa.vid.0=0x0483 LoRa.pid.0=0x5740 @@ -12710,6 +12743,19 @@ LoRa.menu.pnum.RAK3172_MODULE.build.variant_h=variant_RAK3172_MODULE.h LoRa.menu.pnum.RAK3172_MODULE.debug.server.openocd.scripts.2=target/stm32wlx.cfg LoRa.menu.pnum.RAK3172_MODULE.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WLxx/STM32WLE5_CM4.svd +# RAK3172T module +LoRa.menu.pnum.RAK3172T_MODULE=RAK3172T Module +LoRa.menu.pnum.RAK3172T_MODULE.upload.maximum_size=262144 +LoRa.menu.pnum.RAK3172T_MODULE.upload.maximum_data_size=65536 +LoRa.menu.pnum.RAK3172T_MODULE.build.mcu=cortex-m4 +LoRa.menu.pnum.RAK3172T_MODULE.build.board=RAK3172T_MODULE +LoRa.menu.pnum.RAK3172T_MODULE.build.series=STM32WLxx +LoRa.menu.pnum.RAK3172T_MODULE.build.product_line=STM32WLE5xx +LoRa.menu.pnum.RAK3172T_MODULE.build.variant=STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U +LoRa.menu.pnum.RAK3172T_MODULE.build.variant_h=variant_RAK3172_MODULE.h +LoRa.menu.pnum.RAK3172T_MODULE.debug.server.openocd.scripts.2=target/stm32wlx.cfg +LoRa.menu.pnum.RAK3172T_MODULE.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WLxx/STM32WLE5_CM4.svd + # RAK811_TRACKER board LoRa.menu.pnum.RAK811_TRACKER=RAK811 LoRa Tracker (16kb RAM) LoRa.menu.pnum.RAK811_TRACKER.upload.maximum_size=131072 @@ -12807,7 +12853,6 @@ Midatronics.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {buil Midatronics.build.flash_offset=0x0 Midatronics.upload.maximum_size=0 Midatronics.upload.maximum_data_size=0 -Midatronics.programmer.default=stlink Midatronics.vid.0=0x0483 Midatronics.pid.0=0x5740 @@ -12858,7 +12903,6 @@ SparkFun.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.x SparkFun.build.flash_offset=0x0 SparkFun.upload.maximum_size=0 SparkFun.upload.maximum_data_size=0 -SparkFun.programmer.default=stlink SparkFun.vid.0=0x0483 SparkFun.pid.0=0x5740 @@ -12904,7 +12948,7 @@ SparkFun.menu.upload_method.swdMethod.upload.options= SparkFun.menu.upload_method.swdMethod.upload.tool=stm32CubeProg SparkFun.menu.upload_method.serialMethod=STM32CubeProgrammer (Serial) -SparkFun.menu.upload_method.serialMethod.upload.protocol={serial.port.file} +SparkFun.menu.upload_method.serialMethod.upload.protocol=serial SparkFun.menu.upload_method.serialMethod.upload.options=-c {serial.port.file} SparkFun.menu.upload_method.serialMethod.upload.tool=stm32CubeProg @@ -12922,9 +12966,6 @@ ELV_Modular_System.build.board=ELV_Modular_System ELV_Modular_System.build.variant_h=variant_{build.board}.h ELV_Modular_System.upload.maximum_size=0 ELV_Modular_System.upload.maximum_data_size=0 -ELV_Modular_System.programmer.default=stlink -ELV_Modular_System.vid.0=0x0483 -ELV_Modular_System.pid.0=0x5740 # ELV-BM-TRX1 board ELV_Modular_System.menu.pnum.ELV_BM_TRX1=ELV-LW-Base ELV_BM_TRX1 @@ -12943,12 +12984,13 @@ ELV_Modular_System.menu.pnum.ELV_BM_TRX1.debug.svd_file={runtime.tools.STM32_SVD # Upload menu ELV_Modular_System.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD) with Bootloader -ELV_Modular_System.menu.upload_method.swdMethod.upload.protocol=0 +ELV_Modular_System.menu.upload_method.swdMethod.upload.protocol=swd +ELV_Modular_System.menu.upload_method.swdMethod.upload.options= ELV_Modular_System.menu.upload_method.swdMethod.upload.tool=stm32CubeProg ELV_Modular_System.menu.upload_method.serialMethod=STM32CubeProgrammer (Serial) with Bootloader -ELV_Modular_System.menu.upload_method.serialMethod.upload.protocol=1 -ELV_Modular_System.menu.upload_method.serialMethod.upload.options={serial.port.file} +ELV_Modular_System.menu.upload_method.serialMethod.upload.protocol=serial +ELV_Modular_System.menu.upload_method.serialMethod.upload.options=-c {serial.port.file} ELV_Modular_System.menu.upload_method.serialMethod.upload.tool=stm32CubeProg ################################################################################ diff --git a/cmake/boards_db.cmake b/cmake/boards_db.cmake index f7dd909ed8..266ac7a225 100644 --- a/cmake/boards_db.cmake +++ b/cmake/boards_db.cmake @@ -72846,6 +72846,88 @@ target_compile_options(GENERIC_G4A1VETX_xusb_HSFS INTERFACE "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" ) +# GENERIC_H503KBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_H503KBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H5xx/H503KBU") +set(GENERIC_H503KBUX_MAXSIZE 131072) +set(GENERIC_H503KBUX_MAXDATASIZE 32768) +set(GENERIC_H503KBUX_MCU cortex-m33) +set(GENERIC_H503KBUX_FPCONF "-") +add_library(GENERIC_H503KBUX INTERFACE) +target_compile_options(GENERIC_H503KBUX INTERFACE + "SHELL:-DSTM32H503xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H503KBUX_MCU} +) +target_compile_definitions(GENERIC_H503KBUX INTERFACE + "STM32H5xx" + "ARDUINO_GENERIC_H503KBUX" + "BOARD_NAME=\"GENERIC_H503KBUX\"" + "BOARD_ID=GENERIC_H503KBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H503KBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H5xx/Source/Templates/gcc/ + ${GENERIC_H503KBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_H503KBUX INTERFACE + "LINKER:--default-script=${GENERIC_H503KBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=32768" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H503KBUX_MCU} +) + +add_library(GENERIC_H503KBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H503KBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H503KBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_H503KBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H503KBUX_serial_none INTERFACE) +target_compile_options(GENERIC_H503KBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H503KBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H503KBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H503KBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H503KBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H503KBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_H503KBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H503KBUX_usb_none INTERFACE) +target_compile_options(GENERIC_H503KBUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H503KBUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H503KBUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H503KBUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H503KBUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H503KBUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H503KBUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + # GENERIC_H503RBTX # ----------------------------------------------------------------------------- @@ -73010,6 +73092,170 @@ target_compile_options(GENERIC_H563IIKXQ_xusb_HSFS INTERFACE "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" ) +# GENERIC_H563RGTX +# ----------------------------------------------------------------------------- + +set(GENERIC_H563RGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H5xx/H563R(G-I)T_H573RIT") +set(GENERIC_H563RGTX_MAXSIZE 1048576) +set(GENERIC_H563RGTX_MAXDATASIZE 655360) +set(GENERIC_H563RGTX_MCU cortex-m33) +set(GENERIC_H563RGTX_FPCONF "-") +add_library(GENERIC_H563RGTX INTERFACE) +target_compile_options(GENERIC_H563RGTX INTERFACE + "SHELL:-DSTM32H563xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H563RGTX_MCU} +) +target_compile_definitions(GENERIC_H563RGTX INTERFACE + "STM32H5xx" + "ARDUINO_GENERIC_H563RGTX" + "BOARD_NAME=\"GENERIC_H563RGTX\"" + "BOARD_ID=GENERIC_H563RGTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H563RGTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H5xx/Source/Templates/gcc/ + ${GENERIC_H563RGTX_VARIANT_PATH} +) + +target_link_options(GENERIC_H563RGTX INTERFACE + "LINKER:--default-script=${GENERIC_H563RGTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=1048576" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H563RGTX_MCU} +) + +add_library(GENERIC_H563RGTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H563RGTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H563RGTX_serial_generic INTERFACE) +target_compile_options(GENERIC_H563RGTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H563RGTX_serial_none INTERFACE) +target_compile_options(GENERIC_H563RGTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H563RGTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H563RGTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H563RGTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H563RGTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H563RGTX_usb_HID INTERFACE) +target_compile_options(GENERIC_H563RGTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H563RGTX_usb_none INTERFACE) +target_compile_options(GENERIC_H563RGTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H563RGTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H563RGTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H563RGTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H563RGTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H563RGTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H563RGTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_H563RITX +# ----------------------------------------------------------------------------- + +set(GENERIC_H563RITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H5xx/H563R(G-I)T_H573RIT") +set(GENERIC_H563RITX_MAXSIZE 2097152) +set(GENERIC_H563RITX_MAXDATASIZE 655360) +set(GENERIC_H563RITX_MCU cortex-m33) +set(GENERIC_H563RITX_FPCONF "-") +add_library(GENERIC_H563RITX INTERFACE) +target_compile_options(GENERIC_H563RITX INTERFACE + "SHELL:-DSTM32H563xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H563RITX_MCU} +) +target_compile_definitions(GENERIC_H563RITX INTERFACE + "STM32H5xx" + "ARDUINO_GENERIC_H563RITX" + "BOARD_NAME=\"GENERIC_H563RITX\"" + "BOARD_ID=GENERIC_H563RITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H563RITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H5xx/Source/Templates/gcc/ + ${GENERIC_H563RITX_VARIANT_PATH} +) + +target_link_options(GENERIC_H563RITX INTERFACE + "LINKER:--default-script=${GENERIC_H563RITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H563RITX_MCU} +) + +add_library(GENERIC_H563RITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H563RITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H563RITX_serial_generic INTERFACE) +target_compile_options(GENERIC_H563RITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H563RITX_serial_none INTERFACE) +target_compile_options(GENERIC_H563RITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H563RITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H563RITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H563RITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H563RITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H563RITX_usb_HID INTERFACE) +target_compile_options(GENERIC_H563RITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H563RITX_usb_none INTERFACE) +target_compile_options(GENERIC_H563RITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H563RITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H563RITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H563RITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H563RITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H563RITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H563RITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + # GENERIC_H563ZGTX # ----------------------------------------------------------------------------- @@ -73256,6 +73502,88 @@ target_compile_options(GENERIC_H573IIKXQ_xusb_HSFS INTERFACE "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" ) +# GENERIC_H573RITX +# ----------------------------------------------------------------------------- + +set(GENERIC_H573RITX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H5xx/H563R(G-I)T_H573RIT") +set(GENERIC_H573RITX_MAXSIZE 2097152) +set(GENERIC_H573RITX_MAXDATASIZE 655360) +set(GENERIC_H573RITX_MCU cortex-m33) +set(GENERIC_H573RITX_FPCONF "-") +add_library(GENERIC_H573RITX INTERFACE) +target_compile_options(GENERIC_H573RITX INTERFACE + "SHELL:-DSTM32H573xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H573RITX_MCU} +) +target_compile_definitions(GENERIC_H573RITX INTERFACE + "STM32H5xx" + "ARDUINO_GENERIC_H573RITX" + "BOARD_NAME=\"GENERIC_H573RITX\"" + "BOARD_ID=GENERIC_H573RITX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_H573RITX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H5xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H5xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H5xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H5xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H5xx/Source/Templates/gcc/ + ${GENERIC_H573RITX_VARIANT_PATH} +) + +target_link_options(GENERIC_H573RITX INTERFACE + "LINKER:--default-script=${GENERIC_H573RITX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=2097152" + "LINKER:--defsym=LD_MAX_DATA_SIZE=655360" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_H573RITX_MCU} +) + +add_library(GENERIC_H573RITX_serial_disabled INTERFACE) +target_compile_options(GENERIC_H573RITX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_H573RITX_serial_generic INTERFACE) +target_compile_options(GENERIC_H573RITX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_H573RITX_serial_none INTERFACE) +target_compile_options(GENERIC_H573RITX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_H573RITX_usb_CDC INTERFACE) +target_compile_options(GENERIC_H573RITX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_H573RITX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_H573RITX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_H573RITX_usb_HID INTERFACE) +target_compile_options(GENERIC_H573RITX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_H573RITX_usb_none INTERFACE) +target_compile_options(GENERIC_H573RITX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_H573RITX_xusb_FS INTERFACE) +target_compile_options(GENERIC_H573RITX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_H573RITX_xusb_HS INTERFACE) +target_compile_options(GENERIC_H573RITX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_H573RITX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_H573RITX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + # GENERIC_H573ZITX # ----------------------------------------------------------------------------- @@ -90346,6 +90674,334 @@ target_compile_options(GENERIC_L422KBUX_xusb_HSFS INTERFACE "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" ) +# GENERIC_L431CBTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L431CBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L431C(B-C)(T-U)") +set(GENERIC_L431CBTX_MAXSIZE 131072) +set(GENERIC_L431CBTX_MAXDATASIZE 65536) +set(GENERIC_L431CBTX_MCU cortex-m4) +set(GENERIC_L431CBTX_FPCONF "-") +add_library(GENERIC_L431CBTX INTERFACE) +target_compile_options(GENERIC_L431CBTX INTERFACE + "SHELL:-DSTM32L431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431CBTX_MCU} +) +target_compile_definitions(GENERIC_L431CBTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L431CBTX" + "BOARD_NAME=\"GENERIC_L431CBTX\"" + "BOARD_ID=GENERIC_L431CBTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L431CBTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L431CBTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L431CBTX INTERFACE + "LINKER:--default-script=${GENERIC_L431CBTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431CBTX_MCU} +) + +add_library(GENERIC_L431CBTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L431CBTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L431CBTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L431CBTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L431CBTX_serial_none INTERFACE) +target_compile_options(GENERIC_L431CBTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L431CBTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L431CBTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L431CBTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L431CBTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L431CBTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L431CBTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L431CBTX_usb_none INTERFACE) +target_compile_options(GENERIC_L431CBTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L431CBTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L431CBTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L431CBTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L431CBTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L431CBTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L431CBTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L431CBUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L431CBUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L431C(B-C)(T-U)") +set(GENERIC_L431CBUX_MAXSIZE 131072) +set(GENERIC_L431CBUX_MAXDATASIZE 65536) +set(GENERIC_L431CBUX_MCU cortex-m4) +set(GENERIC_L431CBUX_FPCONF "-") +add_library(GENERIC_L431CBUX INTERFACE) +target_compile_options(GENERIC_L431CBUX INTERFACE + "SHELL:-DSTM32L431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431CBUX_MCU} +) +target_compile_definitions(GENERIC_L431CBUX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L431CBUX" + "BOARD_NAME=\"GENERIC_L431CBUX\"" + "BOARD_ID=GENERIC_L431CBUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L431CBUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L431CBUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L431CBUX INTERFACE + "LINKER:--default-script=${GENERIC_L431CBUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=131072" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431CBUX_MCU} +) + +add_library(GENERIC_L431CBUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L431CBUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L431CBUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L431CBUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L431CBUX_serial_none INTERFACE) +target_compile_options(GENERIC_L431CBUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L431CBUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L431CBUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L431CBUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L431CBUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L431CBUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L431CBUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L431CBUX_usb_none INTERFACE) +target_compile_options(GENERIC_L431CBUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L431CBUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L431CBUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L431CBUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L431CBUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L431CBUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L431CBUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L431CCTX +# ----------------------------------------------------------------------------- + +set(GENERIC_L431CCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L431C(B-C)(T-U)") +set(GENERIC_L431CCTX_MAXSIZE 262144) +set(GENERIC_L431CCTX_MAXDATASIZE 65536) +set(GENERIC_L431CCTX_MCU cortex-m4) +set(GENERIC_L431CCTX_FPCONF "-") +add_library(GENERIC_L431CCTX INTERFACE) +target_compile_options(GENERIC_L431CCTX INTERFACE + "SHELL:-DSTM32L431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431CCTX_MCU} +) +target_compile_definitions(GENERIC_L431CCTX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L431CCTX" + "BOARD_NAME=\"GENERIC_L431CCTX\"" + "BOARD_ID=GENERIC_L431CCTX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L431CCTX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L431CCTX_VARIANT_PATH} +) + +target_link_options(GENERIC_L431CCTX INTERFACE + "LINKER:--default-script=${GENERIC_L431CCTX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431CCTX_MCU} +) + +add_library(GENERIC_L431CCTX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L431CCTX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L431CCTX_serial_generic INTERFACE) +target_compile_options(GENERIC_L431CCTX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L431CCTX_serial_none INTERFACE) +target_compile_options(GENERIC_L431CCTX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L431CCTX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L431CCTX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L431CCTX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L431CCTX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L431CCTX_usb_HID INTERFACE) +target_compile_options(GENERIC_L431CCTX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L431CCTX_usb_none INTERFACE) +target_compile_options(GENERIC_L431CCTX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L431CCTX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L431CCTX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L431CCTX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L431CCTX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L431CCTX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L431CCTX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + +# GENERIC_L431CCUX +# ----------------------------------------------------------------------------- + +set(GENERIC_L431CCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32L4xx/L431C(B-C)(T-U)") +set(GENERIC_L431CCUX_MAXSIZE 262144) +set(GENERIC_L431CCUX_MAXDATASIZE 65536) +set(GENERIC_L431CCUX_MCU cortex-m4) +set(GENERIC_L431CCUX_FPCONF "-") +add_library(GENERIC_L431CCUX INTERFACE) +target_compile_options(GENERIC_L431CCUX INTERFACE + "SHELL:-DSTM32L431xx " + "SHELL:" + "SHELL:" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431CCUX_MCU} +) +target_compile_definitions(GENERIC_L431CCUX INTERFACE + "STM32L4xx" + "ARDUINO_GENERIC_L431CCUX" + "BOARD_NAME=\"GENERIC_L431CCUX\"" + "BOARD_ID=GENERIC_L431CCUX" + "VARIANT_H=\"variant_generic.h\"" +) +target_include_directories(GENERIC_L431CCUX INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32L4xx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32L4xx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32L4xx/Source/Templates/gcc/ + ${GENERIC_L431CCUX_VARIANT_PATH} +) + +target_link_options(GENERIC_L431CCUX INTERFACE + "LINKER:--default-script=${GENERIC_L431CCUX_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard" + -mcpu=${GENERIC_L431CCUX_MCU} +) + +add_library(GENERIC_L431CCUX_serial_disabled INTERFACE) +target_compile_options(GENERIC_L431CCUX_serial_disabled INTERFACE + "SHELL:" +) +add_library(GENERIC_L431CCUX_serial_generic INTERFACE) +target_compile_options(GENERIC_L431CCUX_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(GENERIC_L431CCUX_serial_none INTERFACE) +target_compile_options(GENERIC_L431CCUX_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) +add_library(GENERIC_L431CCUX_usb_CDC INTERFACE) +target_compile_options(GENERIC_L431CCUX_usb_CDC INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB" +) +add_library(GENERIC_L431CCUX_usb_CDCgen INTERFACE) +target_compile_options(GENERIC_L431CCUX_usb_CDCgen INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC" +) +add_library(GENERIC_L431CCUX_usb_HID INTERFACE) +target_compile_options(GENERIC_L431CCUX_usb_HID INTERFACE + "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE" +) +add_library(GENERIC_L431CCUX_usb_none INTERFACE) +target_compile_options(GENERIC_L431CCUX_usb_none INTERFACE + "SHELL:" +) +add_library(GENERIC_L431CCUX_xusb_FS INTERFACE) +target_compile_options(GENERIC_L431CCUX_xusb_FS INTERFACE + "SHELL:" +) +add_library(GENERIC_L431CCUX_xusb_HS INTERFACE) +target_compile_options(GENERIC_L431CCUX_xusb_HS INTERFACE + "SHELL:-DUSE_USB_HS" +) +add_library(GENERIC_L431CCUX_xusb_HSFS INTERFACE) +target_compile_options(GENERIC_L431CCUX_xusb_HSFS INTERFACE + "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS" +) + # GENERIC_L431RBIX # ----------------------------------------------------------------------------- @@ -105592,6 +106248,60 @@ target_compile_options(RAK3172_MODULE_serial_none INTERFACE "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" ) +# RAK3172T_MODULE +# ----------------------------------------------------------------------------- + +set(RAK3172T_MODULE_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U") +set(RAK3172T_MODULE_MAXSIZE 262144) +set(RAK3172T_MODULE_MAXDATASIZE 65536) +set(RAK3172T_MODULE_MCU cortex-m4) +set(RAK3172T_MODULE_FPCONF "-") +add_library(RAK3172T_MODULE INTERFACE) +target_compile_options(RAK3172T_MODULE INTERFACE + "SHELL:-DSTM32WLE5xx " + "SHELL:" + "SHELL:" + "SHELL: " + -mcpu=${RAK3172T_MODULE_MCU} +) +target_compile_definitions(RAK3172T_MODULE INTERFACE + "STM32WLxx" + "ARDUINO_RAK3172T_MODULE" + "BOARD_NAME=\"RAK3172T_MODULE\"" + "BOARD_ID=RAK3172T_MODULE" + "VARIANT_H=\"variant_RAK3172_MODULE.h\"" +) +target_include_directories(RAK3172T_MODULE INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/../system/STM32WLxx + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Inc + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WLxx_HAL_Driver/Src + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Include/ + ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WLxx/Source/Templates/gcc/ + ${RAK3172T_MODULE_VARIANT_PATH} +) + +target_link_options(RAK3172T_MODULE INTERFACE + "LINKER:--default-script=${RAK3172T_MODULE_VARIANT_PATH}/ldscript.ld" + "LINKER:--defsym=LD_FLASH_OFFSET=0x0" + "LINKER:--defsym=LD_MAX_SIZE=262144" + "LINKER:--defsym=LD_MAX_DATA_SIZE=65536" + "SHELL: " + -mcpu=${RAK3172T_MODULE_MCU} +) + +add_library(RAK3172T_MODULE_serial_disabled INTERFACE) +target_compile_options(RAK3172T_MODULE_serial_disabled INTERFACE + "SHELL:" +) +add_library(RAK3172T_MODULE_serial_generic INTERFACE) +target_compile_options(RAK3172T_MODULE_serial_generic INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED" +) +add_library(RAK3172T_MODULE_serial_none INTERFACE) +target_compile_options(RAK3172T_MODULE_serial_none INTERFACE + "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE" +) + # RAK811_TRACKER # ----------------------------------------------------------------------------- diff --git a/cmake/convert_file.cmake b/cmake/convert_file.cmake index e80564de26..f61cf0a428 100644 --- a/cmake/convert_file.cmake +++ b/cmake/convert_file.cmake @@ -1,16 +1,18 @@ cmake_minimum_required(VERSION 3.21) function(elf2bin ELFTGT) + get_filename_component(ELFTGT_WE ${ELFTGT} NAME_WE) add_custom_command(TARGET ${ELFTGT} POST_BUILD - COMMAND ${CMAKE_OBJCOPY} -O binary $ $.bin + COMMAND ${CMAKE_OBJCOPY} -O binary $ $/${ELFTGT_WE}.bin ) - set_property(TARGET ${ELFTGT} APPEND PROPERTY ADDITIONAL_CLEAN_FILES "$.bin") + set_property(TARGET ${ELFTGT} APPEND PROPERTY ADDITIONAL_CLEAN_FILES "$/${ELFTGT_WE}.bin") endfunction() function(elf2hex ELFTGT) + get_filename_component(ELFTGT_WE ${ELFTGT} NAME_WE) add_custom_command(TARGET ${ELFTGT} POST_BUILD - COMMAND ${CMAKE_OBJCOPY} -O ihex $ $.hex + COMMAND ${CMAKE_OBJCOPY} -O ihex $ $/${ELFTGT_WE}.hex ) - set_property(TARGET ${ELFTGT} APPEND PROPERTY ADDITIONAL_CLEAN_FILES "$.hex") + set_property(TARGET ${ELFTGT} APPEND PROPERTY ADDITIONAL_CLEAN_FILES "$/${ELFTGT_WE}.hex") endfunction() function(gv2svg GVFILE ENGINE) diff --git a/cmake/scripts/update_boarddb.py b/cmake/scripts/update_boarddb.py index 4ef63711de..e0dd6fa469 100644 --- a/cmake/scripts/update_boarddb.py +++ b/cmake/scripts/update_boarddb.py @@ -55,6 +55,8 @@ def platformtxt_filter(key): if key[0] == "build" and key[1] != "info": return False + if key[0] == "vid" or key[0] == "pid": + return False return True @@ -104,7 +106,12 @@ def regenerate_template(config, infile, outfile): shargs = parser.parse_args() platformtxt_cfg = parse_file(shargs.platform, reject=platformtxt_filter) - platformtxt_cfg = {"build": platformtxt_cfg["build"]} # whitelist what we need + # whitelist what we need + platformtxt_cfg = { + "build": platformtxt_cfg["build"], + "vid": platformtxt_cfg["vid"], + "pid": platformtxt_cfg["pid"], + } boardstxt_cfg = parse_file(shargs.boards, reject=boardstxt_filter) del boardstxt_cfg["menu"] # blacklist what we don't need diff --git a/libraries/EEPROM/library.properties b/libraries/EEPROM/library.properties index 2d8a7685ad..a3f7698ee4 100644 --- a/libraries/EEPROM/library.properties +++ b/libraries/EEPROM/library.properties @@ -5,5 +5,5 @@ maintainer=stm32duino sentence=Enables reading and writing to the permanent board storage. paragraph=This library allows to read and write data in a memory type, the EEPROM, that keeps its content also when the board is powered off. The amount of EEPROM available depends on the microcontroller type. category=Data Storage -url=http://www.arduino.cc/en/Reference/EEPROM +url=https://github.com/stm32duino/Arduino_Core_STM32/tree/main/libraries/EEPROM architectures=stm32 diff --git a/libraries/Keyboard/library.properties b/libraries/Keyboard/library.properties index 1533d990c3..a9460f7eed 100644 --- a/libraries/Keyboard/library.properties +++ b/libraries/Keyboard/library.properties @@ -5,5 +5,5 @@ maintainer=stm32duino sentence=Allows a STM32 based board with USB capabilities to act as a Keyboard. paragraph=This library plugs on the HID implementation provided by the core. category=Device Control -url=http://www.arduino.cc/en/Reference/Keyboard +url=https://github.com/stm32duino/Arduino_Core_STM32/tree/main/libraries/Keyboard architectures=stm32 diff --git a/libraries/Mouse/library.properties b/libraries/Mouse/library.properties index eff500cead..da59d05041 100644 --- a/libraries/Mouse/library.properties +++ b/libraries/Mouse/library.properties @@ -5,5 +5,5 @@ maintainer=stm32duino sentence=Allows a STM32 based board with USB capabilities to act as a Mouse. paragraph=This library plugs on the HID implementation provided by the core. category=Device Control -url=http://www.arduino.cc/en/Reference/Mouse +url=https://github.com/stm32duino/Arduino_Core_STM32/tree/main/libraries/Mouse architectures=stm32 diff --git a/libraries/SPI/library.properties b/libraries/SPI/library.properties index a4bdcbd0e0..d6c92ff136 100644 --- a/libraries/SPI/library.properties +++ b/libraries/SPI/library.properties @@ -5,5 +5,5 @@ maintainer=stm32duino sentence=Enables the communication with devices that use the Serial Peripheral Interface (SPI) Bus. paragraph=This library is based on the official Arduino SPI library and adapted to STM32 boards. category=Communication -url=http://www.arduino.cc/en/Reference/SPI +url=https://github.com/stm32duino/Arduino_Core_STM32/tree/main/libraries/SPI architectures=stm32 diff --git a/libraries/Servo/library.properties b/libraries/Servo/library.properties index 1d3cd276d0..a27f44e04b 100644 --- a/libraries/Servo/library.properties +++ b/libraries/Servo/library.properties @@ -5,5 +5,5 @@ maintainer=stm32duino sentence=Allows Arduino/Genuino and STM32 based boards to control a variety of servo motors. paragraph=This library can control a great number of servos.
It makes careful use of timers: the library can control 12 servos using only 1 timer.
On the Arduino Due you can control up to 60 servos.
category=Device Control -url=http://www.arduino.cc/en/Reference/Servo +url=https://github.com/stm32duino/Arduino_Core_STM32/tree/main/libraries/Servo architectures=avr,sam,samd,nrf52,stm32f4,stm32 diff --git a/libraries/SoftwareSerial/library.properties b/libraries/SoftwareSerial/library.properties index 4bf36a6600..8045030cd5 100644 --- a/libraries/SoftwareSerial/library.properties +++ b/libraries/SoftwareSerial/library.properties @@ -5,6 +5,6 @@ maintainer=stm32duino sentence=Enables serial communication on any digital pin. paragraph=The SoftwareSerial library has been developed to allow serial communication on any digital pin of the board, using software to replicate the functionality of the hardware UART. It is possible to have multiple software serial ports. category=Communication -url=http://www.arduino.cc/en/Reference/SoftwareSerial +url=https://github.com/stm32duino/Arduino_Core_STM32/tree/main/libraries/SoftwareSerial architectures=stm32 diff --git a/libraries/SrcWrapper/inc/stm32_def.h b/libraries/SrcWrapper/inc/stm32_def.h index 00c4c3762c..a307d748aa 100644 --- a/libraries/SrcWrapper/inc/stm32_def.h +++ b/libraries/SrcWrapper/inc/stm32_def.h @@ -7,7 +7,7 @@ */ #define STM32_CORE_VERSION_MAJOR (0x02U) /*!< [31:24] major version */ #define STM32_CORE_VERSION_MINOR (0x08U) /*!< [23:16] minor version */ -#define STM32_CORE_VERSION_PATCH (0x00U) /*!< [15:8] patch version */ +#define STM32_CORE_VERSION_PATCH (0x01U) /*!< [15:8] patch version */ /* * Extra label for development: * 0: official release diff --git a/libraries/USBDevice/src/usbd_ep_conf.c b/libraries/USBDevice/src/usbd_ep_conf.c index 455afe5ecd..d872acca5f 100644 --- a/libraries/USBDevice/src/usbd_ep_conf.c +++ b/libraries/USBDevice/src/usbd_ep_conf.c @@ -37,7 +37,11 @@ const ep_desc_t ep_def[] = { #else {0x00, PMA_EP0_OUT_ADDR, PCD_SNG_BUF}, {0x80, PMA_EP0_IN_ADDR, PCD_SNG_BUF}, +#ifndef USBD_CDC_USE_SINGLE_BUFFER {CDC_OUT_EP, PMA_CDC_OUT_ADDR, PCD_DBL_BUF}, +#else + {CDC_OUT_EP, PMA_CDC_OUT_ADDR, PCD_SNG_BUF}, +#endif {CDC_IN_EP, PMA_CDC_IN_ADDR, PCD_SNG_BUF}, {CDC_CMD_EP, PMA_CDC_CMD_ADDR, PCD_SNG_BUF} #endif diff --git a/libraries/Wire/library.properties b/libraries/Wire/library.properties index 2419e4dcc6..3816da1a85 100644 --- a/libraries/Wire/library.properties +++ b/libraries/Wire/library.properties @@ -5,5 +5,5 @@ maintainer=stm32duino sentence=Allows the communication between devices or sensors connected via Two Wire (I2C) Interface Bus. paragraph= category=Communication -url=http://www.arduino.cc/en/Reference/Wire +url=https://github.com/stm32duino/Arduino_Core_STM32/tree/main/libraries/Wire architectures=stm32 diff --git a/libraries/Wire/src/Wire.cpp b/libraries/Wire/src/Wire.cpp index 055bdec262..c25a915a8b 100644 --- a/libraries/Wire/src/Wire.cpp +++ b/libraries/Wire/src/Wire.cpp @@ -38,6 +38,11 @@ TwoWire::TwoWire() memset((void *)&_i2c, 0, sizeof(_i2c)); _i2c.sda = digitalPinToPinName(SDA); _i2c.scl = digitalPinToPinName(SCL); + + txBuffer = nullptr; + txBufferAllocated = 0; + rxBuffer = nullptr; + rxBufferAllocated = 0; } TwoWire::TwoWire(uint32_t sda, uint32_t scl) @@ -45,6 +50,11 @@ TwoWire::TwoWire(uint32_t sda, uint32_t scl) memset((void *)&_i2c, 0, sizeof(_i2c)); _i2c.sda = digitalPinToPinName(sda); _i2c.scl = digitalPinToPinName(scl); + + txBuffer = nullptr; + txBufferAllocated = 0; + rxBuffer = nullptr; + rxBufferAllocated = 0; } /** @@ -74,14 +84,10 @@ void TwoWire::begin(uint8_t address, bool generalCall, bool NoStretchMode) { rxBufferIndex = 0; rxBufferLength = 0; - rxBuffer = nullptr; - rxBufferAllocated = 0; resetRxBuffer(); txDataSize = 0; txAddress = 0; - txBuffer = nullptr; - txBufferAllocated = 0; resetTxBuffer(); _i2c.__this = (void *)this; diff --git a/platform.txt b/platform.txt index 3b60a337cf..f171d5b19a 100644 --- a/platform.txt +++ b/platform.txt @@ -5,7 +5,7 @@ # https://arduino.github.io/arduino-cli/latest/platform-specification/ name=STM32 boards groups (Board to be selected from Tools submenu 'Board part number') -version=2.8.0 +version=2.8.1 # Define variables used multiple times in platform file @@ -28,9 +28,10 @@ hal_dir={build.system.path}/Drivers/{build.series}_HAL_Driver cmsis_dir={runtime.tools.CMSIS-5.9.0.path}/CMSIS cmsis_dev_dir={build.system.path}/Drivers/CMSIS/Device/ST/{build.series} usbd_core_dir={build.system.path}/Middlewares/ST/STM32_USB_Device_Library/Core -SrcWrapper_include_dir={runtime.platform.path}/libraries/SrcWrapper/inc -VirtIO_include_dir={runtime.platform.path}/libraries/VirtIO/inc -USBDevice_include_dir={runtime.platform.path}/libraries/USBDevice/inc +builtin_library_dir={build.core.path}/../../libraries +SrcWrapper_include_dir={builtin_library_dir}/SrcWrapper/inc +VirtIO_include_dir={builtin_library_dir}/VirtIO/inc +USBDevice_include_dir={builtin_library_dir}/USBDevice/inc # STM compile variables @@ -108,10 +109,14 @@ build.usb_flags=-DUSBCON {build.usb_speed} -DUSBD_VID={build.vid} -DUSBD_PID={bu # Specify defaults for vid/pid # Boards should specify either both, or neither of these. +vid.0=0x0483 +pid.0=0x5740 build.vid={vid.0} build.pid={pid.0} -upload.vid=0x0483 -upload.pid=0xdf11 +upload.vid.0=0x0483 +upload.pid.0=0xdf11 +upload.vid={upload.vid.0} +upload.pid={upload.pid.0} # To customize the USB manufacturer or product string, must add defines # for them, e.g.: @@ -245,5 +250,5 @@ debug.server=openocd debug.server.openocd.path={openocd_dir}/bin/openocd debug.server.openocd.scripts_dir={openocd_dir}/openocd/scripts # Common config -debug.server.openocd.scripts.0=interface/{programmer.protocol}.cfg -debug.server.openocd.scripts.1={programmer.transport_script} +debug.server.openocd.scripts.0=interface/stlink.cfg +debug.server.openocd.scripts.1={runtime.platform.path}/debugger/select_hla.cfg diff --git a/programmers.txt b/programmers.txt index 405cf37cdd..e69de29bb2 100644 --- a/programmers.txt +++ b/programmers.txt @@ -1,9 +0,0 @@ -stlink.name=STMicroelectronics ST-LINK -stlink.communication=USB -stlink.protocol= -stlink.program.protocol= -stlink.program.tool=openocd -stlink.program.tool.default=openocd -stlink.program.extra_params= -stlink.programmer.protocol=stlink -stlink.programmer.transport_script={runtime.platform.path}/debugger/select_hla.cfg diff --git a/variants/STM32F0xx/openocd.cfg b/variants/STM32F0xx/openocd.cfg deleted file mode 100644 index d826582f1e..0000000000 --- a/variants/STM32F0xx/openocd.cfg +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) 2023, STMicroelectronics -# All rights reserved. -# -# This software component is licensed by ST under BSD 3-Clause license, -# the "License"; You may not use this file except in compliance with the -# License. You may obtain a copy of the License at: -# opensource.org/licenses/BSD-3-Clause -# - -source [find interface/stlink.cfg] - -transport select hla_swd - -source [find target/stm32f0x.cfg] - -reset_config srst_only diff --git a/variants/STM32F1xx/openocd.cfg b/variants/STM32F1xx/openocd.cfg deleted file mode 100644 index 5687d45953..0000000000 --- a/variants/STM32F1xx/openocd.cfg +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) 2023, STMicroelectronics -# All rights reserved. -# -# This software component is licensed by ST under BSD 3-Clause license, -# the "License"; You may not use this file except in compliance with the -# License. You may obtain a copy of the License at: -# opensource.org/licenses/BSD-3-Clause -# - -source [find interface/stlink.cfg] - -transport select hla_swd - -source [find target/stm32f1x.cfg] - -reset_config srst_only diff --git a/variants/STM32F2xx/openocd.cfg b/variants/STM32F2xx/openocd.cfg deleted file mode 100644 index daa416cb2a..0000000000 --- a/variants/STM32F2xx/openocd.cfg +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) 2023, STMicroelectronics -# All rights reserved. -# -# This software component is licensed by ST under BSD 3-Clause license, -# the "License"; You may not use this file except in compliance with the -# License. You may obtain a copy of the License at: -# opensource.org/licenses/BSD-3-Clause -# - -source [find interface/stlink.cfg] - -transport select hla_swd - -source [find target/stm32f2x.cfg] - -reset_config srst_only diff --git a/variants/STM32F3xx/openocd.cfg b/variants/STM32F3xx/openocd.cfg deleted file mode 100644 index 95e3d0eab0..0000000000 --- a/variants/STM32F3xx/openocd.cfg +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) 2023, STMicroelectronics -# All rights reserved. -# -# This software component is licensed by ST under BSD 3-Clause license, -# the "License"; You may not use this file except in compliance with the -# License. You may obtain a copy of the License at: -# opensource.org/licenses/BSD-3-Clause -# - -source [find interface/stlink.cfg] - -transport select hla_swd - -source [find target/stm32f3x.cfg] - -reset_config srst_only diff --git a/variants/STM32F4xx/openocd.cfg b/variants/STM32F4xx/openocd.cfg deleted file mode 100644 index f4754d9143..0000000000 --- a/variants/STM32F4xx/openocd.cfg +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) 2023, STMicroelectronics -# All rights reserved. -# -# This software component is licensed by ST under BSD 3-Clause license, -# the "License"; You may not use this file except in compliance with the -# License. You may obtain a copy of the License at: -# opensource.org/licenses/BSD-3-Clause -# - -source [find interface/stlink.cfg] - -transport select hla_swd - -source [find target/stm32f4x.cfg] - -reset_config srst_only diff --git a/variants/STM32F7xx/openocd.cfg b/variants/STM32F7xx/openocd.cfg deleted file mode 100644 index 9f1f9665e1..0000000000 --- a/variants/STM32F7xx/openocd.cfg +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) 2023, STMicroelectronics -# All rights reserved. -# -# This software component is licensed by ST under BSD 3-Clause license, -# the "License"; You may not use this file except in compliance with the -# License. You may obtain a copy of the License at: -# opensource.org/licenses/BSD-3-Clause -# - -source [find interface/stlink.cfg] - -transport select hla_swd - -source [find target/stm32f7x.cfg] - -reset_config srst_only diff --git a/variants/STM32G0xx/openocd.cfg b/variants/STM32G0xx/openocd.cfg deleted file mode 100644 index fbb7eb4ad6..0000000000 --- a/variants/STM32G0xx/openocd.cfg +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) 2023, STMicroelectronics -# All rights reserved. -# -# This software component is licensed by ST under BSD 3-Clause license, -# the "License"; You may not use this file except in compliance with the -# License. You may obtain a copy of the License at: -# opensource.org/licenses/BSD-3-Clause -# - -source [find interface/stlink.cfg] - -transport select hla_swd - -source [find target/stm32g0x.cfg] - -reset_config srst_only diff --git a/variants/STM32G4xx/openocd.cfg b/variants/STM32G4xx/openocd.cfg deleted file mode 100644 index 8ff69bca04..0000000000 --- a/variants/STM32G4xx/openocd.cfg +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) 2023, STMicroelectronics -# All rights reserved. -# -# This software component is licensed by ST under BSD 3-Clause license, -# the "License"; You may not use this file except in compliance with the -# License. You may obtain a copy of the License at: -# opensource.org/licenses/BSD-3-Clause -# - -source [find interface/stlink.cfg] - -transport select hla_swd - -source [find target/stm32g4x.cfg] - -reset_config srst_only diff --git a/variants/STM32H5xx/H503KBU/generic_clock.c b/variants/STM32H5xx/H503KBU/generic_clock.c index fa6451b904..8fdcb187f2 100644 --- a/variants/STM32H5xx/H503KBU/generic_clock.c +++ b/variants/STM32H5xx/H503KBU/generic_clock.c @@ -20,8 +20,50 @@ */ WEAK void SystemClock_Config(void) { - /* SystemClock_Config can be generated by STM32CubeMX */ -#warning "SystemClock_Config() is empty. Default clock at reset is used." + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + + /** Configure the main internal regulator output voltage + */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); + + while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_CSI; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.CSIState = RCC_CSI_ON; + RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 125; + RCC_OscInitStruct.PLL.PLLP = 2; + RCC_OscInitStruct.PLL.PLLQ = 2; + RCC_OscInitStruct.PLL.PLLR = 2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2; + RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE; + RCC_OscInitStruct.PLL.PLLFRACN = 0; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 + | RCC_CLOCKTYPE_PCLK3; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { + Error_Handler(); + } } #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32H5xx/H503KBU/ldscript.ld b/variants/STM32H5xx/H503KBU/ldscript.ld new file mode 100644 index 0000000000..8ffe9f3ea7 --- /dev/null +++ b/variants/STM32H5xx/H503KBU/ldscript.ld @@ -0,0 +1,187 @@ +/* +****************************************************************************** +** +** @file : LinkerScript.ld +** +** @author : Auto-generated by STM32CubeIDE +** +** @brief : Linker script for STM32H503KBUx Device from STM32H5 series +** 128KBytes FLASH +** 32KBytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +****************************************************************************** +** @attention +** +** Copyright (c) 2024 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +****************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE + FLASH (rx) : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/variants/STM32H5xx/H563R(G-I)T_H573RIT/generic_clock.c b/variants/STM32H5xx/H563R(G-I)T_H573RIT/generic_clock.c index f68f7375d1..30841dd668 100644 --- a/variants/STM32H5xx/H563R(G-I)T_H573RIT/generic_clock.c +++ b/variants/STM32H5xx/H563R(G-I)T_H573RIT/generic_clock.c @@ -21,8 +21,50 @@ */ WEAK void SystemClock_Config(void) { - /* SystemClock_Config can be generated by STM32CubeMX */ -#warning "SystemClock_Config() is empty. Default clock at reset is used." + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + + /** Configure the main internal regulator output voltage + */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); + + while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_CSI; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.CSIState = RCC_CSI_ON; + RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 125; + RCC_OscInitStruct.PLL.PLLP = 2; + RCC_OscInitStruct.PLL.PLLQ = 2; + RCC_OscInitStruct.PLL.PLLR = 2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2; + RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE; + RCC_OscInitStruct.PLL.PLLFRACN = 0; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 + | RCC_CLOCKTYPE_PCLK3; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { + Error_Handler(); + } } #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32H5xx/H563R(G-I)T_H573RIT/ldscript.ld b/variants/STM32H5xx/H563R(G-I)T_H573RIT/ldscript.ld new file mode 100644 index 0000000000..df0b0863c9 --- /dev/null +++ b/variants/STM32H5xx/H563R(G-I)T_H573RIT/ldscript.ld @@ -0,0 +1,187 @@ +/* +****************************************************************************** +** +** @file : LinkerScript.ld +** +** @author : Auto-generated by STM32CubeIDE +** +** @brief : Linker script for STM32H573RITx Device from STM32H5 series +** 2048KBytes FLASH +** 640KBytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +****************************************************************************** +** @attention +** +** Copyright (c) 2024 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +****************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE + FLASH (rx) : ORIGIN = 0x08000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/variants/STM32H7xx/openocd.cfg b/variants/STM32H7xx/openocd.cfg deleted file mode 100644 index 9bfdded39c..0000000000 --- a/variants/STM32H7xx/openocd.cfg +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) 2023, STMicroelectronics -# All rights reserved. -# -# This software component is licensed by ST under BSD 3-Clause license, -# the "License"; You may not use this file except in compliance with the -# License. You may obtain a copy of the License at: -# opensource.org/licenses/BSD-3-Clause -# - -source [find interface/stlink.cfg] - -transport select hla_swd - -source [find target/stm32h7x.cfg] - -reset_config srst_only diff --git a/variants/STM32L0xx/openocd.cfg b/variants/STM32L0xx/openocd.cfg deleted file mode 100644 index def6a13b35..0000000000 --- a/variants/STM32L0xx/openocd.cfg +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) 2023, STMicroelectronics -# All rights reserved. -# -# This software component is licensed by ST under BSD 3-Clause license, -# the "License"; You may not use this file except in compliance with the -# License. You may obtain a copy of the License at: -# opensource.org/licenses/BSD-3-Clause -# - -source [find interface/stlink.cfg] - -transport select hla_swd - -source [find target/stm32l0.cfg] - -reset_config srst_only diff --git a/variants/STM32L1xx/openocd.cfg b/variants/STM32L1xx/openocd.cfg deleted file mode 100644 index 19c15f2b26..0000000000 --- a/variants/STM32L1xx/openocd.cfg +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) 2023, STMicroelectronics -# All rights reserved. -# -# This software component is licensed by ST under BSD 3-Clause license, -# the "License"; You may not use this file except in compliance with the -# License. You may obtain a copy of the License at: -# opensource.org/licenses/BSD-3-Clause -# - -source [find interface/stlink.cfg] - -transport select hla_swd - -source [find target/stm32l1.cfg] - -reset_config srst_only diff --git a/variants/STM32L4xx/L431C(B-C)(T-U)/generic_clock.c b/variants/STM32L4xx/L431C(B-C)(T-U)/generic_clock.c index b788073f0f..d954a503fb 100644 --- a/variants/STM32L4xx/L431C(B-C)(T-U)/generic_clock.c +++ b/variants/STM32L4xx/L431C(B-C)(T-U)/generic_clock.c @@ -21,8 +21,44 @@ */ WEAK void SystemClock_Config(void) { - /* SystemClock_Config can be generated by STM32CubeMX */ -#warning "SystemClock_Config() is empty. Default clock at reset is used." + RCC_OscInitTypeDef RCC_OscInitStruct = {}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; + + /** Configure the main internal regulator output voltage + */ + if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) { + Error_Handler(); + } + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 10; + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; + RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; + RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) { + Error_Handler(); + } } #endif /* ARDUINO_GENERIC_* */ diff --git a/variants/STM32L4xx/L431C(B-C)(T-U)/ldscript.ld b/variants/STM32L4xx/L431C(B-C)(T-U)/ldscript.ld new file mode 100644 index 0000000000..b05d53b4bd --- /dev/null +++ b/variants/STM32L4xx/L431C(B-C)(T-U)/ldscript.ld @@ -0,0 +1,189 @@ +/* +****************************************************************************** +** +** @file : LinkerScript.ld +** +** @author : Auto-generated by STM32CubeIDE +** +** @brief : Linker script for STM32L431CCUx Device from STM32L4 series +** 256KBytes FLASH +** 64KBytes RAM +** 16KBytes RAM2 +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +****************************************************************************** +** @attention +** +** Copyright (c) 2024 STMicroelectronics. +** All rights reserved. +** +** This software is licensed under terms that can be found in the LICENSE file +** in the root directory of this software component. +** If no LICENSE file comes with this software, it is provided AS-IS. +** +****************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ + +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Memories definition */ +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE + RAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 16K + FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Sections */ +SECTIONS +{ + /* The startup code into "FLASH" Rom type memory */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data into "FLASH" Rom type memory */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data into "FLASH" Rom type memory */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + + .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + + .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */ + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* Used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections into "RAM" Ram type memory */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + *(.RamFunc) /* .RamFunc sections */ + *(.RamFunc*) /* .RamFunc* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + + } >RAM AT> FLASH + + /* Uninitialized data section into "RAM" Ram type memory */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss section */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + /* Remove information from the compiler libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/variants/STM32L4xx/openocd.cfg b/variants/STM32L4xx/openocd.cfg deleted file mode 100644 index 94127ecb98..0000000000 --- a/variants/STM32L4xx/openocd.cfg +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) 2023, STMicroelectronics -# All rights reserved. -# -# This software component is licensed by ST under BSD 3-Clause license, -# the "License"; You may not use this file except in compliance with the -# License. You may obtain a copy of the License at: -# opensource.org/licenses/BSD-3-Clause -# - -source [find interface/stlink.cfg] - -transport select hla_swd - -source [find target/stm32l4x.cfg] - -reset_config srst_only diff --git a/variants/STM32L5xx/openocd.cfg b/variants/STM32L5xx/openocd.cfg deleted file mode 100644 index 20a24ac69c..0000000000 --- a/variants/STM32L5xx/openocd.cfg +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) 2023, STMicroelectronics -# All rights reserved. -# -# This software component is licensed by ST under BSD 3-Clause license, -# the "License"; You may not use this file except in compliance with the -# License. You may obtain a copy of the License at: -# opensource.org/licenses/BSD-3-Clause -# - -source [find interface/stlink.cfg] - -transport select hla_swd - -source [find target/stm32l5x.cfg] - -reset_config srst_only diff --git a/variants/STM32MP1xx/openocd.cfg b/variants/STM32MP1xx/openocd.cfg deleted file mode 100644 index 60c4c7db50..0000000000 --- a/variants/STM32MP1xx/openocd.cfg +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) 2023, STMicroelectronics -# All rights reserved. -# -# This software component is licensed by ST under BSD 3-Clause license, -# the "License"; You may not use this file except in compliance with the -# License. You may obtain a copy of the License at: -# opensource.org/licenses/BSD-3-Clause -# - -source [find interface/stlink.cfg] - -transport select hla_swd - -source [find target/stm32mp15x.cfg] - -reset_config srst_only diff --git a/variants/STM32U5xx/openocd.cfg b/variants/STM32U5xx/openocd.cfg deleted file mode 100644 index 587f7aa8d3..0000000000 --- a/variants/STM32U5xx/openocd.cfg +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) 2023, STMicroelectronics -# All rights reserved. -# -# This software component is licensed by ST under BSD 3-Clause license, -# the "License"; You may not use this file except in compliance with the -# License. You may obtain a copy of the License at: -# opensource.org/licenses/BSD-3-Clause -# - -source [find interface/stlink.cfg] - -transport select hla_swd - -source [find target/stm32u5x.cfg] - -reset_config srst_only diff --git a/variants/STM32WBxx/openocd.cfg b/variants/STM32WBxx/openocd.cfg deleted file mode 100644 index f835c16689..0000000000 --- a/variants/STM32WBxx/openocd.cfg +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) 2023, STMicroelectronics -# All rights reserved. -# -# This software component is licensed by ST under BSD 3-Clause license, -# the "License"; You may not use this file except in compliance with the -# License. You may obtain a copy of the License at: -# opensource.org/licenses/BSD-3-Clause -# - -source [find interface/stlink.cfg] - -transport select hla_swd - -source [find target/stm32wbx.cfg] - -reset_config srst_only diff --git a/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_RAK3172_MODULE.cpp b/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_RAK3172_MODULE.cpp index 7dc9c86355..4b621dd744 100644 --- a/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_RAK3172_MODULE.cpp +++ b/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_RAK3172_MODULE.cpp @@ -10,7 +10,7 @@ * ******************************************************************************* */ -#if defined(ARDUINO_RAK3172_MODULE) +#if defined(ARDUINO_RAK3172_MODULE) || defined(ARDUINO_RAK3172T_MODULE) #include "pins_arduino.h" // Digital PinName array @@ -104,4 +104,4 @@ WEAK void SystemClock_Config(void) } #endif -#endif /* ARDUINO_RAK3172_MODULE */ +#endif /* ARDUINO_RAK3172_MODULE || ARDUINO_RAK3172T_MODULE */ diff --git a/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_RAK3172_MODULE.h b/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_RAK3172_MODULE.h index 3ea5fdb7c1..37ef928ffb 100644 --- a/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_RAK3172_MODULE.h +++ b/variants/STM32WLxx/WL54CCU_WL55CCU_WLE4C(8-B-C)U_WLE5C(8-B-C)U/variant_RAK3172_MODULE.h @@ -144,7 +144,12 @@ #endif // LoRaWAN definitions -#define LORAWAN_BOARD_HAS_TCXO 0U + +#if defined(ARDUINO_RAK3172T_MODULE) + #define LORAWAN_BOARD_HAS_TCXO 1U +#else + #define LORAWAN_BOARD_HAS_TCXO 0U +#endif #define LORAWAN_BOARD_HAS_DCDC 1U #define LORAWAN_TX_CONFIG RBI_CONF_RFO_HP diff --git a/variants/STM32WLxx/openocd.cfg b/variants/STM32WLxx/openocd.cfg deleted file mode 100644 index 4ccd7efa18..0000000000 --- a/variants/STM32WLxx/openocd.cfg +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (c) 2023, STMicroelectronics -# All rights reserved. -# -# This software component is licensed by ST under BSD 3-Clause license, -# the "License"; You may not use this file except in compliance with the -# License. You may obtain a copy of the License at: -# opensource.org/licenses/BSD-3-Clause -# - -source [find interface/stlink.cfg] - -transport select hla_swd - -source [find target/stm32wlx.cfg] - -reset_config srst_only