From 1b7fb6b3d263457c6492612da23bc4aa35f46de3 Mon Sep 17 00:00:00 2001
From: ag88 <ag88@github.com>
Date: Sun, 21 Nov 2021 05:29:00 +0800
Subject: [PATCH 01/15] Add a new variant for WeAct MiniSTM32H743VITX

The board schematics, images at the time of this commit is found at
https://github.com/WeActTC/MiniSTM32H7xx

This variant is 'unofficial' (i.e. this is community contributed and not
from the original vendor)

it is actually adapted from the generic variant found in
https://github.com/stm32duino/Arduino_Core_STM32/tree/main/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)

the changes are:
1) created a void SystemClock_Config(void) that use the external 25 Mhz
HSE crystal. this makes it run at 480 Mhz ! USB (CDC Serial) still
works per normal.

much of the rest of the peripherals are clocked at 80 Mhz (from the
outputs of PLL2 and PLL3), that's the max allowable documented in ref
manual for the ADC.

2) the rest of definitions are pretty much same as the generic variant
with the following redefinitions
  a.  #define LED_BUILTIN PE3 (per schematics and tested)
  b.  #define USER_BTN PC13 (per schematics and tested)
  c.  SERIAL_TX PA9, SERIAL_RX PA10 - this makes the 1st hardware serial
      port UART1

3) added 2 conveinence functions - this is only for this board and is
only availaible if it is selected
   /* power saving mode, mcu runs significantly cooler
    * Sysclock 240 Mhz, bus clocks 120 Mhz */
  void SysClkHalfSpeed();

  /* full speed - sysclk from PLL1 P - 480 Mhz
   * Sysclock 480 Mhz, bus clocks 240 Mhz */
  void SysClkFullSpeed()

  This variant runs the systemclock default at 480 MHz (published max)
  and AHB at 240 MHz. The stm32h743 mcu tend to run pretty warm after a
  while (around 50 deg C). The half speed function call changes
  the system clock dividers (divide by 2 - gives 240 Mhz)
  and AHB dividers (divide further by 2 - gives 120 Mhz)
  so that it runs at 1/2 the PLL1 P speeds (480 Mhz).
  the mcu runs significantly cooler running at 1/2 speeds.
  some tests has been done to swtich the speeds calling the functions at
  run time, they seem to work ok. But tests isn't thorough, so check
  things if you use the speed changing functions.
---
 boards.txt                                    |   9 +
 .../variant_WeActMiniH743VITX.cpp             | 321 ++++++++++++++++++
 .../variant_WeActMiniH743VITX.h               | 286 ++++++++++++++++
 3 files changed, 616 insertions(+)
 create mode 100644 variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp
 create mode 100644 variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h

diff --git a/boards.txt b/boards.txt
index 4e550cfc76..0a7f82b07c 100644
--- a/boards.txt
+++ b/boards.txt
@@ -3892,6 +3892,15 @@ GenH7.menu.pnum.GENERIC_H743VITX.build.board=GENERIC_H743VITX
 GenH7.menu.pnum.GENERIC_H743VITX.build.product_line=STM32H743xx
 GenH7.menu.pnum.GENERIC_H743VITX.build.variant=STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)
 
+# WeAct MiniSTM32H7xx
+GenH7.menu.pnum.WeActMiniH743VITX=WeAct MiniSTM32H7xx
+GenH7.menu.pnum.WeActMiniH743VITX.upload.maximum_size=2097152
+GenH7.menu.pnum.WeActMiniH743VITX.upload.maximum_data_size=524288
+GenH7.menu.pnum.WeActMiniH743VITX.build.board=WeActMiniH743VITX
+GenH7.menu.pnum.WeActMiniH743VITX.build.product_line=STM32H743xx
+GenH7.menu.pnum.WeActMiniH743VITX.build.variant=STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)
+GenH7.menu.pnum.WeActMiniH743VITX.build.variant_h=variant_{build.board}.h
+
 # Generic H743ZGTx
 GenH7.menu.pnum.GENERIC_H743ZGTX=Generic H743ZGTx
 GenH7.menu.pnum.GENERIC_H743ZGTX.upload.maximum_size=1048576
diff --git a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp
new file mode 100644
index 0000000000..047ea83010
--- /dev/null
+++ b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp
@@ -0,0 +1,321 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2020-2021, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+
+#include "pins_arduino.h"
+
+// Digital PinName array
+const PinName digitalPin[] = {
+  PA_0,   // D0/A0
+  PA_1,   // D1/A1
+  PA_2,   // D2/A2
+  PA_3,   // D3/A3
+  PA_4,   // D4/A4
+  PA_5,   // D5/A5
+  PA_6,   // D6/A6
+  PA_7,   // D7/A7
+  PA_8,   // D8
+  PA_9,   // D9
+  PA_10,  // D10
+  PA_11,  // D11
+  PA_12,  // D12
+  PA_13,  // D13
+  PA_14,  // D14
+  PA_15,  // D15
+  PB_0,   // D16/A8
+  PB_1,   // D17/A9
+  PB_2,   // D18
+  PB_3,   // D19
+  PB_4,   // D20
+  PB_5,   // D21
+  PB_6,   // D22
+  PB_7,   // D23
+  PB_8,   // D24
+  PB_9,   // D25
+  PB_10,  // D26
+  PB_11,  // D27
+  PB_12,  // D28
+  PB_13,  // D29
+  PB_14,  // D30
+  PB_15,  // D31
+  PC_0,   // D32/A10
+  PC_1,   // D33/A11
+  PC_4,   // D34/A12
+  PC_5,   // D35/A13
+  PC_6,   // D36
+  PC_7,   // D37
+  PC_8,   // D38
+  PC_9,   // D39
+  PC_10,  // D40
+  PC_11,  // D41
+  PC_12,  // D42
+  PC_13,  // D43
+  PC_14,  // D44
+  PC_15,  // D45
+  PD_0,   // D46
+  PD_1,   // D47
+  PD_2,   // D48
+  PD_3,   // D49
+  PD_4,   // D50
+  PD_5,   // D51
+  PD_6,   // D52
+  PD_7,   // D53
+  PD_8,   // D54
+  PD_9,   // D55
+  PD_10,  // D56
+  PD_11,  // D57
+  PD_12,  // D58
+  PD_13,  // D59
+  PD_14,  // D60
+  PD_15,  // D61
+  PE_0,   // D62
+  PE_1,   // D63
+  PE_2,   // D64
+  PE_3,   // D65
+  PE_4,   // D66
+  PE_5,   // D67
+  PE_6,   // D68
+  PE_7,   // D69
+  PE_8,   // D70
+  PE_9,   // D71
+  PE_10,  // D72
+  PE_11,  // D73
+  PE_12,  // D74
+  PE_13,  // D75
+  PE_14,  // D76
+  PE_15,  // D77
+  PH_0,   // D78
+  PH_1,   // D79
+  PC_2_C, // D80/A14
+  PC_3_C  // D81/A15
+};
+
+// Analog (Ax) pin number array
+const uint32_t analogInputPin[] = {
+  0,  // A0,  PA0
+  1,  // A1,  PA1
+  2,  // A2,  PA2
+  3,  // A3,  PA3
+  4,  // A4,  PA4
+  5,  // A5,  PA5
+  6,  // A6,  PA6
+  7,  // A7,  PA7
+  16, // A8,  PB0
+  17, // A9,  PB1
+  32, // A10, PC0
+  33, // A11, PC1
+  34, // A12, PC4
+  35, // A13, PC5
+  80, // A14, PC2_C
+  81  // A15, PC3_C
+};
+
+/**
+  * @brief  System Clock Configuration
+  * @param  None
+  * @retval None
+  */
+WEAK void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
+
+  /** Supply configuration update enable
+  */
+  HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
+  /** Configure the main internal regulator output voltage
+   *  Run mode (VOS0 to VOS3)
+   * Scale 0: boosted performance (available only with LDO regulator)
+   * Scale 1: high performance
+   * Scale 2: medium performance and consumption
+   * Scale 3: optimized performance and low-power consumption
+   *
+  */
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
+
+  while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  //RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI;
+  /* PLL1 pclk is sysclk 480 Mhz */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  // 480 Mhz
+  RCC_OscInitStruct.PLL.PLLM = 5; // M div 5
+  RCC_OscInitStruct.PLL.PLLN = 96; // N mul 96
+  RCC_OscInitStruct.PLL.PLLP = 1; // P div 1
+  RCC_OscInitStruct.PLL.PLLQ = 10; // Q div 10 - USB 48 Mhz
+  RCC_OscInitStruct.PLL.PLLR = 10; // R unused
+  // 360 Mhz
+  /*
+  RCC_OscInitStruct.PLL.PLLM = 5; // M div 10
+  RCC_OscInitStruct.PLL.PLLN = 144; // N mul 144 (add 1 to N)
+  RCC_OscInitStruct.PLL.PLLP = 2; // P div 2 (add 1 to PLLP) must be even
+  RCC_OscInitStruct.PLL.PLLQ = 15; // Q div 10 (add 1 to PLLQ) - USB 48 Mhz
+  RCC_OscInitStruct.PLL.PLLR = 15; // R unused
+  */
+
+  /*
+   * RCC_PLL1VCIRANGE_0  Clock range frequency between 1 and 2 MHz
+   * RCC_PLL1VCIRANGE_1  Clock range frequency between 2 and 4 MHz
+   * RCC_PLL1VCIRANGE_2  Clock range frequency between 4 and 8 MHz
+   * RCC_PLL1VCIRANGE_3  Clock range frequency between 8 and 16 MHz */
+  /*PLLRGE: RCC_PLL1VCIRANGE_2 Clock range frequency between 4 and 8 MHz  */
+  RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
+  /* VCOSEL PLL1VCOWIDE 2-16 Mhz*/
+  RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
+  RCC_OscInitStruct.PLL.PLLFRACN = 0;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    Error_Handler();
+  }
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
+                                | RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
+  RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
+    Error_Handler();
+  }
+
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_QSPI
+                                             | RCC_PERIPHCLK_SDMMC | RCC_PERIPHCLK_ADC
+                                             | RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USART16
+                                             | RCC_PERIPHCLK_USART234578 | RCC_PERIPHCLK_I2C123
+                                             | RCC_PERIPHCLK_I2C4 | RCC_PERIPHCLK_SPI123
+                                             | RCC_PERIPHCLK_SPI45 | RCC_PERIPHCLK_SPI6;
+
+  /* PLL1 qclk used for USB 48 Mhz */
+  /* PLL1 qclk also used for FMC, QUADSPI, SDMMC, RNG, SAI */
+  /* PLL2 pclk is needed for adc max 80 Mhz (p,q,r same)*/
+  /* PLL2 pclk also used for LP timers 2,3,4,5, SPI 1,2,3 */
+  /* PLL2 qclk is needed for uart, can, spi4,5,6 80 Mhz*/
+  /* PLL3 r clk is needed for i2c 80 Mhz (p,q,r same)*/
+  PeriphClkInitStruct.PLL2.PLL2M = 15; // M DIV 15 vco 25 / 15 ~ 1.667 Mhz
+  PeriphClkInitStruct.PLL2.PLL2N = 96; // N MUL 96
+  PeriphClkInitStruct.PLL2.PLL2P = 2; // P div 2
+  PeriphClkInitStruct.PLL2.PLL2Q = 2; // Q div 2
+  PeriphClkInitStruct.PLL2.PLL2R = 2; // R div 2
+  // RCC_PLL1VCIRANGE_0  Clock range frequency between 1 and 2 MHz
+  PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_0;
+  PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOMEDIUM;
+  PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
+  PeriphClkInitStruct.PLL3.PLL3M = 15; // M DIV 15 vco 25 / 15 ~ 1.667 Mhz
+  PeriphClkInitStruct.PLL3.PLL3N = 96; // N MUL 96
+  PeriphClkInitStruct.PLL3.PLL3P = 2; // P div 2
+  PeriphClkInitStruct.PLL3.PLL3Q = 2; // Q div 2
+  PeriphClkInitStruct.PLL3.PLL3R = 2; // R div 2
+  // RCC_PLL1VCIRANGE_0  Clock range frequency between 1 and 2 MHz
+  PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_0;
+  PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3VCOMEDIUM;
+  PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
+  // ADC from PLL2 pclk
+  PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
+  // USB from PLL1 qclk
+  PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
+  // QSPI from PLL1 qclk
+  PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_PLL;
+  // SDMMC from PLL1 qclk
+  PeriphClkInitStruct.SdmmcClockSelection = 0;
+  //PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL;
+  // LPUART from PLL2 qclk
+  PeriphClkInitStruct.Lpuart1ClockSelection = 0;
+  //PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2;
+  // USART from PLL2 qclk
+  PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_PLL2;
+  // USART from PLL2 qclk
+  PeriphClkInitStruct.Usart234578ClockSelection = 0;
+  //PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_PLL2;
+  // I2C123 from PLL3 rclk
+  PeriphClkInitStruct.I2c123ClockSelection = RCC_I2C123CLKSOURCE_PLL3;
+  // I2C4 from PLL3 rclk
+  PeriphClkInitStruct.I2c4ClockSelection = 0;
+  //PeriphClkInitStruct.I2c4ClockSelection = RCC_I2C4CLKSOURCE_PLL3;
+  // SPI123 from PLL2 pclk
+  PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL2;
+  // SPI45 from PLL2 qclk
+  PeriphClkInitStruct.Spi45ClockSelection = 0;
+  //PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_PLL2;
+  // SPI6 from PLL2 qclk
+  PeriphClkInitStruct.Spi6ClockSelection = 0;
+  //PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_PLL2;
+
+
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
+    Error_Handler();
+  }
+
+
+
+  /** Enable USB Voltage detector
+  */
+  //HAL_PWREx_EnableUSBVoltageDetector();
+
+}
+
+/*
+ * power saving mode, mcu runs significantly cooler
+ * Sysclock 240 Mhz, bus clocks 120 Mhz
+ */
+void SysClkHalfSpeed() {
+	RCC_ClkInitTypeDef RCC_ClkInitStruct = { };
+	/** Initializes the CPU, AHB and APB buses clocks */
+	RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+			| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1
+			| RCC_CLOCKTYPE_D1PCLK1;
+	RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+	//RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
+	RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV2;
+	RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
+	RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
+	RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
+	RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
+	RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
+	if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
+		Error_Handler();
+	} else
+		SystemCoreClockUpdate();
+}
+
+/*
+ * full speed - sysclk from PLL1 P - 480 Mhz
+ * Sysclock 480 Mhz, bus clocks 240 Mhz
+ */
+void SysClkFullSpeed() {
+	RCC_ClkInitTypeDef RCC_ClkInitStruct = { };
+	/** Initializes the CPU, AHB and APB buses clocks */
+	RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+			| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1
+			| RCC_CLOCKTYPE_D1PCLK1;
+	RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+	RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
+	RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
+	RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
+	RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
+	RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
+	RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
+	if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
+		Error_Handler();
+	} else
+		SystemCoreClockUpdate();
+}
+
diff --git a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
new file mode 100644
index 0000000000..29801f1e13
--- /dev/null
+++ b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
@@ -0,0 +1,286 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2020-2021, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/*----------------------------------------------------------------------------
+ *        STM32 pins number
+ *----------------------------------------------------------------------------*/
+#define PA0                     PIN_A0
+#define PA1                     PIN_A1
+#define PA2                     PIN_A2
+#define PA3                     PIN_A3
+#define PA4                     PIN_A4
+#define PA5                     PIN_A5
+#define PA6                     PIN_A6
+#define PA7                     PIN_A7
+#define PA8                     8
+#define PA9                     9
+#define PA10                    10
+#define PA11                    11
+#define PA12                    12
+#define PA13                    13
+#define PA14                    14
+#define PA15                    15
+#define PB0                     PIN_A8
+#define PB1                     PIN_A9
+#define PB2                     18
+#define PB3                     19
+#define PB4                     20
+#define PB5                     21
+#define PB6                     22
+#define PB7                     23
+#define PB8                     24
+#define PB9                     25
+#define PB10                    26
+#define PB11                    27
+#define PB12                    28
+#define PB13                    29
+#define PB14                    30
+#define PB15                    31
+#define PC0                     PIN_A10
+#define PC1                     PIN_A11
+#define PC4                     PIN_A12
+#define PC5                     PIN_A13
+#define PC6                     36
+#define PC7                     37
+#define PC8                     38
+#define PC9                     39
+#define PC10                    40
+#define PC11                    41
+#define PC12                    42
+#define PC13                    43
+#define PC14                    44
+#define PC15                    45
+#define PD0                     46
+#define PD1                     47
+#define PD2                     48
+#define PD3                     49
+#define PD4                     50
+#define PD5                     51
+#define PD6                     52
+#define PD7                     53
+#define PD8                     54
+#define PD9                     55
+#define PD10                    56
+#define PD11                    57
+#define PD12                    58
+#define PD13                    59
+#define PD14                    60
+#define PD15                    61
+#define PE0                     62
+#define PE1                     63
+#define PE2                     64
+#define PE3                     65
+#define PE4                     66
+#define PE5                     67
+#define PE6                     68
+#define PE7                     69
+#define PE8                     70
+#define PE9                     71
+#define PE10                    72
+#define PE11                    73
+#define PE12                    74
+#define PE13                    75
+#define PE14                    76
+#define PE15                    77
+#define PH0                     78
+#define PH1                     79
+#define PC2_C                   PIN_A14
+#define PC3_C                   PIN_A15
+
+// Alternate pins number
+#define PA0_ALT1                (PA0  | ALT1)
+#define PA1_ALT1                (PA1  | ALT1)
+#define PA1_ALT2                (PA1  | ALT2)
+#define PA2_ALT1                (PA2  | ALT1)
+#define PA2_ALT2                (PA2  | ALT2)
+#define PA3_ALT1                (PA3  | ALT1)
+#define PA3_ALT2                (PA3  | ALT2)
+#define PA4_ALT1                (PA4  | ALT1)
+#define PA4_ALT2                (PA4  | ALT2)
+#define PA5_ALT1                (PA5  | ALT1)
+#define PA6_ALT1                (PA6  | ALT1)
+#define PA7_ALT1                (PA7  | ALT1)
+#define PA7_ALT2                (PA7  | ALT2)
+#define PA7_ALT3                (PA7  | ALT3)
+#define PA9_ALT1                (PA9  | ALT1)
+#define PA10_ALT1               (PA10 | ALT1)
+#define PA11_ALT1               (PA11 | ALT1)
+#define PA12_ALT1               (PA12 | ALT1)
+#define PA15_ALT1               (PA15 | ALT1)
+#define PA15_ALT2               (PA15 | ALT2)
+#define PB0_ALT1                (PB0  | ALT1)
+#define PB0_ALT2                (PB0  | ALT2)
+#define PB1_ALT1                (PB1  | ALT1)
+#define PB1_ALT2                (PB1  | ALT2)
+#define PB3_ALT1                (PB3  | ALT1)
+#define PB3_ALT2                (PB3  | ALT2)
+#define PB4_ALT1                (PB4  | ALT1)
+#define PB4_ALT2                (PB4  | ALT2)
+#define PB5_ALT1                (PB5  | ALT1)
+#define PB5_ALT2                (PB5  | ALT2)
+#define PB6_ALT1                (PB6  | ALT1)
+#define PB6_ALT2                (PB6  | ALT2)
+#define PB7_ALT1                (PB7  | ALT1)
+#define PB8_ALT1                (PB8  | ALT1)
+#define PB8_ALT2                (PB8  | ALT2)
+#define PB9_ALT1                (PB9  | ALT1)
+#define PB9_ALT2                (PB9  | ALT2)
+#define PB14_ALT1               (PB14 | ALT1)
+#define PB14_ALT2               (PB14 | ALT2)
+#define PB15_ALT1               (PB15 | ALT1)
+#define PB15_ALT2               (PB15 | ALT2)
+#define PC0_ALT1                (PC0  | ALT1)
+#define PC0_ALT2                (PC0  | ALT2)
+#define PC1_ALT1                (PC1  | ALT1)
+#define PC1_ALT2                (PC1  | ALT2)
+#define PC4_ALT1                (PC4  | ALT1)
+#define PC5_ALT1                (PC5  | ALT1)
+#define PC6_ALT1                (PC6  | ALT1)
+#define PC6_ALT2                (PC6  | ALT2)
+#define PC7_ALT1                (PC7  | ALT1)
+#define PC7_ALT2                (PC7  | ALT2)
+#define PC8_ALT1                (PC8  | ALT1)
+#define PC9_ALT1                (PC9  | ALT1)
+#define PC10_ALT1               (PC10 | ALT1)
+#define PC11_ALT1               (PC11 | ALT1)
+
+#define NUM_DIGITAL_PINS        82
+#define NUM_DUALPAD_PINS        2
+#define NUM_ANALOG_INPUTS       16
+
+// On-board LED pin number
+#ifndef LED_BUILTIN
+	#define LED_BUILTIN			PE3
+#endif
+
+// On-board user button
+#ifndef USER_BTN
+  #define USER_BTN              PC13
+#endif
+
+// SPI definitions
+#ifndef PIN_SPI_SS
+  #define PIN_SPI_SS            PA4
+#endif
+#ifndef PIN_SPI_SS1
+  #define PIN_SPI_SS1           PA15
+#endif
+#ifndef PIN_SPI_SS2
+  #define PIN_SPI_SS2           PNUM_NOT_DEFINED
+#endif
+#ifndef PIN_SPI_SS3
+  #define PIN_SPI_SS3           PNUM_NOT_DEFINED
+#endif
+#ifndef PIN_SPI_MOSI
+  #define PIN_SPI_MOSI          PA7
+#endif
+#ifndef PIN_SPI_MISO
+  #define PIN_SPI_MISO          PA6
+#endif
+#ifndef PIN_SPI_SCK
+  #define PIN_SPI_SCK           PA5
+#endif
+
+// I2C definitions
+#ifndef PIN_WIRE_SDA
+  #define PIN_WIRE_SDA          PB7
+#endif
+#ifndef PIN_WIRE_SCL
+  #define PIN_WIRE_SCL          PB6
+#endif
+
+// Timer Definitions
+// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
+#ifndef TIMER_TONE
+  #define TIMER_TONE            TIM6
+#endif
+#ifndef TIMER_SERVO
+  #define TIMER_SERVO           TIM7
+#endif
+
+// UART Definitions
+#ifndef SERIAL_UART_INSTANCE
+  #define SERIAL_UART_INSTANCE  4
+#endif
+
+// Default pin used for generic 'Serial' instance
+// Mandatory for Firmata
+#ifndef PIN_SERIAL_RX
+  #define PIN_SERIAL_RX         PA10
+#endif
+#ifndef PIN_SERIAL_TX
+  #define PIN_SERIAL_TX         PA9
+#endif
+
+// Extra HAL modules
+#if !defined(HAL_DAC_MODULE_DISABLED)
+  #define HAL_DAC_MODULE_ENABLED
+#endif
+#if !defined(HAL_ETH_MODULE_DISABLED)
+  #define HAL_ETH_MODULE_ENABLED
+#endif
+#if !defined(HAL_QSPI_MODULE_DISABLED)
+  #define HAL_QSPI_MODULE_ENABLED
+#endif
+#if !defined(HAL_SD_MODULE_DISABLED)
+  #define HAL_SD_MODULE_ENABLED
+#endif
+
+/*----------------------------------------------------------------------------
+ *        Arduino objects - C++ only
+ *----------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+  // These serial port names are intended to allow libraries and architecture-neutral
+  // sketches to automatically default to the correct port name for a particular type
+  // of use.  For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
+  // the first hardware serial port whose RX/TX pins are not dedicated to another use.
+  //
+  // SERIAL_PORT_MONITOR        Port which normally prints to the Arduino Serial Monitor
+  //
+  // SERIAL_PORT_USBVIRTUAL     Port which is USB virtual serial
+  //
+  // SERIAL_PORT_LINUXBRIDGE    Port which connects to a Linux system via Bridge library
+  //
+  // SERIAL_PORT_HARDWARE       Hardware serial port, physical RX & TX pins.
+  //
+  // SERIAL_PORT_HARDWARE_OPEN  Hardware serial ports which are open for use.  Their RX & TX
+  //                            pins are NOT connected to anything by default.
+  #ifndef SERIAL_PORT_MONITOR
+    #define SERIAL_PORT_MONITOR   Serial
+  #endif
+  #ifndef SERIAL_PORT_HARDWARE
+    #define SERIAL_PORT_HARDWARE  Serial
+  #endif
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * power saving mode, mcu runs significantly cooler
+ * Sysclock 240 Mhz, bus clocks 120 Mhz
+ */
+void SysClkHalfSpeed();
+
+/*
+ * full speed - sysclk from PLL1 P - 480 Mhz
+ * Sysclock 480 Mhz, bus clocks 240 Mhz
+ */
+void SysClkFullSpeed();
+
+#ifdef __cplusplus
+}
+#endif

From 685ac83ce68ee2e73ace31238318635869477fce Mon Sep 17 00:00:00 2001
From: ag88 <ag88@github.com>
Date: Sun, 21 Nov 2021 06:53:48 +0800
Subject: [PATCH 02/15] update label, more precise

change label WeActMiniH743VITX instead of WeActMiniH7xx
---
 boards.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/boards.txt b/boards.txt
index 0a7f82b07c..4d16f9059e 100644
--- a/boards.txt
+++ b/boards.txt
@@ -3892,8 +3892,8 @@ GenH7.menu.pnum.GENERIC_H743VITX.build.board=GENERIC_H743VITX
 GenH7.menu.pnum.GENERIC_H743VITX.build.product_line=STM32H743xx
 GenH7.menu.pnum.GENERIC_H743VITX.build.variant=STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)
 
-# WeAct MiniSTM32H7xx
-GenH7.menu.pnum.WeActMiniH743VITX=WeAct MiniSTM32H7xx
+# WeAct MiniSTM32H743VITX
+GenH7.menu.pnum.WeActMiniH743VITX=WeAct MiniSTM32H743VITX
 GenH7.menu.pnum.WeActMiniH743VITX.upload.maximum_size=2097152
 GenH7.menu.pnum.WeActMiniH743VITX.upload.maximum_data_size=524288
 GenH7.menu.pnum.WeActMiniH743VITX.build.board=WeActMiniH743VITX

From 540479d5856f660eea30c7990d7efe5fd13e3d92 Mon Sep 17 00:00:00 2001
From: ag88 <ag88@github.com>
Date: Sun, 21 Nov 2021 21:57:28 +0800
Subject: [PATCH 03/15] add board ifdef to prevent cross dependencies

update variant_WeActMiniH743VITX.cpp add board ifdef to prevent other
boards from picking up definitions from this board (i.e. prevent cross
dependencies). This is to allow other similar boards to co-exist.
---
 .../variant_WeActMiniH743VITX.cpp                               | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp
index 047ea83010..fefb67fcaa 100644
--- a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp
+++ b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp
@@ -11,6 +11,7 @@
  *******************************************************************************
  */
 
+#ifdef ARDUINO_WeActMiniH743VITX
 #include "pins_arduino.h"
 
 // Digital PinName array
@@ -319,3 +320,4 @@ void SysClkFullSpeed() {
 		SystemCoreClockUpdate();
 }
 
+#endif // ARDUINO_WeActMiniH743VITX

From 71c53cb99ba26e319160b3a9bc79ba53d2c9f501 Mon Sep 17 00:00:00 2001
From: ag88 <ag88@github.com>
Date: Tue, 23 Nov 2021 02:28:16 +0800
Subject: [PATCH 04/15] fix astyle spacing errors

fix some astyle errors caused by spacing formatting (e.g. use space
instead of tabs)
---
 .../variant_WeActMiniH743VITX.cpp             | 74 ++++++++++---------
 .../variant_WeActMiniH743VITX.h               |  2 +-
 2 files changed, 40 insertions(+), 36 deletions(-)

diff --git a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp
index fefb67fcaa..242c608eb6 100644
--- a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp
+++ b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp
@@ -277,47 +277,51 @@ WEAK void SystemClock_Config(void)
  * power saving mode, mcu runs significantly cooler
  * Sysclock 240 Mhz, bus clocks 120 Mhz
  */
-void SysClkHalfSpeed() {
-	RCC_ClkInitTypeDef RCC_ClkInitStruct = { };
-	/** Initializes the CPU, AHB and APB buses clocks */
-	RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
-			| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1
-			| RCC_CLOCKTYPE_D1PCLK1;
-	RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-	//RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
-	RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV2;
-	RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
-	RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
-	RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
-	RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
-	RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
-	if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
-		Error_Handler();
-	} else
-		SystemCoreClockUpdate();
+void SysClkHalfSpeed()
+{
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = { };
+  /** Initializes the CPU, AHB and APB buses clocks */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1
+                                | RCC_CLOCKTYPE_D1PCLK1;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  //RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV2;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
+  RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
+    Error_Handler();
+  } else {
+    SystemCoreClockUpdate();
+  }
 }
 
 /*
  * full speed - sysclk from PLL1 P - 480 Mhz
  * Sysclock 480 Mhz, bus clocks 240 Mhz
  */
-void SysClkFullSpeed() {
-	RCC_ClkInitTypeDef RCC_ClkInitStruct = { };
-	/** Initializes the CPU, AHB and APB buses clocks */
-	RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
-			| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1
-			| RCC_CLOCKTYPE_D1PCLK1;
-	RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-	RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
-	RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
-	RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
-	RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
-	RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
-	RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
-	if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
-		Error_Handler();
-	} else
-		SystemCoreClockUpdate();
+void SysClkFullSpeed()
+{
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = { };
+  /** Initializes the CPU, AHB and APB buses clocks */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1
+                                | RCC_CLOCKTYPE_D1PCLK1;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
+  RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
+    Error_Handler();
+  } else {
+    SystemCoreClockUpdate();
+  }
 }
 
 #endif // ARDUINO_WeActMiniH743VITX
diff --git a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
index 29801f1e13..b5185e2705 100644
--- a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
+++ b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
@@ -161,7 +161,7 @@
 
 // On-board LED pin number
 #ifndef LED_BUILTIN
-	#define LED_BUILTIN			PE3
+  #define LED_BUILTIN     PE3
 #endif
 
 // On-board user button

From 86228aae21a01d5f98970c0bf111b01b379d55e2 Mon Sep 17 00:00:00 2001
From: ag88 <ag88@github.com>
Date: Wed, 24 Nov 2021 18:35:39 +0800
Subject: [PATCH 05/15] update README.md entry for board

update README.md entry for WeAct MiniSTM32H743VIT6 board
---
 README.md | 1 +
 1 file changed, 1 insertion(+)

diff --git a/README.md b/README.md
index c14ca50537..fec6f574e6 100644
--- a/README.md
+++ b/README.md
@@ -329,6 +329,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 | :green_heart: | STM32H742ZG<br>STM32H742ZI | Generic Board | *2.0.0* |  |
 | :green_heart: | STM32H743IG<br>STM32H743II | Generic Board | *2.0.0* |  |
 | :green_heart: | STM32H743VG<br>STM32H743VI | Generic Board | *2.0.0* |  |
+| :yellow_heart: | STM32H743VG<br>STM32H743VI | [WeAct MiniSTM32H743VIT6](https://github.com/WeActTC/MiniSTM32H7xx) | *2.2.0* | [More info](https://github.com/stm32duino/Arduino_Core_STM32/pull/1552) |
 | :green_heart: | STM32H743ZG<br>STM32H743ZI | Generic Board | *2.0.0* |  |
 | :green_heart: | STM32H747AG<br>STM32H747AI | Generic Board | *2.0.0* |  |
 | :green_heart: | STM32H747IG<br>STM32H747II | Generic Board | *2.0.0* |  |

From 6ea14943cb947a14985486273644717786cf3e97 Mon Sep 17 00:00:00 2001
From: Frederic Pillon <frederic.pillon@st.com>
Date: Wed, 24 Nov 2021 16:01:10 +0100
Subject: [PATCH 06/15] fix: typo

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
---
 README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README.md b/README.md
index fec6f574e6..735f8ab1f5 100644
--- a/README.md
+++ b/README.md
@@ -329,7 +329,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 | :green_heart: | STM32H742ZG<br>STM32H742ZI | Generic Board | *2.0.0* |  |
 | :green_heart: | STM32H743IG<br>STM32H743II | Generic Board | *2.0.0* |  |
 | :green_heart: | STM32H743VG<br>STM32H743VI | Generic Board | *2.0.0* |  |
-| :yellow_heart: | STM32H743VG<br>STM32H743VI | [WeAct MiniSTM32H743VIT6](https://github.com/WeActTC/MiniSTM32H7xx) | *2.2.0* | [More info](https://github.com/stm32duino/Arduino_Core_STM32/pull/1552) |
+| :yellow_heart: | STM32H743VI | [WeAct MiniSTM32H743VIT6](https://github.com/WeActTC/MiniSTM32H7xx) | **2.2.0** | [More info](https://github.com/stm32duino/Arduino_Core_STM32/pull/1552) |
 | :green_heart: | STM32H743ZG<br>STM32H743ZI | Generic Board | *2.0.0* |  |
 | :green_heart: | STM32H747AG<br>STM32H747AI | Generic Board | *2.0.0* |  |
 | :green_heart: | STM32H747IG<br>STM32H747II | Generic Board | *2.0.0* |  |

From 68af9e4cacbb7c7eba65cb28962cd89d31d35cc5 Mon Sep 17 00:00:00 2001
From: Frederic Pillon <frederic.pillon@st.com>
Date: Wed, 24 Nov 2021 16:02:28 +0100
Subject: [PATCH 07/15] chore: move WeActH743 entry before generic one

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
---
 boards.txt | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/boards.txt b/boards.txt
index 4d16f9059e..515678dbb0 100644
--- a/boards.txt
+++ b/boards.txt
@@ -3748,6 +3748,15 @@ GenH7.menu.pnum.DAISY_PATCH_SM.build.variant=STM32H7xx/H742I(G-I)(K-T)_H743I(G-I
 GenH7.menu.pnum.DAISY_PATCH_SM.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
 GenH7.menu.pnum.DAISY_PATCH_SM.build.ldscript=DAISY_SEED.ld
 
+# WeAct MiniSTM32H743VITX
+GenH7.menu.pnum.WeActMiniH743VITX=WeAct MiniSTM32H743VITX
+GenH7.menu.pnum.WeActMiniH743VITX.upload.maximum_size=2097152
+GenH7.menu.pnum.WeActMiniH743VITX.upload.maximum_data_size=524288
+GenH7.menu.pnum.WeActMiniH743VITX.build.board=WeActMiniH743VITX
+GenH7.menu.pnum.WeActMiniH743VITX.build.product_line=STM32H743xx
+GenH7.menu.pnum.WeActMiniH743VITX.build.variant=STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)
+GenH7.menu.pnum.WeActMiniH743VITX.build.variant_h=variant_{build.board}.h
+
 # Generic H742IGKx
 GenH7.menu.pnum.GENERIC_H742IGKX=Generic H742IGKx
 GenH7.menu.pnum.GENERIC_H742IGKX.upload.maximum_size=1048576
@@ -3892,15 +3901,6 @@ GenH7.menu.pnum.GENERIC_H743VITX.build.board=GENERIC_H743VITX
 GenH7.menu.pnum.GENERIC_H743VITX.build.product_line=STM32H743xx
 GenH7.menu.pnum.GENERIC_H743VITX.build.variant=STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)
 
-# WeAct MiniSTM32H743VITX
-GenH7.menu.pnum.WeActMiniH743VITX=WeAct MiniSTM32H743VITX
-GenH7.menu.pnum.WeActMiniH743VITX.upload.maximum_size=2097152
-GenH7.menu.pnum.WeActMiniH743VITX.upload.maximum_data_size=524288
-GenH7.menu.pnum.WeActMiniH743VITX.build.board=WeActMiniH743VITX
-GenH7.menu.pnum.WeActMiniH743VITX.build.product_line=STM32H743xx
-GenH7.menu.pnum.WeActMiniH743VITX.build.variant=STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)
-GenH7.menu.pnum.WeActMiniH743VITX.build.variant_h=variant_{build.board}.h
-
 # Generic H743ZGTx
 GenH7.menu.pnum.GENERIC_H743ZGTX=Generic H743ZGTx
 GenH7.menu.pnum.GENERIC_H743ZGTX.upload.maximum_size=1048576

From 796463c4720f2ab1dfc70af40135147a35f164b8 Mon Sep 17 00:00:00 2001
From: Frederic Pillon <frederic.pillon@st.com>
Date: Wed, 24 Nov 2021 16:16:06 +0100
Subject: [PATCH 08/15] chore: cleanup

---
 .../variant_WeActMiniH743VITX.cpp             | 45 ++++++++-----------
 .../variant_WeActMiniH743VITX.h               |  4 +-
 2 files changed, 20 insertions(+), 29 deletions(-)

diff --git a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp
index 242c608eb6..4b11c6375f 100644
--- a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp
+++ b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp
@@ -136,10 +136,10 @@ WEAK void SystemClock_Config(void)
   HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
   /** Configure the main internal regulator output voltage
    *  Run mode (VOS0 to VOS3)
-   * Scale 0: boosted performance (available only with LDO regulator)
-   * Scale 1: high performance
-   * Scale 2: medium performance and consumption
-   * Scale 3: optimized performance and low-power consumption
+   *  Scale 0: boosted performance (available only with LDO regulator)
+   *  Scale 1: high performance
+   *  Scale 2: medium performance and consumption
+   *  Scale 3: optimized performance and low-power consumption
    *
   */
   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
@@ -148,7 +148,6 @@ WEAK void SystemClock_Config(void)
   /** Initializes the RCC Oscillators according to the specified parameters
   * in the RCC_OscInitTypeDef structure.
   */
-  //RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSI;
   /* PLL1 pclk is sysclk 480 Mhz */
   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
@@ -174,9 +173,9 @@ WEAK void SystemClock_Config(void)
    * RCC_PLL1VCIRANGE_1  Clock range frequency between 2 and 4 MHz
    * RCC_PLL1VCIRANGE_2  Clock range frequency between 4 and 8 MHz
    * RCC_PLL1VCIRANGE_3  Clock range frequency between 8 and 16 MHz */
-  /*PLLRGE: RCC_PLL1VCIRANGE_2 Clock range frequency between 4 and 8 MHz  */
+  /* PLLRGE: RCC_PLL1VCIRANGE_2 Clock range frequency between 4 and 8 MHz  */
   RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
-  /* VCOSEL PLL1VCOWIDE 2-16 Mhz*/
+  /* VCOSEL PLL1VCOWIDE 2-16 Mhz */
   RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
   RCC_OscInitStruct.PLL.PLLFRACN = 0;
   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
@@ -207,24 +206,24 @@ WEAK void SystemClock_Config(void)
 
   /* PLL1 qclk used for USB 48 Mhz */
   /* PLL1 qclk also used for FMC, QUADSPI, SDMMC, RNG, SAI */
-  /* PLL2 pclk is needed for adc max 80 Mhz (p,q,r same)*/
+  /* PLL2 pclk is needed for adc max 80 Mhz (p,q,r same) */
   /* PLL2 pclk also used for LP timers 2,3,4,5, SPI 1,2,3 */
-  /* PLL2 qclk is needed for uart, can, spi4,5,6 80 Mhz*/
-  /* PLL3 r clk is needed for i2c 80 Mhz (p,q,r same)*/
+  /* PLL2 qclk is needed for uart, can, spi4,5,6 80 Mhz */
+  /* PLL3 r clk is needed for i2c 80 Mhz (p,q,r same) */
   PeriphClkInitStruct.PLL2.PLL2M = 15; // M DIV 15 vco 25 / 15 ~ 1.667 Mhz
   PeriphClkInitStruct.PLL2.PLL2N = 96; // N MUL 96
-  PeriphClkInitStruct.PLL2.PLL2P = 2; // P div 2
-  PeriphClkInitStruct.PLL2.PLL2Q = 2; // Q div 2
-  PeriphClkInitStruct.PLL2.PLL2R = 2; // R div 2
+  PeriphClkInitStruct.PLL2.PLL2P = 2;  // P div 2
+  PeriphClkInitStruct.PLL2.PLL2Q = 2;  // Q div 2
+  PeriphClkInitStruct.PLL2.PLL2R = 2;  // R div 2
   // RCC_PLL1VCIRANGE_0  Clock range frequency between 1 and 2 MHz
   PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_0;
   PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOMEDIUM;
   PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
   PeriphClkInitStruct.PLL3.PLL3M = 15; // M DIV 15 vco 25 / 15 ~ 1.667 Mhz
   PeriphClkInitStruct.PLL3.PLL3N = 96; // N MUL 96
-  PeriphClkInitStruct.PLL3.PLL3P = 2; // P div 2
-  PeriphClkInitStruct.PLL3.PLL3Q = 2; // Q div 2
-  PeriphClkInitStruct.PLL3.PLL3R = 2; // R div 2
+  PeriphClkInitStruct.PLL3.PLL3P = 2;  // P div 2
+  PeriphClkInitStruct.PLL3.PLL3Q = 2;  // Q div 2
+  PeriphClkInitStruct.PLL3.PLL3R = 2;  // R div 2
   // RCC_PLL1VCIRANGE_0  Clock range frequency between 1 and 2 MHz
   PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_0;
   PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3VCOMEDIUM;
@@ -264,17 +263,10 @@ WEAK void SystemClock_Config(void)
   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
     Error_Handler();
   }
-
-
-
-  /** Enable USB Voltage detector
-  */
-  //HAL_PWREx_EnableUSBVoltageDetector();
-
 }
 
 /*
- * power saving mode, mcu runs significantly cooler
+ * Power saving mode, mcu runs significantly cooler
  * Sysclock 240 Mhz, bus clocks 120 Mhz
  */
 void SysClkHalfSpeed()
@@ -285,7 +277,6 @@ void SysClkHalfSpeed()
                                 | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1
                                 | RCC_CLOCKTYPE_D1PCLK1;
   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-  //RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
   RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV2;
   RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
   RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
@@ -300,7 +291,7 @@ void SysClkHalfSpeed()
 }
 
 /*
- * full speed - sysclk from PLL1 P - 480 Mhz
+ * Full speed - sysclk from PLL1 P - 480 Mhz
  * Sysclock 480 Mhz, bus clocks 240 Mhz
  */
 void SysClkFullSpeed()
@@ -324,4 +315,4 @@ void SysClkFullSpeed()
   }
 }
 
-#endif // ARDUINO_WeActMiniH743VITX
+#endif /* ARDUINO_WeActMiniH743VITX */
diff --git a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
index b5185e2705..4d9d762247 100644
--- a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
+++ b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
@@ -270,13 +270,13 @@ extern "C" {
 #endif
 
 /*
- * power saving mode, mcu runs significantly cooler
+ * Power saving mode, mcu runs significantly cooler
  * Sysclock 240 Mhz, bus clocks 120 Mhz
  */
 void SysClkHalfSpeed();
 
 /*
- * full speed - sysclk from PLL1 P - 480 Mhz
+ * Full speed - sysclk from PLL1 P - 480 Mhz
  * Sysclock 480 Mhz, bus clocks 240 Mhz
  */
 void SysClkFullSpeed();

From fa8f940075825b23d23fbf0b081028351682cd22 Mon Sep 17 00:00:00 2001
From: Frederic Pillon <frederic.pillon@st.com>
Date: Wed, 24 Nov 2021 18:58:13 +0100
Subject: [PATCH 09/15] chore: reorder pins based on P1 and P2 connectors

and add descriptions

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
---
 .../variant_WeActMiniH743VITX.cpp             | 196 +++++++++---------
 .../variant_WeActMiniH743VITX.h               | 163 ++++++++-------
 2 files changed, 181 insertions(+), 178 deletions(-)

diff --git a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp
index 4b11c6375f..098f05e760 100644
--- a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp
+++ b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp
@@ -16,108 +16,108 @@
 
 // Digital PinName array
 const PinName digitalPin[] = {
-  PA_0,   // D0/A0
-  PA_1,   // D1/A1
-  PA_2,   // D2/A2
-  PA_3,   // D3/A3
-  PA_4,   // D4/A4
-  PA_5,   // D5/A5
-  PA_6,   // D6/A6
-  PA_7,   // D7/A7
-  PA_8,   // D8
-  PA_9,   // D9
-  PA_10,  // D10
-  PA_11,  // D11
-  PA_12,  // D12
-  PA_13,  // D13
-  PA_14,  // D14
-  PA_15,  // D15
-  PB_0,   // D16/A8
-  PB_1,   // D17/A9
-  PB_2,   // D18
-  PB_3,   // D19
-  PB_4,   // D20
-  PB_5,   // D21
-  PB_6,   // D22
-  PB_7,   // D23
-  PB_8,   // D24
-  PB_9,   // D25
-  PB_10,  // D26
-  PB_11,  // D27
-  PB_12,  // D28
-  PB_13,  // D29
-  PB_14,  // D30
-  PB_15,  // D31
-  PC_0,   // D32/A10
-  PC_1,   // D33/A11
-  PC_4,   // D34/A12
-  PC_5,   // D35/A13
-  PC_6,   // D36
-  PC_7,   // D37
-  PC_8,   // D38
-  PC_9,   // D39
-  PC_10,  // D40
-  PC_11,  // D41
-  PC_12,  // D42
-  PC_13,  // D43
-  PC_14,  // D44
-  PC_15,  // D45
-  PD_0,   // D46
-  PD_1,   // D47
-  PD_2,   // D48
-  PD_3,   // D49
-  PD_4,   // D50
-  PD_5,   // D51
-  PD_6,   // D52
-  PD_7,   // D53
-  PD_8,   // D54
-  PD_9,   // D55
-  PD_10,  // D56
-  PD_11,  // D57
-  PD_12,  // D58
-  PD_13,  // D59
-  PD_14,  // D60
-  PD_15,  // D61
-  PE_0,   // D62
-  PE_1,   // D63
-  PE_2,   // D64
-  PE_3,   // D65
-  PE_4,   // D66
-  PE_5,   // D67
-  PE_6,   // D68
-  PE_7,   // D69
-  PE_8,   // D70
-  PE_9,   // D71
-  PE_10,  // D72
-  PE_11,  // D73
-  PE_12,  // D74
-  PE_13,  // D75
-  PE_14,  // D76
-  PE_15,  // D77
-  PH_0,   // D78
-  PH_1,   // D79
-  PC_2_C, // D80/A14
-  PC_3_C  // D81/A15
+  PE_1,   // D0
+  PE_0,   // D1
+  PB_9,   // D2
+  PB_8,   // D3
+  PB_7,   // D4
+  PB_6,   // D5
+  PB_5,   // D6
+  PB_4,   // D7
+  PB_3,   // D8
+  PD_7,   // D9
+  PD_6,   // D10
+  PD_5,   // D11
+  PD_4,   // D12
+  PD_3,   // D13
+  PD_2,   // D14
+  PD_1,   // D15
+  PD_0,   // D16
+  PC_12,  // D17
+  PC_11,  // D18
+  PC_10,  // D19
+  PA_15,  // D20
+  PA_12,  // D21
+  PA_11,  // D22
+  PA_10,  // D23
+  PA_9,   // D24
+  PA_8,   // D25
+  PC_9,   // D26
+  PC_8,   // D27
+  PC_7,   // D28
+  PC_6,   // D29
+  PD_15,  // D30
+  PD_14,  // D31
+  PD_13,  // D32
+  PD_12,  // D33
+  PD_11,  // D34
+  PD_10,  // D35
+  PD_9,   // D36
+  PD_8,   // D37
+  PB_15,  // D38
+  PB_14,  // D39
+  PB_13,  // D40
+  PB_12,  // D41
+  PE_2,   // D42
+  PE_3,   // D43
+  PE_4,   // D44
+  PE_5,   // D45
+  PE_6,   // D46
+  PC_13,  // D47
+  PC_0,   // D48/A0
+  PC_1,   // D49/A1
+  PC_2_C, // D50/A2
+  PC_3_C, // D51/A3
+  PA_0,   // D52/A4
+  PA_1,   // D53/A5
+  PA_2,   // D54/A6
+  PA_3,   // D55/A7
+  PA_4,   // D56/A8
+  PA_5,   // D57/A9
+  PA_6,   // D58/A10
+  PA_7,   // D59/A11
+  PC_4,   // D60/A12
+  PC_5,   // D61/A13
+  PB_0,   // D62/A14
+  PB_1,   // D63/A15
+  PB_2,   // D64
+  PE_7,   // D65
+  PE_8,   // D66
+  PE_9,   // D67
+  PE_10,  // D68
+  PE_11,  // D69
+  PE_12,  // D70
+  PE_13,  // D71
+  PE_14,  // D72
+  PE_15,  // D73
+  PB_10,  // D74
+  PB_11,  // D75
+  PA_13,  // D76
+  PA_14,  // D77
+  PC_14,  // D78
+  PC_15,  // D79
+  PH_0,   // D80
+  PH_1    // D81
 };
 
 // Analog (Ax) pin number array
 const uint32_t analogInputPin[] = {
-  0,  // A0,  PA0
-  1,  // A1,  PA1
-  2,  // A2,  PA2
-  3,  // A3,  PA3
-  4,  // A4,  PA4
-  5,  // A5,  PA5
-  6,  // A6,  PA6
-  7,  // A7,  PA7
-  16, // A8,  PB0
-  17, // A9,  PB1
-  32, // A10, PC0
-  33, // A11, PC1
-  34, // A12, PC4
-  35, // A13, PC5
-  80, // A14, PC2_C
-  81  // A15, PC3_C
+  48, // A0,  PC0
+  49, // A1,  PC1
+  50, // A2,  PC2_C
+  51, // A3,  PC3_C
+  52, // A4,  PA0
+  53, // A5,  PA1
+  54, // A6,  PA2
+  55, // A7,  PA3
+  56, // A8,  PA4
+  57, // A9,  PA5
+  58, // A10, PA6
+  59, // A11, PA7
+  60, // A12, PC4
+  61, // A13, PC5
+  62, // A14, PB0
+  63  // A15, PB1
 };
 
 /**
diff --git a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
index 4d9d762247..55ac22caed 100644
--- a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
+++ b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
@@ -15,88 +15,91 @@
 /*----------------------------------------------------------------------------
  *        STM32 pins number
  *----------------------------------------------------------------------------*/
-#define PA0                     PIN_A0
-#define PA1                     PIN_A1
-#define PA2                     PIN_A2
-#define PA3                     PIN_A3
-#define PA4                     PIN_A4
-#define PA5                     PIN_A5
-#define PA6                     PIN_A6
-#define PA7                     PIN_A7
-#define PA8                     8
-#define PA9                     9
-#define PA10                    10
-#define PA11                    11
-#define PA12                    12
-#define PA13                    13
-#define PA14                    14
-#define PA15                    15
-#define PB0                     PIN_A8
-#define PB1                     PIN_A9
-#define PB2                     18
-#define PB3                     19
-#define PB4                     20
-#define PB5                     21
-#define PB6                     22
-#define PB7                     23
-#define PB8                     24
-#define PB9                     25
-#define PB10                    26
-#define PB11                    27
-#define PB12                    28
-#define PB13                    29
-#define PB14                    30
-#define PB15                    31
-#define PC0                     PIN_A10
-#define PC1                     PIN_A11
+/* P1 connector - Left side */
+#define PE1                     0       // DVP D3
+#define PE0                     1       // DVP D2
+#define PB9                     2       // DVP I2C1 SDA
+#define PB8                     3       // DVP I2C1 SCL
+#define PB7                     4       // DVP VSYNC
+#define PB6                     5       // QSPI NCS
+#define PB5                     6
+#define PB4                     7       // SPI1 Flash MISO
+#define PB3                     8       // SPI1 Flash CLK
+#define PD7                     9       // SPI1 Flash MOSI
+#define PD6                     10      // SPI SW Flash CS if SB3
+#define PD5                     11
+#define PD4                     12      // µSD SW if SB2
+#define PD3                     13      // DVP D5
+#define PD2                     14      // µSD SDMMC1 CMD
+#define PD1                     15
+#define PD0                     16
+#define PC12                    17      // µSD SDMMC1 CK
+#define PC11                    18      // µSD SDMMC1 D3
+#define PC10                    19      // µSD SDMMC1 D2
+#define PA15                    20
+#define PA12                    21      // USB DP
+#define PA11                    22      // USB DM
+#define PA10                    23
+#define PA9                     24
+#define PA8                     25      // DVP XCLK RCC_MCO_1
+#define PC9                     26      // µSD SDMMC1 D1
+#define PC8                     27      // µSD SDMMC1 D0
+#define PC7                     28      // DVP D1
+#define PC6                     29      // DVP D0
+#define PD15                    30
+#define PD14                    31
+#define PD13                    32      // QSPI IO3
+#define PD12                    33      // QSPI IO1
+#define PD11                    34      // QSPI IO0
+#define PD10                    35
+#define PD9                     36
+#define PD8                     37
+#define PB15                    38      // SPI2 MOSI
+#define PB14                    39      // SPI2 MISO
+#define PB13                    40      // SPI2 CLM
+#define PB12                    41      // SPI2 SSEL
+/* P2 connector - Right side */
+#define PE2                     42      // QSPI IO2
+#define PE3                     43      // BLUE_LED
+#define PE4                     44      // DVP D4
+#define PE5                     45      // DVP D6
+#define PE6                     46      // DVP D7
+#define PC13                    47      // K1
+#define PC0                     PIN_A0
+#define PC1                     PIN_A1
+#define PC2_C                   PIN_A2
+#define PC3_C                   PIN_A3
+#define PA0                     PIN_A4
+#define PA1                     PIN_A5
+#define PA2                     PIN_A6
+#define PA3                     PIN_A7
+#define PA4                     PIN_A8  // DVP HSYNC
+#define PA5                     PIN_A9
+#define PA6                     PIN_A10 // DVP PCLK
+#define PA7                     PIN_A11 // DVP PWDN if SB1
 #define PC4                     PIN_A12
 #define PC5                     PIN_A13
-#define PC6                     36
-#define PC7                     37
-#define PC8                     38
-#define PC9                     39
-#define PC10                    40
-#define PC11                    41
-#define PC12                    42
-#define PC13                    43
-#define PC14                    44
-#define PC15                    45
-#define PD0                     46
-#define PD1                     47
-#define PD2                     48
-#define PD3                     49
-#define PD4                     50
-#define PD5                     51
-#define PD6                     52
-#define PD7                     53
-#define PD8                     54
-#define PD9                     55
-#define PD10                    56
-#define PD11                    57
-#define PD12                    58
-#define PD13                    59
-#define PD14                    60
-#define PD15                    61
-#define PE0                     62
-#define PE1                     63
-#define PE2                     64
-#define PE3                     65
-#define PE4                     66
-#define PE5                     67
-#define PE6                     68
-#define PE7                     69
-#define PE8                     70
-#define PE9                     71
-#define PE10                    72
-#define PE11                    73
-#define PE12                    74
-#define PE13                    75
-#define PE14                    76
-#define PE15                    77
-#define PH0                     78
-#define PH1                     79
-#define PC2_C                   PIN_A14
-#define PC3_C                   PIN_A15
+#define PB0                     PIN_A14
+#define PB1                     PIN_A15
+#define PB2                     64      // QSPI CLK
+#define PE7                     65
+#define PE8                     66
+#define PE9                     67
+#define PE10                    68      // TFT-LCD
+#define PE11                    69      // TFT-LCD
+#define PE12                    70      // TFT-LCD
+#define PE13                    71      // TFT-LCD
+#define PE14                    72      // TFT-LCD
+#define PE15                    73
+#define PB10                    74
+#define PB11                    75
+// Other
+#define PA13                    76      // SWDIO
+#define PA14                    77      // SWCLK
+#define PC14                    78      // OSC32_IN
+#define PC15                    79      // OSC32_OUT
+#define PH0                     80      // OSC_IN
+#define PH1                     81      // OSC_OUT
 
 // Alternate pins number
 #define PA0_ALT1                (PA0  | ALT1)

From 005d0d3b967dfb9f3cec9b25a3ca6948ce233e56 Mon Sep 17 00:00:00 2001
From: Frederic Pillon <frederic.pillon@st.com>
Date: Thu, 25 Nov 2021 09:56:38 +0100
Subject: [PATCH 10/15] chore: add alias for button and LED

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
---
 .../variant_WeActMiniH743VITX.h                             | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
index 55ac22caed..388b435d13 100644
--- a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
+++ b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
@@ -163,13 +163,15 @@
 #define NUM_ANALOG_INPUTS       16
 
 // On-board LED pin number
+#define LED_BLUE                PE3
 #ifndef LED_BUILTIN
-  #define LED_BUILTIN     PE3
+  #define LED_BUILTIN           LED_BLUE
 #endif
 
 // On-board user button
+#define BTN_K1                  PC13
 #ifndef USER_BTN
-  #define USER_BTN              PC13
+  #define USER_BTN              BTN_K1
 #endif
 
 // SPI definitions

From 808c32de139b0200fe79d9c7c02ac3c8d9922e4b Mon Sep 17 00:00:00 2001
From: Frederic Pillon <frederic.pillon@st.com>
Date: Thu, 25 Nov 2021 09:57:05 +0100
Subject: [PATCH 11/15] chore: use free SPI and I2C pins

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
---
 .../variant_WeActMiniH743VITX.h                      | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
index 388b435d13..5fd10b6341 100644
--- a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
+++ b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
@@ -176,7 +176,7 @@
 
 // SPI definitions
 #ifndef PIN_SPI_SS
-  #define PIN_SPI_SS            PA4
+  #define PIN_SPI_SS            PB12
 #endif
 #ifndef PIN_SPI_SS1
   #define PIN_SPI_SS1           PA15
@@ -188,21 +188,21 @@
   #define PIN_SPI_SS3           PNUM_NOT_DEFINED
 #endif
 #ifndef PIN_SPI_MOSI
-  #define PIN_SPI_MOSI          PA7
+  #define PIN_SPI_MOSI          PB15
 #endif
 #ifndef PIN_SPI_MISO
-  #define PIN_SPI_MISO          PA6
+  #define PIN_SPI_MISO          PB14
 #endif
 #ifndef PIN_SPI_SCK
-  #define PIN_SPI_SCK           PA5
+  #define PIN_SPI_SCK           PB13
 #endif
 
 // I2C definitions
 #ifndef PIN_WIRE_SDA
-  #define PIN_WIRE_SDA          PB7
+  #define PIN_WIRE_SDA          PB11
 #endif
 #ifndef PIN_WIRE_SCL
-  #define PIN_WIRE_SCL          PB6
+  #define PIN_WIRE_SCL          PB10
 #endif
 
 // Timer Definitions

From 65ece3e2d5eb277b21120491e3a15da5f7b73d61 Mon Sep 17 00:00:00 2001
From: Frederic Pillon <frederic.pillon@st.com>
Date: Thu, 25 Nov 2021 09:57:33 +0100
Subject: [PATCH 12/15] fix: default Serial instance

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
---
 .../variant_WeActMiniH743VITX.h                                 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
index 5fd10b6341..fba4df8084 100644
--- a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
+++ b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
@@ -216,7 +216,7 @@
 
 // UART Definitions
 #ifndef SERIAL_UART_INSTANCE
-  #define SERIAL_UART_INSTANCE  4
+  #define SERIAL_UART_INSTANCE  101
 #endif
 
 // Default pin used for generic 'Serial' instance

From da680029a6800d601e8dcfe45f3f79cbee3e8408 Mon Sep 17 00:00:00 2001
From: Frederic Pillon <frederic.pillon@st.com>
Date: Thu, 25 Nov 2021 17:55:14 +0100
Subject: [PATCH 13/15] chore: do not enable HAL Ethernet module

several pins already connected to other peripherals

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
---
 .../variant_WeActMiniH743VITX.h                             | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
index fba4df8084..cdb8fa423d 100644
--- a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
+++ b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
@@ -232,9 +232,9 @@
 #if !defined(HAL_DAC_MODULE_DISABLED)
   #define HAL_DAC_MODULE_ENABLED
 #endif
-#if !defined(HAL_ETH_MODULE_DISABLED)
-  #define HAL_ETH_MODULE_ENABLED
-#endif
+// #if !defined(HAL_ETH_MODULE_DISABLED)
+//   #define HAL_ETH_MODULE_ENABLED
+// #endif
 #if !defined(HAL_QSPI_MODULE_DISABLED)
   #define HAL_QSPI_MODULE_ENABLED
 #endif

From aba291e24cdb09cbcaa6891e01591f1ebe91f20b Mon Sep 17 00:00:00 2001
From: Frederic Pillon <frederic.pillon@st.com>
Date: Thu, 25 Nov 2021 17:59:56 +0100
Subject: [PATCH 14/15] chore: add custom peripheral pins

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
---
 boards.txt                                    |   1 +
 .../PeripheralPins_WeActMiniH743VITX.c        | 539 ++++++++++++++++++
 2 files changed, 540 insertions(+)
 create mode 100644 variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/PeripheralPins_WeActMiniH743VITX.c

diff --git a/boards.txt b/boards.txt
index 515678dbb0..b7e88d8692 100644
--- a/boards.txt
+++ b/boards.txt
@@ -3756,6 +3756,7 @@ GenH7.menu.pnum.WeActMiniH743VITX.build.board=WeActMiniH743VITX
 GenH7.menu.pnum.WeActMiniH743VITX.build.product_line=STM32H743xx
 GenH7.menu.pnum.WeActMiniH743VITX.build.variant=STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)
 GenH7.menu.pnum.WeActMiniH743VITX.build.variant_h=variant_{build.board}.h
+GenH7.menu.pnum.WeActMiniH743VITX.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
 
 # Generic H742IGKx
 GenH7.menu.pnum.GENERIC_H742IGKX=Generic H742IGKx
diff --git a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/PeripheralPins_WeActMiniH743VITX.c b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/PeripheralPins_WeActMiniH743VITX.c
new file mode 100644
index 0000000000..9f919e8491
--- /dev/null
+++ b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/PeripheralPins_WeActMiniH743VITX.c
@@ -0,0 +1,539 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2020-2021, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+/*
+ * Automatically generated from STM32H742V(G-I)Hx.xml, STM32H742V(G-I)Tx.xml
+ * STM32H743V(G-I)Hx.xml, STM32H743VGTx.xml
+ * STM32H743VITx.xml, STM32H750VBTx.xml
+ * STM32H753VIHx.xml, STM32H753VITx.xml
+ * CubeMX DB release 6.0.30
+ */
+#if defined(ARDUINO_WeActMiniH743VITX)
+#include "Arduino.h"
+#include "PeripheralPins.h"
+
+/* =====
+ * Notes:
+ * - The pins mentioned Px_y_ALTz are alternative possibilities which use other
+ *   HW peripheral instances. You can use them the same way as any other "normal"
+ *   pin (i.e. analogWrite(PA7_ALT1, 128);).
+ *
+ * - Commented lines are alternative possibilities which are not used per default.
+ *   If you change them, you will have to know what you do
+ * =====
+ */
+
+//*** ADC ***
+
+#ifdef HAL_ADC_MODULE_ENABLED
+WEAK const PinMap PinMap_ADC[] = {
+  {PA_0,      ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_INP16
+  {PA_1,      ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // ADC1_INP17
+  {PA_2,      ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_INP14
+  {PA_2_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_INP14
+  {PA_3,      ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_INP15
+  {PA_3_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_INP15
+  {PA_4,      ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC1_INP18
+  {PA_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC2_INP18
+  {PA_5,      ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC1_INP19
+  {PA_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC2_INP19
+  {PA_6,      ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_INP3
+  {PA_6_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_INP3
+  {PA_7,      ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_INP7
+  {PA_7_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_INP7
+  {PB_0,      ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_INP9
+  {PB_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_INP9
+  {PB_1,      ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INP5
+  {PB_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INP5
+  {PC_0,      ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INP10
+  {PC_0_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INP10
+  {PC_0_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_INP10
+  {PC_1,      ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_INP11
+  {PC_1_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_INP11
+  {PC_1_ALT2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_INP11
+  {PC_2_C,    ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_INP0
+  {PC_3_C,    ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_INP1
+  {PC_4,      ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_INP4
+  {PC_4_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_INP4
+  {PC_5,      ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_INP8
+  {PC_5_ALT1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_INP8
+  {NC,        NP,   0}
+};
+#endif
+
+//*** DAC ***
+
+#ifdef HAL_DAC_MODULE_ENABLED
+WEAK const PinMap PinMap_DAC[] = {
+  {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1
+  {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2
+  {NC,   NP,   0}
+};
+#endif
+
+//*** I2C ***
+
+#ifdef HAL_I2C_MODULE_ENABLED
+WEAK const PinMap PinMap_I2C_SDA[] = {
+  {PB_7,      I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_7_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
+  {PB_9,      I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_9_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
+  {PB_11,     I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+  {PC_9,      I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+  {PD_13,     I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)},
+  {NC,        NP,   0}
+};
+#endif
+
+#ifdef HAL_I2C_MODULE_ENABLED
+WEAK const PinMap PinMap_I2C_SCL[] = {
+  {PA_8,      I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
+  {PB_6,      I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_6_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
+  {PB_8,      I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
+  {PB_8_ALT1, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
+  {PB_10,     I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
+  {PD_12,     I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)},
+  {NC,        NP,   0}
+};
+#endif
+
+//*** TIM ***
+
+#ifdef HAL_TIM_MODULE_ENABLED
+WEAK const PinMap PinMap_TIM[] = {
+  {PA_0,       TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+  {PA_0_ALT1,  TIM5,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
+  {PA_1,       TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
+  {PA_1_ALT1,  TIM5,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2
+  {PA_1_ALT2,  TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N
+  {PA_2,       TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
+  {PA_2_ALT1,  TIM5,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3
+  {PA_2_ALT2,  TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1
+  {PA_3,       TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
+  {PA_3_ALT1,  TIM5,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
+  {PA_3_ALT2,  TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2
+  {PA_5,       TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+  {PA_5_ALT1,  TIM8,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
+  {PA_6,       TIM3,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+  {PA_6_ALT1,  TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
+  {PA_7,       TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+  {PA_7_ALT1,  TIM3,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+  {PA_7_ALT2,  TIM8,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
+  {PA_7_ALT3,  TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
+  {PA_8,       TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
+  {PA_9,       TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
+  {PA_10,      TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
+  {PA_11,      TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
+  {PA_15,      TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
+  {PB_0,       TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+  {PB_0_ALT1,  TIM3,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
+  {PB_0_ALT2,  TIM8,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
+  {PB_1,       TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+  {PB_1_ALT1,  TIM3,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
+  {PB_1_ALT2,  TIM8,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
+  {PB_3,       TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2
+  {PB_4,       TIM3,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+  {PB_5,       TIM3,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+  {PB_6,       TIM4,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
+  {PB_6_ALT1,  TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N
+  {PB_7,       TIM4,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
+  {PB_7_ALT1,  TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N
+  {PB_8,       TIM4,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
+  {PB_8_ALT1,  TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1
+  {PB_9,       TIM4,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
+  {PB_9_ALT1,  TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1
+  {PB_10,      TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
+  {PB_11,      TIM2,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
+  {PB_13,      TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+  {PB_14,      TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+  {PB_14_ALT1, TIM8,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
+  {PB_14_ALT2, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1
+  {PB_15,      TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+  {PB_15_ALT1, TIM8,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
+  {PB_15_ALT2, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2
+  {PC_6,       TIM3,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
+  {PC_6_ALT1,  TIM8,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
+  {PC_7,       TIM3,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
+  {PC_7_ALT1,  TIM8,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
+  {PC_8,       TIM3,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
+  {PC_8_ALT1,  TIM8,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3
+  {PC_9,       TIM3,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
+  {PC_9_ALT1,  TIM8,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4
+  {PD_12,      TIM4,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
+  {PD_13,      TIM4,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
+  {PD_14,      TIM4,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
+  {PD_15,      TIM4,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
+  {PE_4,       TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N
+  {PE_5,       TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1
+  {PE_6,       TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2
+  {PE_8,       TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
+  {PE_9,       TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
+  {PE_10,      TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
+  {PE_11,      TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
+  {PE_12,      TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
+  {PE_13,      TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
+  {PE_14,      TIM1,  STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
+  {NC,         NP,    0}
+};
+#endif
+
+//*** UART ***
+
+#ifdef HAL_UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_TX[] = {
+  {PA_0,       UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PA_2,       USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PA_9,       LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)},
+  {PA_9_ALT1,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PA_12,      UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)},
+  {PA_15,      UART7,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
+  {PB_4,       UART7,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
+  {PB_6,       LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)},
+  {PB_6_ALT1,  UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
+  {PB_6_ALT2,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PB_9,       UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PB_10,      USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PB_13,      UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
+  {PB_14,      USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)},
+  {PC_6,       USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
+  {PC_10,      UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PC_10_ALT1, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PC_12,      UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
+  {PD_1,       UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PD_5,       USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PD_8,       USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PE_1,       UART8,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
+  {PE_8,       UART7,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
+  {NC,         NP,      0}
+};
+#endif
+
+#ifdef HAL_UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_RX[] = {
+  {PA_1,       UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PA_3,       USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PA_8,       UART7,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
+  {PA_10,      LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)},
+  {PA_10_ALT1, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PA_11,      UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)},
+  {PB_3,       UART7,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
+  {PB_5,       UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
+  {PB_7,       LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)},
+  {PB_7_ALT1,  USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PB_8,       UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PB_11,      USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PB_12,      UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
+  {PB_15,      USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)},
+  {PC_7,       USART6,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
+  {PC_11,      UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PC_11_ALT1, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PD_0,       UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PD_2,       UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
+  {PD_6,       USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PD_9,       USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PE_0,       UART8,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
+  {PE_7,       UART7,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
+  {NC,         NP,      0}
+};
+#endif
+
+#ifdef HAL_UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_RTS[] = {
+  {PA_1,       USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PA_12,      LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)},
+  {PA_12_ALT1, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PA_15,      UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PB_14,      UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PB_14_ALT1, USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PC_8,       UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
+  {PD_4,       USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PD_12,      USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PD_15,      UART8,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
+  {PE_9,       UART7,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
+  {NC,         NP,      0}
+};
+#endif
+
+#ifdef HAL_UART_MODULE_ENABLED
+WEAK const PinMap PinMap_UART_CTS[] = {
+  {PA_0,       USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PA_11,      LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)},
+  {PA_11_ALT1, USART1,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
+  {PB_0,       UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PB_13,      USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PB_15,      UART4,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
+  {PC_9,       UART5,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
+  {PD_3,       USART2,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
+  {PD_11,      USART3,  STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
+  {PD_14,      UART8,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
+  {PE_10,      UART7,   STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
+  {NC,         NP,      0}
+};
+#endif
+
+//*** SPI ***
+
+#ifdef HAL_SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_MOSI[] = {
+  {PA_7,      SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PA_7_ALT1, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
+  {PB_2,      SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)},
+  {PB_5,      SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PB_5_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)},
+  {PB_5_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
+  {PB_15,     SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_1,      SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_3_C,    SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_12,     SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {PD_6,      SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)},
+  {PD_7,      SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PE_6,      SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
+  {PE_14,     SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
+  {NC,        NP,   0}
+};
+#endif
+
+#ifdef HAL_SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_MISO[] = {
+  {PA_6,      SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PA_6_ALT1, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
+  {PB_4,      SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PB_4_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {PB_4_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
+  {PB_14,     SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_2_C,    SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_11,     SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {PE_5,      SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
+  {PE_13,     SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
+  {NC,        NP,   0}
+};
+#endif
+
+#ifdef HAL_SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_SCLK[] = {
+  {PA_5,      SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PA_5_ALT1, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
+  {PA_9,      SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PA_12,     SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PB_3,      SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PB_3_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {PB_3_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
+  {PB_10,     SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PB_13,     SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PC_10,     SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {PD_3,      SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PE_2,      SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
+  {PE_12,     SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
+  {NC,        NP,   0}
+};
+#endif
+
+#ifdef HAL_SPI_MODULE_ENABLED
+WEAK const PinMap PinMap_SPI_SSEL[] = {
+  {PA_4,       SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PA_4_ALT1,  SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {PA_4_ALT2,  SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)},
+  {PA_11,      SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PA_15,      SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
+  {PA_15_ALT1, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
+  {PA_15_ALT2, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI6)},
+  {PB_4,       SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)},
+  {PB_9,       SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PB_12,      SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
+  {PE_4,       SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
+  {PE_11,      SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
+  {NC,         NP,   0}
+};
+#endif
+
+//*** FDCAN ***
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+WEAK const PinMap PinMap_CAN_RD[] = {
+  {PA_11, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
+  {PB_5,  FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)},
+  {PB_8,  FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
+  {PB_12, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)},
+  {PD_0,  FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
+  {NC,    NP,     0}
+};
+#endif
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+WEAK const PinMap PinMap_CAN_TD[] = {
+  {PA_12, FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
+  {PB_6,  FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)},
+  {PB_9,  FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
+  {PB_13, FDCAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)},
+  {PD_1,  FDCAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
+  {NC,    NP,     0}
+};
+#endif
+
+//*** ETHERNET ***
+
+#ifdef HAL_ETH_MODULE_ENABLED
+WEAK const PinMap PinMap_Ethernet[] = {
+  {PA_0,      ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS
+  {PA_1,      ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK
+  {PA_1_ALT1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_CLK
+  {PA_2,      ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO
+  {PA_3,      ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL
+  {PA_7,      ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV
+  {PA_7_ALT1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_DV
+  {PB_0,      ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2
+  {PB_1,      ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3
+  {PB_5,      ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT
+  {PB_8,      ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
+  {PB_10,     ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER
+  {PB_11,     ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN
+  {PB_12,     ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0
+  {PB_13,     ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1
+  {PC_1,      ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC
+  {PC_2_C,    ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2
+  {PC_3_C,    ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK
+  {PC_4,      ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0
+  {PC_5,      ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1
+  {PE_2,      ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3
+  {NC,        NP,  0}
+};
+#endif
+
+//*** QUADSPI ***
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+WEAK const PinMap PinMap_QUADSPI_DATA0[] = {
+  {PC_9,  QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0
+  {PD_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0
+  {PE_7,  QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO0
+  {NC,    NP,      0}
+};
+#endif
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+WEAK const PinMap PinMap_QUADSPI_DATA1[] = {
+  {PC_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1
+  {PD_12, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1
+  {PE_8,  QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO1
+  {NC,    NP,      0}
+};
+#endif
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+WEAK const PinMap PinMap_QUADSPI_DATA2[] = {
+  {PE_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2
+  {PE_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO2
+  {NC,   NP,      0}
+};
+#endif
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+WEAK const PinMap PinMap_QUADSPI_DATA3[] = {
+  {PA_1,  QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3
+  {PD_13, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3
+  {PE_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO3
+  {NC,    NP,      0}
+};
+#endif
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+WEAK const PinMap PinMap_QUADSPI_SCLK[] = {
+  {PB_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK
+  {NC,   NP,      0}
+};
+#endif
+
+#ifdef HAL_QSPI_MODULE_ENABLED
+WEAK const PinMap PinMap_QUADSPI_SSEL[] = {
+  {PB_6,  QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS
+  {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_NCS
+  {PC_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_NCS
+  {NC,    NP,      0}
+};
+#endif
+
+//*** USB ***
+
+#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED)
+WEAK const PinMap PinMap_USB_OTG_FS[] = {
+  // {PA_8,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_FS)}, // USB_OTG_FS_SOF
+  // {PA_9,  USB_OTG_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_FS_VBUS
+  // {PA_10, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG1_FS)}, // USB_OTG_FS_ID
+  {PA_11, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_FS)}, // USB_OTG_FS_DM
+  {PA_12, USB_OTG_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_FS)}, // USB_OTG_FS_DP
+  {NC,    NP,         0}
+};
+#endif
+
+#if defined(HAL_PCD_MODULE_ENABLED) || defined(HAL_HCD_MODULE_ENABLED)
+WEAK const PinMap PinMap_USB_OTG_HS[] = {
+#ifdef USE_USB_HS_IN_FS
+  // {PA_4,   USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG2_FS)}, // USB_OTG_HS_SOF
+  // {PB_12,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF12_OTG2_FS)}, // USB_OTG_HS_ID
+  // {PB_13,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS
+  // {PB_14,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG2_FS)}, // USB_OTG_HS_DM
+  {PB_15,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OTG2_FS)}, // USB_OTG_HS_DP
+#else
+  // {PA_3,   USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D0
+  // {PA_5,   USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_CK
+  // {PB_0,   USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D1
+  // {PB_1,   USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D2
+  // {PB_5,   USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D7
+  // {PB_10,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D3
+  // {PB_11,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D4
+  // {PB_12,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D5
+  // {PB_13,  USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_D6
+  // {PC_0,   USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_STP
+  // {PC_2_C, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_DIR
+  // {PC_3_C, USB_OTG_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG2_HS)}, // USB_OTG_HS_ULPI_NXT
+#endif /* USE_USB_HS_IN_FS */
+  {NC,     NP,         0}
+};
+#endif
+
+//*** SD ***
+
+#ifdef HAL_SD_MODULE_ENABLED
+WEAK const PinMap PinMap_SD[] = {
+  // {PA_0,      SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_SDIO2)}, // SDMMC2_CMD
+  // {PB_3,      SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDIO2)}, // SDMMC2_D2
+  // {PB_4,      SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDIO2)}, // SDMMC2_D3
+  // {PB_8,      SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF7_SDIO1)}, // SDMMC1_CKIN
+  // {PB_8_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO1)}, // SDMMC1_D4
+  // {PB_8_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDIO2)}, // SDMMC2_D4
+  // {PB_9,      SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF7_SDIO1)}, // SDMMC1_CDIR
+  // {PB_9_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO1)}, // SDMMC1_D5
+  // {PB_9_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDIO2)}, // SDMMC2_D5
+  // {PB_14,     SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDIO2)}, // SDMMC2_D0
+  // {PB_15,     SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_SDIO2)}, // SDMMC2_D1
+  // {PC_1,      SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_SDIO2)}, // SDMMC2_CK
+  // {PC_6,      SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDIO1)}, // SDMMC1_D0DIR
+  // {PC_6_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO1)}, // SDMMC1_D6
+  // {PC_6_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDIO2)}, // SDMMC2_D6
+  // {PC_7,      SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SDIO1)}, // SDMMC1_D123DIR
+  // {PC_7_ALT1, SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO1)}, // SDMMC1_D7
+  // {PC_7_ALT2, SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_SDIO2)}, // SDMMC2_D7
+  {PC_8,      SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO1)}, // SDMMC1_D0
+  {PC_9,      SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO1)}, // SDMMC1_D1
+  {PC_10,     SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO1)}, // SDMMC1_D2
+  {PC_11,     SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_SDIO1)}, // SDMMC1_D3
+  {PC_12,     SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO1)}, // SDMMC1_CK
+  {PD_2,      SDMMC1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF12_SDIO1)}, // SDMMC1_CMD
+  // {PD_6,      SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDIO2)}, // SDMMC2_CK
+  // {PD_7,      SDMMC2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_SDIO2)}, // SDMMC2_CMD
+  {NC,        NP,     0}
+};
+#endif
+
+#endif /* ARDUINO_WeActMiniH743VITX */

From c10a332df4947625447ed4d6fd647fce02979d65 Mon Sep 17 00:00:00 2001
From: Frederic Pillon <frederic.pillon@st.com>
Date: Thu, 25 Nov 2021 18:33:26 +0100
Subject: [PATCH 15/15] variant: add WeAct MiniSTM32H750VBT6 support

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
---
 README.md                                            |  1 +
 boards.txt                                           | 12 +++++++++++-
 ...MiniH743VITX.c => PeripheralPins_WeActMiniH7xx.c} |  4 ++--
 ...ActMiniH743VITX.cpp => variant_WeActMiniH7xx.cpp} |  4 ++--
 ...t_WeActMiniH743VITX.h => variant_WeActMiniH7xx.h} |  0
 5 files changed, 16 insertions(+), 5 deletions(-)
 rename variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/{PeripheralPins_WeActMiniH743VITX.c => PeripheralPins_WeActMiniH7xx.c} (99%)
 rename variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/{variant_WeActMiniH743VITX.cpp => variant_WeActMiniH7xx.cpp} (98%)
 rename variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/{variant_WeActMiniH743VITX.h => variant_WeActMiniH7xx.h} (100%)

diff --git a/README.md b/README.md
index 735f8ab1f5..f239eef377 100644
--- a/README.md
+++ b/README.md
@@ -338,6 +338,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 | :green_heart: | STM32H750IB | [Daisy](https://www.electro-smith.com/daisy/daisy) | *1.9.0* |  |
 | :yellow_heart: | STM32H750IB | [Daisy Patch SM](https://www.electro-smith.com/daisy/patch-sm) | *2.2.0* |  |
 | :green_heart: | STM32H750VB | Generic Board | *2.0.0* |  |
+| :yellow_heart: | STM32H750VB | [WeAct MiniSTM32H750VBT6](https://github.com/WeActTC/MiniSTM32H7xx) | **2.2.0** | [More info](https://github.com/stm32duino/Arduino_Core_STM32/pull/1552) |
 | :green_heart: | STM32H753VI | Generic Board | *2.0.0* |  |
 | :green_heart: | STM32H753ZI | Generic Board | *2.0.0* |  |
 | :green_heart: | STM32H757AI | Generic Board | *2.0.0* |  |
diff --git a/boards.txt b/boards.txt
index b7e88d8692..78c264b0fa 100644
--- a/boards.txt
+++ b/boards.txt
@@ -3755,9 +3755,19 @@ GenH7.menu.pnum.WeActMiniH743VITX.upload.maximum_data_size=524288
 GenH7.menu.pnum.WeActMiniH743VITX.build.board=WeActMiniH743VITX
 GenH7.menu.pnum.WeActMiniH743VITX.build.product_line=STM32H743xx
 GenH7.menu.pnum.WeActMiniH743VITX.build.variant=STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)
-GenH7.menu.pnum.WeActMiniH743VITX.build.variant_h=variant_{build.board}.h
+GenH7.menu.pnum.WeActMiniH743VITX.build.variant_h=variant_WeActMiniH7xx.h
 GenH7.menu.pnum.WeActMiniH743VITX.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
 
+# WeAct MiniSTM32H750VBTX
+GenH7.menu.pnum.WeActMiniH750VBTX=WeAct MiniSTM32H750VBTX
+GenH7.menu.pnum.WeActMiniH750VBTX.upload.maximum_size=131072
+GenH7.menu.pnum.WeActMiniH750VBTX.upload.maximum_data_size=524288
+GenH7.menu.pnum.WeActMiniH750VBTX.build.board=WeActMiniH750VBTX
+GenH7.menu.pnum.WeActMiniH750VBTX.build.product_line=STM32H750xx
+GenH7.menu.pnum.WeActMiniH750VBTX.build.variant=STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)
+GenH7.menu.pnum.WeActMiniH750VBTX.build.variant_h=variant_WeActMiniH7xx.h
+GenH7.menu.pnum.WeActMiniH750VBTX.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
+
 # Generic H742IGKx
 GenH7.menu.pnum.GENERIC_H742IGKX=Generic H742IGKx
 GenH7.menu.pnum.GENERIC_H742IGKX.upload.maximum_size=1048576
diff --git a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/PeripheralPins_WeActMiniH743VITX.c b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/PeripheralPins_WeActMiniH7xx.c
similarity index 99%
rename from variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/PeripheralPins_WeActMiniH743VITX.c
rename to variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/PeripheralPins_WeActMiniH7xx.c
index 9f919e8491..b55afd7c22 100644
--- a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/PeripheralPins_WeActMiniH743VITX.c
+++ b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/PeripheralPins_WeActMiniH7xx.c
@@ -17,7 +17,7 @@
  * STM32H753VIHx.xml, STM32H753VITx.xml
  * CubeMX DB release 6.0.30
  */
-#if defined(ARDUINO_WeActMiniH743VITX)
+#if defined(ARDUINO_WeActMiniH743VITX) || defined(ARDUINO_WeActMiniH750VBTX)
 #include "Arduino.h"
 #include "PeripheralPins.h"
 
@@ -536,4 +536,4 @@ WEAK const PinMap PinMap_SD[] = {
 };
 #endif
 
-#endif /* ARDUINO_WeActMiniH743VITX */
+#endif /* ARDUINO_WeActMiniH743VITX || ARDUINO_WeActMiniH750VBTX */
diff --git a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH7xx.cpp
similarity index 98%
rename from variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp
rename to variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH7xx.cpp
index 098f05e760..ee43aa92c2 100644
--- a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.cpp
+++ b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH7xx.cpp
@@ -11,7 +11,7 @@
  *******************************************************************************
  */
 
-#ifdef ARDUINO_WeActMiniH743VITX
+#if defined(ARDUINO_WeActMiniH743VITX) || defined(ARDUINO_WeActMiniH750VBTX)
 #include "pins_arduino.h"
 
 // Digital PinName array
@@ -315,4 +315,4 @@ void SysClkFullSpeed()
   }
 }
 
-#endif /* ARDUINO_WeActMiniH743VITX */
+#endif /* ARDUINO_WeActMiniH743VITX || ARDUINO_WeActMiniH750VBTX */
diff --git a/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h b/variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH7xx.h
similarity index 100%
rename from variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH743VITX.h
rename to variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/variant_WeActMiniH7xx.h