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| 1 | +/* |
| 2 | + ******************************************************************************* |
| 3 | + * Copyright (c) 2018, STMicroelectronics |
| 4 | + * All rights reserved. |
| 5 | + * |
| 6 | + * Redistribution and use in source and binary forms, with or without |
| 7 | + * modification, are permitted provided that the following conditions are met: |
| 8 | + * |
| 9 | + * 1. Redistributions of source code must retain the above copyright notice, |
| 10 | + * this list of conditions and the following disclaimer. |
| 11 | + * 2. Redistributions in binary form must reproduce the above copyright notice, |
| 12 | + * this list of conditions and the following disclaimer in the documentation |
| 13 | + * and/or other materials provided with the distribution. |
| 14 | + * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| 15 | + * may be used to endorse or promote products derived from this software |
| 16 | + * without specific prior written permission. |
| 17 | + * |
| 18 | + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 21 | + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| 22 | + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 23 | + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| 24 | + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| 25 | + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| 26 | + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 27 | + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 28 | + ******************************************************************************* |
| 29 | + * Automatically generated from STM8L152R8Tx.xml |
| 30 | + */ |
| 31 | +#include "Arduino.h" |
| 32 | +#include "PeripheralPins.h" |
| 33 | + |
| 34 | +/* ===== |
| 35 | + * Note: Commented lines are alternative possibilities which are not used per default. |
| 36 | + * If you change them, you will have to know what you do |
| 37 | + * ===== |
| 38 | + */ |
| 39 | + |
| 40 | +//*** ADC *** |
| 41 | + |
| 42 | +#if !defined(NO_HWADC) |
| 43 | +const PinMap PinMap_ADC[] = { |
| 44 | + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 2, 0)}, // ADC1_IN2 |
| 45 | + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 1, 0)}, // ADC1_IN1 |
| 46 | + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 0, 0)}, // ADC1_IN0 |
| 47 | + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 18, 0)}, // ADC1_IN18 |
| 48 | + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 17, 0)}, // ADC1_IN17 |
| 49 | + {PB_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 16, 0)}, // ADC1_IN16 |
| 50 | + {PB_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 15, 0)}, // ADC1_IN15 |
| 51 | + {PB_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 14, 0)}, // ADC1_IN14 |
| 52 | + {PB_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 13, 0)}, // ADC1_IN13 |
| 53 | + {PB_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 12, 0)}, // ADC1_IN12 |
| 54 | + {PB_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 11, 0)}, // ADC1_IN11 |
| 55 | + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 6, 0)}, // ADC1_IN6 |
| 56 | + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 5, 0)}, // ADC1_IN5 |
| 57 | + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 4, 0)}, // ADC1_IN4 |
| 58 | + {PC_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 3, 0)}, // ADC1_IN3 |
| 59 | + {PD_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 22, 0)}, // ADC1_IN22 |
| 60 | + {PD_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 21, 0)}, // ADC1_IN21 |
| 61 | + {PD_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 20, 0)}, // ADC1_IN20 |
| 62 | + {PD_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 19, 0)}, // ADC1_IN19 |
| 63 | + {PD_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 10, 0)}, // ADC1_IN10 |
| 64 | + {PD_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 9, 0)}, // ADC1_IN9 |
| 65 | + {PD_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 8, 0)}, // ADC1_IN8 |
| 66 | + {PD_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 7, 0)}, // ADC1_IN7 |
| 67 | + {PE_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 23, 0)}, // ADC1_IN23 |
| 68 | + {PF_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 24, 0)}, // ADC1_IN24 |
| 69 | + {PF_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 25, 0)}, // ADC1_IN25 |
| 70 | + {NC, NP, 0} |
| 71 | +}; |
| 72 | +#endif |
| 73 | + |
| 74 | +//*** DAC *** |
| 75 | + |
| 76 | +#if !defined(NO_HWDAC) |
| 77 | +const PinMap PinMap_DAC[] = { |
| 78 | + {PF_0, DAC, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 1, 0)}, // DAC_OUT1 |
| 79 | + {PF_1, DAC, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_Mode_In_FL_No_IT, 0, 2, 0)}, // DAC_OUT2 |
| 80 | + {NC, NP, 0} |
| 81 | +}; |
| 82 | +#endif |
| 83 | + |
| 84 | +//*** I2C *** |
| 85 | + |
| 86 | +#if !defined(NO_HWI2C) |
| 87 | +const PinMap PinMap_I2C_SDA[] = { |
| 88 | + {PC_0, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_Mode_In_FL_No_IT, AFIO_NONE)}, |
| 89 | + {NC, NP, 0} |
| 90 | +}; |
| 91 | +#endif |
| 92 | + |
| 93 | +#if !defined(NO_HWI2C) |
| 94 | +const PinMap PinMap_I2C_SCL[] = { |
| 95 | + {PC_1, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_Mode_In_FL_No_IT, AFIO_NONE)}, |
| 96 | + {NC, NP, 0} |
| 97 | +}; |
| 98 | +#endif |
| 99 | + |
| 100 | +//*** PWM *** |
| 101 | + |
| 102 | +#if !defined(NO_HWTIM) |
| 103 | +const PinMap PinMap_PWM[] = { |
| 104 | + {PA_7, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_Mode_Out_PP_Low_Fast, AFIO_NONE, 1, 0)}, // TIM5_CH1 |
| 105 | + {PB_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_Mode_Out_PP_Low_Fast, AFIO_NONE, 1, 0)}, // TIM2_CH1 |
| 106 | + {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_Mode_Out_PP_Low_Fast, AFIO_NONE, 1, 0)}, // TIM3_CH1 |
| 107 | + {PB_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_Mode_Out_PP_Low_Fast, AFIO_NONE, 2, 0)}, // TIM2_CH2 |
| 108 | + {PD_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_Mode_Out_PP_Low_Fast, AFIO_NONE, 2, 0)}, // TIM3_CH2 |
| 109 | + {PD_2, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_Mode_Out_PP_Low_Fast, AFIO_NONE, 1, 0)}, // TIM1_CH1 |
| 110 | + {PD_4, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_Mode_Out_PP_Low_Fast, AFIO_NONE, 2, 0)}, // TIM1_CH2 |
| 111 | + {PD_5, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_Mode_Out_PP_Low_Fast, AFIO_NONE, 3, 0)}, // TIM1_CH3 |
| 112 | + {PD_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_Mode_Out_PP_Low_Fast, AFIO_NONE, 1, 1)}, // TIM1_CH1N |
| 113 | + {PE_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_Mode_Out_PP_Low_Fast, AFIO_NONE, 2, 0)}, // TIM5_CH2 |
| 114 | + {PE_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_Mode_Out_PP_Low_Fast, AFIO_NONE, 2, 1)}, // TIM1_CH2N |
| 115 | + {PE_2, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_Mode_Out_PP_Low_Fast, AFIO_NONE, 3, 1)}, // TIM1_CH3N |
| 116 | + {NC, NP, 0} |
| 117 | +}; |
| 118 | +#endif |
| 119 | + |
| 120 | +//*** SERIAL *** |
| 121 | + |
| 122 | +#if !defined(NO_HWSERIAL) |
| 123 | +const PinMap PinMap_UART_TX[] = { |
| 124 | + {PA_2, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_Out_PP_Low_Fast, AFIO_USART1_PORTA_ENABLE)}, |
| 125 | + {PC_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_Out_PP_Low_Fast, AFIO_NONE)}, |
| 126 | + {PC_5, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_Out_PP_Low_Fast, AFIO_USART1_PORTC_ENABLE)}, |
| 127 | + {PE_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_Out_PP_Low_Fast, AFIO_NONE)}, |
| 128 | + {PF_0, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_Out_PP_Low_Fast, AFIO_USART3_PORTF_ENABLE)}, |
| 129 | + {PG_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_Out_PP_Low_Fast, AFIO_NONE)}, |
| 130 | + {NC, NP, 0} |
| 131 | +}; |
| 132 | +#endif |
| 133 | + |
| 134 | +#if !defined(NO_HWSERIAL) |
| 135 | +const PinMap PinMap_UART_RX[] = { |
| 136 | + {PA_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_In_PU_No_IT, AFIO_USART1_PORTA_ENABLE)}, |
| 137 | + {PC_2, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_In_PU_No_IT, AFIO_NONE)}, |
| 138 | + {PC_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_In_PU_No_IT, AFIO_USART1_PORTC_ENABLE)}, |
| 139 | + {PE_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_In_PU_No_IT, AFIO_NONE)}, |
| 140 | + {PF_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_In_PU_No_IT, AFIO_USART3_PORTF_ENABLE)}, |
| 141 | + {PG_0, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_In_PU_No_IT, AFIO_NONE)}, |
| 142 | + {NC, NP, 0} |
| 143 | +}; |
| 144 | +#endif |
| 145 | + |
| 146 | +//*** SPI *** |
| 147 | + |
| 148 | +#if !defined(NO_HWSPI) |
| 149 | +const PinMap PinMap_SPI_MOSI[] = { |
| 150 | + {PA_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_In_PU_No_IT, AFIO_SPI1_FULL_ENABLE)}, |
| 151 | + {PB_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_In_PU_No_IT, AFIO_NONE)}, |
| 152 | + {PG_6, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_In_PU_No_IT, AFIO_NONE)}, |
| 153 | + {NC, NP, 0} |
| 154 | +}; |
| 155 | +#endif |
| 156 | + |
| 157 | +#if !defined(NO_HWSPI) |
| 158 | +const PinMap PinMap_SPI_MISO[] = { |
| 159 | + {PA_2, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_In_PU_No_IT, AFIO_SPI1_FULL_ENABLE)}, |
| 160 | + {PB_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_In_PU_No_IT, AFIO_NONE)}, |
| 161 | + {PG_7, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_In_PU_No_IT, AFIO_NONE)}, |
| 162 | + {NC, NP, 0} |
| 163 | +}; |
| 164 | +#endif |
| 165 | + |
| 166 | +#if !defined(NO_HWSPI) |
| 167 | +const PinMap PinMap_SPI_SCLK[] = { |
| 168 | + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_In_PU_No_IT, AFIO_NONE)}, |
| 169 | + {PC_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_In_PU_No_IT, AFIO_SPI1_FULL_ENABLE)}, |
| 170 | + {PG_5, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_In_PU_No_IT, AFIO_NONE)}, |
| 171 | + {NC, NP, 0} |
| 172 | +}; |
| 173 | +#endif |
| 174 | + |
| 175 | +#if !defined(NO_HWSPI) |
| 176 | +const PinMap PinMap_SPI_SSEL[] = { |
| 177 | + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_In_PU_No_IT, AFIO_NONE)}, |
| 178 | + {PC_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_In_PU_No_IT, AFIO_SPI1_FULL_ENABLE)}, |
| 179 | + {PG_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_Mode_In_PU_No_IT, AFIO_NONE)}, |
| 180 | + {NC, NP, 0} |
| 181 | +}; |
| 182 | +#endif |
| 183 | + |
| 184 | +//*** CAN *** |
| 185 | + |
| 186 | +//*** No CAN_RD *** |
| 187 | + |
| 188 | +//*** No CAN_TD *** |
| 189 | + |
| 190 | +//*** QUADSPI *** |
| 191 | + |
| 192 | +//*** No QUADSPI *** |
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