diff --git a/.gitignore b/.gitignore index 499a61832..6e8f4204a 100644 --- a/.gitignore +++ b/.gitignore @@ -1,2 +1,3 @@ *.o *.swp +platform.txt diff --git a/README.md b/README.md index ead8c6211..9695256e1 100644 --- a/README.md +++ b/README.md @@ -1,5 +1,5 @@ # Arduino_Tools [![GitHub release](https://img.shields.io/github/release/stm32duino/Arduino_Tools.svg)](https://github.com/stm32duino/Arduino_Tools/releases/latest) -[![GitHub commits](https://img.shields.io/github/commits-since/stm32duino/Arduino_Tools/1.0.2.svg)](https://github.com/stm32duino/Arduino_Tools/compare/1.0.2...master) +[![GitHub commits](https://img.shields.io/github/commits-since/stm32duino/Arduino_Tools/1.1.0.svg)](https://github.com/stm32duino/Arduino_Tools/compare/1.1.0...1.2.0) Contains upload tools for STM32 based boards and some other usefull scripts (ex: [genpinmap](https://github.com/stm32duino/Arduino_Tools/tree/master/src/genpinmap)) diff --git a/linux/src/stm32flash_serial/src/AUTHORS b/linux/src/stm32flash_serial/src/AUTHORS deleted file mode 100644 index d096f2205..000000000 --- a/linux/src/stm32flash_serial/src/AUTHORS +++ /dev/null @@ -1,19 +0,0 @@ -Authors ordered by first contribution. - -Geoffrey McRae -Bret Olmsted -Tormod Volden -Jakob Malm -Reuben Dowle -Matthias Kubisch -Paul Fertser -Daniel Strnad -Jérémie Rapin -Christian Pointner -Mats Erik Andersson -Alexey Borovik -Antonio Borneo -Armin van der Togt -Brian Silverman -Georg Hofmann -Luis Rodrigues diff --git a/linux/src/stm32flash_serial/src/Android.mk b/linux/src/stm32flash_serial/src/Android.mk deleted file mode 100644 index 7be3d0018..000000000 --- a/linux/src/stm32flash_serial/src/Android.mk +++ /dev/null @@ -1,20 +0,0 @@ -TOP_LOCAL_PATH := $(call my-dir) - -include $(call all-named-subdir-makefiles, parsers) - -LOCAL_PATH := $(TOP_LOCAL_PATH) - -include $(CLEAR_VARS) -LOCAL_MODULE := stm32flash -LOCAL_SRC_FILES := \ - dev_table.c \ - i2c.c \ - init.c \ - main.c \ - port.c \ - serial_common.c \ - serial_platform.c \ - stm32.c \ - utils.c -LOCAL_STATIC_LIBRARIES := libparsers -include $(BUILD_EXECUTABLE) diff --git a/linux/src/stm32flash_serial/src/HOWTO b/linux/src/stm32flash_serial/src/HOWTO deleted file mode 100644 index d8f32eb04..000000000 --- a/linux/src/stm32flash_serial/src/HOWTO +++ /dev/null @@ -1,35 +0,0 @@ -Add new interfaces: -===================================================================== -Current version 0.4 supports the following interfaces: -- UART Windows (either "COMn" and "\\.\COMn"); -- UART posix/Linux (e.g. "/dev/ttyUSB0"); -- I2C Linux through standard driver "i2c-dev" (e.g. "/dev/i2c-n"). - -Starting from version 0.4, the back-end of stm32flash is modular and -ready to be expanded to support new interfaces. -I'm planning adding SPI on Linux through standard driver "spidev". -You are invited to contribute with more interfaces. - -To add a new interface you need to add a new file, populate the struct -port_interface (check at the end of files i2c.c, serial_posix.c and -serial_w32.c) and provide the relative functions to operate on the -interface: open/close, read/write, get_cfg_str and the optional gpio. -The include the new drive in Makefile and register the new struct -port_interface in file port.c in struct port_interface *ports[]. - -There are several USB-I2C adapter in the market, each providing its -own libraries to communicate with the I2C bus. -Could be interesting to provide as back-end a bridge between stm32flash -and such libraries (I have no plan on this item). - - -Add new STM32 devices: -===================================================================== -Add a new line in file dev_table.c, in table devices[]. -The fields of the table are listed in stm32.h, struct stm32_dev. - - -Cross compile on Linux host for Windows target with MinGW: -===================================================================== -I'm using a 64 bit Arch Linux machines, and I usually run: - make CC=x86_64-w64-mingw32-gcc AR=x86_64-w64-mingw32-ar diff --git a/linux/src/stm32flash_serial/src/I2C.txt b/linux/src/stm32flash_serial/src/I2C.txt deleted file mode 100644 index 4c05ff62d..000000000 --- a/linux/src/stm32flash_serial/src/I2C.txt +++ /dev/null @@ -1,94 +0,0 @@ -About I2C back-end communication in stm32flash -========================================================================== - -Starting from version v0.4, beside the serial communication port, -stm32flash adds support for I2C port to talk with STM32 bootloader. - -The current I2C back-end supports only the API provided by Linux kernel -driver "i2c-dev", so only I2C controllers with Linux kernel driver can be -used. -In Linux source code, most of the drivers for I2C and SMBUS controllers -are in - ./drivers/i2c/busses/ -Only I2C is supported by STM32 bootloader, so check the section below -about SMBUS. -No I2C support for Windows is available in stm32flash v0.4. - -Thanks to the new modular back-end, stm32flash can be easily extended to -support new back-ends and API. Check HOWTO file in stm32flash source code -for details. - -In the market there are several USB-to-I2C dongles; most of them are not -supported by kernel drivers. Manufacturer provide proprietary userspace -libraries using not standardized API. -These API and dongles could be supported in feature versions. - -There are currently 3 versions of STM32 bootloader for I2C communications: -- v1.0 using I2C clock stretching synchronization between host and STM32; -- v1.1 superset of v1.0, adds non stretching commands; -- v1.2 superset of v1.1, adds CRC command and compatibility with i2cdetect. -Details in ST application note AN2606. -All the bootloaders above are tested and working with stm32flash. - - -SMBUS controllers -========================================================================== - -Almost 50% of the drivers in Linux source code folder - ./drivers/i2c/busses/ -are for controllers that "only" support SMBUS protocol. They can NOT -operate with STM32 bootloader. -To identify if your controller supports I2C, use command: - i2cdetect -F n -where "n" is the number of the I2C interface (e.g. n=3 for "/dev/i2c-3"). -Controllers that supports I2C will report - I2C yes -Controller that support both I2C and SMBUS are ok. - -If you are interested on details about SMBUS protocol, you can download -the current specs from - http://smbus.org/specs/smbus20.pdf -and you can read the files in Linux source code - ./Documentation/i2c/i2c-protocol - ./Documentation/i2c/smbus-protocol - - -About bootloader v1.0 -========================================================================== - -Version v1.0 can have issues with some I2C controllers due to use of clock -stretching during commands that require long operations, like flash erase -and programming. - -Clock stretching is a technique to synchronize host and I2C device. When -I2C device wants to force a delay in the communication, it push "low" the -I2C clock; the I2C controller detects it and waits until I2C clock returns -"high". -Most I2C controllers set a "timeout" for clock stretching, ranging from -few milli-seconds to seconds depending on specific HW or SW driver. - -It is possible that the timeout in your I2C controller is smaller than the -delay required for flash erase or programming. In this case the I2C -controller will timeout and report error to stm32flash. -There is no possibility for stm32flash to retry, so it can only signal the -error and exit. - -To by-pass the issue with bootloader v1.0 you can modify the kernel driver -of your I2C controller. Not an easy job, since every controller has its own -way to handle the timeout. - -In my case I'm using the I2C controller integrated in the VGA port of my -laptop HP EliteBook 8460p. I built the 0.25$ VGA-to-I2C adapter reported in - http://www.paintyourdragon.com/?p=43 -To change the timeout of the I2C controller I had to modify the kernel file - drivers/gpu/drm/radeon/radeon_i2c.c -line 969 -- i2c->bit.timeout = usecs_to_jiffies(2200); /* from VESA */ -+ i2c->bit.timeout = msecs_to_jiffies(5000); /* 5s for STM32 */ -and recompile it. -Then - $> modprobe i2c-dev - $> chmod 666 /dev/i2c-7 - #> stm32flash -a 0x39 /dev/i2c-7 - -2014-09-16 Antonio Borneo diff --git a/linux/src/stm32flash_serial/src/Makefile b/linux/src/stm32flash_serial/src/Makefile deleted file mode 100644 index 0328d5588..000000000 --- a/linux/src/stm32flash_serial/src/Makefile +++ /dev/null @@ -1,38 +0,0 @@ -PREFIX = /usr/local -CFLAGS += -Wall -g - -INSTALL = install - -OBJS = dev_table.o \ - i2c.o \ - init.o \ - main.o \ - port.o \ - serial_common.o \ - serial_platform.o \ - stm32.o \ - utils.o - -LIBOBJS = parsers/parsers.a - -all: stm32flash - -serial_platform.o: serial_posix.c serial_w32.c - -parsers/parsers.a: - cd parsers && $(MAKE) parsers.a - -stm32flash: $(OBJS) $(LIBOBJS) - $(CC) $(LDFLAGS) -o $@ $(OBJS) $(LIBOBJS) - -clean: - rm -f $(OBJS) stm32flash - cd parsers && $(MAKE) $@ - -install: all - $(INSTALL) -d $(DESTDIR)$(PREFIX)/bin - $(INSTALL) -m 755 stm32flash $(DESTDIR)$(PREFIX)/bin - $(INSTALL) -d $(DESTDIR)$(PREFIX)/share/man/man1 - $(INSTALL) -m 644 stm32flash.1 $(DESTDIR)$(PREFIX)/share/man/man1 - -.PHONY: all clean install diff --git a/linux/src/stm32flash_serial/src/TODO b/linux/src/stm32flash_serial/src/TODO deleted file mode 100644 index 41df614ff..000000000 --- a/linux/src/stm32flash_serial/src/TODO +++ /dev/null @@ -1,7 +0,0 @@ - -stm32: -- Add support for variable page size - -AUTHORS: -- Add contributors from Geoffrey's commits - diff --git a/linux/src/stm32flash_serial/src/dev_table.c b/linux/src/stm32flash_serial/src/dev_table.c deleted file mode 100644 index 399cd9d08..000000000 --- a/linux/src/stm32flash_serial/src/dev_table.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - Copyright (C) 2014 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include "stm32.h" - -/* - * Device table, corresponds to the "Bootloader device-dependant parameters" - * table in ST document AN2606. - * Note that the option bytes upper range is inclusive! - */ -const stm32_dev_t devices[] = { - /* F0 */ - {0x440, "STM32F051xx" , 0x20001000, 0x20002000, 0x08000000, 0x08010000, 4, 1024, 0x1FFFF800, 0x1FFFF80B, 0x1FFFEC00, 0x1FFFF800}, - {0x444, "STM32F030/F031" , 0x20001000, 0x20002000, 0x08000000, 0x08010000, 4, 1024, 0x1FFFF800, 0x1FFFF80B, 0x1FFFEC00, 0x1FFFF800}, - {0x445, "STM32F042xx" , 0x20001800, 0x20001800, 0x08000000, 0x08008000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFC400, 0x1FFFF800}, - {0x448, "STM32F072xx" , 0x20001800, 0x20004000, 0x08000000, 0x08020000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFC800, 0x1FFFF800}, - /* F1 */ - {0x412, "Low-density" , 0x20000200, 0x20002800, 0x08000000, 0x08008000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x410, "Medium-density" , 0x20000200, 0x20005000, 0x08000000, 0x08020000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x414, "High-density" , 0x20000200, 0x20010000, 0x08000000, 0x08080000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x420, "Medium-density VL" , 0x20000200, 0x20002000, 0x08000000, 0x08020000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x428, "High-density VL" , 0x20000200, 0x20008000, 0x08000000, 0x08080000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x418, "Connectivity line" , 0x20001000, 0x20010000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFB000, 0x1FFFF800}, - {0x430, "XL-density" , 0x20000800, 0x20018000, 0x08000000, 0x08100000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFE000, 0x1FFFF800}, - /* Note that F2 and F4 devices have sectors of different page sizes - and only the first sectors (of one page size) are included here */ - /* F2 */ - {0x411, "STM32F2xx" , 0x20002000, 0x20020000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77DF}, - /* F3 */ - {0x432, "STM32F373/8" , 0x20001400, 0x20008000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800}, - {0x422, "F302xB/303xB/358" , 0x20001400, 0x20010000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800}, - {0x439, "STM32F302x4(6/8)" , 0x20001800, 0x20004000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800}, - {0x438, "F303x4/334/328" , 0x20001800, 0x20003000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800}, - /* F4 */ - {0x413, "STM32F40/1" , 0x20002000, 0x20020000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77DF}, - /* 0x419 is also used for STM32F429/39 but with other bootloader ID... */ - {0x419, "STM32F427/37" , 0x20002000, 0x20030000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77FF}, - {0x423, "STM32F401xB(C)" , 0x20003000, 0x20010000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77FF}, - {0x433, "STM32F401xD(E)" , 0x20003000, 0x20018000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77FF}, - /* L0 */ - {0x417, "L05xxx/06xxx" , 0x20001000, 0x20002000, 0x08000000, 0x08010000, 32, 128, 0x1FF80000, 0x1FF8000F, 0x1FF00000, 0x1FF01000}, - /* L1 */ - {0x416, "L1xxx6(8/B)" , 0x20000800, 0x20004000, 0x08000000, 0x08020000, 16, 256, 0x1FF80000, 0x1FF8000F, 0x1FF00000, 0x1FF01000}, - {0x429, "L1xxx6(8/B)A" , 0x20001000, 0x20008000, 0x08000000, 0x08020000, 16, 256, 0x1FF80000, 0x1FF8000F, 0x1FF00000, 0x1FF01000}, - {0x427, "L1xxxC" , 0x20001000, 0x20008000, 0x08000000, 0x08020000, 16, 256, 0x1FF80000, 0x1FF8000F, 0x1FF00000, 0x1FF02000}, - {0x436, "L1xxxD" , 0x20001000, 0x2000C000, 0x08000000, 0x08060000, 16, 256, 0x1ff80000, 0x1ff8000F, 0x1FF00000, 0x1FF02000}, - {0x437, "L1xxxE" , 0x20001000, 0x20014000, 0x08000000, 0x08060000, 16, 256, 0x1ff80000, 0x1ff8000F, 0x1FF00000, 0x1FF02000}, - /* These are not (yet) in AN2606: */ - {0x641, "Medium_Density PL" , 0x20000200, 0x00005000, 0x08000000, 0x08020000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x9a8, "STM32W-128K" , 0x20000200, 0x20002000, 0x08000000, 0x08020000, 1, 1024, 0, 0, 0, 0}, - {0x9b0, "STM32W-256K" , 0x20000200, 0x20004000, 0x08000000, 0x08040000, 1, 2048, 0, 0, 0, 0}, - {0x0} -}; diff --git a/linux/src/stm32flash_serial/src/gpl-2.0.txt b/linux/src/stm32flash_serial/src/gpl-2.0.txt deleted file mode 100644 index d159169d1..000000000 --- a/linux/src/stm32flash_serial/src/gpl-2.0.txt +++ /dev/null @@ -1,339 +0,0 @@ - GNU GENERAL PUBLIC LICENSE - Version 2, June 1991 - - Copyright (C) 1989, 1991 Free Software Foundation, Inc., - 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The licenses for most software are designed to take away your -freedom to share and change it. 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The Free Software Foundation may publish revised and/or new versions -of the General Public License from time to time. Such new versions will -be similar in spirit to the present version, but may differ in detail to -address new problems or concerns. - -Each version is given a distinguishing version number. If the Program -specifies a version number of this License which applies to it and "any -later version", you have the option of following the terms and conditions -either of that version or of any later version published by the Free -Software Foundation. If the Program does not specify a version number of -this License, you may choose any version ever published by the Free Software -Foundation. - - 10. If you wish to incorporate parts of the Program into other free -programs whose distribution conditions are different, write to the author -to ask for permission. For software which is copyrighted by the Free -Software Foundation, write to the Free Software Foundation; we sometimes -make exceptions for this. Our decision will be guided by the two goals -of preserving the free status of all derivatives of our free software and -of promoting the sharing and reuse of software generally. - - NO WARRANTY - - 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY -FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN -OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES -PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED -OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS -TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE -PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, -REPAIR OR CORRECTION. - - 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING -WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR -REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, -INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING -OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED -TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY -YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER -PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE -POSSIBILITY OF SUCH DAMAGES. - - END OF TERMS AND CONDITIONS - - How to Apply These Terms to Your New Programs - - If you develop a new program, and you want it to be of the greatest -possible use to the public, the best way to achieve this is to make it -free software which everyone can redistribute and change under these terms. - - To do so, attach the following notices to the program. It is safest -to attach them to the start of each source file to most effectively -convey the exclusion of warranty; and each file should have at least -the "copyright" line and a pointer to where the full notice is found. - - - Copyright (C) - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License along - with this program; if not, write to the Free Software Foundation, Inc., - 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - -Also add information on how to contact you by electronic and paper mail. - -If the program is interactive, make it output a short notice like this -when it starts in an interactive mode: - - Gnomovision version 69, Copyright (C) year name of author - Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. - This is free software, and you are welcome to redistribute it - under certain conditions; type `show c' for details. - -The hypothetical commands `show w' and `show c' should show the appropriate -parts of the General Public License. Of course, the commands you use may -be called something other than `show w' and `show c'; they could even be -mouse-clicks or menu items--whatever suits your program. - -You should also get your employer (if you work as a programmer) or your -school, if any, to sign a "copyright disclaimer" for the program, if -necessary. Here is a sample; alter the names: - - Yoyodyne, Inc., hereby disclaims all copyright interest in the program - `Gnomovision' (which makes passes at compilers) written by James Hacker. - - , 1 April 1989 - Ty Coon, President of Vice - -This General Public License does not permit incorporating your program into -proprietary programs. If your program is a subroutine library, you may -consider it more useful to permit linking proprietary applications with the -library. If this is what you want to do, use the GNU Lesser General -Public License instead of this License. diff --git a/linux/src/stm32flash_serial/src/i2c.c b/linux/src/stm32flash_serial/src/i2c.c deleted file mode 100644 index 10e6bb15a..000000000 --- a/linux/src/stm32flash_serial/src/i2c.c +++ /dev/null @@ -1,209 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2014 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "serial.h" -#include "port.h" - - -#if !defined(__linux__) - -static port_err_t i2c_open(struct port_interface *port, - struct port_options *ops) -{ - return PORT_ERR_NODEV; -} - -struct port_interface port_i2c = { - .name = "i2c", - .open = i2c_open, -}; - -#else - -#ifdef __ANDROID__ -#define I2C_SLAVE 0x0703 /* Use this slave address */ -#define I2C_FUNCS 0x0705 /* Get the adapter functionality mask */ -/* To determine what functionality is present */ -#define I2C_FUNC_I2C 0x00000001 -#else -#include -#include -#endif - -#include - -struct i2c_priv { - int fd; - int addr; -}; - -static port_err_t i2c_open(struct port_interface *port, - struct port_options *ops) -{ - struct i2c_priv *h; - int fd, addr, ret; - unsigned long funcs; - - /* 1. check device name match */ - if (strncmp(ops->device, "/dev/i2c-", strlen("/dev/i2c-"))) - return PORT_ERR_NODEV; - - /* 2. check options */ - addr = ops->bus_addr; - if (addr < 0x03 || addr > 0x77) { - fprintf(stderr, "I2C address out of range [0x03-0x77]\n"); - return PORT_ERR_UNKNOWN; - } - - /* 3. open it */ - h = calloc(sizeof(*h), 1); - if (h == NULL) { - fprintf(stderr, "End of memory\n"); - return PORT_ERR_UNKNOWN; - } - fd = open(ops->device, O_RDWR); - if (fd < 0) { - fprintf(stderr, "Unable to open special file \"%s\"\n", - ops->device); - free(h); - return PORT_ERR_UNKNOWN; - } - - /* 3.5. Check capabilities */ - ret = ioctl(fd, I2C_FUNCS, &funcs); - if (ret < 0) { - fprintf(stderr, "I2C ioctl(funcs) error %d\n", errno); - close(fd); - free(h); - return PORT_ERR_UNKNOWN; - } - if ((funcs & I2C_FUNC_I2C) == 0) { - fprintf(stderr, "Error: controller is not I2C, only SMBUS.\n"); - close(fd); - free(h); - return PORT_ERR_UNKNOWN; - } - - /* 4. set options */ - ret = ioctl(fd, I2C_SLAVE, addr); - if (ret < 0) { - fprintf(stderr, "I2C ioctl(slave) error %d\n", errno); - close(fd); - free(h); - return PORT_ERR_UNKNOWN; - } - - h->fd = fd; - h->addr = addr; - port->private = h; - return PORT_ERR_OK; -} - -static port_err_t i2c_close(struct port_interface *port) -{ - struct i2c_priv *h; - - h = (struct i2c_priv *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - close(h->fd); - free(h); - port->private = NULL; - return PORT_ERR_OK; -} - -static port_err_t i2c_read(struct port_interface *port, void *buf, - size_t nbyte) -{ - struct i2c_priv *h; - int ret; - - h = (struct i2c_priv *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - ret = read(h->fd, buf, nbyte); - if (ret != nbyte) - return PORT_ERR_UNKNOWN; - return PORT_ERR_OK; -} - -static port_err_t i2c_write(struct port_interface *port, void *buf, - size_t nbyte) -{ - struct i2c_priv *h; - int ret; - - h = (struct i2c_priv *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - ret = write(h->fd, buf, nbyte); - if (ret != nbyte) - return PORT_ERR_UNKNOWN; - return PORT_ERR_OK; -} - -static port_err_t i2c_gpio(struct port_interface *port, serial_gpio_t n, - int level) -{ - return PORT_ERR_OK; -} - -static const char *i2c_get_cfg_str(struct port_interface *port) -{ - struct i2c_priv *h; - static char str[11]; - - h = (struct i2c_priv *)port->private; - if (h == NULL) - return "INVALID"; - snprintf(str, sizeof(str), "addr 0x%2x", h->addr); - return str; -} - -static struct varlen_cmd i2c_cmd_get_reply[] = { - {0x10, 11}, - {0x11, 17}, - {0x12, 18}, - { /* sentinel */ } -}; - -struct port_interface port_i2c = { - .name = "i2c", - .flags = PORT_STRETCH_W, - .open = i2c_open, - .close = i2c_close, - .read = i2c_read, - .write = i2c_write, - .gpio = i2c_gpio, - .cmd_get_reply = i2c_cmd_get_reply, - .get_cfg_str = i2c_get_cfg_str, -}; - -#endif diff --git a/linux/src/stm32flash_serial/src/init.c b/linux/src/stm32flash_serial/src/init.c deleted file mode 100644 index 77a571bd8..000000000 --- a/linux/src/stm32flash_serial/src/init.c +++ /dev/null @@ -1,219 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - Copyright (C) 2013 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#include -#include -#include -#include -#include -#include -#include -#include -#include "init.h" -#include "serial.h" -#include "stm32.h" -#include "port.h" - -struct gpio_list { - struct gpio_list *next; - int gpio; -}; - - -static int write_to(const char *filename, const char *value) -{ - int fd, ret; - - fd = open(filename, O_WRONLY); - if (fd < 0) { - fprintf(stderr, "Cannot open file \"%s\"\n", filename); - return 0; - } - ret = write(fd, value, strlen(value)); - if (ret < 0) { - fprintf(stderr, "Error writing in file \"%s\"\n", filename); - close(fd); - return 0; - } - close(fd); - return 1; -} - -#if !defined(__linux__) -static int drive_gpio(int n, int level, struct gpio_list **gpio_to_release) -{ - fprintf(stderr, "GPIO control only available in Linux\n"); - return 0; -} -#else -static int drive_gpio(int n, int level, struct gpio_list **gpio_to_release) -{ - char num[16]; /* sized to carry MAX_INT */ - char file[48]; /* sized to carry longest filename */ - struct stat buf; - struct gpio_list *new; - int ret; - - sprintf(file, "/sys/class/gpio/gpio%d/direction", n); - ret = stat(file, &buf); - if (ret) { - /* file miss, GPIO not exported yet */ - sprintf(num, "%d", n); - ret = write_to("/sys/class/gpio/export", num); - if (!ret) - return 0; - ret = stat(file, &buf); - if (ret) { - fprintf(stderr, "GPIO %d not available\n", n); - return 0; - } - new = (struct gpio_list *)malloc(sizeof(struct gpio_list)); - if (new == NULL) { - fprintf(stderr, "Out of memory\n"); - return 0; - } - new->gpio = n; - new->next = *gpio_to_release; - *gpio_to_release = new; - } - - return write_to(file, level ? "high" : "low"); -} -#endif - -static int release_gpio(int n) -{ - char num[16]; /* sized to carry MAX_INT */ - - sprintf(num, "%d", n); - return write_to("/sys/class/gpio/unexport", num); -} - -static int gpio_sequence(struct port_interface *port, const char *s, size_t l) -{ - struct gpio_list *gpio_to_release = NULL, *to_free; - int ret, level, gpio; - - ret = 1; - while (ret == 1 && *s && l > 0) { - if (*s == '-') { - level = 0; - s++; - l--; - } else - level = 1; - - if (isdigit(*s)) { - gpio = atoi(s); - while (isdigit(*s)) { - s++; - l--; - } - } else if (!strncmp(s, "rts", 3)) { - gpio = -GPIO_RTS; - s += 3; - l -= 3; - } else if (!strncmp(s, "dtr", 3)) { - gpio = -GPIO_DTR; - s += 3; - l -= 3; - } else if (!strncmp(s, "brk", 3)) { - gpio = -GPIO_BRK; - s += 3; - l -= 3; - } else { - fprintf(stderr, "Character \'%c\' is not a digit\n", *s); - ret = 0; - break; - } - - if (*s && (l > 0)) { - if (*s == ',') { - s++; - l--; - } else { - fprintf(stderr, "Character \'%c\' is not a separator\n", *s); - ret = 0; - break; - } - } - if (gpio < 0) - ret = (port->gpio(port, -gpio, level) == PORT_ERR_OK); - else - ret = drive_gpio(gpio, level, &gpio_to_release); - usleep(100000); - } - - while (gpio_to_release) { - release_gpio(gpio_to_release->gpio); - to_free = gpio_to_release; - gpio_to_release = gpio_to_release->next; - free(to_free); - } - usleep(500000); - return ret; -} - -static int gpio_bl_entry(struct port_interface *port, const char *seq) -{ - char *s; - - if (seq == NULL || seq[0] == ':') - return 1; - - s = strchr(seq, ':'); - if (s == NULL) - return gpio_sequence(port, seq, strlen(seq)); - - return gpio_sequence(port, seq, s - seq); -} - -static int gpio_bl_exit(struct port_interface *port, const char *seq) -{ - char *s; - - if (seq == NULL) - return 1; - - s = strchr(seq, ':'); - if (s == NULL || s[1] == '\0') - return 1; - - return gpio_sequence(port, s + 1, strlen(s + 1)); -} - -int init_bl_entry(struct port_interface *port, const char *seq) -{ - if (seq) - return gpio_bl_entry(port, seq); - - return 1; -} - -int init_bl_exit(stm32_t *stm, struct port_interface *port, const char *seq) -{ - if (seq) - return gpio_bl_exit(port, seq); - - if (stm32_reset_device(stm) != STM32_ERR_OK) - return 0; - return 1; -} diff --git a/linux/src/stm32flash_serial/src/init.h b/linux/src/stm32flash_serial/src/init.h deleted file mode 100644 index 6075b519b..000000000 --- a/linux/src/stm32flash_serial/src/init.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - Copyright (C) 2013 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _INIT_H -#define _INIT_H - -#include "stm32.h" -#include "port.h" - -int init_bl_entry(struct port_interface *port, const char *seq); -int init_bl_exit(stm32_t *stm, struct port_interface *port, const char *seq); - -#endif diff --git a/linux/src/stm32flash_serial/src/main.c b/linux/src/stm32flash_serial/src/main.c deleted file mode 100644 index f081d6131..000000000 --- a/linux/src/stm32flash_serial/src/main.c +++ /dev/null @@ -1,774 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright 2010 Geoffrey McRae - Copyright 2011 Steve Markgraf - Copyright 2012 Tormod Volden - Copyright 2013 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include -#include -#include -#include -#include -#include - -#include "init.h" -#include "utils.h" -#include "serial.h" -#include "stm32.h" -#include "parsers/parser.h" -#include "port.h" - -#include "parsers/binary.h" -#include "parsers/hex.h" - -#define VERSION "Arduino_STM32_0.9" - -/* device globals */ -stm32_t *stm = NULL; - -void *p_st = NULL; -parser_t *parser = NULL; - -/* settings */ -struct port_options port_opts = { - .device = NULL, - .baudRate = SERIAL_BAUD_57600, - .serial_mode = "8e1", - .bus_addr = 0, - .rx_frame_max = STM32_MAX_RX_FRAME, - .tx_frame_max = STM32_MAX_TX_FRAME, -}; -int rd = 0; -int wr = 0; -int wu = 0; -int rp = 0; -int ur = 0; -int eraseOnly = 0; -int crc = 0; -int npages = 0; -int spage = 0; -int no_erase = 0; -char verify = 0; -int retry = 10; -char exec_flag = 0; -uint32_t execute = 0; -char init_flag = 1; -char force_binary = 0; -char reset_flag = 0; -char *filename; -char *gpio_seq = NULL; -uint32_t start_addr = 0; -uint32_t readwrite_len = 0; - -/* functions */ -int parse_options(int argc, char *argv[]); -void show_help(char *name); - -static int is_addr_in_ram(uint32_t addr) -{ - return addr >= stm->dev->ram_start && addr < stm->dev->ram_end; -} - -static int is_addr_in_flash(uint32_t addr) -{ - return addr >= stm->dev->fl_start && addr < stm->dev->fl_end; -} - -static int flash_addr_to_page_floor(uint32_t addr) -{ - if (!is_addr_in_flash(addr)) - return 0; - - return (addr - stm->dev->fl_start) / stm->dev->fl_ps; -} - -static int flash_addr_to_page_ceil(uint32_t addr) -{ - if (!(addr >= stm->dev->fl_start && addr <= stm->dev->fl_end)) - return 0; - - return (addr + stm->dev->fl_ps - 1 - stm->dev->fl_start) - / stm->dev->fl_ps; -} - -static uint32_t flash_page_to_addr(int page) -{ - return stm->dev->fl_start + page * stm->dev->fl_ps; -} - -int main(int argc, char* argv[]) { - struct port_interface *port = NULL; - int ret = 1; - stm32_err_t s_err; - parser_err_t perr; - FILE *diag = stdout; - - fprintf(diag, "stm32flash " VERSION "\n\n"); - fprintf(diag, "http://github.com/rogerclarkmelbourne/arduino_stm32\n\n"); - if (parse_options(argc, argv) != 0) - goto close; - - if (rd && filename[0] == '-') { - diag = stderr; - } - - if (wr) { - /* first try hex */ - if (!force_binary) { - parser = &PARSER_HEX; - p_st = parser->init(); - if (!p_st) { - fprintf(stderr, "%s Parser failed to initialize\n", parser->name); - goto close; - } - } - - if (force_binary || (perr = parser->open(p_st, filename, 0)) != PARSER_ERR_OK) { - if (force_binary || perr == PARSER_ERR_INVALID_FILE) { - if (!force_binary) { - parser->close(p_st); - p_st = NULL; - } - - /* now try binary */ - parser = &PARSER_BINARY; - p_st = parser->init(); - if (!p_st) { - fprintf(stderr, "%s Parser failed to initialize\n", parser->name); - goto close; - } - perr = parser->open(p_st, filename, 0); - } - - /* if still have an error, fail */ - if (perr != PARSER_ERR_OK) { - fprintf(stderr, "%s ERROR: %s\n", parser->name, parser_errstr(perr)); - if (perr == PARSER_ERR_SYSTEM) perror(filename); - goto close; - } - } - - fprintf(diag, "Using Parser : %s\n", parser->name); - } else { - parser = &PARSER_BINARY; - p_st = parser->init(); - if (!p_st) { - fprintf(stderr, "%s Parser failed to initialize\n", parser->name); - goto close; - } - } - - if (port_open(&port_opts, &port) != PORT_ERR_OK) { - fprintf(stderr, "Failed to open port: %s\n", port_opts.device); - goto close; - } - - fprintf(diag, "Interface %s: %s\n", port->name, port->get_cfg_str(port)); - if (init_flag && init_bl_entry(port, gpio_seq) == 0) - goto close; - stm = stm32_init(port, init_flag); - if (!stm) - goto close; - - fprintf(diag, "Version : 0x%02x\n", stm->bl_version); - if (port->flags & PORT_GVR_ETX) { - fprintf(diag, "Option 1 : 0x%02x\n", stm->option1); - fprintf(diag, "Option 2 : 0x%02x\n", stm->option2); - } - fprintf(diag, "Device ID : 0x%04x (%s)\n", stm->pid, stm->dev->name); - fprintf(diag, "- RAM : %dKiB (%db reserved by bootloader)\n", (stm->dev->ram_end - 0x20000000) / 1024, stm->dev->ram_start - 0x20000000); - fprintf(diag, "- Flash : %dKiB (sector size: %dx%d)\n", (stm->dev->fl_end - stm->dev->fl_start ) / 1024, stm->dev->fl_pps, stm->dev->fl_ps); - fprintf(diag, "- Option RAM : %db\n", stm->dev->opt_end - stm->dev->opt_start + 1); - fprintf(diag, "- System RAM : %dKiB\n", (stm->dev->mem_end - stm->dev->mem_start) / 1024); - - uint8_t buffer[256]; - uint32_t addr, start, end; - unsigned int len; - int failed = 0; - int first_page, num_pages; - - /* - * Cleanup addresses: - * - * Starting from options - * start_addr, readwrite_len, spage, npages - * and using device memory size, compute - * start, end, first_page, num_pages - */ - if (start_addr || readwrite_len) { - start = start_addr; - - if (is_addr_in_flash(start)) - end = stm->dev->fl_end; - else { - no_erase = 1; - if (is_addr_in_ram(start)) - end = stm->dev->ram_end; - else - end = start + sizeof(uint32_t); - } - - if (readwrite_len && (end > start + readwrite_len)) - end = start + readwrite_len; - - first_page = flash_addr_to_page_floor(start); - if (!first_page && end == stm->dev->fl_end) - num_pages = 0xff; /* mass erase */ - else - num_pages = flash_addr_to_page_ceil(end) - first_page; - } else if (!spage && !npages) { - start = stm->dev->fl_start; - end = stm->dev->fl_end; - first_page = 0; - num_pages = 0xff; /* mass erase */ - } else { - first_page = spage; - start = flash_page_to_addr(first_page); - if (start > stm->dev->fl_end) { - fprintf(stderr, "Address range exceeds flash size.\n"); - goto close; - } - - if (npages) { - num_pages = npages; - end = flash_page_to_addr(first_page + num_pages); - if (end > stm->dev->fl_end) - end = stm->dev->fl_end; - } else { - end = stm->dev->fl_end; - num_pages = flash_addr_to_page_ceil(end) - first_page; - } - - if (!first_page && end == stm->dev->fl_end) - num_pages = 0xff; /* mass erase */ - } - - if (rd) { - unsigned int max_len = port_opts.rx_frame_max; - - fprintf(diag, "Memory read\n"); - - perr = parser->open(p_st, filename, 1); - if (perr != PARSER_ERR_OK) { - fprintf(stderr, "%s ERROR: %s\n", parser->name, parser_errstr(perr)); - if (perr == PARSER_ERR_SYSTEM) - perror(filename); - goto close; - } - - fflush(diag); - addr = start; - while(addr < end) { - uint32_t left = end - addr; - len = max_len > left ? left : max_len; - s_err = stm32_read_memory(stm, addr, buffer, len); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to read memory at address 0x%08x, target write-protected?\n", addr); - goto close; - } - if (parser->write(p_st, buffer, len) != PARSER_ERR_OK) - { - fprintf(stderr, "Failed to write data to file\n"); - goto close; - } - addr += len; - - fprintf(diag, - "\rRead address 0x%08x (%.2f%%) ", - addr, - (100.0f / (float)(end - start)) * (float)(addr - start) - ); - fflush(diag); - } - fprintf(diag, "Done.\n"); - ret = 0; - goto close; - } else if (rp) { - fprintf(stdout, "Read-Protecting flash\n"); - /* the device automatically performs a reset after the sending the ACK */ - reset_flag = 0; - stm32_readprot_memory(stm); - fprintf(stdout, "Done.\n"); - } else if (ur) { - fprintf(stdout, "Read-UnProtecting flash\n"); - /* the device automatically performs a reset after the sending the ACK */ - reset_flag = 0; - stm32_runprot_memory(stm); - fprintf(stdout, "Done.\n"); - } else if (eraseOnly) { - ret = 0; - fprintf(stdout, "Erasing flash\n"); - - if (num_pages != 0xff && - (start != flash_page_to_addr(first_page) - || end != flash_page_to_addr(first_page + num_pages))) { - fprintf(stderr, "Specified start & length are invalid (must be page aligned)\n"); - ret = 1; - goto close; - } - - s_err = stm32_erase_memory(stm, first_page, num_pages); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to erase memory\n"); - ret = 1; - goto close; - } - } else if (wu) { - fprintf(diag, "Write-unprotecting flash\n"); - /* the device automatically performs a reset after the sending the ACK */ - reset_flag = 0; - stm32_wunprot_memory(stm); - fprintf(diag, "Done.\n"); - - } else if (wr) { - fprintf(diag, "Write to memory\n"); - - off_t offset = 0; - ssize_t r; - unsigned int size; - unsigned int max_wlen, max_rlen; - - max_wlen = port_opts.tx_frame_max - 2; /* skip len and crc */ - max_wlen &= ~3; /* 32 bit aligned */ - - max_rlen = port_opts.rx_frame_max; - max_rlen = max_rlen < max_wlen ? max_rlen : max_wlen; - - /* Assume data from stdin is whole device */ - if (filename[0] == '-' && filename[1] == '\0') - size = end - start; - else - size = parser->size(p_st); - - // TODO: It is possible to write to non-page boundaries, by reading out flash - // from partial pages and combining with the input data - // if ((start % stm->dev->fl_ps) != 0 || (end % stm->dev->fl_ps) != 0) { - // fprintf(stderr, "Specified start & length are invalid (must be page aligned)\n"); - // goto close; - // } - - // TODO: If writes are not page aligned, we should probably read out existing flash - // contents first, so it can be preserved and combined with new data - if (!no_erase && num_pages) { - fprintf(diag, "Erasing memory\n"); - s_err = stm32_erase_memory(stm, first_page, num_pages); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to erase memory\n"); - goto close; - } - } - - fflush(diag); - addr = start; - while(addr < end && offset < size) { - uint32_t left = end - addr; - len = max_wlen > left ? left : max_wlen; - len = len > size - offset ? size - offset : len; - - if (parser->read(p_st, buffer, &len) != PARSER_ERR_OK) - goto close; - - if (len == 0) { - if (filename[0] == '-') { - break; - } else { - fprintf(stderr, "Failed to read input file\n"); - goto close; - } - } - - again: - s_err = stm32_write_memory(stm, addr, buffer, len); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to write memory at address 0x%08x\n", addr); - goto close; - } - - if (verify) { - uint8_t compare[len]; - unsigned int offset, rlen; - - offset = 0; - while (offset < len) { - rlen = len - offset; - rlen = rlen < max_rlen ? rlen : max_rlen; - s_err = stm32_read_memory(stm, addr + offset, compare + offset, rlen); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to read memory at address 0x%08x\n", addr + offset); - goto close; - } - offset += rlen; - } - - for(r = 0; r < len; ++r) - if (buffer[r] != compare[r]) { - if (failed == retry) { - fprintf(stderr, "Failed to verify at address 0x%08x, expected 0x%02x and found 0x%02x\n", - (uint32_t)(addr + r), - buffer [r], - compare[r] - ); - goto close; - } - ++failed; - goto again; - } - - failed = 0; - } - - addr += len; - offset += len; - - fprintf(diag, - "\rWrote %saddress 0x%08x (%.2f%%) ", - verify ? "and verified " : "", - addr, - (100.0f / size) * offset - ); - fflush(diag); - - } - - fprintf(diag, "Done.\n"); - ret = 0; - goto close; - } else if (crc) { - uint32_t crc_val = 0; - - fprintf(diag, "CRC computation\n"); - - s_err = stm32_crc_wrapper(stm, start, end - start, &crc_val); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to read CRC\n"); - goto close; - } - fprintf(diag, "CRC(0x%08x-0x%08x) = 0x%08x\n", start, end, - crc_val); - ret = 0; - goto close; - } else - ret = 0; - -close: - if (stm && exec_flag && ret == 0) { - if (execute == 0) - execute = stm->dev->fl_start; - - fprintf(diag, "\nStarting execution at address 0x%08x... ", execute); - fflush(diag); - if (stm32_go(stm, execute) == STM32_ERR_OK) { - reset_flag = 0; - fprintf(diag, "done.\n"); - } else - fprintf(diag, "failed.\n"); - } - - if (stm && reset_flag) { - fprintf(diag, "\nResetting device... "); - fflush(diag); - if (init_bl_exit(stm, port, gpio_seq)) - fprintf(diag, "done.\n"); - else fprintf(diag, "failed.\n"); - } - - if (p_st ) parser->close(p_st); - if (stm ) stm32_close (stm); - if (port) - port->close(port); - - fprintf(diag, "\n"); - return ret; -} - -int parse_options(int argc, char *argv[]) -{ - int c; - char *pLen; - - while ((c = getopt(argc, argv, "a:b:m:r:w:e:vn:g:jkfcChuos:S:F:i:R")) != -1) { - switch(c) { - case 'a': - port_opts.bus_addr = strtoul(optarg, NULL, 0); - break; - - case 'b': - port_opts.baudRate = serial_get_baud(strtoul(optarg, NULL, 0)); - if (port_opts.baudRate == SERIAL_BAUD_INVALID) { - serial_baud_t baudrate; - fprintf(stderr, "Invalid baud rate, valid options are:\n"); - for (baudrate = SERIAL_BAUD_1200; baudrate != SERIAL_BAUD_INVALID; ++baudrate) - fprintf(stderr, " %d\n", serial_get_baud_int(baudrate)); - return 1; - } - break; - - case 'm': - if (strlen(optarg) != 3 - || serial_get_bits(optarg) == SERIAL_BITS_INVALID - || serial_get_parity(optarg) == SERIAL_PARITY_INVALID - || serial_get_stopbit(optarg) == SERIAL_STOPBIT_INVALID) { - fprintf(stderr, "Invalid serial mode\n"); - return 1; - } - port_opts.serial_mode = optarg; - break; - - case 'r': - case 'w': - rd = rd || c == 'r'; - wr = wr || c == 'w'; - if (rd && wr) { - fprintf(stderr, "ERROR: Invalid options, can't read & write at the same time\n"); - return 1; - } - filename = optarg; - if (filename[0] == '-') { - force_binary = 1; - } - break; - case 'e': - if (readwrite_len || start_addr) { - fprintf(stderr, "ERROR: Invalid options, can't specify start page / num pages and start address/length\n"); - return 1; - } - npages = strtoul(optarg, NULL, 0); - if (npages > 0xFF || npages < 0) { - fprintf(stderr, "ERROR: You need to specify a page count between 0 and 255"); - return 1; - } - if (!npages) - no_erase = 1; - break; - case 'u': - wu = 1; - if (rd || wr) { - fprintf(stderr, "ERROR: Invalid options, can't write unprotect and read/write at the same time\n"); - return 1; - } - break; - - case 'j': - rp = 1; - if (rd || wr) { - fprintf(stderr, "ERROR: Invalid options, can't read protect and read/write at the same time\n"); - return 1; - } - break; - - case 'k': - ur = 1; - if (rd || wr) { - fprintf(stderr, "ERROR: Invalid options, can't read unprotect and read/write at the same time\n"); - return 1; - } - break; - - case 'o': - eraseOnly = 1; - if (rd || wr) { - fprintf(stderr, "ERROR: Invalid options, can't erase-only and read/write at the same time\n"); - return 1; - } - break; - - case 'v': - verify = 1; - break; - - case 'n': - retry = strtoul(optarg, NULL, 0); - break; - - case 'g': - exec_flag = 1; - execute = strtoul(optarg, NULL, 0); - if (execute % 4 != 0) { - fprintf(stderr, "ERROR: Execution address must be word-aligned\n"); - return 1; - } - break; - case 's': - if (readwrite_len || start_addr) { - fprintf(stderr, "ERROR: Invalid options, can't specify start page / num pages and start address/length\n"); - return 1; - } - spage = strtoul(optarg, NULL, 0); - break; - case 'S': - if (spage || npages) { - fprintf(stderr, "ERROR: Invalid options, can't specify start page / num pages and start address/length\n"); - return 1; - } else { - start_addr = strtoul(optarg, &pLen, 0); - if (*pLen == ':') { - pLen++; - readwrite_len = strtoul(pLen, NULL, 0); - if (readwrite_len == 0) { - fprintf(stderr, "ERROR: Invalid options, can't specify zero length\n"); - return 1; - } - } - } - break; - case 'F': - port_opts.rx_frame_max = strtoul(optarg, &pLen, 0); - if (*pLen == ':') { - pLen++; - port_opts.tx_frame_max = strtoul(pLen, NULL, 0); - } - if (port_opts.rx_frame_max < 0 - || port_opts.tx_frame_max < 0) { - fprintf(stderr, "ERROR: Invalid negative value for option -F\n"); - return 1; - } - if (port_opts.rx_frame_max == 0) - port_opts.rx_frame_max = STM32_MAX_RX_FRAME; - if (port_opts.tx_frame_max == 0) - port_opts.tx_frame_max = STM32_MAX_TX_FRAME; - if (port_opts.rx_frame_max < 20 - || port_opts.tx_frame_max < 5) { - fprintf(stderr, "ERROR: current code cannot work with small frames.\n"); - fprintf(stderr, "min(RX) = 20, min(TX) = 5\n"); - return 1; - } - if (port_opts.rx_frame_max > STM32_MAX_RX_FRAME) { - fprintf(stderr, "WARNING: Ignore RX length in option -F\n"); - port_opts.rx_frame_max = STM32_MAX_RX_FRAME; - } - if (port_opts.tx_frame_max > STM32_MAX_TX_FRAME) { - fprintf(stderr, "WARNING: Ignore TX length in option -F\n"); - port_opts.tx_frame_max = STM32_MAX_TX_FRAME; - } - break; - case 'f': - force_binary = 1; - break; - - case 'c': - init_flag = 0; - break; - - case 'h': - show_help(argv[0]); - exit(0); - - case 'i': - gpio_seq = optarg; - break; - - case 'R': - reset_flag = 1; - break; - - case 'C': - crc = 1; - break; - } - } - - for (c = optind; c < argc; ++c) { - if (port_opts.device) { - fprintf(stderr, "ERROR: Invalid parameter specified\n"); - show_help(argv[0]); - return 1; - } - port_opts.device = argv[c]; - } - - if (port_opts.device == NULL) { - fprintf(stderr, "ERROR: Device not specified\n"); - show_help(argv[0]); - return 1; - } - - if (!wr && verify) { - fprintf(stderr, "ERROR: Invalid usage, -v is only valid when writing\n"); - show_help(argv[0]); - return 1; - } - - return 0; -} - -void show_help(char *name) { - fprintf(stderr, - "Usage: %s [-bvngfhc] [-[rw] filename] [tty_device | i2c_device]\n" - " -a bus_address Bus address (e.g. for I2C port)\n" - " -b rate Baud rate (default 57600)\n" - " -m mode Serial port mode (default 8e1)\n" - " -r filename Read flash to file (or - stdout)\n" - " -w filename Write flash from file (or - stdout)\n" - " -C Compute CRC of flash content\n" - " -u Disable the flash write-protection\n" - " -j Enable the flash read-protection\n" - " -k Disable the flash read-protection\n" - " -o Erase only\n" - " -e n Only erase n pages before writing the flash\n" - " -v Verify writes\n" - " -n count Retry failed writes up to count times (default 10)\n" - " -g address Start execution at specified address (0 = flash start)\n" - " -S address[:length] Specify start address and optionally length for\n" - " read/write/erase operations\n" - " -F RX_length[:TX_length] Specify the max length of RX and TX frame\n" - " -s start_page Flash at specified page (0 = flash start)\n" - " -f Force binary parser\n" - " -h Show this help\n" - " -c Resume the connection (don't send initial INIT)\n" - " *Baud rate must be kept the same as the first init*\n" - " This is useful if the reset fails\n" - " -i GPIO_string GPIO sequence to enter/exit bootloader mode\n" - " GPIO_string=[entry_seq][:[exit_seq]]\n" - " sequence=[-]n[,sequence]\n" - " -R Reset device at exit.\n" - "\n" - "Examples:\n" - " Get device information:\n" - " %s /dev/ttyS0\n" - " or:\n" - " %s /dev/i2c-0\n" - "\n" - " Write with verify and then start execution:\n" - " %s -w filename -v -g 0x0 /dev/ttyS0\n" - "\n" - " Read flash to file:\n" - " %s -r filename /dev/ttyS0\n" - "\n" - " Read 100 bytes of flash from 0x1000 to stdout:\n" - " %s -r - -S 0x1000:100 /dev/ttyS0\n" - "\n" - " Start execution:\n" - " %s -g 0x0 /dev/ttyS0\n" - "\n" - " GPIO sequence:\n" - " - entry sequence: GPIO_3=low, GPIO_2=low, GPIO_2=high\n" - " - exit sequence: GPIO_3=high, GPIO_2=low, GPIO_2=high\n" - " %s -i -3,-2,2:3,-2,2 /dev/ttyS0\n", - name, - name, - name, - name, - name, - name, - name, - name - ); -} - diff --git a/linux/src/stm32flash_serial/src/parsers/Android.mk b/linux/src/stm32flash_serial/src/parsers/Android.mk deleted file mode 100644 index afec18cd5..000000000 --- a/linux/src/stm32flash_serial/src/parsers/Android.mk +++ /dev/null @@ -1,6 +0,0 @@ -LOCAL_PATH := $(call my-dir) - -include $(CLEAR_VARS) -LOCAL_MODULE := libparsers -LOCAL_SRC_FILES := binary.c hex.c -include $(BUILD_STATIC_LIBRARY) diff --git a/linux/src/stm32flash_serial/src/parsers/Makefile b/linux/src/stm32flash_serial/src/parsers/Makefile deleted file mode 100644 index bb7df1e02..000000000 --- a/linux/src/stm32flash_serial/src/parsers/Makefile +++ /dev/null @@ -1,12 +0,0 @@ - -CFLAGS += -Wall -g - -all: parsers.a - -parsers.a: binary.o hex.o - $(AR) rc $@ binary.o hex.o - -clean: - rm -f *.o parsers.a - -.PHONY: all clean diff --git a/linux/src/stm32flash_serial/src/parsers/binary.c b/linux/src/stm32flash_serial/src/parsers/binary.c deleted file mode 100644 index f491952bb..000000000 --- a/linux/src/stm32flash_serial/src/parsers/binary.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#include -#include -#include -#include -#include - -#include "binary.h" - -typedef struct { - int fd; - char write; - struct stat stat; -} binary_t; - -void* binary_init() { - return calloc(sizeof(binary_t), 1); -} - -parser_err_t binary_open(void *storage, const char *filename, const char write) { - binary_t *st = storage; - if (write) { - if (filename[0] == '-') - st->fd = 1; - else - st->fd = open( - filename, -#ifndef __WIN32__ - O_WRONLY | O_CREAT | O_TRUNC, -#else - O_WRONLY | O_CREAT | O_TRUNC | O_BINARY, -#endif -#ifndef __WIN32__ - S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH -#else - 0 -#endif - ); - st->stat.st_size = 0; - } else { - if (filename[0] == '-') { - st->fd = 0; - } else { - if (stat(filename, &st->stat) != 0) - return PARSER_ERR_INVALID_FILE; - st->fd = open(filename, -#ifndef __WIN32__ - O_RDONLY -#else - O_RDONLY | O_BINARY -#endif - ); - } - } - - st->write = write; - return st->fd == -1 ? PARSER_ERR_SYSTEM : PARSER_ERR_OK; -} - -parser_err_t binary_close(void *storage) { - binary_t *st = storage; - - if (st->fd) close(st->fd); - free(st); - return PARSER_ERR_OK; -} - -unsigned int binary_size(void *storage) { - binary_t *st = storage; - return st->stat.st_size; -} - -parser_err_t binary_read(void *storage, void *data, unsigned int *len) { - binary_t *st = storage; - unsigned int left = *len; - if (st->write) return PARSER_ERR_WRONLY; - - ssize_t r; - while(left > 0) { - r = read(st->fd, data, left); - /* If there is no data to read at all, return OK, but with zero read */ - if (r == 0 && left == *len) { - *len = 0; - return PARSER_ERR_OK; - } - if (r <= 0) return PARSER_ERR_SYSTEM; - left -= r; - data += r; - } - - *len = *len - left; - return PARSER_ERR_OK; -} - -parser_err_t binary_write(void *storage, void *data, unsigned int len) { - binary_t *st = storage; - if (!st->write) return PARSER_ERR_RDONLY; - - ssize_t r; - while(len > 0) { - r = write(st->fd, data, len); - if (r < 1) return PARSER_ERR_SYSTEM; - st->stat.st_size += r; - - len -= r; - data += r; - } - - return PARSER_ERR_OK; -} - -parser_t PARSER_BINARY = { - "Raw BINARY", - binary_init, - binary_open, - binary_close, - binary_size, - binary_read, - binary_write -}; - diff --git a/linux/src/stm32flash_serial/src/parsers/binary.h b/linux/src/stm32flash_serial/src/parsers/binary.h deleted file mode 100644 index d989acfa0..000000000 --- a/linux/src/stm32flash_serial/src/parsers/binary.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _PARSER_BINARY_H -#define _PARSER_BINARY_H - -#include "parser.h" - -extern parser_t PARSER_BINARY; -#endif diff --git a/linux/src/stm32flash_serial/src/parsers/hex.c b/linux/src/stm32flash_serial/src/parsers/hex.c deleted file mode 100644 index 3baf85623..000000000 --- a/linux/src/stm32flash_serial/src/parsers/hex.c +++ /dev/null @@ -1,224 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#include -#include -#include -#include -#include -#include -#include - -#include "hex.h" -#include "../utils.h" - -typedef struct { - size_t data_len, offset; - uint8_t *data; - uint8_t base; -} hex_t; - -void* hex_init() { - return calloc(sizeof(hex_t), 1); -} - -parser_err_t hex_open(void *storage, const char *filename, const char write) { - hex_t *st = storage; - if (write) { - return PARSER_ERR_RDONLY; - } else { - char mark; - int i, fd; - uint8_t checksum; - unsigned int c; - uint32_t base = 0; - unsigned int last_address = 0x0; - - fd = open(filename, O_RDONLY); - if (fd < 0) - return PARSER_ERR_SYSTEM; - - /* read in the file */ - - while(read(fd, &mark, 1) != 0) { - if (mark == '\n' || mark == '\r') continue; - if (mark != ':') - return PARSER_ERR_INVALID_FILE; - - char buffer[9]; - unsigned int reclen, address, type; - uint8_t *record = NULL; - - /* get the reclen, address, and type */ - buffer[8] = 0; - if (read(fd, &buffer, 8) != 8) return PARSER_ERR_INVALID_FILE; - if (sscanf(buffer, "%2x%4x%2x", &reclen, &address, &type) != 3) { - close(fd); - return PARSER_ERR_INVALID_FILE; - } - - /* setup the checksum */ - checksum = - reclen + - ((address & 0xFF00) >> 8) + - ((address & 0x00FF) >> 0) + - type; - - switch(type) { - /* data record */ - case 0: - c = address - last_address; - st->data = realloc(st->data, st->data_len + c + reclen); - - /* if there is a gap, set it to 0xff and increment the length */ - if (c > 0) { - memset(&st->data[st->data_len], 0xff, c); - st->data_len += c; - } - - last_address = address + reclen; - record = &st->data[st->data_len]; - st->data_len += reclen; - break; - - /* extended segment address record */ - case 2: - base = 0; - break; - - /* extended linear address record */ - case 4: - base = address; - break; - } - - buffer[2] = 0; - for(i = 0; i < reclen; ++i) { - if (read(fd, &buffer, 2) != 2 || sscanf(buffer, "%2x", &c) != 1) { - close(fd); - return PARSER_ERR_INVALID_FILE; - } - - /* add the byte to the checksum */ - checksum += c; - - switch(type) { - case 0: - if (record != NULL) { - record[i] = c; - } else { - return PARSER_ERR_INVALID_FILE; - } - break; - - case 2: - case 4: - base = (base << 8) | c; - break; - } - } - - /* read, scan, and verify the checksum */ - if ( - read(fd, &buffer, 2 ) != 2 || - sscanf(buffer, "%2x", &c) != 1 || - (uint8_t)(checksum + c) != 0x00 - ) { - close(fd); - return PARSER_ERR_INVALID_FILE; - } - - switch(type) { - /* EOF */ - case 1: - close(fd); - return PARSER_ERR_OK; - - /* address record */ - case 2: base = base << 4; - case 4: base = be_u32(base); - /* Reset last_address since our base changed */ - last_address = 0; - - if (st->base == 0) { - st->base = base; - break; - } - - /* we cant cope with files out of order */ - if (base < st->base) { - close(fd); - return PARSER_ERR_INVALID_FILE; - } - - /* if there is a gap, enlarge and fill with zeros */ - unsigned int len = base - st->base; - if (len > st->data_len) { - st->data = realloc(st->data, len); - memset(&st->data[st->data_len], 0, len - st->data_len); - st->data_len = len; - } - break; - } - } - - close(fd); - return PARSER_ERR_OK; - } -} - -parser_err_t hex_close(void *storage) { - hex_t *st = storage; - if (st) free(st->data); - free(st); - return PARSER_ERR_OK; -} - -unsigned int hex_size(void *storage) { - hex_t *st = storage; - return st->data_len; -} - -parser_err_t hex_read(void *storage, void *data, unsigned int *len) { - hex_t *st = storage; - unsigned int left = st->data_len - st->offset; - unsigned int get = left > *len ? *len : left; - - memcpy(data, &st->data[st->offset], get); - st->offset += get; - - *len = get; - return PARSER_ERR_OK; -} - -parser_err_t hex_write(void *storage, void *data, unsigned int len) { - return PARSER_ERR_RDONLY; -} - -parser_t PARSER_HEX = { - "Intel HEX", - hex_init, - hex_open, - hex_close, - hex_size, - hex_read, - hex_write -}; - diff --git a/linux/src/stm32flash_serial/src/parsers/hex.h b/linux/src/stm32flash_serial/src/parsers/hex.h deleted file mode 100644 index 02413c9c9..000000000 --- a/linux/src/stm32flash_serial/src/parsers/hex.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _PARSER_HEX_H -#define _PARSER_HEX_H - -#include "parser.h" - -extern parser_t PARSER_HEX; -#endif diff --git a/linux/src/stm32flash_serial/src/parsers/parser.h b/linux/src/stm32flash_serial/src/parsers/parser.h deleted file mode 100644 index c2fae3cf8..000000000 --- a/linux/src/stm32flash_serial/src/parsers/parser.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _H_PARSER -#define _H_PARSER - -enum parser_err { - PARSER_ERR_OK, - PARSER_ERR_SYSTEM, - PARSER_ERR_INVALID_FILE, - PARSER_ERR_WRONLY, - PARSER_ERR_RDONLY -}; -typedef enum parser_err parser_err_t; - -struct parser { - const char *name; - void* (*init )(); /* initialise the parser */ - parser_err_t (*open )(void *storage, const char *filename, const char write); /* open the file for read|write */ - parser_err_t (*close)(void *storage); /* close and free the parser */ - unsigned int (*size )(void *storage); /* get the total data size */ - parser_err_t (*read )(void *storage, void *data, unsigned int *len); /* read a block of data */ - parser_err_t (*write)(void *storage, void *data, unsigned int len); /* write a block of data */ -}; -typedef struct parser parser_t; - -static inline const char* parser_errstr(parser_err_t err) { - switch(err) { - case PARSER_ERR_OK : return "OK"; - case PARSER_ERR_SYSTEM : return "System Error"; - case PARSER_ERR_INVALID_FILE: return "Invalid File"; - case PARSER_ERR_WRONLY : return "Parser can only write"; - case PARSER_ERR_RDONLY : return "Parser can only read"; - default: - return "Unknown Error"; - } -} - -#endif diff --git a/linux/src/stm32flash_serial/src/port.c b/linux/src/stm32flash_serial/src/port.c deleted file mode 100644 index 08e58cc34..000000000 --- a/linux/src/stm32flash_serial/src/port.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2014 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include - -#include "serial.h" -#include "port.h" - - -extern struct port_interface port_serial; -extern struct port_interface port_i2c; - -static struct port_interface *ports[] = { - &port_serial, - &port_i2c, - NULL, -}; - - -port_err_t port_open(struct port_options *ops, struct port_interface **outport) -{ - int ret; - static struct port_interface **port; - - for (port = ports; *port; port++) { - ret = (*port)->open(*port, ops); - if (ret == PORT_ERR_NODEV) - continue; - if (ret == PORT_ERR_OK) - break; - fprintf(stderr, "Error probing interface \"%s\"\n", - (*port)->name); - } - if (*port == NULL) { - fprintf(stderr, "Cannot handle device \"%s\"\n", - ops->device); - return PORT_ERR_UNKNOWN; - } - - *outport = *port; - return PORT_ERR_OK; -} diff --git a/linux/src/stm32flash_serial/src/port.h b/linux/src/stm32flash_serial/src/port.h deleted file mode 100644 index 290f03496..000000000 --- a/linux/src/stm32flash_serial/src/port.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2014 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _H_PORT -#define _H_PORT - -typedef enum { - PORT_ERR_OK = 0, - PORT_ERR_NODEV, /* No such device */ - PORT_ERR_TIMEDOUT, /* Operation timed out */ - PORT_ERR_UNKNOWN, -} port_err_t; - -/* flags */ -#define PORT_BYTE (1 << 0) /* byte (not frame) oriented */ -#define PORT_GVR_ETX (1 << 1) /* cmd GVR returns protection status */ -#define PORT_CMD_INIT (1 << 2) /* use INIT cmd to autodetect speed */ -#define PORT_RETRY (1 << 3) /* allowed read() retry after timeout */ -#define PORT_STRETCH_W (1 << 4) /* warning for no-stretching commands */ - -/* all options and flags used to open and configure an interface */ -struct port_options { - const char *device; - serial_baud_t baudRate; - const char *serial_mode; - int bus_addr; - int rx_frame_max; - int tx_frame_max; -}; - -/* - * Specify the length of reply for command GET - * This is helpful for frame-oriented protocols, e.g. i2c, to avoid time - * consuming try-fail-timeout-retry operation. - * On byte-oriented protocols, i.e. UART, this information would be skipped - * after read the first byte, so not needed. - */ -struct varlen_cmd { - uint8_t version; - uint8_t length; -}; - -struct port_interface { - const char *name; - unsigned flags; - port_err_t (*open)(struct port_interface *port, struct port_options *ops); - port_err_t (*close)(struct port_interface *port); - port_err_t (*read)(struct port_interface *port, void *buf, size_t nbyte); - port_err_t (*write)(struct port_interface *port, void *buf, size_t nbyte); - port_err_t (*gpio)(struct port_interface *port, serial_gpio_t n, int level); - const char *(*get_cfg_str)(struct port_interface *port); - struct varlen_cmd *cmd_get_reply; - void *private; -}; - -port_err_t port_open(struct port_options *ops, struct port_interface **outport); - -#endif diff --git a/linux/src/stm32flash_serial/src/protocol.txt b/linux/src/stm32flash_serial/src/protocol.txt deleted file mode 100644 index 039109908..000000000 --- a/linux/src/stm32flash_serial/src/protocol.txt +++ /dev/null @@ -1,19 +0,0 @@ -The communication protocol used by ST bootloader is documented in following ST -application notes, depending on communication port. - -In current version of stm32flash are supported only UART and I2C ports. - -* AN3154: CAN protocol used in the STM32 bootloader - http://www.st.com/web/en/resource/technical/document/application_note/CD00264321.pdf - -* AN3155: USART protocol used in the STM32(TM) bootloader - http://www.st.com/web/en/resource/technical/document/application_note/CD00264342.pdf - -* AN4221: I2C protocol used in the STM32 bootloader - http://www.st.com/web/en/resource/technical/document/application_note/DM00072315.pdf - -* AN4286: SPI protocol used in the STM32 bootloader - http://www.st.com/web/en/resource/technical/document/application_note/DM00081379.pdf - -Boot mode selection for STM32 is documented in ST application note AN2606, available in ST website: - http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf diff --git a/linux/src/stm32flash_serial/src/serial.h b/linux/src/stm32flash_serial/src/serial.h deleted file mode 100644 index 227ba163b..000000000 --- a/linux/src/stm32flash_serial/src/serial.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _SERIAL_H -#define _SERIAL_H - -typedef struct serial serial_t; - -typedef enum { - SERIAL_PARITY_NONE, - SERIAL_PARITY_EVEN, - SERIAL_PARITY_ODD, - - SERIAL_PARITY_INVALID -} serial_parity_t; - -typedef enum { - SERIAL_BITS_5, - SERIAL_BITS_6, - SERIAL_BITS_7, - SERIAL_BITS_8, - - SERIAL_BITS_INVALID -} serial_bits_t; - -typedef enum { - SERIAL_BAUD_1200, - SERIAL_BAUD_1800, - SERIAL_BAUD_2400, - SERIAL_BAUD_4800, - SERIAL_BAUD_9600, - SERIAL_BAUD_19200, - SERIAL_BAUD_38400, - SERIAL_BAUD_57600, - SERIAL_BAUD_115200, - SERIAL_BAUD_128000, - SERIAL_BAUD_230400, - SERIAL_BAUD_256000, - SERIAL_BAUD_460800, - SERIAL_BAUD_500000, - SERIAL_BAUD_576000, - SERIAL_BAUD_921600, - SERIAL_BAUD_1000000, - SERIAL_BAUD_1500000, - SERIAL_BAUD_2000000, - - SERIAL_BAUD_INVALID -} serial_baud_t; - -typedef enum { - SERIAL_STOPBIT_1, - SERIAL_STOPBIT_2, - - SERIAL_STOPBIT_INVALID -} serial_stopbit_t; - -typedef enum { - GPIO_RTS = 1, - GPIO_DTR, - GPIO_BRK, -} serial_gpio_t; - -/* common helper functions */ -serial_baud_t serial_get_baud(const unsigned int baud); -unsigned int serial_get_baud_int(const serial_baud_t baud); -serial_bits_t serial_get_bits(const char *mode); -unsigned int serial_get_bits_int(const serial_bits_t bits); -serial_parity_t serial_get_parity(const char *mode); -char serial_get_parity_str(const serial_parity_t parity); -serial_stopbit_t serial_get_stopbit(const char *mode); -unsigned int serial_get_stopbit_int(const serial_stopbit_t stopbit); - -#endif diff --git a/linux/src/stm32flash_serial/src/serial_common.c b/linux/src/stm32flash_serial/src/serial_common.c deleted file mode 100644 index 43e48e1ac..000000000 --- a/linux/src/stm32flash_serial/src/serial_common.c +++ /dev/null @@ -1,154 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include "serial.h" - -serial_baud_t serial_get_baud(const unsigned int baud) { - switch(baud) { - case 1200: return SERIAL_BAUD_1200 ; - case 1800: return SERIAL_BAUD_1800 ; - case 2400: return SERIAL_BAUD_2400 ; - case 4800: return SERIAL_BAUD_4800 ; - case 9600: return SERIAL_BAUD_9600 ; - case 19200: return SERIAL_BAUD_19200 ; - case 38400: return SERIAL_BAUD_38400 ; - case 57600: return SERIAL_BAUD_57600 ; - case 115200: return SERIAL_BAUD_115200; - case 128000: return SERIAL_BAUD_128000; - case 230400: return SERIAL_BAUD_230400; - case 256000: return SERIAL_BAUD_256000; - case 460800: return SERIAL_BAUD_460800; - case 500000: return SERIAL_BAUD_500000; - case 576000: return SERIAL_BAUD_576000; - case 921600: return SERIAL_BAUD_921600; - case 1000000: return SERIAL_BAUD_1000000; - case 1500000: return SERIAL_BAUD_1500000; - case 2000000: return SERIAL_BAUD_2000000; - - default: - return SERIAL_BAUD_INVALID; - } -} - -unsigned int serial_get_baud_int(const serial_baud_t baud) { - switch(baud) { - case SERIAL_BAUD_1200 : return 1200 ; - case SERIAL_BAUD_1800 : return 1800 ; - case SERIAL_BAUD_2400 : return 2400 ; - case SERIAL_BAUD_4800 : return 4800 ; - case SERIAL_BAUD_9600 : return 9600 ; - case SERIAL_BAUD_19200 : return 19200 ; - case SERIAL_BAUD_38400 : return 38400 ; - case SERIAL_BAUD_57600 : return 57600 ; - case SERIAL_BAUD_115200: return 115200; - case SERIAL_BAUD_128000: return 128000; - case SERIAL_BAUD_230400: return 230400; - case SERIAL_BAUD_256000: return 256000; - case SERIAL_BAUD_460800: return 460800; - case SERIAL_BAUD_500000: return 500000; - case SERIAL_BAUD_576000: return 576000; - case SERIAL_BAUD_921600: return 921600; - case SERIAL_BAUD_1000000: return 1000000; - case SERIAL_BAUD_1500000: return 1500000; - case SERIAL_BAUD_2000000: return 2000000; - - case SERIAL_BAUD_INVALID: - default: - return 0; - } -} - -serial_bits_t serial_get_bits(const char *mode) { - if (!mode) - return SERIAL_BITS_INVALID; - switch(mode[0]) { - case '5': return SERIAL_BITS_5; - case '6': return SERIAL_BITS_6; - case '7': return SERIAL_BITS_7; - case '8': return SERIAL_BITS_8; - - default: - return SERIAL_BITS_INVALID; - } -} - -unsigned int serial_get_bits_int(const serial_bits_t bits) { - switch(bits) { - case SERIAL_BITS_5: return 5; - case SERIAL_BITS_6: return 6; - case SERIAL_BITS_7: return 7; - case SERIAL_BITS_8: return 8; - - default: - return 0; - } -} - -serial_parity_t serial_get_parity(const char *mode) { - if (!mode || !mode[0]) - return SERIAL_PARITY_INVALID; - switch(mode[1]) { - case 'N': - case 'n': - return SERIAL_PARITY_NONE; - case 'E': - case 'e': - return SERIAL_PARITY_EVEN; - case 'O': - case 'o': - return SERIAL_PARITY_ODD; - - default: - return SERIAL_PARITY_INVALID; - } -} - -char serial_get_parity_str(const serial_parity_t parity) { - switch(parity) { - case SERIAL_PARITY_NONE: return 'N'; - case SERIAL_PARITY_EVEN: return 'E'; - case SERIAL_PARITY_ODD : return 'O'; - - default: - return ' '; - } -} - -serial_stopbit_t serial_get_stopbit(const char *mode) { - if (!mode || !mode[0] || !mode[1]) - return SERIAL_STOPBIT_INVALID; - switch(mode[2]) { - case '1': return SERIAL_STOPBIT_1; - case '2': return SERIAL_STOPBIT_2; - - default: - return SERIAL_STOPBIT_INVALID; - } -} - -unsigned int serial_get_stopbit_int(const serial_stopbit_t stopbit) { - switch(stopbit) { - case SERIAL_STOPBIT_1: return 1; - case SERIAL_STOPBIT_2: return 2; - - default: - return 0; - } -} - diff --git a/linux/src/stm32flash_serial/src/serial_platform.c b/linux/src/stm32flash_serial/src/serial_platform.c deleted file mode 100644 index 98e256921..000000000 --- a/linux/src/stm32flash_serial/src/serial_platform.c +++ /dev/null @@ -1,5 +0,0 @@ -#if defined(__WIN32__) || defined(__CYGWIN__) -# include "serial_w32.c" -#else -# include "serial_posix.c" -#endif diff --git a/linux/src/stm32flash_serial/src/serial_posix.c b/linux/src/stm32flash_serial/src/serial_posix.c deleted file mode 100644 index 284b35b20..000000000 --- a/linux/src/stm32flash_serial/src/serial_posix.c +++ /dev/null @@ -1,395 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "serial.h" -#include "port.h" - -struct serial { - int fd; - struct termios oldtio; - struct termios newtio; - char setup_str[11]; -}; - -static serial_t *serial_open(const char *device) -{ - serial_t *h = calloc(sizeof(serial_t), 1); - - h->fd = open(device, O_RDWR | O_NOCTTY | O_NDELAY); - if (h->fd < 0) { - free(h); - return NULL; - } - fcntl(h->fd, F_SETFL, 0); - - tcgetattr(h->fd, &h->oldtio); - tcgetattr(h->fd, &h->newtio); - - return h; -} - -static void serial_flush(const serial_t *h) -{ - tcflush(h->fd, TCIFLUSH); -} - -static void serial_close(serial_t *h) -{ - serial_flush(h); - tcsetattr(h->fd, TCSANOW, &h->oldtio); - close(h->fd); - free(h); -} - -static port_err_t serial_setup(serial_t *h, const serial_baud_t baud, - const serial_bits_t bits, - const serial_parity_t parity, - const serial_stopbit_t stopbit) -{ - speed_t port_baud; - tcflag_t port_bits; - tcflag_t port_parity; - tcflag_t port_stop; - struct termios settings; - - switch (baud) { - case SERIAL_BAUD_1200: port_baud = B1200; break; - case SERIAL_BAUD_1800: port_baud = B1800; break; - case SERIAL_BAUD_2400: port_baud = B2400; break; - case SERIAL_BAUD_4800: port_baud = B4800; break; - case SERIAL_BAUD_9600: port_baud = B9600; break; - case SERIAL_BAUD_19200: port_baud = B19200; break; - case SERIAL_BAUD_38400: port_baud = B38400; break; - case SERIAL_BAUD_57600: port_baud = B57600; break; - case SERIAL_BAUD_115200: port_baud = B115200; break; - case SERIAL_BAUD_230400: port_baud = B230400; break; -#ifdef B460800 - case SERIAL_BAUD_460800: port_baud = B460800; break; -#endif /* B460800 */ -#ifdef B921600 - case SERIAL_BAUD_921600: port_baud = B921600; break; -#endif /* B921600 */ -#ifdef B500000 - case SERIAL_BAUD_500000: port_baud = B500000; break; -#endif /* B500000 */ -#ifdef B576000 - case SERIAL_BAUD_576000: port_baud = B576000; break; -#endif /* B576000 */ -#ifdef B1000000 - case SERIAL_BAUD_1000000: port_baud = B1000000; break; -#endif /* B1000000 */ -#ifdef B1500000 - case SERIAL_BAUD_1500000: port_baud = B1500000; break; -#endif /* B1500000 */ -#ifdef B2000000 - case SERIAL_BAUD_2000000: port_baud = B2000000; break; -#endif /* B2000000 */ - - case SERIAL_BAUD_INVALID: - default: - return PORT_ERR_UNKNOWN; - } - - switch (bits) { - case SERIAL_BITS_5: port_bits = CS5; break; - case SERIAL_BITS_6: port_bits = CS6; break; - case SERIAL_BITS_7: port_bits = CS7; break; - case SERIAL_BITS_8: port_bits = CS8; break; - - default: - return PORT_ERR_UNKNOWN; - } - - switch (parity) { - case SERIAL_PARITY_NONE: port_parity = 0; break; - case SERIAL_PARITY_EVEN: port_parity = PARENB; break; - case SERIAL_PARITY_ODD: port_parity = PARENB | PARODD; break; - - default: - return PORT_ERR_UNKNOWN; - } - - switch (stopbit) { - case SERIAL_STOPBIT_1: port_stop = 0; break; - case SERIAL_STOPBIT_2: port_stop = CSTOPB; break; - - default: - return PORT_ERR_UNKNOWN; - } - - /* reset the settings */ -#ifndef __sun /* Used by GNU and BSD. Ignore __SVR4 in test. */ - cfmakeraw(&h->newtio); -#else /* __sun */ - h->newtio.c_iflag &= ~(IGNBRK | BRKINT | PARMRK | ISTRIP | INLCR - | IGNCR | ICRNL | IXON); - if (port_parity) - h->newtio.c_iflag |= INPCK; - - h->newtio.c_oflag &= ~OPOST; - h->newtio.c_lflag &= ~(ECHO | ECHONL | ICANON | ISIG | IEXTEN); - h->newtio.c_cflag &= ~(CSIZE | PARENB); - h->newtio.c_cflag |= CS8; -#endif /* __sun */ -#ifdef __QNXNTO__ - h->newtio.c_cflag &= ~(CSIZE | IHFLOW | OHFLOW); -#else - h->newtio.c_cflag &= ~(CSIZE | CRTSCTS); -#endif - h->newtio.c_cflag &= ~(CSIZE | CRTSCTS); - h->newtio.c_iflag &= ~(IXON | IXOFF | IXANY | IGNPAR); - h->newtio.c_lflag &= ~(ECHOK | ECHOCTL | ECHOKE); - h->newtio.c_oflag &= ~(OPOST | ONLCR); - - /* setup the new settings */ - cfsetispeed(&h->newtio, port_baud); - cfsetospeed(&h->newtio, port_baud); - h->newtio.c_cflag |= - port_parity | - port_bits | - port_stop | - CLOCAL | - CREAD; - - h->newtio.c_cc[VMIN] = 0; - h->newtio.c_cc[VTIME] = 5; /* in units of 0.1 s */ - - /* set the settings */ - serial_flush(h); - if (tcsetattr(h->fd, TCSANOW, &h->newtio) != 0) - return PORT_ERR_UNKNOWN; - -/* this check fails on CDC-ACM devices, bits 16 and 17 of cflag differ! - * it has been disabled below for now -jcw, 2015-11-09 - if (settings.c_cflag != h->newtio.c_cflag) - fprintf(stderr, "c_cflag mismatch %lx\n", - settings.c_cflag ^ h->newtio.c_cflag); - */ - - /* confirm they were set */ - tcgetattr(h->fd, &settings); - if (settings.c_iflag != h->newtio.c_iflag || - settings.c_oflag != h->newtio.c_oflag || - //settings.c_cflag != h->newtio.c_cflag || - settings.c_lflag != h->newtio.c_lflag) - return PORT_ERR_UNKNOWN; - - snprintf(h->setup_str, sizeof(h->setup_str), "%u %d%c%d", - serial_get_baud_int(baud), - serial_get_bits_int(bits), - serial_get_parity_str(parity), - serial_get_stopbit_int(stopbit)); - return PORT_ERR_OK; -} - -/* - * Roger clark. - * This function is no longer used. But has just been commented out in case it needs - * to be reinstated in the future - -static int startswith(const char *haystack, const char *needle) { - return strncmp(haystack, needle, strlen(needle)) == 0; -} -*/ - -static int is_tty(const char *path) { - char resolved[PATH_MAX]; - - if(!realpath(path, resolved)) return 0; - - - /* - * Roger Clark - * Commented out this check, because on OSX some devices are /dev/cu - * and some users use symbolic links to devices, hence the name may not even start - * with /dev - - if(startswith(resolved, "/dev/tty")) return 1; - - return 0; - */ - - return 1; -} - -static port_err_t serial_posix_open(struct port_interface *port, - struct port_options *ops) -{ - serial_t *h; - - /* 1. check device name match */ - if (!is_tty(ops->device)) - return PORT_ERR_NODEV; - - /* 2. check options */ - if (ops->baudRate == SERIAL_BAUD_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_bits(ops->serial_mode) == SERIAL_BITS_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_parity(ops->serial_mode) == SERIAL_PARITY_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_stopbit(ops->serial_mode) == SERIAL_STOPBIT_INVALID) - return PORT_ERR_UNKNOWN; - - /* 3. open it */ - h = serial_open(ops->device); - if (h == NULL) - return PORT_ERR_UNKNOWN; - - /* 4. set options */ - if (serial_setup(h, ops->baudRate, - serial_get_bits(ops->serial_mode), - serial_get_parity(ops->serial_mode), - serial_get_stopbit(ops->serial_mode) - ) != PORT_ERR_OK) { - serial_close(h); - return PORT_ERR_UNKNOWN; - } - - port->private = h; - return PORT_ERR_OK; -} - -static port_err_t serial_posix_close(struct port_interface *port) -{ - serial_t *h; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - serial_close(h); - port->private = NULL; - return PORT_ERR_OK; -} - -static port_err_t serial_posix_read(struct port_interface *port, void *buf, - size_t nbyte) -{ - serial_t *h; - ssize_t r; - uint8_t *pos = (uint8_t *)buf; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - while (nbyte) { - r = read(h->fd, pos, nbyte); - if (r == 0) - return PORT_ERR_TIMEDOUT; - if (r < 0) - return PORT_ERR_UNKNOWN; - - nbyte -= r; - pos += r; - } - return PORT_ERR_OK; -} - -static port_err_t serial_posix_write(struct port_interface *port, void *buf, - size_t nbyte) -{ - serial_t *h; - ssize_t r; - const uint8_t *pos = (const uint8_t *)buf; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - while (nbyte) { - r = write(h->fd, pos, nbyte); - if (r < 1) - return PORT_ERR_UNKNOWN; - - nbyte -= r; - pos += r; - } - return PORT_ERR_OK; -} - -static port_err_t serial_posix_gpio(struct port_interface *port, - serial_gpio_t n, int level) -{ - serial_t *h; - int bit, lines; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - switch (n) { - case GPIO_RTS: - bit = TIOCM_RTS; - break; - - case GPIO_DTR: - bit = TIOCM_DTR; - break; - - case GPIO_BRK: - if (level == 0) - return PORT_ERR_OK; - if (tcsendbreak(h->fd, 1)) - return PORT_ERR_UNKNOWN; - return PORT_ERR_OK; - - default: - return PORT_ERR_UNKNOWN; - } - - /* handle RTS/DTR */ - if (ioctl(h->fd, TIOCMGET, &lines)) - return PORT_ERR_UNKNOWN; - lines = level ? lines | bit : lines & ~bit; - if (ioctl(h->fd, TIOCMSET, &lines)) - return PORT_ERR_UNKNOWN; - - return PORT_ERR_OK; -} - -static const char *serial_posix_get_cfg_str(struct port_interface *port) -{ - serial_t *h; - - h = (serial_t *)port->private; - return h ? h->setup_str : "INVALID"; -} - -struct port_interface port_serial = { - .name = "serial_posix", - .flags = PORT_BYTE | PORT_GVR_ETX | PORT_CMD_INIT | PORT_RETRY, - .open = serial_posix_open, - .close = serial_posix_close, - .read = serial_posix_read, - .write = serial_posix_write, - .gpio = serial_posix_gpio, - .get_cfg_str = serial_posix_get_cfg_str, -}; diff --git a/linux/src/stm32flash_serial/src/serial_w32.c b/linux/src/stm32flash_serial/src/serial_w32.c deleted file mode 100644 index 56772c0a0..000000000 --- a/linux/src/stm32flash_serial/src/serial_w32.c +++ /dev/null @@ -1,341 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - Copyright (C) 2010 Gareth McMullin - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "serial.h" -#include "port.h" - -struct serial { - HANDLE fd; - DCB oldtio; - DCB newtio; - char setup_str[11]; -}; - -static serial_t *serial_open(const char *device) -{ - serial_t *h = calloc(sizeof(serial_t), 1); - char *devName; - - /* timeout in ms */ - COMMTIMEOUTS timeouts = {MAXDWORD, MAXDWORD, 500, 0, 0}; - - /* Fix the device name if required */ - if (strlen(device) > 4 && device[0] != '\\') { - devName = calloc(1, strlen(device) + 5); - sprintf(devName, "\\\\.\\%s", device); - } else { - devName = (char *)device; - } - - /* Create file handle for port */ - h->fd = CreateFile(devName, GENERIC_READ | GENERIC_WRITE, - 0, /* Exclusive access */ - NULL, /* No security */ - OPEN_EXISTING, - 0, /* No overlap */ - NULL); - - if (devName != device) - free(devName); - - if (h->fd == INVALID_HANDLE_VALUE) { - if (GetLastError() == ERROR_FILE_NOT_FOUND) - fprintf(stderr, "File not found: %s\n", device); - return NULL; - } - - SetupComm(h->fd, 4096, 4096); /* Set input and output buffer size */ - - SetCommTimeouts(h->fd, &timeouts); - - SetCommMask(h->fd, EV_ERR); /* Notify us of error events */ - - GetCommState(h->fd, &h->oldtio); /* Retrieve port parameters */ - GetCommState(h->fd, &h->newtio); /* Retrieve port parameters */ - - /* PurgeComm(h->fd, PURGE_RXABORT | PURGE_TXCLEAR | PURGE_TXABORT | PURGE_TXCLEAR); */ - - return h; -} - -static void serial_flush(const serial_t *h) -{ - /* We shouldn't need to flush in non-overlapping (blocking) mode */ - /* tcflush(h->fd, TCIFLUSH); */ -} - -static void serial_close(serial_t *h) -{ - serial_flush(h); - SetCommState(h->fd, &h->oldtio); - CloseHandle(h->fd); - free(h); -} - -static port_err_t serial_setup(serial_t *h, - const serial_baud_t baud, - const serial_bits_t bits, - const serial_parity_t parity, - const serial_stopbit_t stopbit) -{ - switch (baud) { - case SERIAL_BAUD_1200: h->newtio.BaudRate = CBR_1200; break; - /* case SERIAL_BAUD_1800: h->newtio.BaudRate = CBR_1800; break; */ - case SERIAL_BAUD_2400: h->newtio.BaudRate = CBR_2400; break; - case SERIAL_BAUD_4800: h->newtio.BaudRate = CBR_4800; break; - case SERIAL_BAUD_9600: h->newtio.BaudRate = CBR_9600; break; - case SERIAL_BAUD_19200: h->newtio.BaudRate = CBR_19200; break; - case SERIAL_BAUD_38400: h->newtio.BaudRate = CBR_38400; break; - case SERIAL_BAUD_57600: h->newtio.BaudRate = CBR_57600; break; - case SERIAL_BAUD_115200: h->newtio.BaudRate = CBR_115200; break; - case SERIAL_BAUD_128000: h->newtio.BaudRate = CBR_128000; break; - case SERIAL_BAUD_256000: h->newtio.BaudRate = CBR_256000; break; - /* These are not defined in WinBase.h and might work or not */ - case SERIAL_BAUD_230400: h->newtio.BaudRate = 230400; break; - case SERIAL_BAUD_460800: h->newtio.BaudRate = 460800; break; - case SERIAL_BAUD_500000: h->newtio.BaudRate = 500000; break; - case SERIAL_BAUD_576000: h->newtio.BaudRate = 576000; break; - case SERIAL_BAUD_921600: h->newtio.BaudRate = 921600; break; - case SERIAL_BAUD_1000000: h->newtio.BaudRate = 1000000; break; - case SERIAL_BAUD_1500000: h->newtio.BaudRate = 1500000; break; - case SERIAL_BAUD_2000000: h->newtio.BaudRate = 2000000; break; - case SERIAL_BAUD_INVALID: - - default: - return PORT_ERR_UNKNOWN; - } - - switch (bits) { - case SERIAL_BITS_5: h->newtio.ByteSize = 5; break; - case SERIAL_BITS_6: h->newtio.ByteSize = 6; break; - case SERIAL_BITS_7: h->newtio.ByteSize = 7; break; - case SERIAL_BITS_8: h->newtio.ByteSize = 8; break; - - default: - return PORT_ERR_UNKNOWN; - } - - switch (parity) { - case SERIAL_PARITY_NONE: h->newtio.Parity = NOPARITY; break; - case SERIAL_PARITY_EVEN: h->newtio.Parity = EVENPARITY; break; - case SERIAL_PARITY_ODD: h->newtio.Parity = ODDPARITY; break; - - default: - return PORT_ERR_UNKNOWN; - } - - switch (stopbit) { - case SERIAL_STOPBIT_1: h->newtio.StopBits = ONESTOPBIT; break; - case SERIAL_STOPBIT_2: h->newtio.StopBits = TWOSTOPBITS; break; - - default: - return PORT_ERR_UNKNOWN; - } - - /* reset the settings */ - h->newtio.fOutxCtsFlow = FALSE; - h->newtio.fOutxDsrFlow = FALSE; - h->newtio.fOutX = FALSE; - h->newtio.fInX = FALSE; - h->newtio.fNull = 0; - h->newtio.fAbortOnError = 0; - - /* set the settings */ - serial_flush(h); - if (!SetCommState(h->fd, &h->newtio)) - return PORT_ERR_UNKNOWN; - - snprintf(h->setup_str, sizeof(h->setup_str), "%u %d%c%d", - serial_get_baud_int(baud), - serial_get_bits_int(bits), - serial_get_parity_str(parity), - serial_get_stopbit_int(stopbit) - ); - return PORT_ERR_OK; -} - -static port_err_t serial_w32_open(struct port_interface *port, - struct port_options *ops) -{ - serial_t *h; - - /* 1. check device name match */ - if (!((strlen(ops->device) == 4 || strlen(ops->device) == 5) - && !strncmp(ops->device, "COM", 3) && isdigit(ops->device[3])) - && !(!strncmp(ops->device, "\\\\.\\COM", strlen("\\\\.\\COM")) - && isdigit(ops->device[strlen("\\\\.\\COM")]))) - return PORT_ERR_NODEV; - - /* 2. check options */ - if (ops->baudRate == SERIAL_BAUD_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_bits(ops->serial_mode) == SERIAL_BITS_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_parity(ops->serial_mode) == SERIAL_PARITY_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_stopbit(ops->serial_mode) == SERIAL_STOPBIT_INVALID) - return PORT_ERR_UNKNOWN; - - /* 3. open it */ - h = serial_open(ops->device); - if (h == NULL) - return PORT_ERR_UNKNOWN; - - /* 4. set options */ - if (serial_setup(h, ops->baudRate, - serial_get_bits(ops->serial_mode), - serial_get_parity(ops->serial_mode), - serial_get_stopbit(ops->serial_mode) - ) != PORT_ERR_OK) { - serial_close(h); - return PORT_ERR_UNKNOWN; - } - - port->private = h; - return PORT_ERR_OK; -} - -static port_err_t serial_w32_close(struct port_interface *port) -{ - serial_t *h; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - serial_close(h); - port->private = NULL; - return PORT_ERR_OK; -} - -static port_err_t serial_w32_read(struct port_interface *port, void *buf, - size_t nbyte) -{ - serial_t *h; - DWORD r; - uint8_t *pos = (uint8_t *)buf; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - while (nbyte) { - ReadFile(h->fd, pos, nbyte, &r, NULL); - if (r == 0) - return PORT_ERR_TIMEDOUT; - if (r < 0) - return PORT_ERR_UNKNOWN; - - nbyte -= r; - pos += r; - } - return PORT_ERR_OK; -} - -static port_err_t serial_w32_write(struct port_interface *port, void *buf, - size_t nbyte) -{ - serial_t *h; - DWORD r; - uint8_t *pos = (uint8_t *)buf; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - while (nbyte) { - if (!WriteFile(h->fd, pos, nbyte, &r, NULL)) - return PORT_ERR_UNKNOWN; - if (r < 1) - return PORT_ERR_UNKNOWN; - - nbyte -= r; - pos += r; - } - return PORT_ERR_OK; -} - -static port_err_t serial_w32_gpio(struct port_interface *port, - serial_gpio_t n, int level) -{ - serial_t *h; - int bit; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - switch (n) { - case GPIO_RTS: - bit = level ? SETRTS : CLRRTS; - break; - - case GPIO_DTR: - bit = level ? SETDTR : CLRDTR; - break; - - case GPIO_BRK: - if (level == 0) - return PORT_ERR_OK; - if (EscapeCommFunction(h->fd, SETBREAK) == 0) - return PORT_ERR_UNKNOWN; - usleep(500000); - if (EscapeCommFunction(h->fd, CLRBREAK) == 0) - return PORT_ERR_UNKNOWN; - return PORT_ERR_OK; - - default: - return PORT_ERR_UNKNOWN; - } - - /* handle RTS/DTR */ - if (EscapeCommFunction(h->fd, bit) == 0) - return PORT_ERR_UNKNOWN; - - return PORT_ERR_OK; -} - -static const char *serial_w32_get_cfg_str(struct port_interface *port) -{ - serial_t *h; - - h = (serial_t *)port->private; - return h ? h->setup_str : "INVALID"; -} - -struct port_interface port_serial = { - .name = "serial_w32", - .flags = PORT_BYTE | PORT_GVR_ETX | PORT_CMD_INIT | PORT_RETRY, - .open = serial_w32_open, - .close = serial_w32_close, - .read = serial_w32_read, - .write = serial_w32_write, - .gpio = serial_w32_gpio, - .get_cfg_str = serial_w32_get_cfg_str, -}; diff --git a/linux/src/stm32flash_serial/src/stm32.c b/linux/src/stm32flash_serial/src/stm32.c deleted file mode 100644 index 74047d244..000000000 --- a/linux/src/stm32flash_serial/src/stm32.c +++ /dev/null @@ -1,1048 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright 2010 Geoffrey McRae - Copyright 2012-2014 Tormod Volden - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include -#include -#include -#include -#include - -#include "stm32.h" -#include "port.h" -#include "utils.h" - -#define STM32_ACK 0x79 -#define STM32_NACK 0x1F -#define STM32_BUSY 0x76 - -#define STM32_CMD_INIT 0x7F -#define STM32_CMD_GET 0x00 /* get the version and command supported */ -#define STM32_CMD_GVR 0x01 /* get version and read protection status */ -#define STM32_CMD_GID 0x02 /* get ID */ -#define STM32_CMD_RM 0x11 /* read memory */ -#define STM32_CMD_GO 0x21 /* go */ -#define STM32_CMD_WM 0x31 /* write memory */ -#define STM32_CMD_WM_NS 0x32 /* no-stretch write memory */ -#define STM32_CMD_ER 0x43 /* erase */ -#define STM32_CMD_EE 0x44 /* extended erase */ -#define STM32_CMD_EE_NS 0x45 /* extended erase no-stretch */ -#define STM32_CMD_WP 0x63 /* write protect */ -#define STM32_CMD_WP_NS 0x64 /* write protect no-stretch */ -#define STM32_CMD_UW 0x73 /* write unprotect */ -#define STM32_CMD_UW_NS 0x74 /* write unprotect no-stretch */ -#define STM32_CMD_RP 0x82 /* readout protect */ -#define STM32_CMD_RP_NS 0x83 /* readout protect no-stretch */ -#define STM32_CMD_UR 0x92 /* readout unprotect */ -#define STM32_CMD_UR_NS 0x93 /* readout unprotect no-stretch */ -#define STM32_CMD_CRC 0xA1 /* compute CRC */ -#define STM32_CMD_ERR 0xFF /* not a valid command */ - -#define STM32_RESYNC_TIMEOUT 35 /* seconds */ -#define STM32_MASSERASE_TIMEOUT 35 /* seconds */ -#define STM32_SECTERASE_TIMEOUT 5 /* seconds */ -#define STM32_BLKWRITE_TIMEOUT 1 /* seconds */ -#define STM32_WUNPROT_TIMEOUT 1 /* seconds */ -#define STM32_WPROT_TIMEOUT 1 /* seconds */ -#define STM32_RPROT_TIMEOUT 1 /* seconds */ - -#define STM32_CMD_GET_LENGTH 17 /* bytes in the reply */ - -struct stm32_cmd { - uint8_t get; - uint8_t gvr; - uint8_t gid; - uint8_t rm; - uint8_t go; - uint8_t wm; - uint8_t er; /* this may be extended erase */ - uint8_t wp; - uint8_t uw; - uint8_t rp; - uint8_t ur; - uint8_t crc; -}; - -/* Reset code for ARMv7-M (Cortex-M3) and ARMv6-M (Cortex-M0) - * see ARMv7-M or ARMv6-M Architecture Reference Manual (table B3-8) - * or "The definitive guide to the ARM Cortex-M3", section 14.4. - */ -static const uint8_t stm_reset_code[] = { - 0x01, 0x49, // ldr r1, [pc, #4] ; () - 0x02, 0x4A, // ldr r2, [pc, #8] ; () - 0x0A, 0x60, // str r2, [r1, #0] - 0xfe, 0xe7, // endless: b endless - 0x0c, 0xed, 0x00, 0xe0, // .word 0xe000ed0c = NVIC AIRCR register address - 0x04, 0x00, 0xfa, 0x05 // .word 0x05fa0004 = VECTKEY | SYSRESETREQ -}; - -static const uint32_t stm_reset_code_length = sizeof(stm_reset_code); - -extern const stm32_dev_t devices[]; - -static void stm32_warn_stretching(const char *f) -{ - fprintf(stderr, "Attention !!!\n"); - fprintf(stderr, "\tThis %s error could be caused by your I2C\n", f); - fprintf(stderr, "\tcontroller not accepting \"clock stretching\"\n"); - fprintf(stderr, "\tas required by bootloader.\n"); - fprintf(stderr, "\tCheck \"I2C.txt\" in stm32flash source code.\n"); -} - -static stm32_err_t stm32_get_ack_timeout(const stm32_t *stm, time_t timeout) -{ - struct port_interface *port = stm->port; - uint8_t byte; - port_err_t p_err; - time_t t0, t1; - - if (!(port->flags & PORT_RETRY)) - timeout = 0; - - if (timeout) - time(&t0); - - do { - p_err = port->read(port, &byte, 1); - if (p_err == PORT_ERR_TIMEDOUT && timeout) { - time(&t1); - if (t1 < t0 + timeout) - continue; - } - - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Failed to read ACK byte\n"); - return STM32_ERR_UNKNOWN; - } - - if (byte == STM32_ACK) - return STM32_ERR_OK; - if (byte == STM32_NACK) - return STM32_ERR_NACK; - if (byte != STM32_BUSY) { - fprintf(stderr, "Got byte 0x%02x instead of ACK\n", - byte); - return STM32_ERR_UNKNOWN; - } - } while (1); -} - -static stm32_err_t stm32_get_ack(const stm32_t *stm) -{ - return stm32_get_ack_timeout(stm, 0); -} - -static stm32_err_t stm32_send_command_timeout(const stm32_t *stm, - const uint8_t cmd, - time_t timeout) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - port_err_t p_err; - uint8_t buf[2]; - - buf[0] = cmd; - buf[1] = cmd ^ 0xFF; - p_err = port->write(port, buf, 2); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Failed to send command\n"); - return STM32_ERR_UNKNOWN; - } - s_err = stm32_get_ack_timeout(stm, timeout); - if (s_err == STM32_ERR_OK) - return STM32_ERR_OK; - if (s_err == STM32_ERR_NACK) - fprintf(stderr, "Got NACK from device on command 0x%02x\n", cmd); - else - fprintf(stderr, "Unexpected reply from device on command 0x%02x\n", cmd); - return STM32_ERR_UNKNOWN; -} - -static stm32_err_t stm32_send_command(const stm32_t *stm, const uint8_t cmd) -{ - return stm32_send_command_timeout(stm, cmd, 0); -} - -/* if we have lost sync, send a wrong command and expect a NACK */ -static stm32_err_t stm32_resync(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - port_err_t p_err; - uint8_t buf[2], ack; - time_t t0, t1; - - time(&t0); - t1 = t0; - - buf[0] = STM32_CMD_ERR; - buf[1] = STM32_CMD_ERR ^ 0xFF; - while (t1 < t0 + STM32_RESYNC_TIMEOUT) { - p_err = port->write(port, buf, 2); - if (p_err != PORT_ERR_OK) { - usleep(500000); - time(&t1); - continue; - } - p_err = port->read(port, &ack, 1); - if (p_err != PORT_ERR_OK) { - time(&t1); - continue; - } - if (ack == STM32_NACK) - return STM32_ERR_OK; - time(&t1); - } - return STM32_ERR_UNKNOWN; -} - -/* - * some command receive reply frame with variable length, and length is - * embedded in reply frame itself. - * We can guess the length, but if we guess wrong the protocol gets out - * of sync. - * Use resync for frame oriented interfaces (e.g. I2C) and byte-by-byte - * read for byte oriented interfaces (e.g. UART). - * - * to run safely, data buffer should be allocated for 256+1 bytes - * - * len is value of the first byte in the frame. - */ -static stm32_err_t stm32_guess_len_cmd(const stm32_t *stm, uint8_t cmd, - uint8_t *data, unsigned int len) -{ - struct port_interface *port = stm->port; - port_err_t p_err; - - if (stm32_send_command(stm, cmd) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - if (port->flags & PORT_BYTE) { - /* interface is UART-like */ - p_err = port->read(port, data, 1); - if (p_err != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - len = data[0]; - p_err = port->read(port, data + 1, len + 1); - if (p_err != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - return STM32_ERR_OK; - } - - p_err = port->read(port, data, len + 2); - if (p_err == PORT_ERR_OK && len == data[0]) - return STM32_ERR_OK; - if (p_err != PORT_ERR_OK) { - /* restart with only one byte */ - if (stm32_resync(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - if (stm32_send_command(stm, cmd) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - p_err = port->read(port, data, 1); - if (p_err != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - } - - fprintf(stderr, "Re sync (len = %d)\n", data[0]); - if (stm32_resync(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - len = data[0]; - if (stm32_send_command(stm, cmd) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - p_err = port->read(port, data, len + 2); - if (p_err != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - return STM32_ERR_OK; -} - -/* - * Some interface, e.g. UART, requires a specific init sequence to let STM32 - * autodetect the interface speed. - * The sequence is only required one time after reset. - * stm32flash has command line flag "-c" to prevent sending the init sequence - * in case it was already sent before. - * User can easily forget adding "-c". In this case the bootloader would - * interpret the init sequence as part of a command message, then waiting for - * the rest of the message blocking the interface. - * This function sends the init sequence and, in case of timeout, recovers - * the interface. - */ -static stm32_err_t stm32_send_init_seq(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - port_err_t p_err; - uint8_t byte, cmd = STM32_CMD_INIT; - - p_err = port->write(port, &cmd, 1); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Failed to send init to device\n"); - return STM32_ERR_UNKNOWN; - } - p_err = port->read(port, &byte, 1); - if (p_err == PORT_ERR_OK && byte == STM32_ACK) - return STM32_ERR_OK; - if (p_err == PORT_ERR_OK && byte == STM32_NACK) { - /* We could get error later, but let's continue, for now. */ - fprintf(stderr, - "Warning: the interface was not closed properly.\n"); - return STM32_ERR_OK; - } - if (p_err != PORT_ERR_TIMEDOUT) { - fprintf(stderr, "Failed to init device.\n"); - return STM32_ERR_UNKNOWN; - } - - /* - * Check if previous STM32_CMD_INIT was taken as first byte - * of a command. Send a new byte, we should get back a NACK. - */ - p_err = port->write(port, &cmd, 1); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Failed to send init to device\n"); - return STM32_ERR_UNKNOWN; - } - p_err = port->read(port, &byte, 1); - if (p_err == PORT_ERR_OK && byte == STM32_NACK) - return STM32_ERR_OK; - fprintf(stderr, "Failed to init device.\n"); - return STM32_ERR_UNKNOWN; -} - -/* find newer command by higher code */ -#define newer(prev, a) (((prev) == STM32_CMD_ERR) \ - ? (a) \ - : (((prev) > (a)) ? (prev) : (a))) - -stm32_t *stm32_init(struct port_interface *port, const char init) -{ - uint8_t len, val, buf[257]; - stm32_t *stm; - int i, new_cmds; - - stm = calloc(sizeof(stm32_t), 1); - stm->cmd = malloc(sizeof(stm32_cmd_t)); - memset(stm->cmd, STM32_CMD_ERR, sizeof(stm32_cmd_t)); - stm->port = port; - - if ((port->flags & PORT_CMD_INIT) && init) - if (stm32_send_init_seq(stm) != STM32_ERR_OK) - return NULL; - - /* get the version and read protection status */ - if (stm32_send_command(stm, STM32_CMD_GVR) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - - /* From AN, only UART bootloader returns 3 bytes */ - len = (port->flags & PORT_GVR_ETX) ? 3 : 1; - if (port->read(port, buf, len) != PORT_ERR_OK) - return NULL; - stm->version = buf[0]; - stm->option1 = (port->flags & PORT_GVR_ETX) ? buf[1] : 0; - stm->option2 = (port->flags & PORT_GVR_ETX) ? buf[2] : 0; - if (stm32_get_ack(stm) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - - /* get the bootloader information */ - len = STM32_CMD_GET_LENGTH; - if (port->cmd_get_reply) - for (i = 0; port->cmd_get_reply[i].length; i++) - if (stm->version == port->cmd_get_reply[i].version) { - len = port->cmd_get_reply[i].length; - break; - } - if (stm32_guess_len_cmd(stm, STM32_CMD_GET, buf, len) != STM32_ERR_OK) - return NULL; - len = buf[0] + 1; - stm->bl_version = buf[1]; - new_cmds = 0; - for (i = 1; i < len; i++) { - val = buf[i + 1]; - switch (val) { - case STM32_CMD_GET: - stm->cmd->get = val; break; - case STM32_CMD_GVR: - stm->cmd->gvr = val; break; - case STM32_CMD_GID: - stm->cmd->gid = val; break; - case STM32_CMD_RM: - stm->cmd->rm = val; break; - case STM32_CMD_GO: - stm->cmd->go = val; break; - case STM32_CMD_WM: - case STM32_CMD_WM_NS: - stm->cmd->wm = newer(stm->cmd->wm, val); - break; - case STM32_CMD_ER: - case STM32_CMD_EE: - case STM32_CMD_EE_NS: - stm->cmd->er = newer(stm->cmd->er, val); - break; - case STM32_CMD_WP: - case STM32_CMD_WP_NS: - stm->cmd->wp = newer(stm->cmd->wp, val); - break; - case STM32_CMD_UW: - case STM32_CMD_UW_NS: - stm->cmd->uw = newer(stm->cmd->uw, val); - break; - case STM32_CMD_RP: - case STM32_CMD_RP_NS: - stm->cmd->rp = newer(stm->cmd->rp, val); - break; - case STM32_CMD_UR: - case STM32_CMD_UR_NS: - stm->cmd->ur = newer(stm->cmd->ur, val); - break; - case STM32_CMD_CRC: - stm->cmd->crc = newer(stm->cmd->crc, val); - break; - default: - if (new_cmds++ == 0) - fprintf(stderr, - "GET returns unknown commands (0x%2x", - val); - else - fprintf(stderr, ", 0x%2x", val); - } - } - if (new_cmds) - fprintf(stderr, ")\n"); - if (stm32_get_ack(stm) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - - if (stm->cmd->get == STM32_CMD_ERR - || stm->cmd->gvr == STM32_CMD_ERR - || stm->cmd->gid == STM32_CMD_ERR) { - fprintf(stderr, "Error: bootloader did not returned correct information from GET command\n"); - return NULL; - } - - /* get the device ID */ - if (stm32_guess_len_cmd(stm, stm->cmd->gid, buf, 1) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - len = buf[0] + 1; - if (len < 2) { - stm32_close(stm); - fprintf(stderr, "Only %d bytes sent in the PID, unknown/unsupported device\n", len); - return NULL; - } - stm->pid = (buf[1] << 8) | buf[2]; - if (len > 2) { - fprintf(stderr, "This bootloader returns %d extra bytes in PID:", len); - for (i = 2; i <= len ; i++) - fprintf(stderr, " %02x", buf[i]); - fprintf(stderr, "\n"); - } - if (stm32_get_ack(stm) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - - stm->dev = devices; - while (stm->dev->id != 0x00 && stm->dev->id != stm->pid) - ++stm->dev; - - if (!stm->dev->id) { - fprintf(stderr, "Unknown/unsupported device (Device ID: 0x%03x)\n", stm->pid); - stm32_close(stm); - return NULL; - } - - return stm; -} - -void stm32_close(stm32_t *stm) -{ - if (stm) - free(stm->cmd); - free(stm); -} - -stm32_err_t stm32_read_memory(const stm32_t *stm, uint32_t address, - uint8_t data[], unsigned int len) -{ - struct port_interface *port = stm->port; - uint8_t buf[5]; - - if (!len) - return STM32_ERR_OK; - - if (len > 256) { - fprintf(stderr, "Error: READ length limit at 256 bytes\n"); - return STM32_ERR_UNKNOWN; - } - - if (stm->cmd->rm == STM32_CMD_ERR) { - fprintf(stderr, "Error: READ command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->rm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = address >> 24; - buf[1] = (address >> 16) & 0xFF; - buf[2] = (address >> 8) & 0xFF; - buf[3] = address & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_send_command(stm, len - 1) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (port->read(port, data, len) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - return STM32_ERR_OK; -} - -stm32_err_t stm32_write_memory(const stm32_t *stm, uint32_t address, - const uint8_t data[], unsigned int len) -{ - struct port_interface *port = stm->port; - uint8_t cs, buf[256 + 2]; - unsigned int i, aligned_len; - stm32_err_t s_err; - - if (!len) - return STM32_ERR_OK; - - if (len > 256) { - fprintf(stderr, "Error: READ length limit at 256 bytes\n"); - return STM32_ERR_UNKNOWN; - } - - /* must be 32bit aligned */ - if (address & 0x3 || len & 0x3) { - fprintf(stderr, "Error: WRITE address and length must be 4 byte aligned\n"); - return STM32_ERR_UNKNOWN; - } - - if (stm->cmd->wm == STM32_CMD_ERR) { - fprintf(stderr, "Error: WRITE command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - /* send the address and checksum */ - if (stm32_send_command(stm, stm->cmd->wm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = address >> 24; - buf[1] = (address >> 16) & 0xFF; - buf[2] = (address >> 8) & 0xFF; - buf[3] = address & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - aligned_len = (len + 3) & ~3; - cs = aligned_len - 1; - buf[0] = aligned_len - 1; - for (i = 0; i < len; i++) { - cs ^= data[i]; - buf[i + 1] = data[i]; - } - /* padding data */ - for (i = len; i < aligned_len; i++) { - cs ^= 0xFF; - buf[i + 1] = 0xFF; - } - buf[aligned_len + 1] = cs; - if (port->write(port, buf, aligned_len + 2) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_BLKWRITE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->wm != STM32_CMD_WM_NS) - stm32_warn_stretching("write"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_wunprot_memory(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - - if (stm->cmd->uw == STM32_CMD_ERR) { - fprintf(stderr, "Error: WRITE UNPROTECT command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->uw) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_WUNPROT_TIMEOUT); - if (s_err == STM32_NACK) { - fprintf(stderr, "Error: Failed to WRITE UNPROTECT\n"); - return STM32_ERR_UNKNOWN; - } - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->uw != STM32_CMD_UW_NS) - stm32_warn_stretching("WRITE UNPROTECT"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_wprot_memory(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - - if (stm->cmd->wp == STM32_CMD_ERR) { - fprintf(stderr, "Error: WRITE PROTECT command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->wp) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_WPROT_TIMEOUT); - if (s_err == STM32_NACK) { - fprintf(stderr, "Error: Failed to WRITE PROTECT\n"); - return STM32_ERR_UNKNOWN; - } - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->wp != STM32_CMD_WP_NS) - stm32_warn_stretching("WRITE PROTECT"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_runprot_memory(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - - if (stm->cmd->ur == STM32_CMD_ERR) { - fprintf(stderr, "Error: READOUT UNPROTECT command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->ur) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_MASSERASE_TIMEOUT); - if (s_err == STM32_NACK) { - fprintf(stderr, "Error: Failed to READOUT UNPROTECT\n"); - return STM32_ERR_UNKNOWN; - } - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->ur != STM32_CMD_UR_NS) - stm32_warn_stretching("READOUT UNPROTECT"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_readprot_memory(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - - if (stm->cmd->rp == STM32_CMD_ERR) { - fprintf(stderr, "Error: READOUT PROTECT command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->rp) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_RPROT_TIMEOUT); - if (s_err == STM32_NACK) { - fprintf(stderr, "Error: Failed to READOUT PROTECT\n"); - return STM32_ERR_UNKNOWN; - } - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->rp != STM32_CMD_RP_NS) - stm32_warn_stretching("READOUT PROTECT"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_erase_memory(const stm32_t *stm, uint8_t spage, uint8_t pages) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - port_err_t p_err; - - if (!pages) - return STM32_ERR_OK; - - if (stm->cmd->er == STM32_CMD_ERR) { - fprintf(stderr, "Error: ERASE command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->er) != STM32_ERR_OK) { - fprintf(stderr, "Can't initiate chip erase!\n"); - return STM32_ERR_UNKNOWN; - } - - /* The erase command reported by the bootloader is either 0x43, 0x44 or 0x45 */ - /* 0x44 is Extended Erase, a 2 byte based protocol and needs to be handled differently. */ - /* 0x45 is clock no-stretching version of Extended Erase for I2C port. */ - if (stm->cmd->er != STM32_CMD_ER) { - /* Not all chips using Extended Erase support mass erase */ - /* Currently known as not supporting mass erase is the Ultra Low Power STM32L15xx range */ - /* So if someone has not overridden the default, but uses one of these chips, take it out of */ - /* mass erase mode, so it will be done page by page. This maximum might not be correct either! */ - if (stm->pid == 0x416 && pages == 0xFF) - pages = 0xF8; /* works for the STM32L152RB with 128Kb flash */ - - if (pages == 0xFF) { - uint8_t buf[3]; - - /* 0xFFFF the magic number for mass erase */ - buf[0] = 0xFF; - buf[1] = 0xFF; - buf[2] = 0x00; /* checksum */ - if (port->write(port, buf, 3) != PORT_ERR_OK) { - fprintf(stderr, "Mass erase error.\n"); - return STM32_ERR_UNKNOWN; - } - s_err = stm32_get_ack_timeout(stm, STM32_MASSERASE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Mass erase failed. Try specifying the number of pages to be erased.\n"); - if (port->flags & PORT_STRETCH_W - && stm->cmd->er != STM32_CMD_EE_NS) - stm32_warn_stretching("erase"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; - } - - uint16_t pg_num; - uint8_t pg_byte; - uint8_t cs = 0; - uint8_t *buf; - int i = 0; - - buf = malloc(2 + 2 * pages + 1); - if (!buf) - return STM32_ERR_UNKNOWN; - - /* Number of pages to be erased - 1, two bytes, MSB first */ - pg_byte = (pages - 1) >> 8; - buf[i++] = pg_byte; - cs ^= pg_byte; - pg_byte = (pages - 1) & 0xFF; - buf[i++] = pg_byte; - cs ^= pg_byte; - - for (pg_num = spage; pg_num < spage + pages; pg_num++) { - pg_byte = pg_num >> 8; - cs ^= pg_byte; - buf[i++] = pg_byte; - pg_byte = pg_num & 0xFF; - cs ^= pg_byte; - buf[i++] = pg_byte; - } - buf[i++] = cs; - p_err = port->write(port, buf, i); - free(buf); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Page-by-page erase error.\n"); - return STM32_ERR_UNKNOWN; - } - - s_err = stm32_get_ack_timeout(stm, pages * STM32_SECTERASE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Page-by-page erase failed. Check the maximum pages your device supports.\n"); - if (port->flags & PORT_STRETCH_W - && stm->cmd->er != STM32_CMD_EE_NS) - stm32_warn_stretching("erase"); - return STM32_ERR_UNKNOWN; - } - - return STM32_ERR_OK; - } - - /* And now the regular erase (0x43) for all other chips */ - if (pages == 0xFF) { - s_err = stm32_send_command_timeout(stm, 0xFF, STM32_MASSERASE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W) - stm32_warn_stretching("erase"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; - } else { - uint8_t cs = 0; - uint8_t pg_num; - uint8_t *buf; - int i = 0; - - buf = malloc(1 + pages + 1); - if (!buf) - return STM32_ERR_UNKNOWN; - - buf[i++] = pages - 1; - cs ^= (pages-1); - for (pg_num = spage; pg_num < (pages + spage); pg_num++) { - buf[i++] = pg_num; - cs ^= pg_num; - } - buf[i++] = cs; - p_err = port->write(port, buf, i); - free(buf); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Erase failed.\n"); - return STM32_ERR_UNKNOWN; - } - s_err = stm32_get_ack_timeout(stm, STM32_MASSERASE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W) - stm32_warn_stretching("erase"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; - } -} - -static stm32_err_t stm32_run_raw_code(const stm32_t *stm, - uint32_t target_address, - const uint8_t *code, uint32_t code_size) -{ - uint32_t stack_le = le_u32(0x20002000); - uint32_t code_address_le = le_u32(target_address + 8); - uint32_t length = code_size + 8; - uint8_t *mem, *pos; - uint32_t address, w; - - /* Must be 32-bit aligned */ - if (target_address & 0x3) { - fprintf(stderr, "Error: code address must be 4 byte aligned\n"); - return STM32_ERR_UNKNOWN; - } - - mem = malloc(length); - if (!mem) - return STM32_ERR_UNKNOWN; - - memcpy(mem, &stack_le, sizeof(uint32_t)); - memcpy(mem + 4, &code_address_le, sizeof(uint32_t)); - memcpy(mem + 8, code, code_size); - - pos = mem; - address = target_address; - while (length > 0) { - w = length > 256 ? 256 : length; - if (stm32_write_memory(stm, address, pos, w) != STM32_ERR_OK) { - free(mem); - return STM32_ERR_UNKNOWN; - } - - address += w; - pos += w; - length -= w; - } - - free(mem); - return stm32_go(stm, target_address); -} - -stm32_err_t stm32_go(const stm32_t *stm, uint32_t address) -{ - struct port_interface *port = stm->port; - uint8_t buf[5]; - - if (stm->cmd->go == STM32_CMD_ERR) { - fprintf(stderr, "Error: GO command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->go) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = address >> 24; - buf[1] = (address >> 16) & 0xFF; - buf[2] = (address >> 8) & 0xFF; - buf[3] = address & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - return STM32_ERR_OK; -} - -stm32_err_t stm32_reset_device(const stm32_t *stm) -{ - uint32_t target_address = stm->dev->ram_start; - - return stm32_run_raw_code(stm, target_address, stm_reset_code, stm_reset_code_length); -} - -stm32_err_t stm32_crc_memory(const stm32_t *stm, uint32_t address, - uint32_t length, uint32_t *crc) -{ - struct port_interface *port = stm->port; - uint8_t buf[5]; - - if (address & 0x3 || length & 0x3) { - fprintf(stderr, "Start and end addresses must be 4 byte aligned\n"); - return STM32_ERR_UNKNOWN; - } - - if (stm->cmd->crc == STM32_CMD_ERR) { - fprintf(stderr, "Error: CRC command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->crc) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = address >> 24; - buf[1] = (address >> 16) & 0xFF; - buf[2] = (address >> 8) & 0xFF; - buf[3] = address & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = length >> 24; - buf[1] = (length >> 16) & 0xFF; - buf[2] = (length >> 8) & 0xFF; - buf[3] = length & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (port->read(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (buf[4] != (buf[0] ^ buf[1] ^ buf[2] ^ buf[3])) - return STM32_ERR_UNKNOWN; - - *crc = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3]; - return STM32_ERR_OK; -} - -/* - * CRC computed by STM32 is similar to the standard crc32_be() - * implemented, for example, in Linux kernel in ./lib/crc32.c - * But STM32 computes it on units of 32 bits word and swaps the - * bytes of the word before the computation. - * Due to byte swap, I cannot use any CRC available in existing - * libraries, so here is a simple not optimized implementation. - */ -#define CRCPOLY_BE 0x04c11db7 -#define CRC_MSBMASK 0x80000000 -#define CRC_INIT_VALUE 0xFFFFFFFF -uint32_t stm32_sw_crc(uint32_t crc, uint8_t *buf, unsigned int len) -{ - int i; - uint32_t data; - - if (len & 0x3) { - fprintf(stderr, "Buffer length must be multiple of 4 bytes\n"); - return 0; - } - - while (len) { - data = *buf++; - data |= *buf++ << 8; - data |= *buf++ << 16; - data |= *buf++ << 24; - len -= 4; - - crc ^= data; - - for (i = 0; i < 32; i++) - if (crc & CRC_MSBMASK) - crc = (crc << 1) ^ CRCPOLY_BE; - else - crc = (crc << 1); - } - return crc; -} - -stm32_err_t stm32_crc_wrapper(const stm32_t *stm, uint32_t address, - uint32_t length, uint32_t *crc) -{ - uint8_t buf[256]; - uint32_t start, total_len, len, current_crc; - - if (address & 0x3 || length & 0x3) { - fprintf(stderr, "Start and end addresses must be 4 byte aligned\n"); - return STM32_ERR_UNKNOWN; - } - - if (stm->cmd->crc != STM32_CMD_ERR) - return stm32_crc_memory(stm, address, length, crc); - - start = address; - total_len = length; - current_crc = CRC_INIT_VALUE; - while (length) { - len = length > 256 ? 256 : length; - if (stm32_read_memory(stm, address, buf, len) != STM32_ERR_OK) { - fprintf(stderr, - "Failed to read memory at address 0x%08x, target write-protected?\n", - address); - return STM32_ERR_UNKNOWN; - } - current_crc = stm32_sw_crc(current_crc, buf, len); - length -= len; - address += len; - - fprintf(stderr, - "\rCRC address 0x%08x (%.2f%%) ", - address, - (100.0f / (float)total_len) * (float)(address - start) - ); - fflush(stderr); - } - fprintf(stderr, "Done.\n"); - *crc = current_crc; - return STM32_ERR_OK; -} diff --git a/linux/src/stm32flash_serial/src/stm32.h b/linux/src/stm32flash_serial/src/stm32.h deleted file mode 100644 index 1688fcb4b..000000000 --- a/linux/src/stm32flash_serial/src/stm32.h +++ /dev/null @@ -1,84 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _STM32_H -#define _STM32_H - -#include -#include "serial.h" - -#define STM32_MAX_RX_FRAME 256 /* cmd read memory */ -#define STM32_MAX_TX_FRAME (1 + 256 + 1) /* cmd write memory */ - -typedef enum { - STM32_ERR_OK = 0, - STM32_ERR_UNKNOWN, /* Generic error */ - STM32_ERR_NACK, - STM32_ERR_NO_CMD, /* Command not available in bootloader */ -} stm32_err_t; - -typedef struct stm32 stm32_t; -typedef struct stm32_cmd stm32_cmd_t; -typedef struct stm32_dev stm32_dev_t; - -struct stm32 { - const serial_t *serial; - struct port_interface *port; - uint8_t bl_version; - uint8_t version; - uint8_t option1, option2; - uint16_t pid; - stm32_cmd_t *cmd; - const stm32_dev_t *dev; -}; - -struct stm32_dev { - uint16_t id; - const char *name; - uint32_t ram_start, ram_end; - uint32_t fl_start, fl_end; - uint16_t fl_pps; // pages per sector - uint16_t fl_ps; // page size - uint32_t opt_start, opt_end; - uint32_t mem_start, mem_end; -}; - -stm32_t *stm32_init(struct port_interface *port, const char init); -void stm32_close(stm32_t *stm); -stm32_err_t stm32_read_memory(const stm32_t *stm, uint32_t address, - uint8_t data[], unsigned int len); -stm32_err_t stm32_write_memory(const stm32_t *stm, uint32_t address, - const uint8_t data[], unsigned int len); -stm32_err_t stm32_wunprot_memory(const stm32_t *stm); -stm32_err_t stm32_wprot_memory(const stm32_t *stm); -stm32_err_t stm32_erase_memory(const stm32_t *stm, uint8_t spage, - uint8_t pages); -stm32_err_t stm32_go(const stm32_t *stm, uint32_t address); -stm32_err_t stm32_reset_device(const stm32_t *stm); -stm32_err_t stm32_readprot_memory(const stm32_t *stm); -stm32_err_t stm32_runprot_memory(const stm32_t *stm); -stm32_err_t stm32_crc_memory(const stm32_t *stm, uint32_t address, - uint32_t length, uint32_t *crc); -stm32_err_t stm32_crc_wrapper(const stm32_t *stm, uint32_t address, - uint32_t length, uint32_t *crc); -uint32_t stm32_sw_crc(uint32_t crc, uint8_t *buf, unsigned int len); - -#endif - diff --git a/linux/src/stm32flash_serial/src/stm32flash.1 b/linux/src/stm32flash_serial/src/stm32flash.1 deleted file mode 100644 index d37292f6a..000000000 --- a/linux/src/stm32flash_serial/src/stm32flash.1 +++ /dev/null @@ -1,407 +0,0 @@ -.TH STM32FLASH 1 "2013\-11\-03" STM32FLASH "User command" -.SH NAME -stm32flash \- flashing utility for STM32 and STM32W through UART or I2C -.SH SYNOPSIS -.B stm32flash -.RB [ \-cfhjkouvCR ] -.RB [ \-a -.IR bus_address ] -.RB [ \-b -.IR baud_rate ] -.RB [ \-m -.IR serial_mode ] -.RB [ \-r -.IR filename ] -.RB [ \-w -.IR filename ] -.RB [ \-e -.IR num ] -.RB [ \-n -.IR count ] -.RB [ \-g -.IR address ] -.RB [ \-s -.IR start_page ] -.RB [ \-S -.IR address [: length ]] -.RB [ \-F -.IR RX_length [: TX_length ]] -.RB [ \-i -.IR GPIO_string ] -.RI [ tty_device -.R | -.IR i2c_device ] - -.SH DESCRIPTION -.B stm32flash -reads or writes the flash memory of STM32 and STM32W. - -It requires the STM32[W] to embed a bootloader compliant with ST -application note AN3155. -.B stm32flash -uses the serial port -.I tty_device -to interact with the bootloader of STM32[W]. - -.SH OPTIONS -.TP -.BI "\-a" " bus_address" -Specify address on bus for -.IR i2c_device . -This option is mandatory for I2C interface. - -.TP -.BI "\-b" " baud_rate" -Specify baud rate speed of -.IR tty_device . -Please notice that the ST bootloader can automatically detect the baud rate, -as explaned in chapter 2 of AN3155. -This option could be required together with option -.B "\-c" -or if following interaction with bootloader is expected. -Default is -.IR 57600 . - -.TP -.BI "\-m" " mode" -Specify the format of UART data. -.I mode -is a three characters long string where each character specifies, in -this strict order, character size, parity and stop bits. -The only values currenly used are -.I 8e1 -for standard STM32 bootloader and -.I 8n1 -for standard STM32W bootloader. -Default is -.IR 8e1 . - -.TP -.BI "\-r" " filename" -Specify to read the STM32[W] flash and write its content in -.I filename -in raw binary format (see below -.BR "FORMAT CONVERSION" ). - -.TP -.BI "\-w" " filename" -Specify to write the STM32[W] flash with the content of -.IR filename . -File format can be either raw binary or intel hex (see below -.BR "FORMAT CONVERSION" ). -The file format is automatically detected. -To by\-pass format detection and force binary mode (e.g. to -write an intel hex content in STM32[W] flash), use -.B \-f -option. - -.TP -.B \-u -Specify to disable write\-protection from STM32[W] flash. -The STM32[W] will be reset after this operation. - -.TP -.B \-j -Enable the flash read\-protection. - -.TP -.B \-k -Disable the flash read\-protection. - -.TP -.B \-o -Erase only. - -.TP -.BI "\-e" " num" -Specify to erase only -.I num -pages before writing the flash. Default is to erase the whole flash. With -.B \-e 0 -the flash would not be erased. - -.TP -.B \-v -Specify to verify flash content after write operation. - -.TP -.BI "\-n" " count" -Specify to retry failed writes up to -.I count -times. Default is 10 times. - -.TP -.BI "\-g" " address" -Specify address to start execution from (0 = flash start). - -.TP -.BI "\-s" " start_page" -Specify flash page offset (0 = flash start). - -.TP -.BI "\-S" " address" "[:" "length" "]" -Specify start address and optionally length for read/write/erase/crc operations. - -.TP -.BI "\-F" " RX_length" "[:" "TX_length" "]" -Specify the maximum frame size for the current interface. -Due to STM32 bootloader protocol, host will never handle frames bigger than -256 byte in RX or 258 byte in TX. -Due to current code, lowest limit in RX is 20 byte (to read a complete reply -of command GET). Minimum limit in TX is 5 byte, required by protocol. - -.TP -.B \-f -Force binary parser while reading file with -.BR "\-w" "." - -.TP -.B \-h -Show help. - -.TP -.B \-c -Specify to resume the existing UART connection and don't send initial -INIT sequence to detect baud rate. Baud rate must be kept the same as the -existing connection. This is useful if the reset fails. - -.TP -.BI "\-i" " GPIO_string" -Specify the GPIO sequences on the host to force STM32[W] to enter and -exit bootloader mode. GPIO can either be real GPIO connected from host to -STM32[W] beside the UART connection, or UART's modem signals used as -GPIO. (See below -.B BOOTLOADER GPIO SEQUENCE -for the format of -.I GPIO_string -and further explanation). - -.TP -.B \-C -Specify to compute CRC on memory content. -By default the CRC is computed on the whole flash content. -Use -.B "\-S" -to provide different memory address range. - -.TP -.B \-R -Specify to reset the device at exit. -This option is ignored if either -.BR "\-g" "," -.BR "\-j" "," -.B "\-k" -or -.B "\-u" -is also specified. - -.SH BOOTLOADER GPIO SEQUENCE -This feature is currently available on Linux host only. - -As explained in ST application note AN2606, after reset the STM32 will -execute either the application program in user flash or the bootloader, -depending on the level applied at specific pins of STM32 during reset. - -STM32 bootloader is automatically activated by configuring the pins -BOOT0="high" and BOOT1="low" and then by applying a reset. -Application program in user flash is activated by configuring the pin -BOOT0="low" (the level on BOOT1 is ignored) and then by applying a reset. - -When GPIO from host computer are connected to either configuration and -reset pins of STM32, -.B stm32flash -can control the host GPIO to reset STM32 and to force execution of -bootloader or execution of application program. - -The sequence of GPIO values to entry to and exit from bootloader mode is -provided with command line option -.B "\-i" -.IR "GPIO_string" . - -.PD 0 -The format of -.IR "GPIO_string" " is:" -.RS -GPIO_string = [entry sequence][:[exit sequence]] -.P -sequence = [\-]n[,sequence] -.RE -.P -In the above sequences, negative numbers correspond to GPIO at "low" level; -numbers without sign correspond to GPIO at "high" level. -The value "n" can either be the GPIO number on the host system or the -string "rts", "dtr" or "brk". The strings "rts" and "dtr" drive the -corresponding UART's modem lines RTS and DTR as GPIO. -The string "brk" forces the UART to send a BREAK sequence on TX line; -after BREAK the UART is returned in normal "non\-break" mode. -Note: the string "\-brk" has no effect and is ignored. -.PD - -.PD 0 -As example, let's suppose the following connection between host and STM32: -.IP \(bu 2 -host GPIO_3 connected to reset pin of STM32; -.IP \(bu 2 -host GPIO_4 connected to STM32 pin BOOT0; -.IP \(bu 2 -host GPIO_5 connected to STM32 pin BOOT1. -.PD -.P - -In this case, the sequence to enter in bootloader mode is: first put -GPIO_4="high" and GPIO_5="low"; then send reset pulse by GPIO_3="low" -followed by GPIO_3="high". -The corresponding string for -.I GPIO_string -is "4,\-5,\-3,3". - -To exit from bootloade and run the application program, the sequence is: -put GPIO_4="low"; then send reset pulse. -The corresponding string for -.I GPIO_string -is "\-4,\-3,3". - -The complete command line flag is "\-i 4,\-5,\-3,3:\-4,\-3,3". - -STM32W uses pad PA5 to select boot mode; if during reset PA5 is "low" then -STM32W will enter in bootloader mode; if PA5 is "high" it will execute the -program in flash. - -As example, supposing GPIO_3 connected to PA5 and GPIO_2 to STM32W's reset. -The command: -.PD 0 -.RS -stm32flash \-i \-3,\-2,2:3,\-2,2 /dev/ttyS0 -.RE -provides: -.IP \(bu 2 -entry sequence: GPIO_3=low, GPIO_2=low, GPIO_2=high -.IP \(bu 2 -exit sequence: GPIO_3=high, GPIO_2=low, GPIO_2=high -.PD - -.SH EXAMPLES -Get device information: -.RS -.PD 0 -.P -stm32flash /dev/ttyS0 -.PD -.RE - -Write with verify and then start execution: -.RS -.PD 0 -.P -stm32flash \-w filename \-v \-g 0x0 /dev/ttyS0 -.PD -.RE - -Read flash to file: -.RS -.PD 0 -.P -stm32flash \-r filename /dev/ttyS0 -.PD -.RE - -Start execution: -.RS -.PD 0 -.P -stm32flash \-g 0x0 /dev/ttyS0 -.PD -.RE - -Specify: -.PD 0 -.IP \(bu 2 -entry sequence: RTS=low, DTR=low, DTR=high -.IP \(bu 2 -exit sequence: RTS=high, DTR=low, DTR=high -.P -.RS -stm32flash \-i \-rts,\-dtr,dtr:rts,\-dtr,dtr /dev/ttyS0 -.PD -.RE - -.SH FORMAT CONVERSION -Flash images provided by ST or created with ST tools are often in file -format Motorola S\-Record. -Conversion between raw binary, intel hex and Motorola S\-Record can be -done through software package SRecord. - -.SH AUTHORS -The original software package -.B stm32flash -is written by -.I Geoffrey McRae -and is since 2012 maintained by -.IR "Tormod Volden " . - -Man page and extension to STM32W and I2C are written by -.IR "Antonio Borneo " . - -Please report any bugs at the project homepage -http://stm32flash.googlecode.com . - -.SH SEE ALSO -.BR "srec_cat" "(1)," " srec_intel" "(5)," " srec_motorola" "(5)." - -The communication protocol used by ST bootloader is documented in -following ST application notes, depending on communication port. -The current version of -.B stm32flash -only supports -.I UART -and -.I I2C -ports. -.PD 0 -.P -.IP \(bu 2 -AN3154: CAN protocol used in the STM32 bootloader -.P -.RS -http://www.st.com/web/en/resource/technical/document/application_note/CD00264321.pdf -.RE - -.P -.IP \(bu 2 -AN3155: USART protocol used in the STM32(TM) bootloader -.P -.RS -http://www.st.com/web/en/resource/technical/document/application_note/CD00264342.pdf -.RE - -.P -.IP \(bu 2 -AN4221: I2C protocol used in the STM32 bootloader -.P -.RS -http://www.st.com/web/en/resource/technical/document/application_note/DM00072315.pdf -.RE - -.P -.IP \(bu 2 -AN4286: SPI protocol used in the STM32 bootloader -.P -.RS -http://www.st.com/web/en/resource/technical/document/application_note/DM00081379.pdf -.RE - -.PD - - -Boot mode selection for STM32 is documented in ST application note -AN2606, available from the ST website: -.PD 0 -.P -http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf -.PD - -.SH LICENSE -.B stm32flash -is distributed under GNU GENERAL PUBLIC LICENSE Version 2. -Copy of the license is available within the source code in the file -.IR "gpl\-2.0.txt" . diff --git a/linux/src/stm32flash_serial/src/utils.c b/linux/src/stm32flash_serial/src/utils.c deleted file mode 100644 index 271bb3ed7..000000000 --- a/linux/src/stm32flash_serial/src/utils.c +++ /dev/null @@ -1,45 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include "utils.h" - -/* detect CPU endian */ -char cpu_le() { - const uint32_t cpu_le_test = 0x12345678; - return ((const unsigned char*)&cpu_le_test)[0] == 0x78; -} - -uint32_t be_u32(const uint32_t v) { - if (cpu_le()) - return ((v & 0xFF000000) >> 24) | - ((v & 0x00FF0000) >> 8) | - ((v & 0x0000FF00) << 8) | - ((v & 0x000000FF) << 24); - return v; -} - -uint32_t le_u32(const uint32_t v) { - if (!cpu_le()) - return ((v & 0xFF000000) >> 24) | - ((v & 0x00FF0000) >> 8) | - ((v & 0x0000FF00) << 8) | - ((v & 0x000000FF) << 24); - return v; -} diff --git a/linux/src/stm32flash_serial/src/utils.h b/linux/src/stm32flash_serial/src/utils.h deleted file mode 100644 index a8d37d2d5..000000000 --- a/linux/src/stm32flash_serial/src/utils.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _H_UTILS -#define _H_UTILS - -#include - -char cpu_le(); -uint32_t be_u32(const uint32_t v); -uint32_t le_u32(const uint32_t v); - -#endif diff --git a/linux/stlink/lib/libstlink-shared.so b/linux/stlink/lib/libstlink-shared.so deleted file mode 120000 index 8e07ea867..000000000 --- a/linux/stlink/lib/libstlink-shared.so +++ /dev/null @@ -1 +0,0 @@ -libstlink-shared.so.1 \ No newline at end of file diff --git a/linux/stlink/lib/libstlink-shared.so.1 b/linux/stlink/lib/libstlink-shared.so.1 deleted file mode 120000 index 1485c1076..000000000 --- a/linux/stlink/lib/libstlink-shared.so.1 +++ /dev/null @@ -1 +0,0 @@ -libstlink-shared.so.1.3.0 \ No newline at end of file diff --git a/linux/stlink/lib/libstlink-shared.so.1.3.0 b/linux/stlink/lib/libstlink-shared.so.1.3.0 deleted file mode 100644 index 6337e7abd..000000000 Binary files a/linux/stlink/lib/libstlink-shared.so.1.3.0 and /dev/null differ diff --git a/linux/stlink/lib/libstlink.a b/linux/stlink/lib/libstlink.a index f89f075b5..4b065dc19 100644 Binary files a/linux/stlink/lib/libstlink.a and b/linux/stlink/lib/libstlink.a differ diff --git a/linux/stlink/lib/libstlink.so b/linux/stlink/lib/libstlink.so new file mode 120000 index 000000000..cd2d3010e --- /dev/null +++ b/linux/stlink/lib/libstlink.so @@ -0,0 +1 @@ +libstlink.so.1 \ No newline at end of file diff --git a/linux/stlink/lib/libstlink.so.1 b/linux/stlink/lib/libstlink.so.1 new file mode 120000 index 000000000..51934773a --- /dev/null +++ b/linux/stlink/lib/libstlink.so.1 @@ -0,0 +1 @@ +libstlink.so.1.5.1 \ No newline at end of file diff --git a/linux/stlink/lib/libstlink.so.1.5.1 b/linux/stlink/lib/libstlink.so.1.5.1 new file mode 100644 index 000000000..e81060c4b Binary files /dev/null and b/linux/stlink/lib/libstlink.so.1.5.1 differ diff --git a/linux/stlink/st-flash b/linux/stlink/st-flash index 6c1e57ae1..ea0bae602 100755 Binary files a/linux/stlink/st-flash and b/linux/stlink/st-flash differ diff --git a/linux/stlink/st-info b/linux/stlink/st-info index 6f7bf3876..55e33f761 100755 Binary files a/linux/stlink/st-info and b/linux/stlink/st-info differ diff --git a/linux/stlink/st-util b/linux/stlink/st-util index cd3e5f73c..151a68ff6 100755 Binary files a/linux/stlink/st-util and b/linux/stlink/st-util differ diff --git a/linux/stm32flash/stm32flash b/linux/stm32flash/stm32flash index 16872bba6..21abb6e38 100755 Binary files a/linux/stm32flash/stm32flash and b/linux/stm32flash/stm32flash differ diff --git a/linux64/src/stm32flash_serial/src/AUTHORS b/linux64/src/stm32flash_serial/src/AUTHORS deleted file mode 100644 index d096f2205..000000000 --- a/linux64/src/stm32flash_serial/src/AUTHORS +++ /dev/null @@ -1,19 +0,0 @@ -Authors ordered by first contribution. - -Geoffrey McRae -Bret Olmsted -Tormod Volden -Jakob Malm -Reuben Dowle -Matthias Kubisch -Paul Fertser -Daniel Strnad -Jérémie Rapin -Christian Pointner -Mats Erik Andersson -Alexey Borovik -Antonio Borneo -Armin van der Togt -Brian Silverman -Georg Hofmann -Luis Rodrigues diff --git a/linux64/src/stm32flash_serial/src/Android.mk b/linux64/src/stm32flash_serial/src/Android.mk deleted file mode 100644 index 7be3d0018..000000000 --- a/linux64/src/stm32flash_serial/src/Android.mk +++ /dev/null @@ -1,20 +0,0 @@ -TOP_LOCAL_PATH := $(call my-dir) - -include $(call all-named-subdir-makefiles, parsers) - -LOCAL_PATH := $(TOP_LOCAL_PATH) - -include $(CLEAR_VARS) -LOCAL_MODULE := stm32flash -LOCAL_SRC_FILES := \ - dev_table.c \ - i2c.c \ - init.c \ - main.c \ - port.c \ - serial_common.c \ - serial_platform.c \ - stm32.c \ - utils.c -LOCAL_STATIC_LIBRARIES := libparsers -include $(BUILD_EXECUTABLE) diff --git a/linux64/src/stm32flash_serial/src/HOWTO b/linux64/src/stm32flash_serial/src/HOWTO deleted file mode 100644 index d8f32eb04..000000000 --- a/linux64/src/stm32flash_serial/src/HOWTO +++ /dev/null @@ -1,35 +0,0 @@ -Add new interfaces: -===================================================================== -Current version 0.4 supports the following interfaces: -- UART Windows (either "COMn" and "\\.\COMn"); -- UART posix/Linux (e.g. "/dev/ttyUSB0"); -- I2C Linux through standard driver "i2c-dev" (e.g. "/dev/i2c-n"). - -Starting from version 0.4, the back-end of stm32flash is modular and -ready to be expanded to support new interfaces. -I'm planning adding SPI on Linux through standard driver "spidev". -You are invited to contribute with more interfaces. - -To add a new interface you need to add a new file, populate the struct -port_interface (check at the end of files i2c.c, serial_posix.c and -serial_w32.c) and provide the relative functions to operate on the -interface: open/close, read/write, get_cfg_str and the optional gpio. -The include the new drive in Makefile and register the new struct -port_interface in file port.c in struct port_interface *ports[]. - -There are several USB-I2C adapter in the market, each providing its -own libraries to communicate with the I2C bus. -Could be interesting to provide as back-end a bridge between stm32flash -and such libraries (I have no plan on this item). - - -Add new STM32 devices: -===================================================================== -Add a new line in file dev_table.c, in table devices[]. -The fields of the table are listed in stm32.h, struct stm32_dev. - - -Cross compile on Linux host for Windows target with MinGW: -===================================================================== -I'm using a 64 bit Arch Linux machines, and I usually run: - make CC=x86_64-w64-mingw32-gcc AR=x86_64-w64-mingw32-ar diff --git a/linux64/src/stm32flash_serial/src/I2C.txt b/linux64/src/stm32flash_serial/src/I2C.txt deleted file mode 100644 index 4c05ff62d..000000000 --- a/linux64/src/stm32flash_serial/src/I2C.txt +++ /dev/null @@ -1,94 +0,0 @@ -About I2C back-end communication in stm32flash -========================================================================== - -Starting from version v0.4, beside the serial communication port, -stm32flash adds support for I2C port to talk with STM32 bootloader. - -The current I2C back-end supports only the API provided by Linux kernel -driver "i2c-dev", so only I2C controllers with Linux kernel driver can be -used. -In Linux source code, most of the drivers for I2C and SMBUS controllers -are in - ./drivers/i2c/busses/ -Only I2C is supported by STM32 bootloader, so check the section below -about SMBUS. -No I2C support for Windows is available in stm32flash v0.4. - -Thanks to the new modular back-end, stm32flash can be easily extended to -support new back-ends and API. Check HOWTO file in stm32flash source code -for details. - -In the market there are several USB-to-I2C dongles; most of them are not -supported by kernel drivers. Manufacturer provide proprietary userspace -libraries using not standardized API. -These API and dongles could be supported in feature versions. - -There are currently 3 versions of STM32 bootloader for I2C communications: -- v1.0 using I2C clock stretching synchronization between host and STM32; -- v1.1 superset of v1.0, adds non stretching commands; -- v1.2 superset of v1.1, adds CRC command and compatibility with i2cdetect. -Details in ST application note AN2606. -All the bootloaders above are tested and working with stm32flash. - - -SMBUS controllers -========================================================================== - -Almost 50% of the drivers in Linux source code folder - ./drivers/i2c/busses/ -are for controllers that "only" support SMBUS protocol. They can NOT -operate with STM32 bootloader. -To identify if your controller supports I2C, use command: - i2cdetect -F n -where "n" is the number of the I2C interface (e.g. n=3 for "/dev/i2c-3"). -Controllers that supports I2C will report - I2C yes -Controller that support both I2C and SMBUS are ok. - -If you are interested on details about SMBUS protocol, you can download -the current specs from - http://smbus.org/specs/smbus20.pdf -and you can read the files in Linux source code - ./Documentation/i2c/i2c-protocol - ./Documentation/i2c/smbus-protocol - - -About bootloader v1.0 -========================================================================== - -Version v1.0 can have issues with some I2C controllers due to use of clock -stretching during commands that require long operations, like flash erase -and programming. - -Clock stretching is a technique to synchronize host and I2C device. When -I2C device wants to force a delay in the communication, it push "low" the -I2C clock; the I2C controller detects it and waits until I2C clock returns -"high". -Most I2C controllers set a "timeout" for clock stretching, ranging from -few milli-seconds to seconds depending on specific HW or SW driver. - -It is possible that the timeout in your I2C controller is smaller than the -delay required for flash erase or programming. In this case the I2C -controller will timeout and report error to stm32flash. -There is no possibility for stm32flash to retry, so it can only signal the -error and exit. - -To by-pass the issue with bootloader v1.0 you can modify the kernel driver -of your I2C controller. Not an easy job, since every controller has its own -way to handle the timeout. - -In my case I'm using the I2C controller integrated in the VGA port of my -laptop HP EliteBook 8460p. I built the 0.25$ VGA-to-I2C adapter reported in - http://www.paintyourdragon.com/?p=43 -To change the timeout of the I2C controller I had to modify the kernel file - drivers/gpu/drm/radeon/radeon_i2c.c -line 969 -- i2c->bit.timeout = usecs_to_jiffies(2200); /* from VESA */ -+ i2c->bit.timeout = msecs_to_jiffies(5000); /* 5s for STM32 */ -and recompile it. -Then - $> modprobe i2c-dev - $> chmod 666 /dev/i2c-7 - #> stm32flash -a 0x39 /dev/i2c-7 - -2014-09-16 Antonio Borneo diff --git a/linux64/src/stm32flash_serial/src/Makefile b/linux64/src/stm32flash_serial/src/Makefile deleted file mode 100644 index 0328d5588..000000000 --- a/linux64/src/stm32flash_serial/src/Makefile +++ /dev/null @@ -1,38 +0,0 @@ -PREFIX = /usr/local -CFLAGS += -Wall -g - -INSTALL = install - -OBJS = dev_table.o \ - i2c.o \ - init.o \ - main.o \ - port.o \ - serial_common.o \ - serial_platform.o \ - stm32.o \ - utils.o - -LIBOBJS = parsers/parsers.a - -all: stm32flash - -serial_platform.o: serial_posix.c serial_w32.c - -parsers/parsers.a: - cd parsers && $(MAKE) parsers.a - -stm32flash: $(OBJS) $(LIBOBJS) - $(CC) $(LDFLAGS) -o $@ $(OBJS) $(LIBOBJS) - -clean: - rm -f $(OBJS) stm32flash - cd parsers && $(MAKE) $@ - -install: all - $(INSTALL) -d $(DESTDIR)$(PREFIX)/bin - $(INSTALL) -m 755 stm32flash $(DESTDIR)$(PREFIX)/bin - $(INSTALL) -d $(DESTDIR)$(PREFIX)/share/man/man1 - $(INSTALL) -m 644 stm32flash.1 $(DESTDIR)$(PREFIX)/share/man/man1 - -.PHONY: all clean install diff --git a/linux64/src/stm32flash_serial/src/TODO b/linux64/src/stm32flash_serial/src/TODO deleted file mode 100644 index 41df614ff..000000000 --- a/linux64/src/stm32flash_serial/src/TODO +++ /dev/null @@ -1,7 +0,0 @@ - -stm32: -- Add support for variable page size - -AUTHORS: -- Add contributors from Geoffrey's commits - diff --git a/linux64/src/stm32flash_serial/src/dev_table.c b/linux64/src/stm32flash_serial/src/dev_table.c deleted file mode 100644 index 399cd9d08..000000000 --- a/linux64/src/stm32flash_serial/src/dev_table.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - Copyright (C) 2014 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include "stm32.h" - -/* - * Device table, corresponds to the "Bootloader device-dependant parameters" - * table in ST document AN2606. - * Note that the option bytes upper range is inclusive! - */ -const stm32_dev_t devices[] = { - /* F0 */ - {0x440, "STM32F051xx" , 0x20001000, 0x20002000, 0x08000000, 0x08010000, 4, 1024, 0x1FFFF800, 0x1FFFF80B, 0x1FFFEC00, 0x1FFFF800}, - {0x444, "STM32F030/F031" , 0x20001000, 0x20002000, 0x08000000, 0x08010000, 4, 1024, 0x1FFFF800, 0x1FFFF80B, 0x1FFFEC00, 0x1FFFF800}, - {0x445, "STM32F042xx" , 0x20001800, 0x20001800, 0x08000000, 0x08008000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFC400, 0x1FFFF800}, - {0x448, "STM32F072xx" , 0x20001800, 0x20004000, 0x08000000, 0x08020000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFC800, 0x1FFFF800}, - /* F1 */ - {0x412, "Low-density" , 0x20000200, 0x20002800, 0x08000000, 0x08008000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x410, "Medium-density" , 0x20000200, 0x20005000, 0x08000000, 0x08020000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x414, "High-density" , 0x20000200, 0x20010000, 0x08000000, 0x08080000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x420, "Medium-density VL" , 0x20000200, 0x20002000, 0x08000000, 0x08020000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x428, "High-density VL" , 0x20000200, 0x20008000, 0x08000000, 0x08080000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x418, "Connectivity line" , 0x20001000, 0x20010000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFB000, 0x1FFFF800}, - {0x430, "XL-density" , 0x20000800, 0x20018000, 0x08000000, 0x08100000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFE000, 0x1FFFF800}, - /* Note that F2 and F4 devices have sectors of different page sizes - and only the first sectors (of one page size) are included here */ - /* F2 */ - {0x411, "STM32F2xx" , 0x20002000, 0x20020000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77DF}, - /* F3 */ - {0x432, "STM32F373/8" , 0x20001400, 0x20008000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800}, - {0x422, "F302xB/303xB/358" , 0x20001400, 0x20010000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800}, - {0x439, "STM32F302x4(6/8)" , 0x20001800, 0x20004000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800}, - {0x438, "F303x4/334/328" , 0x20001800, 0x20003000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800}, - /* F4 */ - {0x413, "STM32F40/1" , 0x20002000, 0x20020000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77DF}, - /* 0x419 is also used for STM32F429/39 but with other bootloader ID... */ - {0x419, "STM32F427/37" , 0x20002000, 0x20030000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77FF}, - {0x423, "STM32F401xB(C)" , 0x20003000, 0x20010000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77FF}, - {0x433, "STM32F401xD(E)" , 0x20003000, 0x20018000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77FF}, - /* L0 */ - {0x417, "L05xxx/06xxx" , 0x20001000, 0x20002000, 0x08000000, 0x08010000, 32, 128, 0x1FF80000, 0x1FF8000F, 0x1FF00000, 0x1FF01000}, - /* L1 */ - {0x416, "L1xxx6(8/B)" , 0x20000800, 0x20004000, 0x08000000, 0x08020000, 16, 256, 0x1FF80000, 0x1FF8000F, 0x1FF00000, 0x1FF01000}, - {0x429, "L1xxx6(8/B)A" , 0x20001000, 0x20008000, 0x08000000, 0x08020000, 16, 256, 0x1FF80000, 0x1FF8000F, 0x1FF00000, 0x1FF01000}, - {0x427, "L1xxxC" , 0x20001000, 0x20008000, 0x08000000, 0x08020000, 16, 256, 0x1FF80000, 0x1FF8000F, 0x1FF00000, 0x1FF02000}, - {0x436, "L1xxxD" , 0x20001000, 0x2000C000, 0x08000000, 0x08060000, 16, 256, 0x1ff80000, 0x1ff8000F, 0x1FF00000, 0x1FF02000}, - {0x437, "L1xxxE" , 0x20001000, 0x20014000, 0x08000000, 0x08060000, 16, 256, 0x1ff80000, 0x1ff8000F, 0x1FF00000, 0x1FF02000}, - /* These are not (yet) in AN2606: */ - {0x641, "Medium_Density PL" , 0x20000200, 0x00005000, 0x08000000, 0x08020000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x9a8, "STM32W-128K" , 0x20000200, 0x20002000, 0x08000000, 0x08020000, 1, 1024, 0, 0, 0, 0}, - {0x9b0, "STM32W-256K" , 0x20000200, 0x20004000, 0x08000000, 0x08040000, 1, 2048, 0, 0, 0, 0}, - {0x0} -}; diff --git a/linux64/src/stm32flash_serial/src/gpl-2.0.txt b/linux64/src/stm32flash_serial/src/gpl-2.0.txt deleted file mode 100644 index d159169d1..000000000 --- a/linux64/src/stm32flash_serial/src/gpl-2.0.txt +++ /dev/null @@ -1,339 +0,0 @@ - GNU GENERAL PUBLIC LICENSE - Version 2, June 1991 - - Copyright (C) 1989, 1991 Free Software Foundation, Inc., - 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The licenses for most software are designed to take away your -freedom to share and change it. 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Of course, the commands you use may -be called something other than `show w' and `show c'; they could even be -mouse-clicks or menu items--whatever suits your program. - -You should also get your employer (if you work as a programmer) or your -school, if any, to sign a "copyright disclaimer" for the program, if -necessary. Here is a sample; alter the names: - - Yoyodyne, Inc., hereby disclaims all copyright interest in the program - `Gnomovision' (which makes passes at compilers) written by James Hacker. - - , 1 April 1989 - Ty Coon, President of Vice - -This General Public License does not permit incorporating your program into -proprietary programs. If your program is a subroutine library, you may -consider it more useful to permit linking proprietary applications with the -library. If this is what you want to do, use the GNU Lesser General -Public License instead of this License. diff --git a/linux64/src/stm32flash_serial/src/i2c.c b/linux64/src/stm32flash_serial/src/i2c.c deleted file mode 100644 index 10e6bb15a..000000000 --- a/linux64/src/stm32flash_serial/src/i2c.c +++ /dev/null @@ -1,209 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2014 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "serial.h" -#include "port.h" - - -#if !defined(__linux__) - -static port_err_t i2c_open(struct port_interface *port, - struct port_options *ops) -{ - return PORT_ERR_NODEV; -} - -struct port_interface port_i2c = { - .name = "i2c", - .open = i2c_open, -}; - -#else - -#ifdef __ANDROID__ -#define I2C_SLAVE 0x0703 /* Use this slave address */ -#define I2C_FUNCS 0x0705 /* Get the adapter functionality mask */ -/* To determine what functionality is present */ -#define I2C_FUNC_I2C 0x00000001 -#else -#include -#include -#endif - -#include - -struct i2c_priv { - int fd; - int addr; -}; - -static port_err_t i2c_open(struct port_interface *port, - struct port_options *ops) -{ - struct i2c_priv *h; - int fd, addr, ret; - unsigned long funcs; - - /* 1. check device name match */ - if (strncmp(ops->device, "/dev/i2c-", strlen("/dev/i2c-"))) - return PORT_ERR_NODEV; - - /* 2. check options */ - addr = ops->bus_addr; - if (addr < 0x03 || addr > 0x77) { - fprintf(stderr, "I2C address out of range [0x03-0x77]\n"); - return PORT_ERR_UNKNOWN; - } - - /* 3. open it */ - h = calloc(sizeof(*h), 1); - if (h == NULL) { - fprintf(stderr, "End of memory\n"); - return PORT_ERR_UNKNOWN; - } - fd = open(ops->device, O_RDWR); - if (fd < 0) { - fprintf(stderr, "Unable to open special file \"%s\"\n", - ops->device); - free(h); - return PORT_ERR_UNKNOWN; - } - - /* 3.5. Check capabilities */ - ret = ioctl(fd, I2C_FUNCS, &funcs); - if (ret < 0) { - fprintf(stderr, "I2C ioctl(funcs) error %d\n", errno); - close(fd); - free(h); - return PORT_ERR_UNKNOWN; - } - if ((funcs & I2C_FUNC_I2C) == 0) { - fprintf(stderr, "Error: controller is not I2C, only SMBUS.\n"); - close(fd); - free(h); - return PORT_ERR_UNKNOWN; - } - - /* 4. set options */ - ret = ioctl(fd, I2C_SLAVE, addr); - if (ret < 0) { - fprintf(stderr, "I2C ioctl(slave) error %d\n", errno); - close(fd); - free(h); - return PORT_ERR_UNKNOWN; - } - - h->fd = fd; - h->addr = addr; - port->private = h; - return PORT_ERR_OK; -} - -static port_err_t i2c_close(struct port_interface *port) -{ - struct i2c_priv *h; - - h = (struct i2c_priv *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - close(h->fd); - free(h); - port->private = NULL; - return PORT_ERR_OK; -} - -static port_err_t i2c_read(struct port_interface *port, void *buf, - size_t nbyte) -{ - struct i2c_priv *h; - int ret; - - h = (struct i2c_priv *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - ret = read(h->fd, buf, nbyte); - if (ret != nbyte) - return PORT_ERR_UNKNOWN; - return PORT_ERR_OK; -} - -static port_err_t i2c_write(struct port_interface *port, void *buf, - size_t nbyte) -{ - struct i2c_priv *h; - int ret; - - h = (struct i2c_priv *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - ret = write(h->fd, buf, nbyte); - if (ret != nbyte) - return PORT_ERR_UNKNOWN; - return PORT_ERR_OK; -} - -static port_err_t i2c_gpio(struct port_interface *port, serial_gpio_t n, - int level) -{ - return PORT_ERR_OK; -} - -static const char *i2c_get_cfg_str(struct port_interface *port) -{ - struct i2c_priv *h; - static char str[11]; - - h = (struct i2c_priv *)port->private; - if (h == NULL) - return "INVALID"; - snprintf(str, sizeof(str), "addr 0x%2x", h->addr); - return str; -} - -static struct varlen_cmd i2c_cmd_get_reply[] = { - {0x10, 11}, - {0x11, 17}, - {0x12, 18}, - { /* sentinel */ } -}; - -struct port_interface port_i2c = { - .name = "i2c", - .flags = PORT_STRETCH_W, - .open = i2c_open, - .close = i2c_close, - .read = i2c_read, - .write = i2c_write, - .gpio = i2c_gpio, - .cmd_get_reply = i2c_cmd_get_reply, - .get_cfg_str = i2c_get_cfg_str, -}; - -#endif diff --git a/linux64/src/stm32flash_serial/src/init.c b/linux64/src/stm32flash_serial/src/init.c deleted file mode 100644 index 77a571bd8..000000000 --- a/linux64/src/stm32flash_serial/src/init.c +++ /dev/null @@ -1,219 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - Copyright (C) 2013 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#include -#include -#include -#include -#include -#include -#include -#include -#include "init.h" -#include "serial.h" -#include "stm32.h" -#include "port.h" - -struct gpio_list { - struct gpio_list *next; - int gpio; -}; - - -static int write_to(const char *filename, const char *value) -{ - int fd, ret; - - fd = open(filename, O_WRONLY); - if (fd < 0) { - fprintf(stderr, "Cannot open file \"%s\"\n", filename); - return 0; - } - ret = write(fd, value, strlen(value)); - if (ret < 0) { - fprintf(stderr, "Error writing in file \"%s\"\n", filename); - close(fd); - return 0; - } - close(fd); - return 1; -} - -#if !defined(__linux__) -static int drive_gpio(int n, int level, struct gpio_list **gpio_to_release) -{ - fprintf(stderr, "GPIO control only available in Linux\n"); - return 0; -} -#else -static int drive_gpio(int n, int level, struct gpio_list **gpio_to_release) -{ - char num[16]; /* sized to carry MAX_INT */ - char file[48]; /* sized to carry longest filename */ - struct stat buf; - struct gpio_list *new; - int ret; - - sprintf(file, "/sys/class/gpio/gpio%d/direction", n); - ret = stat(file, &buf); - if (ret) { - /* file miss, GPIO not exported yet */ - sprintf(num, "%d", n); - ret = write_to("/sys/class/gpio/export", num); - if (!ret) - return 0; - ret = stat(file, &buf); - if (ret) { - fprintf(stderr, "GPIO %d not available\n", n); - return 0; - } - new = (struct gpio_list *)malloc(sizeof(struct gpio_list)); - if (new == NULL) { - fprintf(stderr, "Out of memory\n"); - return 0; - } - new->gpio = n; - new->next = *gpio_to_release; - *gpio_to_release = new; - } - - return write_to(file, level ? "high" : "low"); -} -#endif - -static int release_gpio(int n) -{ - char num[16]; /* sized to carry MAX_INT */ - - sprintf(num, "%d", n); - return write_to("/sys/class/gpio/unexport", num); -} - -static int gpio_sequence(struct port_interface *port, const char *s, size_t l) -{ - struct gpio_list *gpio_to_release = NULL, *to_free; - int ret, level, gpio; - - ret = 1; - while (ret == 1 && *s && l > 0) { - if (*s == '-') { - level = 0; - s++; - l--; - } else - level = 1; - - if (isdigit(*s)) { - gpio = atoi(s); - while (isdigit(*s)) { - s++; - l--; - } - } else if (!strncmp(s, "rts", 3)) { - gpio = -GPIO_RTS; - s += 3; - l -= 3; - } else if (!strncmp(s, "dtr", 3)) { - gpio = -GPIO_DTR; - s += 3; - l -= 3; - } else if (!strncmp(s, "brk", 3)) { - gpio = -GPIO_BRK; - s += 3; - l -= 3; - } else { - fprintf(stderr, "Character \'%c\' is not a digit\n", *s); - ret = 0; - break; - } - - if (*s && (l > 0)) { - if (*s == ',') { - s++; - l--; - } else { - fprintf(stderr, "Character \'%c\' is not a separator\n", *s); - ret = 0; - break; - } - } - if (gpio < 0) - ret = (port->gpio(port, -gpio, level) == PORT_ERR_OK); - else - ret = drive_gpio(gpio, level, &gpio_to_release); - usleep(100000); - } - - while (gpio_to_release) { - release_gpio(gpio_to_release->gpio); - to_free = gpio_to_release; - gpio_to_release = gpio_to_release->next; - free(to_free); - } - usleep(500000); - return ret; -} - -static int gpio_bl_entry(struct port_interface *port, const char *seq) -{ - char *s; - - if (seq == NULL || seq[0] == ':') - return 1; - - s = strchr(seq, ':'); - if (s == NULL) - return gpio_sequence(port, seq, strlen(seq)); - - return gpio_sequence(port, seq, s - seq); -} - -static int gpio_bl_exit(struct port_interface *port, const char *seq) -{ - char *s; - - if (seq == NULL) - return 1; - - s = strchr(seq, ':'); - if (s == NULL || s[1] == '\0') - return 1; - - return gpio_sequence(port, s + 1, strlen(s + 1)); -} - -int init_bl_entry(struct port_interface *port, const char *seq) -{ - if (seq) - return gpio_bl_entry(port, seq); - - return 1; -} - -int init_bl_exit(stm32_t *stm, struct port_interface *port, const char *seq) -{ - if (seq) - return gpio_bl_exit(port, seq); - - if (stm32_reset_device(stm) != STM32_ERR_OK) - return 0; - return 1; -} diff --git a/linux64/src/stm32flash_serial/src/init.h b/linux64/src/stm32flash_serial/src/init.h deleted file mode 100644 index 6075b519b..000000000 --- a/linux64/src/stm32flash_serial/src/init.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - Copyright (C) 2013 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _INIT_H -#define _INIT_H - -#include "stm32.h" -#include "port.h" - -int init_bl_entry(struct port_interface *port, const char *seq); -int init_bl_exit(stm32_t *stm, struct port_interface *port, const char *seq); - -#endif diff --git a/linux64/src/stm32flash_serial/src/main.c b/linux64/src/stm32flash_serial/src/main.c deleted file mode 100644 index f081d6131..000000000 --- a/linux64/src/stm32flash_serial/src/main.c +++ /dev/null @@ -1,774 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright 2010 Geoffrey McRae - Copyright 2011 Steve Markgraf - Copyright 2012 Tormod Volden - Copyright 2013 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include -#include -#include -#include -#include -#include - -#include "init.h" -#include "utils.h" -#include "serial.h" -#include "stm32.h" -#include "parsers/parser.h" -#include "port.h" - -#include "parsers/binary.h" -#include "parsers/hex.h" - -#define VERSION "Arduino_STM32_0.9" - -/* device globals */ -stm32_t *stm = NULL; - -void *p_st = NULL; -parser_t *parser = NULL; - -/* settings */ -struct port_options port_opts = { - .device = NULL, - .baudRate = SERIAL_BAUD_57600, - .serial_mode = "8e1", - .bus_addr = 0, - .rx_frame_max = STM32_MAX_RX_FRAME, - .tx_frame_max = STM32_MAX_TX_FRAME, -}; -int rd = 0; -int wr = 0; -int wu = 0; -int rp = 0; -int ur = 0; -int eraseOnly = 0; -int crc = 0; -int npages = 0; -int spage = 0; -int no_erase = 0; -char verify = 0; -int retry = 10; -char exec_flag = 0; -uint32_t execute = 0; -char init_flag = 1; -char force_binary = 0; -char reset_flag = 0; -char *filename; -char *gpio_seq = NULL; -uint32_t start_addr = 0; -uint32_t readwrite_len = 0; - -/* functions */ -int parse_options(int argc, char *argv[]); -void show_help(char *name); - -static int is_addr_in_ram(uint32_t addr) -{ - return addr >= stm->dev->ram_start && addr < stm->dev->ram_end; -} - -static int is_addr_in_flash(uint32_t addr) -{ - return addr >= stm->dev->fl_start && addr < stm->dev->fl_end; -} - -static int flash_addr_to_page_floor(uint32_t addr) -{ - if (!is_addr_in_flash(addr)) - return 0; - - return (addr - stm->dev->fl_start) / stm->dev->fl_ps; -} - -static int flash_addr_to_page_ceil(uint32_t addr) -{ - if (!(addr >= stm->dev->fl_start && addr <= stm->dev->fl_end)) - return 0; - - return (addr + stm->dev->fl_ps - 1 - stm->dev->fl_start) - / stm->dev->fl_ps; -} - -static uint32_t flash_page_to_addr(int page) -{ - return stm->dev->fl_start + page * stm->dev->fl_ps; -} - -int main(int argc, char* argv[]) { - struct port_interface *port = NULL; - int ret = 1; - stm32_err_t s_err; - parser_err_t perr; - FILE *diag = stdout; - - fprintf(diag, "stm32flash " VERSION "\n\n"); - fprintf(diag, "http://github.com/rogerclarkmelbourne/arduino_stm32\n\n"); - if (parse_options(argc, argv) != 0) - goto close; - - if (rd && filename[0] == '-') { - diag = stderr; - } - - if (wr) { - /* first try hex */ - if (!force_binary) { - parser = &PARSER_HEX; - p_st = parser->init(); - if (!p_st) { - fprintf(stderr, "%s Parser failed to initialize\n", parser->name); - goto close; - } - } - - if (force_binary || (perr = parser->open(p_st, filename, 0)) != PARSER_ERR_OK) { - if (force_binary || perr == PARSER_ERR_INVALID_FILE) { - if (!force_binary) { - parser->close(p_st); - p_st = NULL; - } - - /* now try binary */ - parser = &PARSER_BINARY; - p_st = parser->init(); - if (!p_st) { - fprintf(stderr, "%s Parser failed to initialize\n", parser->name); - goto close; - } - perr = parser->open(p_st, filename, 0); - } - - /* if still have an error, fail */ - if (perr != PARSER_ERR_OK) { - fprintf(stderr, "%s ERROR: %s\n", parser->name, parser_errstr(perr)); - if (perr == PARSER_ERR_SYSTEM) perror(filename); - goto close; - } - } - - fprintf(diag, "Using Parser : %s\n", parser->name); - } else { - parser = &PARSER_BINARY; - p_st = parser->init(); - if (!p_st) { - fprintf(stderr, "%s Parser failed to initialize\n", parser->name); - goto close; - } - } - - if (port_open(&port_opts, &port) != PORT_ERR_OK) { - fprintf(stderr, "Failed to open port: %s\n", port_opts.device); - goto close; - } - - fprintf(diag, "Interface %s: %s\n", port->name, port->get_cfg_str(port)); - if (init_flag && init_bl_entry(port, gpio_seq) == 0) - goto close; - stm = stm32_init(port, init_flag); - if (!stm) - goto close; - - fprintf(diag, "Version : 0x%02x\n", stm->bl_version); - if (port->flags & PORT_GVR_ETX) { - fprintf(diag, "Option 1 : 0x%02x\n", stm->option1); - fprintf(diag, "Option 2 : 0x%02x\n", stm->option2); - } - fprintf(diag, "Device ID : 0x%04x (%s)\n", stm->pid, stm->dev->name); - fprintf(diag, "- RAM : %dKiB (%db reserved by bootloader)\n", (stm->dev->ram_end - 0x20000000) / 1024, stm->dev->ram_start - 0x20000000); - fprintf(diag, "- Flash : %dKiB (sector size: %dx%d)\n", (stm->dev->fl_end - stm->dev->fl_start ) / 1024, stm->dev->fl_pps, stm->dev->fl_ps); - fprintf(diag, "- Option RAM : %db\n", stm->dev->opt_end - stm->dev->opt_start + 1); - fprintf(diag, "- System RAM : %dKiB\n", (stm->dev->mem_end - stm->dev->mem_start) / 1024); - - uint8_t buffer[256]; - uint32_t addr, start, end; - unsigned int len; - int failed = 0; - int first_page, num_pages; - - /* - * Cleanup addresses: - * - * Starting from options - * start_addr, readwrite_len, spage, npages - * and using device memory size, compute - * start, end, first_page, num_pages - */ - if (start_addr || readwrite_len) { - start = start_addr; - - if (is_addr_in_flash(start)) - end = stm->dev->fl_end; - else { - no_erase = 1; - if (is_addr_in_ram(start)) - end = stm->dev->ram_end; - else - end = start + sizeof(uint32_t); - } - - if (readwrite_len && (end > start + readwrite_len)) - end = start + readwrite_len; - - first_page = flash_addr_to_page_floor(start); - if (!first_page && end == stm->dev->fl_end) - num_pages = 0xff; /* mass erase */ - else - num_pages = flash_addr_to_page_ceil(end) - first_page; - } else if (!spage && !npages) { - start = stm->dev->fl_start; - end = stm->dev->fl_end; - first_page = 0; - num_pages = 0xff; /* mass erase */ - } else { - first_page = spage; - start = flash_page_to_addr(first_page); - if (start > stm->dev->fl_end) { - fprintf(stderr, "Address range exceeds flash size.\n"); - goto close; - } - - if (npages) { - num_pages = npages; - end = flash_page_to_addr(first_page + num_pages); - if (end > stm->dev->fl_end) - end = stm->dev->fl_end; - } else { - end = stm->dev->fl_end; - num_pages = flash_addr_to_page_ceil(end) - first_page; - } - - if (!first_page && end == stm->dev->fl_end) - num_pages = 0xff; /* mass erase */ - } - - if (rd) { - unsigned int max_len = port_opts.rx_frame_max; - - fprintf(diag, "Memory read\n"); - - perr = parser->open(p_st, filename, 1); - if (perr != PARSER_ERR_OK) { - fprintf(stderr, "%s ERROR: %s\n", parser->name, parser_errstr(perr)); - if (perr == PARSER_ERR_SYSTEM) - perror(filename); - goto close; - } - - fflush(diag); - addr = start; - while(addr < end) { - uint32_t left = end - addr; - len = max_len > left ? left : max_len; - s_err = stm32_read_memory(stm, addr, buffer, len); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to read memory at address 0x%08x, target write-protected?\n", addr); - goto close; - } - if (parser->write(p_st, buffer, len) != PARSER_ERR_OK) - { - fprintf(stderr, "Failed to write data to file\n"); - goto close; - } - addr += len; - - fprintf(diag, - "\rRead address 0x%08x (%.2f%%) ", - addr, - (100.0f / (float)(end - start)) * (float)(addr - start) - ); - fflush(diag); - } - fprintf(diag, "Done.\n"); - ret = 0; - goto close; - } else if (rp) { - fprintf(stdout, "Read-Protecting flash\n"); - /* the device automatically performs a reset after the sending the ACK */ - reset_flag = 0; - stm32_readprot_memory(stm); - fprintf(stdout, "Done.\n"); - } else if (ur) { - fprintf(stdout, "Read-UnProtecting flash\n"); - /* the device automatically performs a reset after the sending the ACK */ - reset_flag = 0; - stm32_runprot_memory(stm); - fprintf(stdout, "Done.\n"); - } else if (eraseOnly) { - ret = 0; - fprintf(stdout, "Erasing flash\n"); - - if (num_pages != 0xff && - (start != flash_page_to_addr(first_page) - || end != flash_page_to_addr(first_page + num_pages))) { - fprintf(stderr, "Specified start & length are invalid (must be page aligned)\n"); - ret = 1; - goto close; - } - - s_err = stm32_erase_memory(stm, first_page, num_pages); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to erase memory\n"); - ret = 1; - goto close; - } - } else if (wu) { - fprintf(diag, "Write-unprotecting flash\n"); - /* the device automatically performs a reset after the sending the ACK */ - reset_flag = 0; - stm32_wunprot_memory(stm); - fprintf(diag, "Done.\n"); - - } else if (wr) { - fprintf(diag, "Write to memory\n"); - - off_t offset = 0; - ssize_t r; - unsigned int size; - unsigned int max_wlen, max_rlen; - - max_wlen = port_opts.tx_frame_max - 2; /* skip len and crc */ - max_wlen &= ~3; /* 32 bit aligned */ - - max_rlen = port_opts.rx_frame_max; - max_rlen = max_rlen < max_wlen ? max_rlen : max_wlen; - - /* Assume data from stdin is whole device */ - if (filename[0] == '-' && filename[1] == '\0') - size = end - start; - else - size = parser->size(p_st); - - // TODO: It is possible to write to non-page boundaries, by reading out flash - // from partial pages and combining with the input data - // if ((start % stm->dev->fl_ps) != 0 || (end % stm->dev->fl_ps) != 0) { - // fprintf(stderr, "Specified start & length are invalid (must be page aligned)\n"); - // goto close; - // } - - // TODO: If writes are not page aligned, we should probably read out existing flash - // contents first, so it can be preserved and combined with new data - if (!no_erase && num_pages) { - fprintf(diag, "Erasing memory\n"); - s_err = stm32_erase_memory(stm, first_page, num_pages); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to erase memory\n"); - goto close; - } - } - - fflush(diag); - addr = start; - while(addr < end && offset < size) { - uint32_t left = end - addr; - len = max_wlen > left ? left : max_wlen; - len = len > size - offset ? size - offset : len; - - if (parser->read(p_st, buffer, &len) != PARSER_ERR_OK) - goto close; - - if (len == 0) { - if (filename[0] == '-') { - break; - } else { - fprintf(stderr, "Failed to read input file\n"); - goto close; - } - } - - again: - s_err = stm32_write_memory(stm, addr, buffer, len); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to write memory at address 0x%08x\n", addr); - goto close; - } - - if (verify) { - uint8_t compare[len]; - unsigned int offset, rlen; - - offset = 0; - while (offset < len) { - rlen = len - offset; - rlen = rlen < max_rlen ? rlen : max_rlen; - s_err = stm32_read_memory(stm, addr + offset, compare + offset, rlen); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to read memory at address 0x%08x\n", addr + offset); - goto close; - } - offset += rlen; - } - - for(r = 0; r < len; ++r) - if (buffer[r] != compare[r]) { - if (failed == retry) { - fprintf(stderr, "Failed to verify at address 0x%08x, expected 0x%02x and found 0x%02x\n", - (uint32_t)(addr + r), - buffer [r], - compare[r] - ); - goto close; - } - ++failed; - goto again; - } - - failed = 0; - } - - addr += len; - offset += len; - - fprintf(diag, - "\rWrote %saddress 0x%08x (%.2f%%) ", - verify ? "and verified " : "", - addr, - (100.0f / size) * offset - ); - fflush(diag); - - } - - fprintf(diag, "Done.\n"); - ret = 0; - goto close; - } else if (crc) { - uint32_t crc_val = 0; - - fprintf(diag, "CRC computation\n"); - - s_err = stm32_crc_wrapper(stm, start, end - start, &crc_val); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to read CRC\n"); - goto close; - } - fprintf(diag, "CRC(0x%08x-0x%08x) = 0x%08x\n", start, end, - crc_val); - ret = 0; - goto close; - } else - ret = 0; - -close: - if (stm && exec_flag && ret == 0) { - if (execute == 0) - execute = stm->dev->fl_start; - - fprintf(diag, "\nStarting execution at address 0x%08x... ", execute); - fflush(diag); - if (stm32_go(stm, execute) == STM32_ERR_OK) { - reset_flag = 0; - fprintf(diag, "done.\n"); - } else - fprintf(diag, "failed.\n"); - } - - if (stm && reset_flag) { - fprintf(diag, "\nResetting device... "); - fflush(diag); - if (init_bl_exit(stm, port, gpio_seq)) - fprintf(diag, "done.\n"); - else fprintf(diag, "failed.\n"); - } - - if (p_st ) parser->close(p_st); - if (stm ) stm32_close (stm); - if (port) - port->close(port); - - fprintf(diag, "\n"); - return ret; -} - -int parse_options(int argc, char *argv[]) -{ - int c; - char *pLen; - - while ((c = getopt(argc, argv, "a:b:m:r:w:e:vn:g:jkfcChuos:S:F:i:R")) != -1) { - switch(c) { - case 'a': - port_opts.bus_addr = strtoul(optarg, NULL, 0); - break; - - case 'b': - port_opts.baudRate = serial_get_baud(strtoul(optarg, NULL, 0)); - if (port_opts.baudRate == SERIAL_BAUD_INVALID) { - serial_baud_t baudrate; - fprintf(stderr, "Invalid baud rate, valid options are:\n"); - for (baudrate = SERIAL_BAUD_1200; baudrate != SERIAL_BAUD_INVALID; ++baudrate) - fprintf(stderr, " %d\n", serial_get_baud_int(baudrate)); - return 1; - } - break; - - case 'm': - if (strlen(optarg) != 3 - || serial_get_bits(optarg) == SERIAL_BITS_INVALID - || serial_get_parity(optarg) == SERIAL_PARITY_INVALID - || serial_get_stopbit(optarg) == SERIAL_STOPBIT_INVALID) { - fprintf(stderr, "Invalid serial mode\n"); - return 1; - } - port_opts.serial_mode = optarg; - break; - - case 'r': - case 'w': - rd = rd || c == 'r'; - wr = wr || c == 'w'; - if (rd && wr) { - fprintf(stderr, "ERROR: Invalid options, can't read & write at the same time\n"); - return 1; - } - filename = optarg; - if (filename[0] == '-') { - force_binary = 1; - } - break; - case 'e': - if (readwrite_len || start_addr) { - fprintf(stderr, "ERROR: Invalid options, can't specify start page / num pages and start address/length\n"); - return 1; - } - npages = strtoul(optarg, NULL, 0); - if (npages > 0xFF || npages < 0) { - fprintf(stderr, "ERROR: You need to specify a page count between 0 and 255"); - return 1; - } - if (!npages) - no_erase = 1; - break; - case 'u': - wu = 1; - if (rd || wr) { - fprintf(stderr, "ERROR: Invalid options, can't write unprotect and read/write at the same time\n"); - return 1; - } - break; - - case 'j': - rp = 1; - if (rd || wr) { - fprintf(stderr, "ERROR: Invalid options, can't read protect and read/write at the same time\n"); - return 1; - } - break; - - case 'k': - ur = 1; - if (rd || wr) { - fprintf(stderr, "ERROR: Invalid options, can't read unprotect and read/write at the same time\n"); - return 1; - } - break; - - case 'o': - eraseOnly = 1; - if (rd || wr) { - fprintf(stderr, "ERROR: Invalid options, can't erase-only and read/write at the same time\n"); - return 1; - } - break; - - case 'v': - verify = 1; - break; - - case 'n': - retry = strtoul(optarg, NULL, 0); - break; - - case 'g': - exec_flag = 1; - execute = strtoul(optarg, NULL, 0); - if (execute % 4 != 0) { - fprintf(stderr, "ERROR: Execution address must be word-aligned\n"); - return 1; - } - break; - case 's': - if (readwrite_len || start_addr) { - fprintf(stderr, "ERROR: Invalid options, can't specify start page / num pages and start address/length\n"); - return 1; - } - spage = strtoul(optarg, NULL, 0); - break; - case 'S': - if (spage || npages) { - fprintf(stderr, "ERROR: Invalid options, can't specify start page / num pages and start address/length\n"); - return 1; - } else { - start_addr = strtoul(optarg, &pLen, 0); - if (*pLen == ':') { - pLen++; - readwrite_len = strtoul(pLen, NULL, 0); - if (readwrite_len == 0) { - fprintf(stderr, "ERROR: Invalid options, can't specify zero length\n"); - return 1; - } - } - } - break; - case 'F': - port_opts.rx_frame_max = strtoul(optarg, &pLen, 0); - if (*pLen == ':') { - pLen++; - port_opts.tx_frame_max = strtoul(pLen, NULL, 0); - } - if (port_opts.rx_frame_max < 0 - || port_opts.tx_frame_max < 0) { - fprintf(stderr, "ERROR: Invalid negative value for option -F\n"); - return 1; - } - if (port_opts.rx_frame_max == 0) - port_opts.rx_frame_max = STM32_MAX_RX_FRAME; - if (port_opts.tx_frame_max == 0) - port_opts.tx_frame_max = STM32_MAX_TX_FRAME; - if (port_opts.rx_frame_max < 20 - || port_opts.tx_frame_max < 5) { - fprintf(stderr, "ERROR: current code cannot work with small frames.\n"); - fprintf(stderr, "min(RX) = 20, min(TX) = 5\n"); - return 1; - } - if (port_opts.rx_frame_max > STM32_MAX_RX_FRAME) { - fprintf(stderr, "WARNING: Ignore RX length in option -F\n"); - port_opts.rx_frame_max = STM32_MAX_RX_FRAME; - } - if (port_opts.tx_frame_max > STM32_MAX_TX_FRAME) { - fprintf(stderr, "WARNING: Ignore TX length in option -F\n"); - port_opts.tx_frame_max = STM32_MAX_TX_FRAME; - } - break; - case 'f': - force_binary = 1; - break; - - case 'c': - init_flag = 0; - break; - - case 'h': - show_help(argv[0]); - exit(0); - - case 'i': - gpio_seq = optarg; - break; - - case 'R': - reset_flag = 1; - break; - - case 'C': - crc = 1; - break; - } - } - - for (c = optind; c < argc; ++c) { - if (port_opts.device) { - fprintf(stderr, "ERROR: Invalid parameter specified\n"); - show_help(argv[0]); - return 1; - } - port_opts.device = argv[c]; - } - - if (port_opts.device == NULL) { - fprintf(stderr, "ERROR: Device not specified\n"); - show_help(argv[0]); - return 1; - } - - if (!wr && verify) { - fprintf(stderr, "ERROR: Invalid usage, -v is only valid when writing\n"); - show_help(argv[0]); - return 1; - } - - return 0; -} - -void show_help(char *name) { - fprintf(stderr, - "Usage: %s [-bvngfhc] [-[rw] filename] [tty_device | i2c_device]\n" - " -a bus_address Bus address (e.g. for I2C port)\n" - " -b rate Baud rate (default 57600)\n" - " -m mode Serial port mode (default 8e1)\n" - " -r filename Read flash to file (or - stdout)\n" - " -w filename Write flash from file (or - stdout)\n" - " -C Compute CRC of flash content\n" - " -u Disable the flash write-protection\n" - " -j Enable the flash read-protection\n" - " -k Disable the flash read-protection\n" - " -o Erase only\n" - " -e n Only erase n pages before writing the flash\n" - " -v Verify writes\n" - " -n count Retry failed writes up to count times (default 10)\n" - " -g address Start execution at specified address (0 = flash start)\n" - " -S address[:length] Specify start address and optionally length for\n" - " read/write/erase operations\n" - " -F RX_length[:TX_length] Specify the max length of RX and TX frame\n" - " -s start_page Flash at specified page (0 = flash start)\n" - " -f Force binary parser\n" - " -h Show this help\n" - " -c Resume the connection (don't send initial INIT)\n" - " *Baud rate must be kept the same as the first init*\n" - " This is useful if the reset fails\n" - " -i GPIO_string GPIO sequence to enter/exit bootloader mode\n" - " GPIO_string=[entry_seq][:[exit_seq]]\n" - " sequence=[-]n[,sequence]\n" - " -R Reset device at exit.\n" - "\n" - "Examples:\n" - " Get device information:\n" - " %s /dev/ttyS0\n" - " or:\n" - " %s /dev/i2c-0\n" - "\n" - " Write with verify and then start execution:\n" - " %s -w filename -v -g 0x0 /dev/ttyS0\n" - "\n" - " Read flash to file:\n" - " %s -r filename /dev/ttyS0\n" - "\n" - " Read 100 bytes of flash from 0x1000 to stdout:\n" - " %s -r - -S 0x1000:100 /dev/ttyS0\n" - "\n" - " Start execution:\n" - " %s -g 0x0 /dev/ttyS0\n" - "\n" - " GPIO sequence:\n" - " - entry sequence: GPIO_3=low, GPIO_2=low, GPIO_2=high\n" - " - exit sequence: GPIO_3=high, GPIO_2=low, GPIO_2=high\n" - " %s -i -3,-2,2:3,-2,2 /dev/ttyS0\n", - name, - name, - name, - name, - name, - name, - name, - name - ); -} - diff --git a/linux64/src/stm32flash_serial/src/parsers/Android.mk b/linux64/src/stm32flash_serial/src/parsers/Android.mk deleted file mode 100644 index afec18cd5..000000000 --- a/linux64/src/stm32flash_serial/src/parsers/Android.mk +++ /dev/null @@ -1,6 +0,0 @@ -LOCAL_PATH := $(call my-dir) - -include $(CLEAR_VARS) -LOCAL_MODULE := libparsers -LOCAL_SRC_FILES := binary.c hex.c -include $(BUILD_STATIC_LIBRARY) diff --git a/linux64/src/stm32flash_serial/src/parsers/Makefile b/linux64/src/stm32flash_serial/src/parsers/Makefile deleted file mode 100644 index bb7df1e02..000000000 --- a/linux64/src/stm32flash_serial/src/parsers/Makefile +++ /dev/null @@ -1,12 +0,0 @@ - -CFLAGS += -Wall -g - -all: parsers.a - -parsers.a: binary.o hex.o - $(AR) rc $@ binary.o hex.o - -clean: - rm -f *.o parsers.a - -.PHONY: all clean diff --git a/linux64/src/stm32flash_serial/src/parsers/binary.c b/linux64/src/stm32flash_serial/src/parsers/binary.c deleted file mode 100644 index f491952bb..000000000 --- a/linux64/src/stm32flash_serial/src/parsers/binary.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#include -#include -#include -#include -#include - -#include "binary.h" - -typedef struct { - int fd; - char write; - struct stat stat; -} binary_t; - -void* binary_init() { - return calloc(sizeof(binary_t), 1); -} - -parser_err_t binary_open(void *storage, const char *filename, const char write) { - binary_t *st = storage; - if (write) { - if (filename[0] == '-') - st->fd = 1; - else - st->fd = open( - filename, -#ifndef __WIN32__ - O_WRONLY | O_CREAT | O_TRUNC, -#else - O_WRONLY | O_CREAT | O_TRUNC | O_BINARY, -#endif -#ifndef __WIN32__ - S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH -#else - 0 -#endif - ); - st->stat.st_size = 0; - } else { - if (filename[0] == '-') { - st->fd = 0; - } else { - if (stat(filename, &st->stat) != 0) - return PARSER_ERR_INVALID_FILE; - st->fd = open(filename, -#ifndef __WIN32__ - O_RDONLY -#else - O_RDONLY | O_BINARY -#endif - ); - } - } - - st->write = write; - return st->fd == -1 ? PARSER_ERR_SYSTEM : PARSER_ERR_OK; -} - -parser_err_t binary_close(void *storage) { - binary_t *st = storage; - - if (st->fd) close(st->fd); - free(st); - return PARSER_ERR_OK; -} - -unsigned int binary_size(void *storage) { - binary_t *st = storage; - return st->stat.st_size; -} - -parser_err_t binary_read(void *storage, void *data, unsigned int *len) { - binary_t *st = storage; - unsigned int left = *len; - if (st->write) return PARSER_ERR_WRONLY; - - ssize_t r; - while(left > 0) { - r = read(st->fd, data, left); - /* If there is no data to read at all, return OK, but with zero read */ - if (r == 0 && left == *len) { - *len = 0; - return PARSER_ERR_OK; - } - if (r <= 0) return PARSER_ERR_SYSTEM; - left -= r; - data += r; - } - - *len = *len - left; - return PARSER_ERR_OK; -} - -parser_err_t binary_write(void *storage, void *data, unsigned int len) { - binary_t *st = storage; - if (!st->write) return PARSER_ERR_RDONLY; - - ssize_t r; - while(len > 0) { - r = write(st->fd, data, len); - if (r < 1) return PARSER_ERR_SYSTEM; - st->stat.st_size += r; - - len -= r; - data += r; - } - - return PARSER_ERR_OK; -} - -parser_t PARSER_BINARY = { - "Raw BINARY", - binary_init, - binary_open, - binary_close, - binary_size, - binary_read, - binary_write -}; - diff --git a/linux64/src/stm32flash_serial/src/parsers/binary.h b/linux64/src/stm32flash_serial/src/parsers/binary.h deleted file mode 100644 index d989acfa0..000000000 --- a/linux64/src/stm32flash_serial/src/parsers/binary.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _PARSER_BINARY_H -#define _PARSER_BINARY_H - -#include "parser.h" - -extern parser_t PARSER_BINARY; -#endif diff --git a/linux64/src/stm32flash_serial/src/parsers/hex.c b/linux64/src/stm32flash_serial/src/parsers/hex.c deleted file mode 100644 index 3baf85623..000000000 --- a/linux64/src/stm32flash_serial/src/parsers/hex.c +++ /dev/null @@ -1,224 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#include -#include -#include -#include -#include -#include -#include - -#include "hex.h" -#include "../utils.h" - -typedef struct { - size_t data_len, offset; - uint8_t *data; - uint8_t base; -} hex_t; - -void* hex_init() { - return calloc(sizeof(hex_t), 1); -} - -parser_err_t hex_open(void *storage, const char *filename, const char write) { - hex_t *st = storage; - if (write) { - return PARSER_ERR_RDONLY; - } else { - char mark; - int i, fd; - uint8_t checksum; - unsigned int c; - uint32_t base = 0; - unsigned int last_address = 0x0; - - fd = open(filename, O_RDONLY); - if (fd < 0) - return PARSER_ERR_SYSTEM; - - /* read in the file */ - - while(read(fd, &mark, 1) != 0) { - if (mark == '\n' || mark == '\r') continue; - if (mark != ':') - return PARSER_ERR_INVALID_FILE; - - char buffer[9]; - unsigned int reclen, address, type; - uint8_t *record = NULL; - - /* get the reclen, address, and type */ - buffer[8] = 0; - if (read(fd, &buffer, 8) != 8) return PARSER_ERR_INVALID_FILE; - if (sscanf(buffer, "%2x%4x%2x", &reclen, &address, &type) != 3) { - close(fd); - return PARSER_ERR_INVALID_FILE; - } - - /* setup the checksum */ - checksum = - reclen + - ((address & 0xFF00) >> 8) + - ((address & 0x00FF) >> 0) + - type; - - switch(type) { - /* data record */ - case 0: - c = address - last_address; - st->data = realloc(st->data, st->data_len + c + reclen); - - /* if there is a gap, set it to 0xff and increment the length */ - if (c > 0) { - memset(&st->data[st->data_len], 0xff, c); - st->data_len += c; - } - - last_address = address + reclen; - record = &st->data[st->data_len]; - st->data_len += reclen; - break; - - /* extended segment address record */ - case 2: - base = 0; - break; - - /* extended linear address record */ - case 4: - base = address; - break; - } - - buffer[2] = 0; - for(i = 0; i < reclen; ++i) { - if (read(fd, &buffer, 2) != 2 || sscanf(buffer, "%2x", &c) != 1) { - close(fd); - return PARSER_ERR_INVALID_FILE; - } - - /* add the byte to the checksum */ - checksum += c; - - switch(type) { - case 0: - if (record != NULL) { - record[i] = c; - } else { - return PARSER_ERR_INVALID_FILE; - } - break; - - case 2: - case 4: - base = (base << 8) | c; - break; - } - } - - /* read, scan, and verify the checksum */ - if ( - read(fd, &buffer, 2 ) != 2 || - sscanf(buffer, "%2x", &c) != 1 || - (uint8_t)(checksum + c) != 0x00 - ) { - close(fd); - return PARSER_ERR_INVALID_FILE; - } - - switch(type) { - /* EOF */ - case 1: - close(fd); - return PARSER_ERR_OK; - - /* address record */ - case 2: base = base << 4; - case 4: base = be_u32(base); - /* Reset last_address since our base changed */ - last_address = 0; - - if (st->base == 0) { - st->base = base; - break; - } - - /* we cant cope with files out of order */ - if (base < st->base) { - close(fd); - return PARSER_ERR_INVALID_FILE; - } - - /* if there is a gap, enlarge and fill with zeros */ - unsigned int len = base - st->base; - if (len > st->data_len) { - st->data = realloc(st->data, len); - memset(&st->data[st->data_len], 0, len - st->data_len); - st->data_len = len; - } - break; - } - } - - close(fd); - return PARSER_ERR_OK; - } -} - -parser_err_t hex_close(void *storage) { - hex_t *st = storage; - if (st) free(st->data); - free(st); - return PARSER_ERR_OK; -} - -unsigned int hex_size(void *storage) { - hex_t *st = storage; - return st->data_len; -} - -parser_err_t hex_read(void *storage, void *data, unsigned int *len) { - hex_t *st = storage; - unsigned int left = st->data_len - st->offset; - unsigned int get = left > *len ? *len : left; - - memcpy(data, &st->data[st->offset], get); - st->offset += get; - - *len = get; - return PARSER_ERR_OK; -} - -parser_err_t hex_write(void *storage, void *data, unsigned int len) { - return PARSER_ERR_RDONLY; -} - -parser_t PARSER_HEX = { - "Intel HEX", - hex_init, - hex_open, - hex_close, - hex_size, - hex_read, - hex_write -}; - diff --git a/linux64/src/stm32flash_serial/src/parsers/hex.h b/linux64/src/stm32flash_serial/src/parsers/hex.h deleted file mode 100644 index 02413c9c9..000000000 --- a/linux64/src/stm32flash_serial/src/parsers/hex.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _PARSER_HEX_H -#define _PARSER_HEX_H - -#include "parser.h" - -extern parser_t PARSER_HEX; -#endif diff --git a/linux64/src/stm32flash_serial/src/parsers/parser.h b/linux64/src/stm32flash_serial/src/parsers/parser.h deleted file mode 100644 index c2fae3cf8..000000000 --- a/linux64/src/stm32flash_serial/src/parsers/parser.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _H_PARSER -#define _H_PARSER - -enum parser_err { - PARSER_ERR_OK, - PARSER_ERR_SYSTEM, - PARSER_ERR_INVALID_FILE, - PARSER_ERR_WRONLY, - PARSER_ERR_RDONLY -}; -typedef enum parser_err parser_err_t; - -struct parser { - const char *name; - void* (*init )(); /* initialise the parser */ - parser_err_t (*open )(void *storage, const char *filename, const char write); /* open the file for read|write */ - parser_err_t (*close)(void *storage); /* close and free the parser */ - unsigned int (*size )(void *storage); /* get the total data size */ - parser_err_t (*read )(void *storage, void *data, unsigned int *len); /* read a block of data */ - parser_err_t (*write)(void *storage, void *data, unsigned int len); /* write a block of data */ -}; -typedef struct parser parser_t; - -static inline const char* parser_errstr(parser_err_t err) { - switch(err) { - case PARSER_ERR_OK : return "OK"; - case PARSER_ERR_SYSTEM : return "System Error"; - case PARSER_ERR_INVALID_FILE: return "Invalid File"; - case PARSER_ERR_WRONLY : return "Parser can only write"; - case PARSER_ERR_RDONLY : return "Parser can only read"; - default: - return "Unknown Error"; - } -} - -#endif diff --git a/linux64/src/stm32flash_serial/src/port.c b/linux64/src/stm32flash_serial/src/port.c deleted file mode 100644 index 08e58cc34..000000000 --- a/linux64/src/stm32flash_serial/src/port.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2014 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include - -#include "serial.h" -#include "port.h" - - -extern struct port_interface port_serial; -extern struct port_interface port_i2c; - -static struct port_interface *ports[] = { - &port_serial, - &port_i2c, - NULL, -}; - - -port_err_t port_open(struct port_options *ops, struct port_interface **outport) -{ - int ret; - static struct port_interface **port; - - for (port = ports; *port; port++) { - ret = (*port)->open(*port, ops); - if (ret == PORT_ERR_NODEV) - continue; - if (ret == PORT_ERR_OK) - break; - fprintf(stderr, "Error probing interface \"%s\"\n", - (*port)->name); - } - if (*port == NULL) { - fprintf(stderr, "Cannot handle device \"%s\"\n", - ops->device); - return PORT_ERR_UNKNOWN; - } - - *outport = *port; - return PORT_ERR_OK; -} diff --git a/linux64/src/stm32flash_serial/src/port.h b/linux64/src/stm32flash_serial/src/port.h deleted file mode 100644 index 290f03496..000000000 --- a/linux64/src/stm32flash_serial/src/port.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2014 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _H_PORT -#define _H_PORT - -typedef enum { - PORT_ERR_OK = 0, - PORT_ERR_NODEV, /* No such device */ - PORT_ERR_TIMEDOUT, /* Operation timed out */ - PORT_ERR_UNKNOWN, -} port_err_t; - -/* flags */ -#define PORT_BYTE (1 << 0) /* byte (not frame) oriented */ -#define PORT_GVR_ETX (1 << 1) /* cmd GVR returns protection status */ -#define PORT_CMD_INIT (1 << 2) /* use INIT cmd to autodetect speed */ -#define PORT_RETRY (1 << 3) /* allowed read() retry after timeout */ -#define PORT_STRETCH_W (1 << 4) /* warning for no-stretching commands */ - -/* all options and flags used to open and configure an interface */ -struct port_options { - const char *device; - serial_baud_t baudRate; - const char *serial_mode; - int bus_addr; - int rx_frame_max; - int tx_frame_max; -}; - -/* - * Specify the length of reply for command GET - * This is helpful for frame-oriented protocols, e.g. i2c, to avoid time - * consuming try-fail-timeout-retry operation. - * On byte-oriented protocols, i.e. UART, this information would be skipped - * after read the first byte, so not needed. - */ -struct varlen_cmd { - uint8_t version; - uint8_t length; -}; - -struct port_interface { - const char *name; - unsigned flags; - port_err_t (*open)(struct port_interface *port, struct port_options *ops); - port_err_t (*close)(struct port_interface *port); - port_err_t (*read)(struct port_interface *port, void *buf, size_t nbyte); - port_err_t (*write)(struct port_interface *port, void *buf, size_t nbyte); - port_err_t (*gpio)(struct port_interface *port, serial_gpio_t n, int level); - const char *(*get_cfg_str)(struct port_interface *port); - struct varlen_cmd *cmd_get_reply; - void *private; -}; - -port_err_t port_open(struct port_options *ops, struct port_interface **outport); - -#endif diff --git a/linux64/src/stm32flash_serial/src/protocol.txt b/linux64/src/stm32flash_serial/src/protocol.txt deleted file mode 100644 index 039109908..000000000 --- a/linux64/src/stm32flash_serial/src/protocol.txt +++ /dev/null @@ -1,19 +0,0 @@ -The communication protocol used by ST bootloader is documented in following ST -application notes, depending on communication port. - -In current version of stm32flash are supported only UART and I2C ports. - -* AN3154: CAN protocol used in the STM32 bootloader - http://www.st.com/web/en/resource/technical/document/application_note/CD00264321.pdf - -* AN3155: USART protocol used in the STM32(TM) bootloader - http://www.st.com/web/en/resource/technical/document/application_note/CD00264342.pdf - -* AN4221: I2C protocol used in the STM32 bootloader - http://www.st.com/web/en/resource/technical/document/application_note/DM00072315.pdf - -* AN4286: SPI protocol used in the STM32 bootloader - http://www.st.com/web/en/resource/technical/document/application_note/DM00081379.pdf - -Boot mode selection for STM32 is documented in ST application note AN2606, available in ST website: - http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf diff --git a/linux64/src/stm32flash_serial/src/serial.h b/linux64/src/stm32flash_serial/src/serial.h deleted file mode 100644 index 227ba163b..000000000 --- a/linux64/src/stm32flash_serial/src/serial.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _SERIAL_H -#define _SERIAL_H - -typedef struct serial serial_t; - -typedef enum { - SERIAL_PARITY_NONE, - SERIAL_PARITY_EVEN, - SERIAL_PARITY_ODD, - - SERIAL_PARITY_INVALID -} serial_parity_t; - -typedef enum { - SERIAL_BITS_5, - SERIAL_BITS_6, - SERIAL_BITS_7, - SERIAL_BITS_8, - - SERIAL_BITS_INVALID -} serial_bits_t; - -typedef enum { - SERIAL_BAUD_1200, - SERIAL_BAUD_1800, - SERIAL_BAUD_2400, - SERIAL_BAUD_4800, - SERIAL_BAUD_9600, - SERIAL_BAUD_19200, - SERIAL_BAUD_38400, - SERIAL_BAUD_57600, - SERIAL_BAUD_115200, - SERIAL_BAUD_128000, - SERIAL_BAUD_230400, - SERIAL_BAUD_256000, - SERIAL_BAUD_460800, - SERIAL_BAUD_500000, - SERIAL_BAUD_576000, - SERIAL_BAUD_921600, - SERIAL_BAUD_1000000, - SERIAL_BAUD_1500000, - SERIAL_BAUD_2000000, - - SERIAL_BAUD_INVALID -} serial_baud_t; - -typedef enum { - SERIAL_STOPBIT_1, - SERIAL_STOPBIT_2, - - SERIAL_STOPBIT_INVALID -} serial_stopbit_t; - -typedef enum { - GPIO_RTS = 1, - GPIO_DTR, - GPIO_BRK, -} serial_gpio_t; - -/* common helper functions */ -serial_baud_t serial_get_baud(const unsigned int baud); -unsigned int serial_get_baud_int(const serial_baud_t baud); -serial_bits_t serial_get_bits(const char *mode); -unsigned int serial_get_bits_int(const serial_bits_t bits); -serial_parity_t serial_get_parity(const char *mode); -char serial_get_parity_str(const serial_parity_t parity); -serial_stopbit_t serial_get_stopbit(const char *mode); -unsigned int serial_get_stopbit_int(const serial_stopbit_t stopbit); - -#endif diff --git a/linux64/src/stm32flash_serial/src/serial_common.c b/linux64/src/stm32flash_serial/src/serial_common.c deleted file mode 100644 index 43e48e1ac..000000000 --- a/linux64/src/stm32flash_serial/src/serial_common.c +++ /dev/null @@ -1,154 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include "serial.h" - -serial_baud_t serial_get_baud(const unsigned int baud) { - switch(baud) { - case 1200: return SERIAL_BAUD_1200 ; - case 1800: return SERIAL_BAUD_1800 ; - case 2400: return SERIAL_BAUD_2400 ; - case 4800: return SERIAL_BAUD_4800 ; - case 9600: return SERIAL_BAUD_9600 ; - case 19200: return SERIAL_BAUD_19200 ; - case 38400: return SERIAL_BAUD_38400 ; - case 57600: return SERIAL_BAUD_57600 ; - case 115200: return SERIAL_BAUD_115200; - case 128000: return SERIAL_BAUD_128000; - case 230400: return SERIAL_BAUD_230400; - case 256000: return SERIAL_BAUD_256000; - case 460800: return SERIAL_BAUD_460800; - case 500000: return SERIAL_BAUD_500000; - case 576000: return SERIAL_BAUD_576000; - case 921600: return SERIAL_BAUD_921600; - case 1000000: return SERIAL_BAUD_1000000; - case 1500000: return SERIAL_BAUD_1500000; - case 2000000: return SERIAL_BAUD_2000000; - - default: - return SERIAL_BAUD_INVALID; - } -} - -unsigned int serial_get_baud_int(const serial_baud_t baud) { - switch(baud) { - case SERIAL_BAUD_1200 : return 1200 ; - case SERIAL_BAUD_1800 : return 1800 ; - case SERIAL_BAUD_2400 : return 2400 ; - case SERIAL_BAUD_4800 : return 4800 ; - case SERIAL_BAUD_9600 : return 9600 ; - case SERIAL_BAUD_19200 : return 19200 ; - case SERIAL_BAUD_38400 : return 38400 ; - case SERIAL_BAUD_57600 : return 57600 ; - case SERIAL_BAUD_115200: return 115200; - case SERIAL_BAUD_128000: return 128000; - case SERIAL_BAUD_230400: return 230400; - case SERIAL_BAUD_256000: return 256000; - case SERIAL_BAUD_460800: return 460800; - case SERIAL_BAUD_500000: return 500000; - case SERIAL_BAUD_576000: return 576000; - case SERIAL_BAUD_921600: return 921600; - case SERIAL_BAUD_1000000: return 1000000; - case SERIAL_BAUD_1500000: return 1500000; - case SERIAL_BAUD_2000000: return 2000000; - - case SERIAL_BAUD_INVALID: - default: - return 0; - } -} - -serial_bits_t serial_get_bits(const char *mode) { - if (!mode) - return SERIAL_BITS_INVALID; - switch(mode[0]) { - case '5': return SERIAL_BITS_5; - case '6': return SERIAL_BITS_6; - case '7': return SERIAL_BITS_7; - case '8': return SERIAL_BITS_8; - - default: - return SERIAL_BITS_INVALID; - } -} - -unsigned int serial_get_bits_int(const serial_bits_t bits) { - switch(bits) { - case SERIAL_BITS_5: return 5; - case SERIAL_BITS_6: return 6; - case SERIAL_BITS_7: return 7; - case SERIAL_BITS_8: return 8; - - default: - return 0; - } -} - -serial_parity_t serial_get_parity(const char *mode) { - if (!mode || !mode[0]) - return SERIAL_PARITY_INVALID; - switch(mode[1]) { - case 'N': - case 'n': - return SERIAL_PARITY_NONE; - case 'E': - case 'e': - return SERIAL_PARITY_EVEN; - case 'O': - case 'o': - return SERIAL_PARITY_ODD; - - default: - return SERIAL_PARITY_INVALID; - } -} - -char serial_get_parity_str(const serial_parity_t parity) { - switch(parity) { - case SERIAL_PARITY_NONE: return 'N'; - case SERIAL_PARITY_EVEN: return 'E'; - case SERIAL_PARITY_ODD : return 'O'; - - default: - return ' '; - } -} - -serial_stopbit_t serial_get_stopbit(const char *mode) { - if (!mode || !mode[0] || !mode[1]) - return SERIAL_STOPBIT_INVALID; - switch(mode[2]) { - case '1': return SERIAL_STOPBIT_1; - case '2': return SERIAL_STOPBIT_2; - - default: - return SERIAL_STOPBIT_INVALID; - } -} - -unsigned int serial_get_stopbit_int(const serial_stopbit_t stopbit) { - switch(stopbit) { - case SERIAL_STOPBIT_1: return 1; - case SERIAL_STOPBIT_2: return 2; - - default: - return 0; - } -} - diff --git a/linux64/src/stm32flash_serial/src/serial_platform.c b/linux64/src/stm32flash_serial/src/serial_platform.c deleted file mode 100644 index 98e256921..000000000 --- a/linux64/src/stm32flash_serial/src/serial_platform.c +++ /dev/null @@ -1,5 +0,0 @@ -#if defined(__WIN32__) || defined(__CYGWIN__) -# include "serial_w32.c" -#else -# include "serial_posix.c" -#endif diff --git a/linux64/src/stm32flash_serial/src/serial_posix.c b/linux64/src/stm32flash_serial/src/serial_posix.c deleted file mode 100644 index 284b35b20..000000000 --- a/linux64/src/stm32flash_serial/src/serial_posix.c +++ /dev/null @@ -1,395 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "serial.h" -#include "port.h" - -struct serial { - int fd; - struct termios oldtio; - struct termios newtio; - char setup_str[11]; -}; - -static serial_t *serial_open(const char *device) -{ - serial_t *h = calloc(sizeof(serial_t), 1); - - h->fd = open(device, O_RDWR | O_NOCTTY | O_NDELAY); - if (h->fd < 0) { - free(h); - return NULL; - } - fcntl(h->fd, F_SETFL, 0); - - tcgetattr(h->fd, &h->oldtio); - tcgetattr(h->fd, &h->newtio); - - return h; -} - -static void serial_flush(const serial_t *h) -{ - tcflush(h->fd, TCIFLUSH); -} - -static void serial_close(serial_t *h) -{ - serial_flush(h); - tcsetattr(h->fd, TCSANOW, &h->oldtio); - close(h->fd); - free(h); -} - -static port_err_t serial_setup(serial_t *h, const serial_baud_t baud, - const serial_bits_t bits, - const serial_parity_t parity, - const serial_stopbit_t stopbit) -{ - speed_t port_baud; - tcflag_t port_bits; - tcflag_t port_parity; - tcflag_t port_stop; - struct termios settings; - - switch (baud) { - case SERIAL_BAUD_1200: port_baud = B1200; break; - case SERIAL_BAUD_1800: port_baud = B1800; break; - case SERIAL_BAUD_2400: port_baud = B2400; break; - case SERIAL_BAUD_4800: port_baud = B4800; break; - case SERIAL_BAUD_9600: port_baud = B9600; break; - case SERIAL_BAUD_19200: port_baud = B19200; break; - case SERIAL_BAUD_38400: port_baud = B38400; break; - case SERIAL_BAUD_57600: port_baud = B57600; break; - case SERIAL_BAUD_115200: port_baud = B115200; break; - case SERIAL_BAUD_230400: port_baud = B230400; break; -#ifdef B460800 - case SERIAL_BAUD_460800: port_baud = B460800; break; -#endif /* B460800 */ -#ifdef B921600 - case SERIAL_BAUD_921600: port_baud = B921600; break; -#endif /* B921600 */ -#ifdef B500000 - case SERIAL_BAUD_500000: port_baud = B500000; break; -#endif /* B500000 */ -#ifdef B576000 - case SERIAL_BAUD_576000: port_baud = B576000; break; -#endif /* B576000 */ -#ifdef B1000000 - case SERIAL_BAUD_1000000: port_baud = B1000000; break; -#endif /* B1000000 */ -#ifdef B1500000 - case SERIAL_BAUD_1500000: port_baud = B1500000; break; -#endif /* B1500000 */ -#ifdef B2000000 - case SERIAL_BAUD_2000000: port_baud = B2000000; break; -#endif /* B2000000 */ - - case SERIAL_BAUD_INVALID: - default: - return PORT_ERR_UNKNOWN; - } - - switch (bits) { - case SERIAL_BITS_5: port_bits = CS5; break; - case SERIAL_BITS_6: port_bits = CS6; break; - case SERIAL_BITS_7: port_bits = CS7; break; - case SERIAL_BITS_8: port_bits = CS8; break; - - default: - return PORT_ERR_UNKNOWN; - } - - switch (parity) { - case SERIAL_PARITY_NONE: port_parity = 0; break; - case SERIAL_PARITY_EVEN: port_parity = PARENB; break; - case SERIAL_PARITY_ODD: port_parity = PARENB | PARODD; break; - - default: - return PORT_ERR_UNKNOWN; - } - - switch (stopbit) { - case SERIAL_STOPBIT_1: port_stop = 0; break; - case SERIAL_STOPBIT_2: port_stop = CSTOPB; break; - - default: - return PORT_ERR_UNKNOWN; - } - - /* reset the settings */ -#ifndef __sun /* Used by GNU and BSD. Ignore __SVR4 in test. */ - cfmakeraw(&h->newtio); -#else /* __sun */ - h->newtio.c_iflag &= ~(IGNBRK | BRKINT | PARMRK | ISTRIP | INLCR - | IGNCR | ICRNL | IXON); - if (port_parity) - h->newtio.c_iflag |= INPCK; - - h->newtio.c_oflag &= ~OPOST; - h->newtio.c_lflag &= ~(ECHO | ECHONL | ICANON | ISIG | IEXTEN); - h->newtio.c_cflag &= ~(CSIZE | PARENB); - h->newtio.c_cflag |= CS8; -#endif /* __sun */ -#ifdef __QNXNTO__ - h->newtio.c_cflag &= ~(CSIZE | IHFLOW | OHFLOW); -#else - h->newtio.c_cflag &= ~(CSIZE | CRTSCTS); -#endif - h->newtio.c_cflag &= ~(CSIZE | CRTSCTS); - h->newtio.c_iflag &= ~(IXON | IXOFF | IXANY | IGNPAR); - h->newtio.c_lflag &= ~(ECHOK | ECHOCTL | ECHOKE); - h->newtio.c_oflag &= ~(OPOST | ONLCR); - - /* setup the new settings */ - cfsetispeed(&h->newtio, port_baud); - cfsetospeed(&h->newtio, port_baud); - h->newtio.c_cflag |= - port_parity | - port_bits | - port_stop | - CLOCAL | - CREAD; - - h->newtio.c_cc[VMIN] = 0; - h->newtio.c_cc[VTIME] = 5; /* in units of 0.1 s */ - - /* set the settings */ - serial_flush(h); - if (tcsetattr(h->fd, TCSANOW, &h->newtio) != 0) - return PORT_ERR_UNKNOWN; - -/* this check fails on CDC-ACM devices, bits 16 and 17 of cflag differ! - * it has been disabled below for now -jcw, 2015-11-09 - if (settings.c_cflag != h->newtio.c_cflag) - fprintf(stderr, "c_cflag mismatch %lx\n", - settings.c_cflag ^ h->newtio.c_cflag); - */ - - /* confirm they were set */ - tcgetattr(h->fd, &settings); - if (settings.c_iflag != h->newtio.c_iflag || - settings.c_oflag != h->newtio.c_oflag || - //settings.c_cflag != h->newtio.c_cflag || - settings.c_lflag != h->newtio.c_lflag) - return PORT_ERR_UNKNOWN; - - snprintf(h->setup_str, sizeof(h->setup_str), "%u %d%c%d", - serial_get_baud_int(baud), - serial_get_bits_int(bits), - serial_get_parity_str(parity), - serial_get_stopbit_int(stopbit)); - return PORT_ERR_OK; -} - -/* - * Roger clark. - * This function is no longer used. But has just been commented out in case it needs - * to be reinstated in the future - -static int startswith(const char *haystack, const char *needle) { - return strncmp(haystack, needle, strlen(needle)) == 0; -} -*/ - -static int is_tty(const char *path) { - char resolved[PATH_MAX]; - - if(!realpath(path, resolved)) return 0; - - - /* - * Roger Clark - * Commented out this check, because on OSX some devices are /dev/cu - * and some users use symbolic links to devices, hence the name may not even start - * with /dev - - if(startswith(resolved, "/dev/tty")) return 1; - - return 0; - */ - - return 1; -} - -static port_err_t serial_posix_open(struct port_interface *port, - struct port_options *ops) -{ - serial_t *h; - - /* 1. check device name match */ - if (!is_tty(ops->device)) - return PORT_ERR_NODEV; - - /* 2. check options */ - if (ops->baudRate == SERIAL_BAUD_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_bits(ops->serial_mode) == SERIAL_BITS_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_parity(ops->serial_mode) == SERIAL_PARITY_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_stopbit(ops->serial_mode) == SERIAL_STOPBIT_INVALID) - return PORT_ERR_UNKNOWN; - - /* 3. open it */ - h = serial_open(ops->device); - if (h == NULL) - return PORT_ERR_UNKNOWN; - - /* 4. set options */ - if (serial_setup(h, ops->baudRate, - serial_get_bits(ops->serial_mode), - serial_get_parity(ops->serial_mode), - serial_get_stopbit(ops->serial_mode) - ) != PORT_ERR_OK) { - serial_close(h); - return PORT_ERR_UNKNOWN; - } - - port->private = h; - return PORT_ERR_OK; -} - -static port_err_t serial_posix_close(struct port_interface *port) -{ - serial_t *h; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - serial_close(h); - port->private = NULL; - return PORT_ERR_OK; -} - -static port_err_t serial_posix_read(struct port_interface *port, void *buf, - size_t nbyte) -{ - serial_t *h; - ssize_t r; - uint8_t *pos = (uint8_t *)buf; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - while (nbyte) { - r = read(h->fd, pos, nbyte); - if (r == 0) - return PORT_ERR_TIMEDOUT; - if (r < 0) - return PORT_ERR_UNKNOWN; - - nbyte -= r; - pos += r; - } - return PORT_ERR_OK; -} - -static port_err_t serial_posix_write(struct port_interface *port, void *buf, - size_t nbyte) -{ - serial_t *h; - ssize_t r; - const uint8_t *pos = (const uint8_t *)buf; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - while (nbyte) { - r = write(h->fd, pos, nbyte); - if (r < 1) - return PORT_ERR_UNKNOWN; - - nbyte -= r; - pos += r; - } - return PORT_ERR_OK; -} - -static port_err_t serial_posix_gpio(struct port_interface *port, - serial_gpio_t n, int level) -{ - serial_t *h; - int bit, lines; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - switch (n) { - case GPIO_RTS: - bit = TIOCM_RTS; - break; - - case GPIO_DTR: - bit = TIOCM_DTR; - break; - - case GPIO_BRK: - if (level == 0) - return PORT_ERR_OK; - if (tcsendbreak(h->fd, 1)) - return PORT_ERR_UNKNOWN; - return PORT_ERR_OK; - - default: - return PORT_ERR_UNKNOWN; - } - - /* handle RTS/DTR */ - if (ioctl(h->fd, TIOCMGET, &lines)) - return PORT_ERR_UNKNOWN; - lines = level ? lines | bit : lines & ~bit; - if (ioctl(h->fd, TIOCMSET, &lines)) - return PORT_ERR_UNKNOWN; - - return PORT_ERR_OK; -} - -static const char *serial_posix_get_cfg_str(struct port_interface *port) -{ - serial_t *h; - - h = (serial_t *)port->private; - return h ? h->setup_str : "INVALID"; -} - -struct port_interface port_serial = { - .name = "serial_posix", - .flags = PORT_BYTE | PORT_GVR_ETX | PORT_CMD_INIT | PORT_RETRY, - .open = serial_posix_open, - .close = serial_posix_close, - .read = serial_posix_read, - .write = serial_posix_write, - .gpio = serial_posix_gpio, - .get_cfg_str = serial_posix_get_cfg_str, -}; diff --git a/linux64/src/stm32flash_serial/src/serial_w32.c b/linux64/src/stm32flash_serial/src/serial_w32.c deleted file mode 100644 index 56772c0a0..000000000 --- a/linux64/src/stm32flash_serial/src/serial_w32.c +++ /dev/null @@ -1,341 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - Copyright (C) 2010 Gareth McMullin - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "serial.h" -#include "port.h" - -struct serial { - HANDLE fd; - DCB oldtio; - DCB newtio; - char setup_str[11]; -}; - -static serial_t *serial_open(const char *device) -{ - serial_t *h = calloc(sizeof(serial_t), 1); - char *devName; - - /* timeout in ms */ - COMMTIMEOUTS timeouts = {MAXDWORD, MAXDWORD, 500, 0, 0}; - - /* Fix the device name if required */ - if (strlen(device) > 4 && device[0] != '\\') { - devName = calloc(1, strlen(device) + 5); - sprintf(devName, "\\\\.\\%s", device); - } else { - devName = (char *)device; - } - - /* Create file handle for port */ - h->fd = CreateFile(devName, GENERIC_READ | GENERIC_WRITE, - 0, /* Exclusive access */ - NULL, /* No security */ - OPEN_EXISTING, - 0, /* No overlap */ - NULL); - - if (devName != device) - free(devName); - - if (h->fd == INVALID_HANDLE_VALUE) { - if (GetLastError() == ERROR_FILE_NOT_FOUND) - fprintf(stderr, "File not found: %s\n", device); - return NULL; - } - - SetupComm(h->fd, 4096, 4096); /* Set input and output buffer size */ - - SetCommTimeouts(h->fd, &timeouts); - - SetCommMask(h->fd, EV_ERR); /* Notify us of error events */ - - GetCommState(h->fd, &h->oldtio); /* Retrieve port parameters */ - GetCommState(h->fd, &h->newtio); /* Retrieve port parameters */ - - /* PurgeComm(h->fd, PURGE_RXABORT | PURGE_TXCLEAR | PURGE_TXABORT | PURGE_TXCLEAR); */ - - return h; -} - -static void serial_flush(const serial_t *h) -{ - /* We shouldn't need to flush in non-overlapping (blocking) mode */ - /* tcflush(h->fd, TCIFLUSH); */ -} - -static void serial_close(serial_t *h) -{ - serial_flush(h); - SetCommState(h->fd, &h->oldtio); - CloseHandle(h->fd); - free(h); -} - -static port_err_t serial_setup(serial_t *h, - const serial_baud_t baud, - const serial_bits_t bits, - const serial_parity_t parity, - const serial_stopbit_t stopbit) -{ - switch (baud) { - case SERIAL_BAUD_1200: h->newtio.BaudRate = CBR_1200; break; - /* case SERIAL_BAUD_1800: h->newtio.BaudRate = CBR_1800; break; */ - case SERIAL_BAUD_2400: h->newtio.BaudRate = CBR_2400; break; - case SERIAL_BAUD_4800: h->newtio.BaudRate = CBR_4800; break; - case SERIAL_BAUD_9600: h->newtio.BaudRate = CBR_9600; break; - case SERIAL_BAUD_19200: h->newtio.BaudRate = CBR_19200; break; - case SERIAL_BAUD_38400: h->newtio.BaudRate = CBR_38400; break; - case SERIAL_BAUD_57600: h->newtio.BaudRate = CBR_57600; break; - case SERIAL_BAUD_115200: h->newtio.BaudRate = CBR_115200; break; - case SERIAL_BAUD_128000: h->newtio.BaudRate = CBR_128000; break; - case SERIAL_BAUD_256000: h->newtio.BaudRate = CBR_256000; break; - /* These are not defined in WinBase.h and might work or not */ - case SERIAL_BAUD_230400: h->newtio.BaudRate = 230400; break; - case SERIAL_BAUD_460800: h->newtio.BaudRate = 460800; break; - case SERIAL_BAUD_500000: h->newtio.BaudRate = 500000; break; - case SERIAL_BAUD_576000: h->newtio.BaudRate = 576000; break; - case SERIAL_BAUD_921600: h->newtio.BaudRate = 921600; break; - case SERIAL_BAUD_1000000: h->newtio.BaudRate = 1000000; break; - case SERIAL_BAUD_1500000: h->newtio.BaudRate = 1500000; break; - case SERIAL_BAUD_2000000: h->newtio.BaudRate = 2000000; break; - case SERIAL_BAUD_INVALID: - - default: - return PORT_ERR_UNKNOWN; - } - - switch (bits) { - case SERIAL_BITS_5: h->newtio.ByteSize = 5; break; - case SERIAL_BITS_6: h->newtio.ByteSize = 6; break; - case SERIAL_BITS_7: h->newtio.ByteSize = 7; break; - case SERIAL_BITS_8: h->newtio.ByteSize = 8; break; - - default: - return PORT_ERR_UNKNOWN; - } - - switch (parity) { - case SERIAL_PARITY_NONE: h->newtio.Parity = NOPARITY; break; - case SERIAL_PARITY_EVEN: h->newtio.Parity = EVENPARITY; break; - case SERIAL_PARITY_ODD: h->newtio.Parity = ODDPARITY; break; - - default: - return PORT_ERR_UNKNOWN; - } - - switch (stopbit) { - case SERIAL_STOPBIT_1: h->newtio.StopBits = ONESTOPBIT; break; - case SERIAL_STOPBIT_2: h->newtio.StopBits = TWOSTOPBITS; break; - - default: - return PORT_ERR_UNKNOWN; - } - - /* reset the settings */ - h->newtio.fOutxCtsFlow = FALSE; - h->newtio.fOutxDsrFlow = FALSE; - h->newtio.fOutX = FALSE; - h->newtio.fInX = FALSE; - h->newtio.fNull = 0; - h->newtio.fAbortOnError = 0; - - /* set the settings */ - serial_flush(h); - if (!SetCommState(h->fd, &h->newtio)) - return PORT_ERR_UNKNOWN; - - snprintf(h->setup_str, sizeof(h->setup_str), "%u %d%c%d", - serial_get_baud_int(baud), - serial_get_bits_int(bits), - serial_get_parity_str(parity), - serial_get_stopbit_int(stopbit) - ); - return PORT_ERR_OK; -} - -static port_err_t serial_w32_open(struct port_interface *port, - struct port_options *ops) -{ - serial_t *h; - - /* 1. check device name match */ - if (!((strlen(ops->device) == 4 || strlen(ops->device) == 5) - && !strncmp(ops->device, "COM", 3) && isdigit(ops->device[3])) - && !(!strncmp(ops->device, "\\\\.\\COM", strlen("\\\\.\\COM")) - && isdigit(ops->device[strlen("\\\\.\\COM")]))) - return PORT_ERR_NODEV; - - /* 2. check options */ - if (ops->baudRate == SERIAL_BAUD_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_bits(ops->serial_mode) == SERIAL_BITS_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_parity(ops->serial_mode) == SERIAL_PARITY_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_stopbit(ops->serial_mode) == SERIAL_STOPBIT_INVALID) - return PORT_ERR_UNKNOWN; - - /* 3. open it */ - h = serial_open(ops->device); - if (h == NULL) - return PORT_ERR_UNKNOWN; - - /* 4. set options */ - if (serial_setup(h, ops->baudRate, - serial_get_bits(ops->serial_mode), - serial_get_parity(ops->serial_mode), - serial_get_stopbit(ops->serial_mode) - ) != PORT_ERR_OK) { - serial_close(h); - return PORT_ERR_UNKNOWN; - } - - port->private = h; - return PORT_ERR_OK; -} - -static port_err_t serial_w32_close(struct port_interface *port) -{ - serial_t *h; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - serial_close(h); - port->private = NULL; - return PORT_ERR_OK; -} - -static port_err_t serial_w32_read(struct port_interface *port, void *buf, - size_t nbyte) -{ - serial_t *h; - DWORD r; - uint8_t *pos = (uint8_t *)buf; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - while (nbyte) { - ReadFile(h->fd, pos, nbyte, &r, NULL); - if (r == 0) - return PORT_ERR_TIMEDOUT; - if (r < 0) - return PORT_ERR_UNKNOWN; - - nbyte -= r; - pos += r; - } - return PORT_ERR_OK; -} - -static port_err_t serial_w32_write(struct port_interface *port, void *buf, - size_t nbyte) -{ - serial_t *h; - DWORD r; - uint8_t *pos = (uint8_t *)buf; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - while (nbyte) { - if (!WriteFile(h->fd, pos, nbyte, &r, NULL)) - return PORT_ERR_UNKNOWN; - if (r < 1) - return PORT_ERR_UNKNOWN; - - nbyte -= r; - pos += r; - } - return PORT_ERR_OK; -} - -static port_err_t serial_w32_gpio(struct port_interface *port, - serial_gpio_t n, int level) -{ - serial_t *h; - int bit; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - switch (n) { - case GPIO_RTS: - bit = level ? SETRTS : CLRRTS; - break; - - case GPIO_DTR: - bit = level ? SETDTR : CLRDTR; - break; - - case GPIO_BRK: - if (level == 0) - return PORT_ERR_OK; - if (EscapeCommFunction(h->fd, SETBREAK) == 0) - return PORT_ERR_UNKNOWN; - usleep(500000); - if (EscapeCommFunction(h->fd, CLRBREAK) == 0) - return PORT_ERR_UNKNOWN; - return PORT_ERR_OK; - - default: - return PORT_ERR_UNKNOWN; - } - - /* handle RTS/DTR */ - if (EscapeCommFunction(h->fd, bit) == 0) - return PORT_ERR_UNKNOWN; - - return PORT_ERR_OK; -} - -static const char *serial_w32_get_cfg_str(struct port_interface *port) -{ - serial_t *h; - - h = (serial_t *)port->private; - return h ? h->setup_str : "INVALID"; -} - -struct port_interface port_serial = { - .name = "serial_w32", - .flags = PORT_BYTE | PORT_GVR_ETX | PORT_CMD_INIT | PORT_RETRY, - .open = serial_w32_open, - .close = serial_w32_close, - .read = serial_w32_read, - .write = serial_w32_write, - .gpio = serial_w32_gpio, - .get_cfg_str = serial_w32_get_cfg_str, -}; diff --git a/linux64/src/stm32flash_serial/src/stm32.c b/linux64/src/stm32flash_serial/src/stm32.c deleted file mode 100644 index 74047d244..000000000 --- a/linux64/src/stm32flash_serial/src/stm32.c +++ /dev/null @@ -1,1048 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright 2010 Geoffrey McRae - Copyright 2012-2014 Tormod Volden - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include -#include -#include -#include -#include - -#include "stm32.h" -#include "port.h" -#include "utils.h" - -#define STM32_ACK 0x79 -#define STM32_NACK 0x1F -#define STM32_BUSY 0x76 - -#define STM32_CMD_INIT 0x7F -#define STM32_CMD_GET 0x00 /* get the version and command supported */ -#define STM32_CMD_GVR 0x01 /* get version and read protection status */ -#define STM32_CMD_GID 0x02 /* get ID */ -#define STM32_CMD_RM 0x11 /* read memory */ -#define STM32_CMD_GO 0x21 /* go */ -#define STM32_CMD_WM 0x31 /* write memory */ -#define STM32_CMD_WM_NS 0x32 /* no-stretch write memory */ -#define STM32_CMD_ER 0x43 /* erase */ -#define STM32_CMD_EE 0x44 /* extended erase */ -#define STM32_CMD_EE_NS 0x45 /* extended erase no-stretch */ -#define STM32_CMD_WP 0x63 /* write protect */ -#define STM32_CMD_WP_NS 0x64 /* write protect no-stretch */ -#define STM32_CMD_UW 0x73 /* write unprotect */ -#define STM32_CMD_UW_NS 0x74 /* write unprotect no-stretch */ -#define STM32_CMD_RP 0x82 /* readout protect */ -#define STM32_CMD_RP_NS 0x83 /* readout protect no-stretch */ -#define STM32_CMD_UR 0x92 /* readout unprotect */ -#define STM32_CMD_UR_NS 0x93 /* readout unprotect no-stretch */ -#define STM32_CMD_CRC 0xA1 /* compute CRC */ -#define STM32_CMD_ERR 0xFF /* not a valid command */ - -#define STM32_RESYNC_TIMEOUT 35 /* seconds */ -#define STM32_MASSERASE_TIMEOUT 35 /* seconds */ -#define STM32_SECTERASE_TIMEOUT 5 /* seconds */ -#define STM32_BLKWRITE_TIMEOUT 1 /* seconds */ -#define STM32_WUNPROT_TIMEOUT 1 /* seconds */ -#define STM32_WPROT_TIMEOUT 1 /* seconds */ -#define STM32_RPROT_TIMEOUT 1 /* seconds */ - -#define STM32_CMD_GET_LENGTH 17 /* bytes in the reply */ - -struct stm32_cmd { - uint8_t get; - uint8_t gvr; - uint8_t gid; - uint8_t rm; - uint8_t go; - uint8_t wm; - uint8_t er; /* this may be extended erase */ - uint8_t wp; - uint8_t uw; - uint8_t rp; - uint8_t ur; - uint8_t crc; -}; - -/* Reset code for ARMv7-M (Cortex-M3) and ARMv6-M (Cortex-M0) - * see ARMv7-M or ARMv6-M Architecture Reference Manual (table B3-8) - * or "The definitive guide to the ARM Cortex-M3", section 14.4. - */ -static const uint8_t stm_reset_code[] = { - 0x01, 0x49, // ldr r1, [pc, #4] ; () - 0x02, 0x4A, // ldr r2, [pc, #8] ; () - 0x0A, 0x60, // str r2, [r1, #0] - 0xfe, 0xe7, // endless: b endless - 0x0c, 0xed, 0x00, 0xe0, // .word 0xe000ed0c = NVIC AIRCR register address - 0x04, 0x00, 0xfa, 0x05 // .word 0x05fa0004 = VECTKEY | SYSRESETREQ -}; - -static const uint32_t stm_reset_code_length = sizeof(stm_reset_code); - -extern const stm32_dev_t devices[]; - -static void stm32_warn_stretching(const char *f) -{ - fprintf(stderr, "Attention !!!\n"); - fprintf(stderr, "\tThis %s error could be caused by your I2C\n", f); - fprintf(stderr, "\tcontroller not accepting \"clock stretching\"\n"); - fprintf(stderr, "\tas required by bootloader.\n"); - fprintf(stderr, "\tCheck \"I2C.txt\" in stm32flash source code.\n"); -} - -static stm32_err_t stm32_get_ack_timeout(const stm32_t *stm, time_t timeout) -{ - struct port_interface *port = stm->port; - uint8_t byte; - port_err_t p_err; - time_t t0, t1; - - if (!(port->flags & PORT_RETRY)) - timeout = 0; - - if (timeout) - time(&t0); - - do { - p_err = port->read(port, &byte, 1); - if (p_err == PORT_ERR_TIMEDOUT && timeout) { - time(&t1); - if (t1 < t0 + timeout) - continue; - } - - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Failed to read ACK byte\n"); - return STM32_ERR_UNKNOWN; - } - - if (byte == STM32_ACK) - return STM32_ERR_OK; - if (byte == STM32_NACK) - return STM32_ERR_NACK; - if (byte != STM32_BUSY) { - fprintf(stderr, "Got byte 0x%02x instead of ACK\n", - byte); - return STM32_ERR_UNKNOWN; - } - } while (1); -} - -static stm32_err_t stm32_get_ack(const stm32_t *stm) -{ - return stm32_get_ack_timeout(stm, 0); -} - -static stm32_err_t stm32_send_command_timeout(const stm32_t *stm, - const uint8_t cmd, - time_t timeout) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - port_err_t p_err; - uint8_t buf[2]; - - buf[0] = cmd; - buf[1] = cmd ^ 0xFF; - p_err = port->write(port, buf, 2); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Failed to send command\n"); - return STM32_ERR_UNKNOWN; - } - s_err = stm32_get_ack_timeout(stm, timeout); - if (s_err == STM32_ERR_OK) - return STM32_ERR_OK; - if (s_err == STM32_ERR_NACK) - fprintf(stderr, "Got NACK from device on command 0x%02x\n", cmd); - else - fprintf(stderr, "Unexpected reply from device on command 0x%02x\n", cmd); - return STM32_ERR_UNKNOWN; -} - -static stm32_err_t stm32_send_command(const stm32_t *stm, const uint8_t cmd) -{ - return stm32_send_command_timeout(stm, cmd, 0); -} - -/* if we have lost sync, send a wrong command and expect a NACK */ -static stm32_err_t stm32_resync(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - port_err_t p_err; - uint8_t buf[2], ack; - time_t t0, t1; - - time(&t0); - t1 = t0; - - buf[0] = STM32_CMD_ERR; - buf[1] = STM32_CMD_ERR ^ 0xFF; - while (t1 < t0 + STM32_RESYNC_TIMEOUT) { - p_err = port->write(port, buf, 2); - if (p_err != PORT_ERR_OK) { - usleep(500000); - time(&t1); - continue; - } - p_err = port->read(port, &ack, 1); - if (p_err != PORT_ERR_OK) { - time(&t1); - continue; - } - if (ack == STM32_NACK) - return STM32_ERR_OK; - time(&t1); - } - return STM32_ERR_UNKNOWN; -} - -/* - * some command receive reply frame with variable length, and length is - * embedded in reply frame itself. - * We can guess the length, but if we guess wrong the protocol gets out - * of sync. - * Use resync for frame oriented interfaces (e.g. I2C) and byte-by-byte - * read for byte oriented interfaces (e.g. UART). - * - * to run safely, data buffer should be allocated for 256+1 bytes - * - * len is value of the first byte in the frame. - */ -static stm32_err_t stm32_guess_len_cmd(const stm32_t *stm, uint8_t cmd, - uint8_t *data, unsigned int len) -{ - struct port_interface *port = stm->port; - port_err_t p_err; - - if (stm32_send_command(stm, cmd) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - if (port->flags & PORT_BYTE) { - /* interface is UART-like */ - p_err = port->read(port, data, 1); - if (p_err != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - len = data[0]; - p_err = port->read(port, data + 1, len + 1); - if (p_err != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - return STM32_ERR_OK; - } - - p_err = port->read(port, data, len + 2); - if (p_err == PORT_ERR_OK && len == data[0]) - return STM32_ERR_OK; - if (p_err != PORT_ERR_OK) { - /* restart with only one byte */ - if (stm32_resync(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - if (stm32_send_command(stm, cmd) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - p_err = port->read(port, data, 1); - if (p_err != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - } - - fprintf(stderr, "Re sync (len = %d)\n", data[0]); - if (stm32_resync(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - len = data[0]; - if (stm32_send_command(stm, cmd) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - p_err = port->read(port, data, len + 2); - if (p_err != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - return STM32_ERR_OK; -} - -/* - * Some interface, e.g. UART, requires a specific init sequence to let STM32 - * autodetect the interface speed. - * The sequence is only required one time after reset. - * stm32flash has command line flag "-c" to prevent sending the init sequence - * in case it was already sent before. - * User can easily forget adding "-c". In this case the bootloader would - * interpret the init sequence as part of a command message, then waiting for - * the rest of the message blocking the interface. - * This function sends the init sequence and, in case of timeout, recovers - * the interface. - */ -static stm32_err_t stm32_send_init_seq(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - port_err_t p_err; - uint8_t byte, cmd = STM32_CMD_INIT; - - p_err = port->write(port, &cmd, 1); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Failed to send init to device\n"); - return STM32_ERR_UNKNOWN; - } - p_err = port->read(port, &byte, 1); - if (p_err == PORT_ERR_OK && byte == STM32_ACK) - return STM32_ERR_OK; - if (p_err == PORT_ERR_OK && byte == STM32_NACK) { - /* We could get error later, but let's continue, for now. */ - fprintf(stderr, - "Warning: the interface was not closed properly.\n"); - return STM32_ERR_OK; - } - if (p_err != PORT_ERR_TIMEDOUT) { - fprintf(stderr, "Failed to init device.\n"); - return STM32_ERR_UNKNOWN; - } - - /* - * Check if previous STM32_CMD_INIT was taken as first byte - * of a command. Send a new byte, we should get back a NACK. - */ - p_err = port->write(port, &cmd, 1); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Failed to send init to device\n"); - return STM32_ERR_UNKNOWN; - } - p_err = port->read(port, &byte, 1); - if (p_err == PORT_ERR_OK && byte == STM32_NACK) - return STM32_ERR_OK; - fprintf(stderr, "Failed to init device.\n"); - return STM32_ERR_UNKNOWN; -} - -/* find newer command by higher code */ -#define newer(prev, a) (((prev) == STM32_CMD_ERR) \ - ? (a) \ - : (((prev) > (a)) ? (prev) : (a))) - -stm32_t *stm32_init(struct port_interface *port, const char init) -{ - uint8_t len, val, buf[257]; - stm32_t *stm; - int i, new_cmds; - - stm = calloc(sizeof(stm32_t), 1); - stm->cmd = malloc(sizeof(stm32_cmd_t)); - memset(stm->cmd, STM32_CMD_ERR, sizeof(stm32_cmd_t)); - stm->port = port; - - if ((port->flags & PORT_CMD_INIT) && init) - if (stm32_send_init_seq(stm) != STM32_ERR_OK) - return NULL; - - /* get the version and read protection status */ - if (stm32_send_command(stm, STM32_CMD_GVR) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - - /* From AN, only UART bootloader returns 3 bytes */ - len = (port->flags & PORT_GVR_ETX) ? 3 : 1; - if (port->read(port, buf, len) != PORT_ERR_OK) - return NULL; - stm->version = buf[0]; - stm->option1 = (port->flags & PORT_GVR_ETX) ? buf[1] : 0; - stm->option2 = (port->flags & PORT_GVR_ETX) ? buf[2] : 0; - if (stm32_get_ack(stm) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - - /* get the bootloader information */ - len = STM32_CMD_GET_LENGTH; - if (port->cmd_get_reply) - for (i = 0; port->cmd_get_reply[i].length; i++) - if (stm->version == port->cmd_get_reply[i].version) { - len = port->cmd_get_reply[i].length; - break; - } - if (stm32_guess_len_cmd(stm, STM32_CMD_GET, buf, len) != STM32_ERR_OK) - return NULL; - len = buf[0] + 1; - stm->bl_version = buf[1]; - new_cmds = 0; - for (i = 1; i < len; i++) { - val = buf[i + 1]; - switch (val) { - case STM32_CMD_GET: - stm->cmd->get = val; break; - case STM32_CMD_GVR: - stm->cmd->gvr = val; break; - case STM32_CMD_GID: - stm->cmd->gid = val; break; - case STM32_CMD_RM: - stm->cmd->rm = val; break; - case STM32_CMD_GO: - stm->cmd->go = val; break; - case STM32_CMD_WM: - case STM32_CMD_WM_NS: - stm->cmd->wm = newer(stm->cmd->wm, val); - break; - case STM32_CMD_ER: - case STM32_CMD_EE: - case STM32_CMD_EE_NS: - stm->cmd->er = newer(stm->cmd->er, val); - break; - case STM32_CMD_WP: - case STM32_CMD_WP_NS: - stm->cmd->wp = newer(stm->cmd->wp, val); - break; - case STM32_CMD_UW: - case STM32_CMD_UW_NS: - stm->cmd->uw = newer(stm->cmd->uw, val); - break; - case STM32_CMD_RP: - case STM32_CMD_RP_NS: - stm->cmd->rp = newer(stm->cmd->rp, val); - break; - case STM32_CMD_UR: - case STM32_CMD_UR_NS: - stm->cmd->ur = newer(stm->cmd->ur, val); - break; - case STM32_CMD_CRC: - stm->cmd->crc = newer(stm->cmd->crc, val); - break; - default: - if (new_cmds++ == 0) - fprintf(stderr, - "GET returns unknown commands (0x%2x", - val); - else - fprintf(stderr, ", 0x%2x", val); - } - } - if (new_cmds) - fprintf(stderr, ")\n"); - if (stm32_get_ack(stm) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - - if (stm->cmd->get == STM32_CMD_ERR - || stm->cmd->gvr == STM32_CMD_ERR - || stm->cmd->gid == STM32_CMD_ERR) { - fprintf(stderr, "Error: bootloader did not returned correct information from GET command\n"); - return NULL; - } - - /* get the device ID */ - if (stm32_guess_len_cmd(stm, stm->cmd->gid, buf, 1) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - len = buf[0] + 1; - if (len < 2) { - stm32_close(stm); - fprintf(stderr, "Only %d bytes sent in the PID, unknown/unsupported device\n", len); - return NULL; - } - stm->pid = (buf[1] << 8) | buf[2]; - if (len > 2) { - fprintf(stderr, "This bootloader returns %d extra bytes in PID:", len); - for (i = 2; i <= len ; i++) - fprintf(stderr, " %02x", buf[i]); - fprintf(stderr, "\n"); - } - if (stm32_get_ack(stm) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - - stm->dev = devices; - while (stm->dev->id != 0x00 && stm->dev->id != stm->pid) - ++stm->dev; - - if (!stm->dev->id) { - fprintf(stderr, "Unknown/unsupported device (Device ID: 0x%03x)\n", stm->pid); - stm32_close(stm); - return NULL; - } - - return stm; -} - -void stm32_close(stm32_t *stm) -{ - if (stm) - free(stm->cmd); - free(stm); -} - -stm32_err_t stm32_read_memory(const stm32_t *stm, uint32_t address, - uint8_t data[], unsigned int len) -{ - struct port_interface *port = stm->port; - uint8_t buf[5]; - - if (!len) - return STM32_ERR_OK; - - if (len > 256) { - fprintf(stderr, "Error: READ length limit at 256 bytes\n"); - return STM32_ERR_UNKNOWN; - } - - if (stm->cmd->rm == STM32_CMD_ERR) { - fprintf(stderr, "Error: READ command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->rm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = address >> 24; - buf[1] = (address >> 16) & 0xFF; - buf[2] = (address >> 8) & 0xFF; - buf[3] = address & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_send_command(stm, len - 1) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (port->read(port, data, len) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - return STM32_ERR_OK; -} - -stm32_err_t stm32_write_memory(const stm32_t *stm, uint32_t address, - const uint8_t data[], unsigned int len) -{ - struct port_interface *port = stm->port; - uint8_t cs, buf[256 + 2]; - unsigned int i, aligned_len; - stm32_err_t s_err; - - if (!len) - return STM32_ERR_OK; - - if (len > 256) { - fprintf(stderr, "Error: READ length limit at 256 bytes\n"); - return STM32_ERR_UNKNOWN; - } - - /* must be 32bit aligned */ - if (address & 0x3 || len & 0x3) { - fprintf(stderr, "Error: WRITE address and length must be 4 byte aligned\n"); - return STM32_ERR_UNKNOWN; - } - - if (stm->cmd->wm == STM32_CMD_ERR) { - fprintf(stderr, "Error: WRITE command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - /* send the address and checksum */ - if (stm32_send_command(stm, stm->cmd->wm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = address >> 24; - buf[1] = (address >> 16) & 0xFF; - buf[2] = (address >> 8) & 0xFF; - buf[3] = address & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - aligned_len = (len + 3) & ~3; - cs = aligned_len - 1; - buf[0] = aligned_len - 1; - for (i = 0; i < len; i++) { - cs ^= data[i]; - buf[i + 1] = data[i]; - } - /* padding data */ - for (i = len; i < aligned_len; i++) { - cs ^= 0xFF; - buf[i + 1] = 0xFF; - } - buf[aligned_len + 1] = cs; - if (port->write(port, buf, aligned_len + 2) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_BLKWRITE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->wm != STM32_CMD_WM_NS) - stm32_warn_stretching("write"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_wunprot_memory(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - - if (stm->cmd->uw == STM32_CMD_ERR) { - fprintf(stderr, "Error: WRITE UNPROTECT command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->uw) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_WUNPROT_TIMEOUT); - if (s_err == STM32_NACK) { - fprintf(stderr, "Error: Failed to WRITE UNPROTECT\n"); - return STM32_ERR_UNKNOWN; - } - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->uw != STM32_CMD_UW_NS) - stm32_warn_stretching("WRITE UNPROTECT"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_wprot_memory(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - - if (stm->cmd->wp == STM32_CMD_ERR) { - fprintf(stderr, "Error: WRITE PROTECT command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->wp) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_WPROT_TIMEOUT); - if (s_err == STM32_NACK) { - fprintf(stderr, "Error: Failed to WRITE PROTECT\n"); - return STM32_ERR_UNKNOWN; - } - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->wp != STM32_CMD_WP_NS) - stm32_warn_stretching("WRITE PROTECT"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_runprot_memory(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - - if (stm->cmd->ur == STM32_CMD_ERR) { - fprintf(stderr, "Error: READOUT UNPROTECT command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->ur) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_MASSERASE_TIMEOUT); - if (s_err == STM32_NACK) { - fprintf(stderr, "Error: Failed to READOUT UNPROTECT\n"); - return STM32_ERR_UNKNOWN; - } - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->ur != STM32_CMD_UR_NS) - stm32_warn_stretching("READOUT UNPROTECT"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_readprot_memory(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - - if (stm->cmd->rp == STM32_CMD_ERR) { - fprintf(stderr, "Error: READOUT PROTECT command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->rp) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_RPROT_TIMEOUT); - if (s_err == STM32_NACK) { - fprintf(stderr, "Error: Failed to READOUT PROTECT\n"); - return STM32_ERR_UNKNOWN; - } - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->rp != STM32_CMD_RP_NS) - stm32_warn_stretching("READOUT PROTECT"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_erase_memory(const stm32_t *stm, uint8_t spage, uint8_t pages) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - port_err_t p_err; - - if (!pages) - return STM32_ERR_OK; - - if (stm->cmd->er == STM32_CMD_ERR) { - fprintf(stderr, "Error: ERASE command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->er) != STM32_ERR_OK) { - fprintf(stderr, "Can't initiate chip erase!\n"); - return STM32_ERR_UNKNOWN; - } - - /* The erase command reported by the bootloader is either 0x43, 0x44 or 0x45 */ - /* 0x44 is Extended Erase, a 2 byte based protocol and needs to be handled differently. */ - /* 0x45 is clock no-stretching version of Extended Erase for I2C port. */ - if (stm->cmd->er != STM32_CMD_ER) { - /* Not all chips using Extended Erase support mass erase */ - /* Currently known as not supporting mass erase is the Ultra Low Power STM32L15xx range */ - /* So if someone has not overridden the default, but uses one of these chips, take it out of */ - /* mass erase mode, so it will be done page by page. This maximum might not be correct either! */ - if (stm->pid == 0x416 && pages == 0xFF) - pages = 0xF8; /* works for the STM32L152RB with 128Kb flash */ - - if (pages == 0xFF) { - uint8_t buf[3]; - - /* 0xFFFF the magic number for mass erase */ - buf[0] = 0xFF; - buf[1] = 0xFF; - buf[2] = 0x00; /* checksum */ - if (port->write(port, buf, 3) != PORT_ERR_OK) { - fprintf(stderr, "Mass erase error.\n"); - return STM32_ERR_UNKNOWN; - } - s_err = stm32_get_ack_timeout(stm, STM32_MASSERASE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Mass erase failed. Try specifying the number of pages to be erased.\n"); - if (port->flags & PORT_STRETCH_W - && stm->cmd->er != STM32_CMD_EE_NS) - stm32_warn_stretching("erase"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; - } - - uint16_t pg_num; - uint8_t pg_byte; - uint8_t cs = 0; - uint8_t *buf; - int i = 0; - - buf = malloc(2 + 2 * pages + 1); - if (!buf) - return STM32_ERR_UNKNOWN; - - /* Number of pages to be erased - 1, two bytes, MSB first */ - pg_byte = (pages - 1) >> 8; - buf[i++] = pg_byte; - cs ^= pg_byte; - pg_byte = (pages - 1) & 0xFF; - buf[i++] = pg_byte; - cs ^= pg_byte; - - for (pg_num = spage; pg_num < spage + pages; pg_num++) { - pg_byte = pg_num >> 8; - cs ^= pg_byte; - buf[i++] = pg_byte; - pg_byte = pg_num & 0xFF; - cs ^= pg_byte; - buf[i++] = pg_byte; - } - buf[i++] = cs; - p_err = port->write(port, buf, i); - free(buf); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Page-by-page erase error.\n"); - return STM32_ERR_UNKNOWN; - } - - s_err = stm32_get_ack_timeout(stm, pages * STM32_SECTERASE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Page-by-page erase failed. Check the maximum pages your device supports.\n"); - if (port->flags & PORT_STRETCH_W - && stm->cmd->er != STM32_CMD_EE_NS) - stm32_warn_stretching("erase"); - return STM32_ERR_UNKNOWN; - } - - return STM32_ERR_OK; - } - - /* And now the regular erase (0x43) for all other chips */ - if (pages == 0xFF) { - s_err = stm32_send_command_timeout(stm, 0xFF, STM32_MASSERASE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W) - stm32_warn_stretching("erase"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; - } else { - uint8_t cs = 0; - uint8_t pg_num; - uint8_t *buf; - int i = 0; - - buf = malloc(1 + pages + 1); - if (!buf) - return STM32_ERR_UNKNOWN; - - buf[i++] = pages - 1; - cs ^= (pages-1); - for (pg_num = spage; pg_num < (pages + spage); pg_num++) { - buf[i++] = pg_num; - cs ^= pg_num; - } - buf[i++] = cs; - p_err = port->write(port, buf, i); - free(buf); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Erase failed.\n"); - return STM32_ERR_UNKNOWN; - } - s_err = stm32_get_ack_timeout(stm, STM32_MASSERASE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W) - stm32_warn_stretching("erase"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; - } -} - -static stm32_err_t stm32_run_raw_code(const stm32_t *stm, - uint32_t target_address, - const uint8_t *code, uint32_t code_size) -{ - uint32_t stack_le = le_u32(0x20002000); - uint32_t code_address_le = le_u32(target_address + 8); - uint32_t length = code_size + 8; - uint8_t *mem, *pos; - uint32_t address, w; - - /* Must be 32-bit aligned */ - if (target_address & 0x3) { - fprintf(stderr, "Error: code address must be 4 byte aligned\n"); - return STM32_ERR_UNKNOWN; - } - - mem = malloc(length); - if (!mem) - return STM32_ERR_UNKNOWN; - - memcpy(mem, &stack_le, sizeof(uint32_t)); - memcpy(mem + 4, &code_address_le, sizeof(uint32_t)); - memcpy(mem + 8, code, code_size); - - pos = mem; - address = target_address; - while (length > 0) { - w = length > 256 ? 256 : length; - if (stm32_write_memory(stm, address, pos, w) != STM32_ERR_OK) { - free(mem); - return STM32_ERR_UNKNOWN; - } - - address += w; - pos += w; - length -= w; - } - - free(mem); - return stm32_go(stm, target_address); -} - -stm32_err_t stm32_go(const stm32_t *stm, uint32_t address) -{ - struct port_interface *port = stm->port; - uint8_t buf[5]; - - if (stm->cmd->go == STM32_CMD_ERR) { - fprintf(stderr, "Error: GO command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->go) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = address >> 24; - buf[1] = (address >> 16) & 0xFF; - buf[2] = (address >> 8) & 0xFF; - buf[3] = address & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - return STM32_ERR_OK; -} - -stm32_err_t stm32_reset_device(const stm32_t *stm) -{ - uint32_t target_address = stm->dev->ram_start; - - return stm32_run_raw_code(stm, target_address, stm_reset_code, stm_reset_code_length); -} - -stm32_err_t stm32_crc_memory(const stm32_t *stm, uint32_t address, - uint32_t length, uint32_t *crc) -{ - struct port_interface *port = stm->port; - uint8_t buf[5]; - - if (address & 0x3 || length & 0x3) { - fprintf(stderr, "Start and end addresses must be 4 byte aligned\n"); - return STM32_ERR_UNKNOWN; - } - - if (stm->cmd->crc == STM32_CMD_ERR) { - fprintf(stderr, "Error: CRC command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->crc) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = address >> 24; - buf[1] = (address >> 16) & 0xFF; - buf[2] = (address >> 8) & 0xFF; - buf[3] = address & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = length >> 24; - buf[1] = (length >> 16) & 0xFF; - buf[2] = (length >> 8) & 0xFF; - buf[3] = length & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (port->read(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (buf[4] != (buf[0] ^ buf[1] ^ buf[2] ^ buf[3])) - return STM32_ERR_UNKNOWN; - - *crc = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3]; - return STM32_ERR_OK; -} - -/* - * CRC computed by STM32 is similar to the standard crc32_be() - * implemented, for example, in Linux kernel in ./lib/crc32.c - * But STM32 computes it on units of 32 bits word and swaps the - * bytes of the word before the computation. - * Due to byte swap, I cannot use any CRC available in existing - * libraries, so here is a simple not optimized implementation. - */ -#define CRCPOLY_BE 0x04c11db7 -#define CRC_MSBMASK 0x80000000 -#define CRC_INIT_VALUE 0xFFFFFFFF -uint32_t stm32_sw_crc(uint32_t crc, uint8_t *buf, unsigned int len) -{ - int i; - uint32_t data; - - if (len & 0x3) { - fprintf(stderr, "Buffer length must be multiple of 4 bytes\n"); - return 0; - } - - while (len) { - data = *buf++; - data |= *buf++ << 8; - data |= *buf++ << 16; - data |= *buf++ << 24; - len -= 4; - - crc ^= data; - - for (i = 0; i < 32; i++) - if (crc & CRC_MSBMASK) - crc = (crc << 1) ^ CRCPOLY_BE; - else - crc = (crc << 1); - } - return crc; -} - -stm32_err_t stm32_crc_wrapper(const stm32_t *stm, uint32_t address, - uint32_t length, uint32_t *crc) -{ - uint8_t buf[256]; - uint32_t start, total_len, len, current_crc; - - if (address & 0x3 || length & 0x3) { - fprintf(stderr, "Start and end addresses must be 4 byte aligned\n"); - return STM32_ERR_UNKNOWN; - } - - if (stm->cmd->crc != STM32_CMD_ERR) - return stm32_crc_memory(stm, address, length, crc); - - start = address; - total_len = length; - current_crc = CRC_INIT_VALUE; - while (length) { - len = length > 256 ? 256 : length; - if (stm32_read_memory(stm, address, buf, len) != STM32_ERR_OK) { - fprintf(stderr, - "Failed to read memory at address 0x%08x, target write-protected?\n", - address); - return STM32_ERR_UNKNOWN; - } - current_crc = stm32_sw_crc(current_crc, buf, len); - length -= len; - address += len; - - fprintf(stderr, - "\rCRC address 0x%08x (%.2f%%) ", - address, - (100.0f / (float)total_len) * (float)(address - start) - ); - fflush(stderr); - } - fprintf(stderr, "Done.\n"); - *crc = current_crc; - return STM32_ERR_OK; -} diff --git a/linux64/src/stm32flash_serial/src/stm32.h b/linux64/src/stm32flash_serial/src/stm32.h deleted file mode 100644 index 1688fcb4b..000000000 --- a/linux64/src/stm32flash_serial/src/stm32.h +++ /dev/null @@ -1,84 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _STM32_H -#define _STM32_H - -#include -#include "serial.h" - -#define STM32_MAX_RX_FRAME 256 /* cmd read memory */ -#define STM32_MAX_TX_FRAME (1 + 256 + 1) /* cmd write memory */ - -typedef enum { - STM32_ERR_OK = 0, - STM32_ERR_UNKNOWN, /* Generic error */ - STM32_ERR_NACK, - STM32_ERR_NO_CMD, /* Command not available in bootloader */ -} stm32_err_t; - -typedef struct stm32 stm32_t; -typedef struct stm32_cmd stm32_cmd_t; -typedef struct stm32_dev stm32_dev_t; - -struct stm32 { - const serial_t *serial; - struct port_interface *port; - uint8_t bl_version; - uint8_t version; - uint8_t option1, option2; - uint16_t pid; - stm32_cmd_t *cmd; - const stm32_dev_t *dev; -}; - -struct stm32_dev { - uint16_t id; - const char *name; - uint32_t ram_start, ram_end; - uint32_t fl_start, fl_end; - uint16_t fl_pps; // pages per sector - uint16_t fl_ps; // page size - uint32_t opt_start, opt_end; - uint32_t mem_start, mem_end; -}; - -stm32_t *stm32_init(struct port_interface *port, const char init); -void stm32_close(stm32_t *stm); -stm32_err_t stm32_read_memory(const stm32_t *stm, uint32_t address, - uint8_t data[], unsigned int len); -stm32_err_t stm32_write_memory(const stm32_t *stm, uint32_t address, - const uint8_t data[], unsigned int len); -stm32_err_t stm32_wunprot_memory(const stm32_t *stm); -stm32_err_t stm32_wprot_memory(const stm32_t *stm); -stm32_err_t stm32_erase_memory(const stm32_t *stm, uint8_t spage, - uint8_t pages); -stm32_err_t stm32_go(const stm32_t *stm, uint32_t address); -stm32_err_t stm32_reset_device(const stm32_t *stm); -stm32_err_t stm32_readprot_memory(const stm32_t *stm); -stm32_err_t stm32_runprot_memory(const stm32_t *stm); -stm32_err_t stm32_crc_memory(const stm32_t *stm, uint32_t address, - uint32_t length, uint32_t *crc); -stm32_err_t stm32_crc_wrapper(const stm32_t *stm, uint32_t address, - uint32_t length, uint32_t *crc); -uint32_t stm32_sw_crc(uint32_t crc, uint8_t *buf, unsigned int len); - -#endif - diff --git a/linux64/src/stm32flash_serial/src/stm32flash.1 b/linux64/src/stm32flash_serial/src/stm32flash.1 deleted file mode 100644 index d37292f6a..000000000 --- a/linux64/src/stm32flash_serial/src/stm32flash.1 +++ /dev/null @@ -1,407 +0,0 @@ -.TH STM32FLASH 1 "2013\-11\-03" STM32FLASH "User command" -.SH NAME -stm32flash \- flashing utility for STM32 and STM32W through UART or I2C -.SH SYNOPSIS -.B stm32flash -.RB [ \-cfhjkouvCR ] -.RB [ \-a -.IR bus_address ] -.RB [ \-b -.IR baud_rate ] -.RB [ \-m -.IR serial_mode ] -.RB [ \-r -.IR filename ] -.RB [ \-w -.IR filename ] -.RB [ \-e -.IR num ] -.RB [ \-n -.IR count ] -.RB [ \-g -.IR address ] -.RB [ \-s -.IR start_page ] -.RB [ \-S -.IR address [: length ]] -.RB [ \-F -.IR RX_length [: TX_length ]] -.RB [ \-i -.IR GPIO_string ] -.RI [ tty_device -.R | -.IR i2c_device ] - -.SH DESCRIPTION -.B stm32flash -reads or writes the flash memory of STM32 and STM32W. - -It requires the STM32[W] to embed a bootloader compliant with ST -application note AN3155. -.B stm32flash -uses the serial port -.I tty_device -to interact with the bootloader of STM32[W]. - -.SH OPTIONS -.TP -.BI "\-a" " bus_address" -Specify address on bus for -.IR i2c_device . -This option is mandatory for I2C interface. - -.TP -.BI "\-b" " baud_rate" -Specify baud rate speed of -.IR tty_device . -Please notice that the ST bootloader can automatically detect the baud rate, -as explaned in chapter 2 of AN3155. -This option could be required together with option -.B "\-c" -or if following interaction with bootloader is expected. -Default is -.IR 57600 . - -.TP -.BI "\-m" " mode" -Specify the format of UART data. -.I mode -is a three characters long string where each character specifies, in -this strict order, character size, parity and stop bits. -The only values currenly used are -.I 8e1 -for standard STM32 bootloader and -.I 8n1 -for standard STM32W bootloader. -Default is -.IR 8e1 . - -.TP -.BI "\-r" " filename" -Specify to read the STM32[W] flash and write its content in -.I filename -in raw binary format (see below -.BR "FORMAT CONVERSION" ). - -.TP -.BI "\-w" " filename" -Specify to write the STM32[W] flash with the content of -.IR filename . -File format can be either raw binary or intel hex (see below -.BR "FORMAT CONVERSION" ). -The file format is automatically detected. -To by\-pass format detection and force binary mode (e.g. to -write an intel hex content in STM32[W] flash), use -.B \-f -option. - -.TP -.B \-u -Specify to disable write\-protection from STM32[W] flash. -The STM32[W] will be reset after this operation. - -.TP -.B \-j -Enable the flash read\-protection. - -.TP -.B \-k -Disable the flash read\-protection. - -.TP -.B \-o -Erase only. - -.TP -.BI "\-e" " num" -Specify to erase only -.I num -pages before writing the flash. Default is to erase the whole flash. With -.B \-e 0 -the flash would not be erased. - -.TP -.B \-v -Specify to verify flash content after write operation. - -.TP -.BI "\-n" " count" -Specify to retry failed writes up to -.I count -times. Default is 10 times. - -.TP -.BI "\-g" " address" -Specify address to start execution from (0 = flash start). - -.TP -.BI "\-s" " start_page" -Specify flash page offset (0 = flash start). - -.TP -.BI "\-S" " address" "[:" "length" "]" -Specify start address and optionally length for read/write/erase/crc operations. - -.TP -.BI "\-F" " RX_length" "[:" "TX_length" "]" -Specify the maximum frame size for the current interface. -Due to STM32 bootloader protocol, host will never handle frames bigger than -256 byte in RX or 258 byte in TX. -Due to current code, lowest limit in RX is 20 byte (to read a complete reply -of command GET). Minimum limit in TX is 5 byte, required by protocol. - -.TP -.B \-f -Force binary parser while reading file with -.BR "\-w" "." - -.TP -.B \-h -Show help. - -.TP -.B \-c -Specify to resume the existing UART connection and don't send initial -INIT sequence to detect baud rate. Baud rate must be kept the same as the -existing connection. This is useful if the reset fails. - -.TP -.BI "\-i" " GPIO_string" -Specify the GPIO sequences on the host to force STM32[W] to enter and -exit bootloader mode. GPIO can either be real GPIO connected from host to -STM32[W] beside the UART connection, or UART's modem signals used as -GPIO. (See below -.B BOOTLOADER GPIO SEQUENCE -for the format of -.I GPIO_string -and further explanation). - -.TP -.B \-C -Specify to compute CRC on memory content. -By default the CRC is computed on the whole flash content. -Use -.B "\-S" -to provide different memory address range. - -.TP -.B \-R -Specify to reset the device at exit. -This option is ignored if either -.BR "\-g" "," -.BR "\-j" "," -.B "\-k" -or -.B "\-u" -is also specified. - -.SH BOOTLOADER GPIO SEQUENCE -This feature is currently available on Linux host only. - -As explained in ST application note AN2606, after reset the STM32 will -execute either the application program in user flash or the bootloader, -depending on the level applied at specific pins of STM32 during reset. - -STM32 bootloader is automatically activated by configuring the pins -BOOT0="high" and BOOT1="low" and then by applying a reset. -Application program in user flash is activated by configuring the pin -BOOT0="low" (the level on BOOT1 is ignored) and then by applying a reset. - -When GPIO from host computer are connected to either configuration and -reset pins of STM32, -.B stm32flash -can control the host GPIO to reset STM32 and to force execution of -bootloader or execution of application program. - -The sequence of GPIO values to entry to and exit from bootloader mode is -provided with command line option -.B "\-i" -.IR "GPIO_string" . - -.PD 0 -The format of -.IR "GPIO_string" " is:" -.RS -GPIO_string = [entry sequence][:[exit sequence]] -.P -sequence = [\-]n[,sequence] -.RE -.P -In the above sequences, negative numbers correspond to GPIO at "low" level; -numbers without sign correspond to GPIO at "high" level. -The value "n" can either be the GPIO number on the host system or the -string "rts", "dtr" or "brk". The strings "rts" and "dtr" drive the -corresponding UART's modem lines RTS and DTR as GPIO. -The string "brk" forces the UART to send a BREAK sequence on TX line; -after BREAK the UART is returned in normal "non\-break" mode. -Note: the string "\-brk" has no effect and is ignored. -.PD - -.PD 0 -As example, let's suppose the following connection between host and STM32: -.IP \(bu 2 -host GPIO_3 connected to reset pin of STM32; -.IP \(bu 2 -host GPIO_4 connected to STM32 pin BOOT0; -.IP \(bu 2 -host GPIO_5 connected to STM32 pin BOOT1. -.PD -.P - -In this case, the sequence to enter in bootloader mode is: first put -GPIO_4="high" and GPIO_5="low"; then send reset pulse by GPIO_3="low" -followed by GPIO_3="high". -The corresponding string for -.I GPIO_string -is "4,\-5,\-3,3". - -To exit from bootloade and run the application program, the sequence is: -put GPIO_4="low"; then send reset pulse. -The corresponding string for -.I GPIO_string -is "\-4,\-3,3". - -The complete command line flag is "\-i 4,\-5,\-3,3:\-4,\-3,3". - -STM32W uses pad PA5 to select boot mode; if during reset PA5 is "low" then -STM32W will enter in bootloader mode; if PA5 is "high" it will execute the -program in flash. - -As example, supposing GPIO_3 connected to PA5 and GPIO_2 to STM32W's reset. -The command: -.PD 0 -.RS -stm32flash \-i \-3,\-2,2:3,\-2,2 /dev/ttyS0 -.RE -provides: -.IP \(bu 2 -entry sequence: GPIO_3=low, GPIO_2=low, GPIO_2=high -.IP \(bu 2 -exit sequence: GPIO_3=high, GPIO_2=low, GPIO_2=high -.PD - -.SH EXAMPLES -Get device information: -.RS -.PD 0 -.P -stm32flash /dev/ttyS0 -.PD -.RE - -Write with verify and then start execution: -.RS -.PD 0 -.P -stm32flash \-w filename \-v \-g 0x0 /dev/ttyS0 -.PD -.RE - -Read flash to file: -.RS -.PD 0 -.P -stm32flash \-r filename /dev/ttyS0 -.PD -.RE - -Start execution: -.RS -.PD 0 -.P -stm32flash \-g 0x0 /dev/ttyS0 -.PD -.RE - -Specify: -.PD 0 -.IP \(bu 2 -entry sequence: RTS=low, DTR=low, DTR=high -.IP \(bu 2 -exit sequence: RTS=high, DTR=low, DTR=high -.P -.RS -stm32flash \-i \-rts,\-dtr,dtr:rts,\-dtr,dtr /dev/ttyS0 -.PD -.RE - -.SH FORMAT CONVERSION -Flash images provided by ST or created with ST tools are often in file -format Motorola S\-Record. -Conversion between raw binary, intel hex and Motorola S\-Record can be -done through software package SRecord. - -.SH AUTHORS -The original software package -.B stm32flash -is written by -.I Geoffrey McRae -and is since 2012 maintained by -.IR "Tormod Volden " . - -Man page and extension to STM32W and I2C are written by -.IR "Antonio Borneo " . - -Please report any bugs at the project homepage -http://stm32flash.googlecode.com . - -.SH SEE ALSO -.BR "srec_cat" "(1)," " srec_intel" "(5)," " srec_motorola" "(5)." - -The communication protocol used by ST bootloader is documented in -following ST application notes, depending on communication port. -The current version of -.B stm32flash -only supports -.I UART -and -.I I2C -ports. -.PD 0 -.P -.IP \(bu 2 -AN3154: CAN protocol used in the STM32 bootloader -.P -.RS -http://www.st.com/web/en/resource/technical/document/application_note/CD00264321.pdf -.RE - -.P -.IP \(bu 2 -AN3155: USART protocol used in the STM32(TM) bootloader -.P -.RS -http://www.st.com/web/en/resource/technical/document/application_note/CD00264342.pdf -.RE - -.P -.IP \(bu 2 -AN4221: I2C protocol used in the STM32 bootloader -.P -.RS -http://www.st.com/web/en/resource/technical/document/application_note/DM00072315.pdf -.RE - -.P -.IP \(bu 2 -AN4286: SPI protocol used in the STM32 bootloader -.P -.RS -http://www.st.com/web/en/resource/technical/document/application_note/DM00081379.pdf -.RE - -.PD - - -Boot mode selection for STM32 is documented in ST application note -AN2606, available from the ST website: -.PD 0 -.P -http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf -.PD - -.SH LICENSE -.B stm32flash -is distributed under GNU GENERAL PUBLIC LICENSE Version 2. -Copy of the license is available within the source code in the file -.IR "gpl\-2.0.txt" . diff --git a/linux64/src/stm32flash_serial/src/utils.c b/linux64/src/stm32flash_serial/src/utils.c deleted file mode 100644 index 271bb3ed7..000000000 --- a/linux64/src/stm32flash_serial/src/utils.c +++ /dev/null @@ -1,45 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include "utils.h" - -/* detect CPU endian */ -char cpu_le() { - const uint32_t cpu_le_test = 0x12345678; - return ((const unsigned char*)&cpu_le_test)[0] == 0x78; -} - -uint32_t be_u32(const uint32_t v) { - if (cpu_le()) - return ((v & 0xFF000000) >> 24) | - ((v & 0x00FF0000) >> 8) | - ((v & 0x0000FF00) << 8) | - ((v & 0x000000FF) << 24); - return v; -} - -uint32_t le_u32(const uint32_t v) { - if (!cpu_le()) - return ((v & 0xFF000000) >> 24) | - ((v & 0x00FF0000) >> 8) | - ((v & 0x0000FF00) << 8) | - ((v & 0x000000FF) << 24); - return v; -} diff --git a/linux64/src/stm32flash_serial/src/utils.h b/linux64/src/stm32flash_serial/src/utils.h deleted file mode 100644 index a8d37d2d5..000000000 --- a/linux64/src/stm32flash_serial/src/utils.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _H_UTILS -#define _H_UTILS - -#include - -char cpu_le(); -uint32_t be_u32(const uint32_t v); -uint32_t le_u32(const uint32_t v); - -#endif diff --git a/linux64/stlink/lib/libstlink-shared.so b/linux64/stlink/lib/libstlink-shared.so deleted file mode 120000 index 8e07ea867..000000000 --- a/linux64/stlink/lib/libstlink-shared.so +++ /dev/null @@ -1 +0,0 @@ -libstlink-shared.so.1 \ No newline at end of file diff --git a/linux64/stlink/lib/libstlink-shared.so.1 b/linux64/stlink/lib/libstlink-shared.so.1 deleted file mode 120000 index 1485c1076..000000000 --- a/linux64/stlink/lib/libstlink-shared.so.1 +++ /dev/null @@ -1 +0,0 @@ -libstlink-shared.so.1.3.0 \ No newline at end of file diff --git a/linux64/stlink/lib/libstlink-shared.so.1.3.0 b/linux64/stlink/lib/libstlink-shared.so.1.3.0 deleted file mode 100644 index ce99960af..000000000 Binary files a/linux64/stlink/lib/libstlink-shared.so.1.3.0 and /dev/null differ diff --git a/linux64/stlink/lib/libstlink.a b/linux64/stlink/lib/libstlink.a index 5dec5413c..9d53bd54a 100644 Binary files a/linux64/stlink/lib/libstlink.a and b/linux64/stlink/lib/libstlink.a differ diff --git a/linux64/stlink/lib/libstlink.so b/linux64/stlink/lib/libstlink.so new file mode 120000 index 000000000..cd2d3010e --- /dev/null +++ b/linux64/stlink/lib/libstlink.so @@ -0,0 +1 @@ +libstlink.so.1 \ No newline at end of file diff --git a/linux64/stlink/lib/libstlink.so.1 b/linux64/stlink/lib/libstlink.so.1 new file mode 120000 index 000000000..51934773a --- /dev/null +++ b/linux64/stlink/lib/libstlink.so.1 @@ -0,0 +1 @@ +libstlink.so.1.5.1 \ No newline at end of file diff --git a/linux64/stlink/lib/libstlink.so.1.5.1 b/linux64/stlink/lib/libstlink.so.1.5.1 new file mode 100755 index 000000000..f7c55a25b Binary files /dev/null and b/linux64/stlink/lib/libstlink.so.1.5.1 differ diff --git a/linux64/stlink/st-flash b/linux64/stlink/st-flash index a95f4b415..f0454d595 100755 Binary files a/linux64/stlink/st-flash and b/linux64/stlink/st-flash differ diff --git a/linux64/stlink/st-info b/linux64/stlink/st-info index 215797574..ab3d1fb8e 100755 Binary files a/linux64/stlink/st-info and b/linux64/stlink/st-info differ diff --git a/linux64/stlink/st-util b/linux64/stlink/st-util index 9c032e6bd..e29aa16b2 100755 Binary files a/linux64/stlink/st-util and b/linux64/stlink/st-util differ diff --git a/linux64/stm32flash/stm32flash b/linux64/stm32flash/stm32flash index 7e067aee0..f1a848ded 100755 Binary files a/linux64/stm32flash/stm32flash and b/linux64/stm32flash/stm32flash differ diff --git a/macosx/src/stm32flash_serial/src/AUTHORS b/macosx/src/stm32flash_serial/src/AUTHORS deleted file mode 100644 index d096f2205..000000000 --- a/macosx/src/stm32flash_serial/src/AUTHORS +++ /dev/null @@ -1,19 +0,0 @@ -Authors ordered by first contribution. - -Geoffrey McRae -Bret Olmsted -Tormod Volden -Jakob Malm -Reuben Dowle -Matthias Kubisch -Paul Fertser -Daniel Strnad -Jérémie Rapin -Christian Pointner -Mats Erik Andersson -Alexey Borovik -Antonio Borneo -Armin van der Togt -Brian Silverman -Georg Hofmann -Luis Rodrigues diff --git a/macosx/src/stm32flash_serial/src/Android.mk b/macosx/src/stm32flash_serial/src/Android.mk deleted file mode 100644 index 7be3d0018..000000000 --- a/macosx/src/stm32flash_serial/src/Android.mk +++ /dev/null @@ -1,20 +0,0 @@ -TOP_LOCAL_PATH := $(call my-dir) - -include $(call all-named-subdir-makefiles, parsers) - -LOCAL_PATH := $(TOP_LOCAL_PATH) - -include $(CLEAR_VARS) -LOCAL_MODULE := stm32flash -LOCAL_SRC_FILES := \ - dev_table.c \ - i2c.c \ - init.c \ - main.c \ - port.c \ - serial_common.c \ - serial_platform.c \ - stm32.c \ - utils.c -LOCAL_STATIC_LIBRARIES := libparsers -include $(BUILD_EXECUTABLE) diff --git a/macosx/src/stm32flash_serial/src/HOWTO b/macosx/src/stm32flash_serial/src/HOWTO deleted file mode 100644 index d8f32eb04..000000000 --- a/macosx/src/stm32flash_serial/src/HOWTO +++ /dev/null @@ -1,35 +0,0 @@ -Add new interfaces: -===================================================================== -Current version 0.4 supports the following interfaces: -- UART Windows (either "COMn" and "\\.\COMn"); -- UART posix/Linux (e.g. "/dev/ttyUSB0"); -- I2C Linux through standard driver "i2c-dev" (e.g. "/dev/i2c-n"). - -Starting from version 0.4, the back-end of stm32flash is modular and -ready to be expanded to support new interfaces. -I'm planning adding SPI on Linux through standard driver "spidev". -You are invited to contribute with more interfaces. - -To add a new interface you need to add a new file, populate the struct -port_interface (check at the end of files i2c.c, serial_posix.c and -serial_w32.c) and provide the relative functions to operate on the -interface: open/close, read/write, get_cfg_str and the optional gpio. -The include the new drive in Makefile and register the new struct -port_interface in file port.c in struct port_interface *ports[]. - -There are several USB-I2C adapter in the market, each providing its -own libraries to communicate with the I2C bus. -Could be interesting to provide as back-end a bridge between stm32flash -and such libraries (I have no plan on this item). - - -Add new STM32 devices: -===================================================================== -Add a new line in file dev_table.c, in table devices[]. -The fields of the table are listed in stm32.h, struct stm32_dev. - - -Cross compile on Linux host for Windows target with MinGW: -===================================================================== -I'm using a 64 bit Arch Linux machines, and I usually run: - make CC=x86_64-w64-mingw32-gcc AR=x86_64-w64-mingw32-ar diff --git a/macosx/src/stm32flash_serial/src/I2C.txt b/macosx/src/stm32flash_serial/src/I2C.txt deleted file mode 100644 index 4c05ff62d..000000000 --- a/macosx/src/stm32flash_serial/src/I2C.txt +++ /dev/null @@ -1,94 +0,0 @@ -About I2C back-end communication in stm32flash -========================================================================== - -Starting from version v0.4, beside the serial communication port, -stm32flash adds support for I2C port to talk with STM32 bootloader. - -The current I2C back-end supports only the API provided by Linux kernel -driver "i2c-dev", so only I2C controllers with Linux kernel driver can be -used. -In Linux source code, most of the drivers for I2C and SMBUS controllers -are in - ./drivers/i2c/busses/ -Only I2C is supported by STM32 bootloader, so check the section below -about SMBUS. -No I2C support for Windows is available in stm32flash v0.4. - -Thanks to the new modular back-end, stm32flash can be easily extended to -support new back-ends and API. Check HOWTO file in stm32flash source code -for details. - -In the market there are several USB-to-I2C dongles; most of them are not -supported by kernel drivers. Manufacturer provide proprietary userspace -libraries using not standardized API. -These API and dongles could be supported in feature versions. - -There are currently 3 versions of STM32 bootloader for I2C communications: -- v1.0 using I2C clock stretching synchronization between host and STM32; -- v1.1 superset of v1.0, adds non stretching commands; -- v1.2 superset of v1.1, adds CRC command and compatibility with i2cdetect. -Details in ST application note AN2606. -All the bootloaders above are tested and working with stm32flash. - - -SMBUS controllers -========================================================================== - -Almost 50% of the drivers in Linux source code folder - ./drivers/i2c/busses/ -are for controllers that "only" support SMBUS protocol. They can NOT -operate with STM32 bootloader. -To identify if your controller supports I2C, use command: - i2cdetect -F n -where "n" is the number of the I2C interface (e.g. n=3 for "/dev/i2c-3"). -Controllers that supports I2C will report - I2C yes -Controller that support both I2C and SMBUS are ok. - -If you are interested on details about SMBUS protocol, you can download -the current specs from - http://smbus.org/specs/smbus20.pdf -and you can read the files in Linux source code - ./Documentation/i2c/i2c-protocol - ./Documentation/i2c/smbus-protocol - - -About bootloader v1.0 -========================================================================== - -Version v1.0 can have issues with some I2C controllers due to use of clock -stretching during commands that require long operations, like flash erase -and programming. - -Clock stretching is a technique to synchronize host and I2C device. When -I2C device wants to force a delay in the communication, it push "low" the -I2C clock; the I2C controller detects it and waits until I2C clock returns -"high". -Most I2C controllers set a "timeout" for clock stretching, ranging from -few milli-seconds to seconds depending on specific HW or SW driver. - -It is possible that the timeout in your I2C controller is smaller than the -delay required for flash erase or programming. In this case the I2C -controller will timeout and report error to stm32flash. -There is no possibility for stm32flash to retry, so it can only signal the -error and exit. - -To by-pass the issue with bootloader v1.0 you can modify the kernel driver -of your I2C controller. Not an easy job, since every controller has its own -way to handle the timeout. - -In my case I'm using the I2C controller integrated in the VGA port of my -laptop HP EliteBook 8460p. I built the 0.25$ VGA-to-I2C adapter reported in - http://www.paintyourdragon.com/?p=43 -To change the timeout of the I2C controller I had to modify the kernel file - drivers/gpu/drm/radeon/radeon_i2c.c -line 969 -- i2c->bit.timeout = usecs_to_jiffies(2200); /* from VESA */ -+ i2c->bit.timeout = msecs_to_jiffies(5000); /* 5s for STM32 */ -and recompile it. -Then - $> modprobe i2c-dev - $> chmod 666 /dev/i2c-7 - #> stm32flash -a 0x39 /dev/i2c-7 - -2014-09-16 Antonio Borneo diff --git a/macosx/src/stm32flash_serial/src/Makefile b/macosx/src/stm32flash_serial/src/Makefile deleted file mode 100644 index 0328d5588..000000000 --- a/macosx/src/stm32flash_serial/src/Makefile +++ /dev/null @@ -1,38 +0,0 @@ -PREFIX = /usr/local -CFLAGS += -Wall -g - -INSTALL = install - -OBJS = dev_table.o \ - i2c.o \ - init.o \ - main.o \ - port.o \ - serial_common.o \ - serial_platform.o \ - stm32.o \ - utils.o - -LIBOBJS = parsers/parsers.a - -all: stm32flash - -serial_platform.o: serial_posix.c serial_w32.c - -parsers/parsers.a: - cd parsers && $(MAKE) parsers.a - -stm32flash: $(OBJS) $(LIBOBJS) - $(CC) $(LDFLAGS) -o $@ $(OBJS) $(LIBOBJS) - -clean: - rm -f $(OBJS) stm32flash - cd parsers && $(MAKE) $@ - -install: all - $(INSTALL) -d $(DESTDIR)$(PREFIX)/bin - $(INSTALL) -m 755 stm32flash $(DESTDIR)$(PREFIX)/bin - $(INSTALL) -d $(DESTDIR)$(PREFIX)/share/man/man1 - $(INSTALL) -m 644 stm32flash.1 $(DESTDIR)$(PREFIX)/share/man/man1 - -.PHONY: all clean install diff --git a/macosx/src/stm32flash_serial/src/TODO b/macosx/src/stm32flash_serial/src/TODO deleted file mode 100644 index 41df614ff..000000000 --- a/macosx/src/stm32flash_serial/src/TODO +++ /dev/null @@ -1,7 +0,0 @@ - -stm32: -- Add support for variable page size - -AUTHORS: -- Add contributors from Geoffrey's commits - diff --git a/macosx/src/stm32flash_serial/src/dev_table.c b/macosx/src/stm32flash_serial/src/dev_table.c deleted file mode 100644 index 399cd9d08..000000000 --- a/macosx/src/stm32flash_serial/src/dev_table.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - Copyright (C) 2014 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include "stm32.h" - -/* - * Device table, corresponds to the "Bootloader device-dependant parameters" - * table in ST document AN2606. - * Note that the option bytes upper range is inclusive! - */ -const stm32_dev_t devices[] = { - /* F0 */ - {0x440, "STM32F051xx" , 0x20001000, 0x20002000, 0x08000000, 0x08010000, 4, 1024, 0x1FFFF800, 0x1FFFF80B, 0x1FFFEC00, 0x1FFFF800}, - {0x444, "STM32F030/F031" , 0x20001000, 0x20002000, 0x08000000, 0x08010000, 4, 1024, 0x1FFFF800, 0x1FFFF80B, 0x1FFFEC00, 0x1FFFF800}, - {0x445, "STM32F042xx" , 0x20001800, 0x20001800, 0x08000000, 0x08008000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFC400, 0x1FFFF800}, - {0x448, "STM32F072xx" , 0x20001800, 0x20004000, 0x08000000, 0x08020000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFC800, 0x1FFFF800}, - /* F1 */ - {0x412, "Low-density" , 0x20000200, 0x20002800, 0x08000000, 0x08008000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x410, "Medium-density" , 0x20000200, 0x20005000, 0x08000000, 0x08020000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x414, "High-density" , 0x20000200, 0x20010000, 0x08000000, 0x08080000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x420, "Medium-density VL" , 0x20000200, 0x20002000, 0x08000000, 0x08020000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x428, "High-density VL" , 0x20000200, 0x20008000, 0x08000000, 0x08080000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x418, "Connectivity line" , 0x20001000, 0x20010000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFB000, 0x1FFFF800}, - {0x430, "XL-density" , 0x20000800, 0x20018000, 0x08000000, 0x08100000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFE000, 0x1FFFF800}, - /* Note that F2 and F4 devices have sectors of different page sizes - and only the first sectors (of one page size) are included here */ - /* F2 */ - {0x411, "STM32F2xx" , 0x20002000, 0x20020000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77DF}, - /* F3 */ - {0x432, "STM32F373/8" , 0x20001400, 0x20008000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800}, - {0x422, "F302xB/303xB/358" , 0x20001400, 0x20010000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800}, - {0x439, "STM32F302x4(6/8)" , 0x20001800, 0x20004000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800}, - {0x438, "F303x4/334/328" , 0x20001800, 0x20003000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800}, - /* F4 */ - {0x413, "STM32F40/1" , 0x20002000, 0x20020000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77DF}, - /* 0x419 is also used for STM32F429/39 but with other bootloader ID... */ - {0x419, "STM32F427/37" , 0x20002000, 0x20030000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77FF}, - {0x423, "STM32F401xB(C)" , 0x20003000, 0x20010000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77FF}, - {0x433, "STM32F401xD(E)" , 0x20003000, 0x20018000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77FF}, - /* L0 */ - {0x417, "L05xxx/06xxx" , 0x20001000, 0x20002000, 0x08000000, 0x08010000, 32, 128, 0x1FF80000, 0x1FF8000F, 0x1FF00000, 0x1FF01000}, - /* L1 */ - {0x416, "L1xxx6(8/B)" , 0x20000800, 0x20004000, 0x08000000, 0x08020000, 16, 256, 0x1FF80000, 0x1FF8000F, 0x1FF00000, 0x1FF01000}, - {0x429, "L1xxx6(8/B)A" , 0x20001000, 0x20008000, 0x08000000, 0x08020000, 16, 256, 0x1FF80000, 0x1FF8000F, 0x1FF00000, 0x1FF01000}, - {0x427, "L1xxxC" , 0x20001000, 0x20008000, 0x08000000, 0x08020000, 16, 256, 0x1FF80000, 0x1FF8000F, 0x1FF00000, 0x1FF02000}, - {0x436, "L1xxxD" , 0x20001000, 0x2000C000, 0x08000000, 0x08060000, 16, 256, 0x1ff80000, 0x1ff8000F, 0x1FF00000, 0x1FF02000}, - {0x437, "L1xxxE" , 0x20001000, 0x20014000, 0x08000000, 0x08060000, 16, 256, 0x1ff80000, 0x1ff8000F, 0x1FF00000, 0x1FF02000}, - /* These are not (yet) in AN2606: */ - {0x641, "Medium_Density PL" , 0x20000200, 0x00005000, 0x08000000, 0x08020000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x9a8, "STM32W-128K" , 0x20000200, 0x20002000, 0x08000000, 0x08020000, 1, 1024, 0, 0, 0, 0}, - {0x9b0, "STM32W-256K" , 0x20000200, 0x20004000, 0x08000000, 0x08040000, 1, 2048, 0, 0, 0, 0}, - {0x0} -}; diff --git a/macosx/src/stm32flash_serial/src/gpl-2.0.txt b/macosx/src/stm32flash_serial/src/gpl-2.0.txt deleted file mode 100644 index d159169d1..000000000 --- a/macosx/src/stm32flash_serial/src/gpl-2.0.txt +++ /dev/null @@ -1,339 +0,0 @@ - GNU GENERAL PUBLIC LICENSE - Version 2, June 1991 - - Copyright (C) 1989, 1991 Free Software Foundation, Inc., - 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The licenses for most software are designed to take away your -freedom to share and change it. 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Of course, the commands you use may -be called something other than `show w' and `show c'; they could even be -mouse-clicks or menu items--whatever suits your program. - -You should also get your employer (if you work as a programmer) or your -school, if any, to sign a "copyright disclaimer" for the program, if -necessary. Here is a sample; alter the names: - - Yoyodyne, Inc., hereby disclaims all copyright interest in the program - `Gnomovision' (which makes passes at compilers) written by James Hacker. - - , 1 April 1989 - Ty Coon, President of Vice - -This General Public License does not permit incorporating your program into -proprietary programs. If your program is a subroutine library, you may -consider it more useful to permit linking proprietary applications with the -library. If this is what you want to do, use the GNU Lesser General -Public License instead of this License. diff --git a/macosx/src/stm32flash_serial/src/i2c.c b/macosx/src/stm32flash_serial/src/i2c.c deleted file mode 100644 index 10e6bb15a..000000000 --- a/macosx/src/stm32flash_serial/src/i2c.c +++ /dev/null @@ -1,209 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2014 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "serial.h" -#include "port.h" - - -#if !defined(__linux__) - -static port_err_t i2c_open(struct port_interface *port, - struct port_options *ops) -{ - return PORT_ERR_NODEV; -} - -struct port_interface port_i2c = { - .name = "i2c", - .open = i2c_open, -}; - -#else - -#ifdef __ANDROID__ -#define I2C_SLAVE 0x0703 /* Use this slave address */ -#define I2C_FUNCS 0x0705 /* Get the adapter functionality mask */ -/* To determine what functionality is present */ -#define I2C_FUNC_I2C 0x00000001 -#else -#include -#include -#endif - -#include - -struct i2c_priv { - int fd; - int addr; -}; - -static port_err_t i2c_open(struct port_interface *port, - struct port_options *ops) -{ - struct i2c_priv *h; - int fd, addr, ret; - unsigned long funcs; - - /* 1. check device name match */ - if (strncmp(ops->device, "/dev/i2c-", strlen("/dev/i2c-"))) - return PORT_ERR_NODEV; - - /* 2. check options */ - addr = ops->bus_addr; - if (addr < 0x03 || addr > 0x77) { - fprintf(stderr, "I2C address out of range [0x03-0x77]\n"); - return PORT_ERR_UNKNOWN; - } - - /* 3. open it */ - h = calloc(sizeof(*h), 1); - if (h == NULL) { - fprintf(stderr, "End of memory\n"); - return PORT_ERR_UNKNOWN; - } - fd = open(ops->device, O_RDWR); - if (fd < 0) { - fprintf(stderr, "Unable to open special file \"%s\"\n", - ops->device); - free(h); - return PORT_ERR_UNKNOWN; - } - - /* 3.5. Check capabilities */ - ret = ioctl(fd, I2C_FUNCS, &funcs); - if (ret < 0) { - fprintf(stderr, "I2C ioctl(funcs) error %d\n", errno); - close(fd); - free(h); - return PORT_ERR_UNKNOWN; - } - if ((funcs & I2C_FUNC_I2C) == 0) { - fprintf(stderr, "Error: controller is not I2C, only SMBUS.\n"); - close(fd); - free(h); - return PORT_ERR_UNKNOWN; - } - - /* 4. set options */ - ret = ioctl(fd, I2C_SLAVE, addr); - if (ret < 0) { - fprintf(stderr, "I2C ioctl(slave) error %d\n", errno); - close(fd); - free(h); - return PORT_ERR_UNKNOWN; - } - - h->fd = fd; - h->addr = addr; - port->private = h; - return PORT_ERR_OK; -} - -static port_err_t i2c_close(struct port_interface *port) -{ - struct i2c_priv *h; - - h = (struct i2c_priv *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - close(h->fd); - free(h); - port->private = NULL; - return PORT_ERR_OK; -} - -static port_err_t i2c_read(struct port_interface *port, void *buf, - size_t nbyte) -{ - struct i2c_priv *h; - int ret; - - h = (struct i2c_priv *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - ret = read(h->fd, buf, nbyte); - if (ret != nbyte) - return PORT_ERR_UNKNOWN; - return PORT_ERR_OK; -} - -static port_err_t i2c_write(struct port_interface *port, void *buf, - size_t nbyte) -{ - struct i2c_priv *h; - int ret; - - h = (struct i2c_priv *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - ret = write(h->fd, buf, nbyte); - if (ret != nbyte) - return PORT_ERR_UNKNOWN; - return PORT_ERR_OK; -} - -static port_err_t i2c_gpio(struct port_interface *port, serial_gpio_t n, - int level) -{ - return PORT_ERR_OK; -} - -static const char *i2c_get_cfg_str(struct port_interface *port) -{ - struct i2c_priv *h; - static char str[11]; - - h = (struct i2c_priv *)port->private; - if (h == NULL) - return "INVALID"; - snprintf(str, sizeof(str), "addr 0x%2x", h->addr); - return str; -} - -static struct varlen_cmd i2c_cmd_get_reply[] = { - {0x10, 11}, - {0x11, 17}, - {0x12, 18}, - { /* sentinel */ } -}; - -struct port_interface port_i2c = { - .name = "i2c", - .flags = PORT_STRETCH_W, - .open = i2c_open, - .close = i2c_close, - .read = i2c_read, - .write = i2c_write, - .gpio = i2c_gpio, - .cmd_get_reply = i2c_cmd_get_reply, - .get_cfg_str = i2c_get_cfg_str, -}; - -#endif diff --git a/macosx/src/stm32flash_serial/src/init.c b/macosx/src/stm32flash_serial/src/init.c deleted file mode 100644 index 77a571bd8..000000000 --- a/macosx/src/stm32flash_serial/src/init.c +++ /dev/null @@ -1,219 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - Copyright (C) 2013 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#include -#include -#include -#include -#include -#include -#include -#include -#include "init.h" -#include "serial.h" -#include "stm32.h" -#include "port.h" - -struct gpio_list { - struct gpio_list *next; - int gpio; -}; - - -static int write_to(const char *filename, const char *value) -{ - int fd, ret; - - fd = open(filename, O_WRONLY); - if (fd < 0) { - fprintf(stderr, "Cannot open file \"%s\"\n", filename); - return 0; - } - ret = write(fd, value, strlen(value)); - if (ret < 0) { - fprintf(stderr, "Error writing in file \"%s\"\n", filename); - close(fd); - return 0; - } - close(fd); - return 1; -} - -#if !defined(__linux__) -static int drive_gpio(int n, int level, struct gpio_list **gpio_to_release) -{ - fprintf(stderr, "GPIO control only available in Linux\n"); - return 0; -} -#else -static int drive_gpio(int n, int level, struct gpio_list **gpio_to_release) -{ - char num[16]; /* sized to carry MAX_INT */ - char file[48]; /* sized to carry longest filename */ - struct stat buf; - struct gpio_list *new; - int ret; - - sprintf(file, "/sys/class/gpio/gpio%d/direction", n); - ret = stat(file, &buf); - if (ret) { - /* file miss, GPIO not exported yet */ - sprintf(num, "%d", n); - ret = write_to("/sys/class/gpio/export", num); - if (!ret) - return 0; - ret = stat(file, &buf); - if (ret) { - fprintf(stderr, "GPIO %d not available\n", n); - return 0; - } - new = (struct gpio_list *)malloc(sizeof(struct gpio_list)); - if (new == NULL) { - fprintf(stderr, "Out of memory\n"); - return 0; - } - new->gpio = n; - new->next = *gpio_to_release; - *gpio_to_release = new; - } - - return write_to(file, level ? "high" : "low"); -} -#endif - -static int release_gpio(int n) -{ - char num[16]; /* sized to carry MAX_INT */ - - sprintf(num, "%d", n); - return write_to("/sys/class/gpio/unexport", num); -} - -static int gpio_sequence(struct port_interface *port, const char *s, size_t l) -{ - struct gpio_list *gpio_to_release = NULL, *to_free; - int ret, level, gpio; - - ret = 1; - while (ret == 1 && *s && l > 0) { - if (*s == '-') { - level = 0; - s++; - l--; - } else - level = 1; - - if (isdigit(*s)) { - gpio = atoi(s); - while (isdigit(*s)) { - s++; - l--; - } - } else if (!strncmp(s, "rts", 3)) { - gpio = -GPIO_RTS; - s += 3; - l -= 3; - } else if (!strncmp(s, "dtr", 3)) { - gpio = -GPIO_DTR; - s += 3; - l -= 3; - } else if (!strncmp(s, "brk", 3)) { - gpio = -GPIO_BRK; - s += 3; - l -= 3; - } else { - fprintf(stderr, "Character \'%c\' is not a digit\n", *s); - ret = 0; - break; - } - - if (*s && (l > 0)) { - if (*s == ',') { - s++; - l--; - } else { - fprintf(stderr, "Character \'%c\' is not a separator\n", *s); - ret = 0; - break; - } - } - if (gpio < 0) - ret = (port->gpio(port, -gpio, level) == PORT_ERR_OK); - else - ret = drive_gpio(gpio, level, &gpio_to_release); - usleep(100000); - } - - while (gpio_to_release) { - release_gpio(gpio_to_release->gpio); - to_free = gpio_to_release; - gpio_to_release = gpio_to_release->next; - free(to_free); - } - usleep(500000); - return ret; -} - -static int gpio_bl_entry(struct port_interface *port, const char *seq) -{ - char *s; - - if (seq == NULL || seq[0] == ':') - return 1; - - s = strchr(seq, ':'); - if (s == NULL) - return gpio_sequence(port, seq, strlen(seq)); - - return gpio_sequence(port, seq, s - seq); -} - -static int gpio_bl_exit(struct port_interface *port, const char *seq) -{ - char *s; - - if (seq == NULL) - return 1; - - s = strchr(seq, ':'); - if (s == NULL || s[1] == '\0') - return 1; - - return gpio_sequence(port, s + 1, strlen(s + 1)); -} - -int init_bl_entry(struct port_interface *port, const char *seq) -{ - if (seq) - return gpio_bl_entry(port, seq); - - return 1; -} - -int init_bl_exit(stm32_t *stm, struct port_interface *port, const char *seq) -{ - if (seq) - return gpio_bl_exit(port, seq); - - if (stm32_reset_device(stm) != STM32_ERR_OK) - return 0; - return 1; -} diff --git a/macosx/src/stm32flash_serial/src/init.h b/macosx/src/stm32flash_serial/src/init.h deleted file mode 100644 index 6075b519b..000000000 --- a/macosx/src/stm32flash_serial/src/init.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - Copyright (C) 2013 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _INIT_H -#define _INIT_H - -#include "stm32.h" -#include "port.h" - -int init_bl_entry(struct port_interface *port, const char *seq); -int init_bl_exit(stm32_t *stm, struct port_interface *port, const char *seq); - -#endif diff --git a/macosx/src/stm32flash_serial/src/main.c b/macosx/src/stm32flash_serial/src/main.c deleted file mode 100644 index f081d6131..000000000 --- a/macosx/src/stm32flash_serial/src/main.c +++ /dev/null @@ -1,774 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright 2010 Geoffrey McRae - Copyright 2011 Steve Markgraf - Copyright 2012 Tormod Volden - Copyright 2013 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include -#include -#include -#include -#include -#include - -#include "init.h" -#include "utils.h" -#include "serial.h" -#include "stm32.h" -#include "parsers/parser.h" -#include "port.h" - -#include "parsers/binary.h" -#include "parsers/hex.h" - -#define VERSION "Arduino_STM32_0.9" - -/* device globals */ -stm32_t *stm = NULL; - -void *p_st = NULL; -parser_t *parser = NULL; - -/* settings */ -struct port_options port_opts = { - .device = NULL, - .baudRate = SERIAL_BAUD_57600, - .serial_mode = "8e1", - .bus_addr = 0, - .rx_frame_max = STM32_MAX_RX_FRAME, - .tx_frame_max = STM32_MAX_TX_FRAME, -}; -int rd = 0; -int wr = 0; -int wu = 0; -int rp = 0; -int ur = 0; -int eraseOnly = 0; -int crc = 0; -int npages = 0; -int spage = 0; -int no_erase = 0; -char verify = 0; -int retry = 10; -char exec_flag = 0; -uint32_t execute = 0; -char init_flag = 1; -char force_binary = 0; -char reset_flag = 0; -char *filename; -char *gpio_seq = NULL; -uint32_t start_addr = 0; -uint32_t readwrite_len = 0; - -/* functions */ -int parse_options(int argc, char *argv[]); -void show_help(char *name); - -static int is_addr_in_ram(uint32_t addr) -{ - return addr >= stm->dev->ram_start && addr < stm->dev->ram_end; -} - -static int is_addr_in_flash(uint32_t addr) -{ - return addr >= stm->dev->fl_start && addr < stm->dev->fl_end; -} - -static int flash_addr_to_page_floor(uint32_t addr) -{ - if (!is_addr_in_flash(addr)) - return 0; - - return (addr - stm->dev->fl_start) / stm->dev->fl_ps; -} - -static int flash_addr_to_page_ceil(uint32_t addr) -{ - if (!(addr >= stm->dev->fl_start && addr <= stm->dev->fl_end)) - return 0; - - return (addr + stm->dev->fl_ps - 1 - stm->dev->fl_start) - / stm->dev->fl_ps; -} - -static uint32_t flash_page_to_addr(int page) -{ - return stm->dev->fl_start + page * stm->dev->fl_ps; -} - -int main(int argc, char* argv[]) { - struct port_interface *port = NULL; - int ret = 1; - stm32_err_t s_err; - parser_err_t perr; - FILE *diag = stdout; - - fprintf(diag, "stm32flash " VERSION "\n\n"); - fprintf(diag, "http://github.com/rogerclarkmelbourne/arduino_stm32\n\n"); - if (parse_options(argc, argv) != 0) - goto close; - - if (rd && filename[0] == '-') { - diag = stderr; - } - - if (wr) { - /* first try hex */ - if (!force_binary) { - parser = &PARSER_HEX; - p_st = parser->init(); - if (!p_st) { - fprintf(stderr, "%s Parser failed to initialize\n", parser->name); - goto close; - } - } - - if (force_binary || (perr = parser->open(p_st, filename, 0)) != PARSER_ERR_OK) { - if (force_binary || perr == PARSER_ERR_INVALID_FILE) { - if (!force_binary) { - parser->close(p_st); - p_st = NULL; - } - - /* now try binary */ - parser = &PARSER_BINARY; - p_st = parser->init(); - if (!p_st) { - fprintf(stderr, "%s Parser failed to initialize\n", parser->name); - goto close; - } - perr = parser->open(p_st, filename, 0); - } - - /* if still have an error, fail */ - if (perr != PARSER_ERR_OK) { - fprintf(stderr, "%s ERROR: %s\n", parser->name, parser_errstr(perr)); - if (perr == PARSER_ERR_SYSTEM) perror(filename); - goto close; - } - } - - fprintf(diag, "Using Parser : %s\n", parser->name); - } else { - parser = &PARSER_BINARY; - p_st = parser->init(); - if (!p_st) { - fprintf(stderr, "%s Parser failed to initialize\n", parser->name); - goto close; - } - } - - if (port_open(&port_opts, &port) != PORT_ERR_OK) { - fprintf(stderr, "Failed to open port: %s\n", port_opts.device); - goto close; - } - - fprintf(diag, "Interface %s: %s\n", port->name, port->get_cfg_str(port)); - if (init_flag && init_bl_entry(port, gpio_seq) == 0) - goto close; - stm = stm32_init(port, init_flag); - if (!stm) - goto close; - - fprintf(diag, "Version : 0x%02x\n", stm->bl_version); - if (port->flags & PORT_GVR_ETX) { - fprintf(diag, "Option 1 : 0x%02x\n", stm->option1); - fprintf(diag, "Option 2 : 0x%02x\n", stm->option2); - } - fprintf(diag, "Device ID : 0x%04x (%s)\n", stm->pid, stm->dev->name); - fprintf(diag, "- RAM : %dKiB (%db reserved by bootloader)\n", (stm->dev->ram_end - 0x20000000) / 1024, stm->dev->ram_start - 0x20000000); - fprintf(diag, "- Flash : %dKiB (sector size: %dx%d)\n", (stm->dev->fl_end - stm->dev->fl_start ) / 1024, stm->dev->fl_pps, stm->dev->fl_ps); - fprintf(diag, "- Option RAM : %db\n", stm->dev->opt_end - stm->dev->opt_start + 1); - fprintf(diag, "- System RAM : %dKiB\n", (stm->dev->mem_end - stm->dev->mem_start) / 1024); - - uint8_t buffer[256]; - uint32_t addr, start, end; - unsigned int len; - int failed = 0; - int first_page, num_pages; - - /* - * Cleanup addresses: - * - * Starting from options - * start_addr, readwrite_len, spage, npages - * and using device memory size, compute - * start, end, first_page, num_pages - */ - if (start_addr || readwrite_len) { - start = start_addr; - - if (is_addr_in_flash(start)) - end = stm->dev->fl_end; - else { - no_erase = 1; - if (is_addr_in_ram(start)) - end = stm->dev->ram_end; - else - end = start + sizeof(uint32_t); - } - - if (readwrite_len && (end > start + readwrite_len)) - end = start + readwrite_len; - - first_page = flash_addr_to_page_floor(start); - if (!first_page && end == stm->dev->fl_end) - num_pages = 0xff; /* mass erase */ - else - num_pages = flash_addr_to_page_ceil(end) - first_page; - } else if (!spage && !npages) { - start = stm->dev->fl_start; - end = stm->dev->fl_end; - first_page = 0; - num_pages = 0xff; /* mass erase */ - } else { - first_page = spage; - start = flash_page_to_addr(first_page); - if (start > stm->dev->fl_end) { - fprintf(stderr, "Address range exceeds flash size.\n"); - goto close; - } - - if (npages) { - num_pages = npages; - end = flash_page_to_addr(first_page + num_pages); - if (end > stm->dev->fl_end) - end = stm->dev->fl_end; - } else { - end = stm->dev->fl_end; - num_pages = flash_addr_to_page_ceil(end) - first_page; - } - - if (!first_page && end == stm->dev->fl_end) - num_pages = 0xff; /* mass erase */ - } - - if (rd) { - unsigned int max_len = port_opts.rx_frame_max; - - fprintf(diag, "Memory read\n"); - - perr = parser->open(p_st, filename, 1); - if (perr != PARSER_ERR_OK) { - fprintf(stderr, "%s ERROR: %s\n", parser->name, parser_errstr(perr)); - if (perr == PARSER_ERR_SYSTEM) - perror(filename); - goto close; - } - - fflush(diag); - addr = start; - while(addr < end) { - uint32_t left = end - addr; - len = max_len > left ? left : max_len; - s_err = stm32_read_memory(stm, addr, buffer, len); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to read memory at address 0x%08x, target write-protected?\n", addr); - goto close; - } - if (parser->write(p_st, buffer, len) != PARSER_ERR_OK) - { - fprintf(stderr, "Failed to write data to file\n"); - goto close; - } - addr += len; - - fprintf(diag, - "\rRead address 0x%08x (%.2f%%) ", - addr, - (100.0f / (float)(end - start)) * (float)(addr - start) - ); - fflush(diag); - } - fprintf(diag, "Done.\n"); - ret = 0; - goto close; - } else if (rp) { - fprintf(stdout, "Read-Protecting flash\n"); - /* the device automatically performs a reset after the sending the ACK */ - reset_flag = 0; - stm32_readprot_memory(stm); - fprintf(stdout, "Done.\n"); - } else if (ur) { - fprintf(stdout, "Read-UnProtecting flash\n"); - /* the device automatically performs a reset after the sending the ACK */ - reset_flag = 0; - stm32_runprot_memory(stm); - fprintf(stdout, "Done.\n"); - } else if (eraseOnly) { - ret = 0; - fprintf(stdout, "Erasing flash\n"); - - if (num_pages != 0xff && - (start != flash_page_to_addr(first_page) - || end != flash_page_to_addr(first_page + num_pages))) { - fprintf(stderr, "Specified start & length are invalid (must be page aligned)\n"); - ret = 1; - goto close; - } - - s_err = stm32_erase_memory(stm, first_page, num_pages); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to erase memory\n"); - ret = 1; - goto close; - } - } else if (wu) { - fprintf(diag, "Write-unprotecting flash\n"); - /* the device automatically performs a reset after the sending the ACK */ - reset_flag = 0; - stm32_wunprot_memory(stm); - fprintf(diag, "Done.\n"); - - } else if (wr) { - fprintf(diag, "Write to memory\n"); - - off_t offset = 0; - ssize_t r; - unsigned int size; - unsigned int max_wlen, max_rlen; - - max_wlen = port_opts.tx_frame_max - 2; /* skip len and crc */ - max_wlen &= ~3; /* 32 bit aligned */ - - max_rlen = port_opts.rx_frame_max; - max_rlen = max_rlen < max_wlen ? max_rlen : max_wlen; - - /* Assume data from stdin is whole device */ - if (filename[0] == '-' && filename[1] == '\0') - size = end - start; - else - size = parser->size(p_st); - - // TODO: It is possible to write to non-page boundaries, by reading out flash - // from partial pages and combining with the input data - // if ((start % stm->dev->fl_ps) != 0 || (end % stm->dev->fl_ps) != 0) { - // fprintf(stderr, "Specified start & length are invalid (must be page aligned)\n"); - // goto close; - // } - - // TODO: If writes are not page aligned, we should probably read out existing flash - // contents first, so it can be preserved and combined with new data - if (!no_erase && num_pages) { - fprintf(diag, "Erasing memory\n"); - s_err = stm32_erase_memory(stm, first_page, num_pages); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to erase memory\n"); - goto close; - } - } - - fflush(diag); - addr = start; - while(addr < end && offset < size) { - uint32_t left = end - addr; - len = max_wlen > left ? left : max_wlen; - len = len > size - offset ? size - offset : len; - - if (parser->read(p_st, buffer, &len) != PARSER_ERR_OK) - goto close; - - if (len == 0) { - if (filename[0] == '-') { - break; - } else { - fprintf(stderr, "Failed to read input file\n"); - goto close; - } - } - - again: - s_err = stm32_write_memory(stm, addr, buffer, len); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to write memory at address 0x%08x\n", addr); - goto close; - } - - if (verify) { - uint8_t compare[len]; - unsigned int offset, rlen; - - offset = 0; - while (offset < len) { - rlen = len - offset; - rlen = rlen < max_rlen ? rlen : max_rlen; - s_err = stm32_read_memory(stm, addr + offset, compare + offset, rlen); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to read memory at address 0x%08x\n", addr + offset); - goto close; - } - offset += rlen; - } - - for(r = 0; r < len; ++r) - if (buffer[r] != compare[r]) { - if (failed == retry) { - fprintf(stderr, "Failed to verify at address 0x%08x, expected 0x%02x and found 0x%02x\n", - (uint32_t)(addr + r), - buffer [r], - compare[r] - ); - goto close; - } - ++failed; - goto again; - } - - failed = 0; - } - - addr += len; - offset += len; - - fprintf(diag, - "\rWrote %saddress 0x%08x (%.2f%%) ", - verify ? "and verified " : "", - addr, - (100.0f / size) * offset - ); - fflush(diag); - - } - - fprintf(diag, "Done.\n"); - ret = 0; - goto close; - } else if (crc) { - uint32_t crc_val = 0; - - fprintf(diag, "CRC computation\n"); - - s_err = stm32_crc_wrapper(stm, start, end - start, &crc_val); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to read CRC\n"); - goto close; - } - fprintf(diag, "CRC(0x%08x-0x%08x) = 0x%08x\n", start, end, - crc_val); - ret = 0; - goto close; - } else - ret = 0; - -close: - if (stm && exec_flag && ret == 0) { - if (execute == 0) - execute = stm->dev->fl_start; - - fprintf(diag, "\nStarting execution at address 0x%08x... ", execute); - fflush(diag); - if (stm32_go(stm, execute) == STM32_ERR_OK) { - reset_flag = 0; - fprintf(diag, "done.\n"); - } else - fprintf(diag, "failed.\n"); - } - - if (stm && reset_flag) { - fprintf(diag, "\nResetting device... "); - fflush(diag); - if (init_bl_exit(stm, port, gpio_seq)) - fprintf(diag, "done.\n"); - else fprintf(diag, "failed.\n"); - } - - if (p_st ) parser->close(p_st); - if (stm ) stm32_close (stm); - if (port) - port->close(port); - - fprintf(diag, "\n"); - return ret; -} - -int parse_options(int argc, char *argv[]) -{ - int c; - char *pLen; - - while ((c = getopt(argc, argv, "a:b:m:r:w:e:vn:g:jkfcChuos:S:F:i:R")) != -1) { - switch(c) { - case 'a': - port_opts.bus_addr = strtoul(optarg, NULL, 0); - break; - - case 'b': - port_opts.baudRate = serial_get_baud(strtoul(optarg, NULL, 0)); - if (port_opts.baudRate == SERIAL_BAUD_INVALID) { - serial_baud_t baudrate; - fprintf(stderr, "Invalid baud rate, valid options are:\n"); - for (baudrate = SERIAL_BAUD_1200; baudrate != SERIAL_BAUD_INVALID; ++baudrate) - fprintf(stderr, " %d\n", serial_get_baud_int(baudrate)); - return 1; - } - break; - - case 'm': - if (strlen(optarg) != 3 - || serial_get_bits(optarg) == SERIAL_BITS_INVALID - || serial_get_parity(optarg) == SERIAL_PARITY_INVALID - || serial_get_stopbit(optarg) == SERIAL_STOPBIT_INVALID) { - fprintf(stderr, "Invalid serial mode\n"); - return 1; - } - port_opts.serial_mode = optarg; - break; - - case 'r': - case 'w': - rd = rd || c == 'r'; - wr = wr || c == 'w'; - if (rd && wr) { - fprintf(stderr, "ERROR: Invalid options, can't read & write at the same time\n"); - return 1; - } - filename = optarg; - if (filename[0] == '-') { - force_binary = 1; - } - break; - case 'e': - if (readwrite_len || start_addr) { - fprintf(stderr, "ERROR: Invalid options, can't specify start page / num pages and start address/length\n"); - return 1; - } - npages = strtoul(optarg, NULL, 0); - if (npages > 0xFF || npages < 0) { - fprintf(stderr, "ERROR: You need to specify a page count between 0 and 255"); - return 1; - } - if (!npages) - no_erase = 1; - break; - case 'u': - wu = 1; - if (rd || wr) { - fprintf(stderr, "ERROR: Invalid options, can't write unprotect and read/write at the same time\n"); - return 1; - } - break; - - case 'j': - rp = 1; - if (rd || wr) { - fprintf(stderr, "ERROR: Invalid options, can't read protect and read/write at the same time\n"); - return 1; - } - break; - - case 'k': - ur = 1; - if (rd || wr) { - fprintf(stderr, "ERROR: Invalid options, can't read unprotect and read/write at the same time\n"); - return 1; - } - break; - - case 'o': - eraseOnly = 1; - if (rd || wr) { - fprintf(stderr, "ERROR: Invalid options, can't erase-only and read/write at the same time\n"); - return 1; - } - break; - - case 'v': - verify = 1; - break; - - case 'n': - retry = strtoul(optarg, NULL, 0); - break; - - case 'g': - exec_flag = 1; - execute = strtoul(optarg, NULL, 0); - if (execute % 4 != 0) { - fprintf(stderr, "ERROR: Execution address must be word-aligned\n"); - return 1; - } - break; - case 's': - if (readwrite_len || start_addr) { - fprintf(stderr, "ERROR: Invalid options, can't specify start page / num pages and start address/length\n"); - return 1; - } - spage = strtoul(optarg, NULL, 0); - break; - case 'S': - if (spage || npages) { - fprintf(stderr, "ERROR: Invalid options, can't specify start page / num pages and start address/length\n"); - return 1; - } else { - start_addr = strtoul(optarg, &pLen, 0); - if (*pLen == ':') { - pLen++; - readwrite_len = strtoul(pLen, NULL, 0); - if (readwrite_len == 0) { - fprintf(stderr, "ERROR: Invalid options, can't specify zero length\n"); - return 1; - } - } - } - break; - case 'F': - port_opts.rx_frame_max = strtoul(optarg, &pLen, 0); - if (*pLen == ':') { - pLen++; - port_opts.tx_frame_max = strtoul(pLen, NULL, 0); - } - if (port_opts.rx_frame_max < 0 - || port_opts.tx_frame_max < 0) { - fprintf(stderr, "ERROR: Invalid negative value for option -F\n"); - return 1; - } - if (port_opts.rx_frame_max == 0) - port_opts.rx_frame_max = STM32_MAX_RX_FRAME; - if (port_opts.tx_frame_max == 0) - port_opts.tx_frame_max = STM32_MAX_TX_FRAME; - if (port_opts.rx_frame_max < 20 - || port_opts.tx_frame_max < 5) { - fprintf(stderr, "ERROR: current code cannot work with small frames.\n"); - fprintf(stderr, "min(RX) = 20, min(TX) = 5\n"); - return 1; - } - if (port_opts.rx_frame_max > STM32_MAX_RX_FRAME) { - fprintf(stderr, "WARNING: Ignore RX length in option -F\n"); - port_opts.rx_frame_max = STM32_MAX_RX_FRAME; - } - if (port_opts.tx_frame_max > STM32_MAX_TX_FRAME) { - fprintf(stderr, "WARNING: Ignore TX length in option -F\n"); - port_opts.tx_frame_max = STM32_MAX_TX_FRAME; - } - break; - case 'f': - force_binary = 1; - break; - - case 'c': - init_flag = 0; - break; - - case 'h': - show_help(argv[0]); - exit(0); - - case 'i': - gpio_seq = optarg; - break; - - case 'R': - reset_flag = 1; - break; - - case 'C': - crc = 1; - break; - } - } - - for (c = optind; c < argc; ++c) { - if (port_opts.device) { - fprintf(stderr, "ERROR: Invalid parameter specified\n"); - show_help(argv[0]); - return 1; - } - port_opts.device = argv[c]; - } - - if (port_opts.device == NULL) { - fprintf(stderr, "ERROR: Device not specified\n"); - show_help(argv[0]); - return 1; - } - - if (!wr && verify) { - fprintf(stderr, "ERROR: Invalid usage, -v is only valid when writing\n"); - show_help(argv[0]); - return 1; - } - - return 0; -} - -void show_help(char *name) { - fprintf(stderr, - "Usage: %s [-bvngfhc] [-[rw] filename] [tty_device | i2c_device]\n" - " -a bus_address Bus address (e.g. for I2C port)\n" - " -b rate Baud rate (default 57600)\n" - " -m mode Serial port mode (default 8e1)\n" - " -r filename Read flash to file (or - stdout)\n" - " -w filename Write flash from file (or - stdout)\n" - " -C Compute CRC of flash content\n" - " -u Disable the flash write-protection\n" - " -j Enable the flash read-protection\n" - " -k Disable the flash read-protection\n" - " -o Erase only\n" - " -e n Only erase n pages before writing the flash\n" - " -v Verify writes\n" - " -n count Retry failed writes up to count times (default 10)\n" - " -g address Start execution at specified address (0 = flash start)\n" - " -S address[:length] Specify start address and optionally length for\n" - " read/write/erase operations\n" - " -F RX_length[:TX_length] Specify the max length of RX and TX frame\n" - " -s start_page Flash at specified page (0 = flash start)\n" - " -f Force binary parser\n" - " -h Show this help\n" - " -c Resume the connection (don't send initial INIT)\n" - " *Baud rate must be kept the same as the first init*\n" - " This is useful if the reset fails\n" - " -i GPIO_string GPIO sequence to enter/exit bootloader mode\n" - " GPIO_string=[entry_seq][:[exit_seq]]\n" - " sequence=[-]n[,sequence]\n" - " -R Reset device at exit.\n" - "\n" - "Examples:\n" - " Get device information:\n" - " %s /dev/ttyS0\n" - " or:\n" - " %s /dev/i2c-0\n" - "\n" - " Write with verify and then start execution:\n" - " %s -w filename -v -g 0x0 /dev/ttyS0\n" - "\n" - " Read flash to file:\n" - " %s -r filename /dev/ttyS0\n" - "\n" - " Read 100 bytes of flash from 0x1000 to stdout:\n" - " %s -r - -S 0x1000:100 /dev/ttyS0\n" - "\n" - " Start execution:\n" - " %s -g 0x0 /dev/ttyS0\n" - "\n" - " GPIO sequence:\n" - " - entry sequence: GPIO_3=low, GPIO_2=low, GPIO_2=high\n" - " - exit sequence: GPIO_3=high, GPIO_2=low, GPIO_2=high\n" - " %s -i -3,-2,2:3,-2,2 /dev/ttyS0\n", - name, - name, - name, - name, - name, - name, - name, - name - ); -} - diff --git a/macosx/src/stm32flash_serial/src/parsers/Android.mk b/macosx/src/stm32flash_serial/src/parsers/Android.mk deleted file mode 100644 index afec18cd5..000000000 --- a/macosx/src/stm32flash_serial/src/parsers/Android.mk +++ /dev/null @@ -1,6 +0,0 @@ -LOCAL_PATH := $(call my-dir) - -include $(CLEAR_VARS) -LOCAL_MODULE := libparsers -LOCAL_SRC_FILES := binary.c hex.c -include $(BUILD_STATIC_LIBRARY) diff --git a/macosx/src/stm32flash_serial/src/parsers/Makefile b/macosx/src/stm32flash_serial/src/parsers/Makefile deleted file mode 100644 index bb7df1e02..000000000 --- a/macosx/src/stm32flash_serial/src/parsers/Makefile +++ /dev/null @@ -1,12 +0,0 @@ - -CFLAGS += -Wall -g - -all: parsers.a - -parsers.a: binary.o hex.o - $(AR) rc $@ binary.o hex.o - -clean: - rm -f *.o parsers.a - -.PHONY: all clean diff --git a/macosx/src/stm32flash_serial/src/parsers/binary.c b/macosx/src/stm32flash_serial/src/parsers/binary.c deleted file mode 100644 index f491952bb..000000000 --- a/macosx/src/stm32flash_serial/src/parsers/binary.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#include -#include -#include -#include -#include - -#include "binary.h" - -typedef struct { - int fd; - char write; - struct stat stat; -} binary_t; - -void* binary_init() { - return calloc(sizeof(binary_t), 1); -} - -parser_err_t binary_open(void *storage, const char *filename, const char write) { - binary_t *st = storage; - if (write) { - if (filename[0] == '-') - st->fd = 1; - else - st->fd = open( - filename, -#ifndef __WIN32__ - O_WRONLY | O_CREAT | O_TRUNC, -#else - O_WRONLY | O_CREAT | O_TRUNC | O_BINARY, -#endif -#ifndef __WIN32__ - S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH -#else - 0 -#endif - ); - st->stat.st_size = 0; - } else { - if (filename[0] == '-') { - st->fd = 0; - } else { - if (stat(filename, &st->stat) != 0) - return PARSER_ERR_INVALID_FILE; - st->fd = open(filename, -#ifndef __WIN32__ - O_RDONLY -#else - O_RDONLY | O_BINARY -#endif - ); - } - } - - st->write = write; - return st->fd == -1 ? PARSER_ERR_SYSTEM : PARSER_ERR_OK; -} - -parser_err_t binary_close(void *storage) { - binary_t *st = storage; - - if (st->fd) close(st->fd); - free(st); - return PARSER_ERR_OK; -} - -unsigned int binary_size(void *storage) { - binary_t *st = storage; - return st->stat.st_size; -} - -parser_err_t binary_read(void *storage, void *data, unsigned int *len) { - binary_t *st = storage; - unsigned int left = *len; - if (st->write) return PARSER_ERR_WRONLY; - - ssize_t r; - while(left > 0) { - r = read(st->fd, data, left); - /* If there is no data to read at all, return OK, but with zero read */ - if (r == 0 && left == *len) { - *len = 0; - return PARSER_ERR_OK; - } - if (r <= 0) return PARSER_ERR_SYSTEM; - left -= r; - data += r; - } - - *len = *len - left; - return PARSER_ERR_OK; -} - -parser_err_t binary_write(void *storage, void *data, unsigned int len) { - binary_t *st = storage; - if (!st->write) return PARSER_ERR_RDONLY; - - ssize_t r; - while(len > 0) { - r = write(st->fd, data, len); - if (r < 1) return PARSER_ERR_SYSTEM; - st->stat.st_size += r; - - len -= r; - data += r; - } - - return PARSER_ERR_OK; -} - -parser_t PARSER_BINARY = { - "Raw BINARY", - binary_init, - binary_open, - binary_close, - binary_size, - binary_read, - binary_write -}; - diff --git a/macosx/src/stm32flash_serial/src/parsers/binary.h b/macosx/src/stm32flash_serial/src/parsers/binary.h deleted file mode 100644 index d989acfa0..000000000 --- a/macosx/src/stm32flash_serial/src/parsers/binary.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _PARSER_BINARY_H -#define _PARSER_BINARY_H - -#include "parser.h" - -extern parser_t PARSER_BINARY; -#endif diff --git a/macosx/src/stm32flash_serial/src/parsers/hex.c b/macosx/src/stm32flash_serial/src/parsers/hex.c deleted file mode 100644 index 3baf85623..000000000 --- a/macosx/src/stm32flash_serial/src/parsers/hex.c +++ /dev/null @@ -1,224 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#include -#include -#include -#include -#include -#include -#include - -#include "hex.h" -#include "../utils.h" - -typedef struct { - size_t data_len, offset; - uint8_t *data; - uint8_t base; -} hex_t; - -void* hex_init() { - return calloc(sizeof(hex_t), 1); -} - -parser_err_t hex_open(void *storage, const char *filename, const char write) { - hex_t *st = storage; - if (write) { - return PARSER_ERR_RDONLY; - } else { - char mark; - int i, fd; - uint8_t checksum; - unsigned int c; - uint32_t base = 0; - unsigned int last_address = 0x0; - - fd = open(filename, O_RDONLY); - if (fd < 0) - return PARSER_ERR_SYSTEM; - - /* read in the file */ - - while(read(fd, &mark, 1) != 0) { - if (mark == '\n' || mark == '\r') continue; - if (mark != ':') - return PARSER_ERR_INVALID_FILE; - - char buffer[9]; - unsigned int reclen, address, type; - uint8_t *record = NULL; - - /* get the reclen, address, and type */ - buffer[8] = 0; - if (read(fd, &buffer, 8) != 8) return PARSER_ERR_INVALID_FILE; - if (sscanf(buffer, "%2x%4x%2x", &reclen, &address, &type) != 3) { - close(fd); - return PARSER_ERR_INVALID_FILE; - } - - /* setup the checksum */ - checksum = - reclen + - ((address & 0xFF00) >> 8) + - ((address & 0x00FF) >> 0) + - type; - - switch(type) { - /* data record */ - case 0: - c = address - last_address; - st->data = realloc(st->data, st->data_len + c + reclen); - - /* if there is a gap, set it to 0xff and increment the length */ - if (c > 0) { - memset(&st->data[st->data_len], 0xff, c); - st->data_len += c; - } - - last_address = address + reclen; - record = &st->data[st->data_len]; - st->data_len += reclen; - break; - - /* extended segment address record */ - case 2: - base = 0; - break; - - /* extended linear address record */ - case 4: - base = address; - break; - } - - buffer[2] = 0; - for(i = 0; i < reclen; ++i) { - if (read(fd, &buffer, 2) != 2 || sscanf(buffer, "%2x", &c) != 1) { - close(fd); - return PARSER_ERR_INVALID_FILE; - } - - /* add the byte to the checksum */ - checksum += c; - - switch(type) { - case 0: - if (record != NULL) { - record[i] = c; - } else { - return PARSER_ERR_INVALID_FILE; - } - break; - - case 2: - case 4: - base = (base << 8) | c; - break; - } - } - - /* read, scan, and verify the checksum */ - if ( - read(fd, &buffer, 2 ) != 2 || - sscanf(buffer, "%2x", &c) != 1 || - (uint8_t)(checksum + c) != 0x00 - ) { - close(fd); - return PARSER_ERR_INVALID_FILE; - } - - switch(type) { - /* EOF */ - case 1: - close(fd); - return PARSER_ERR_OK; - - /* address record */ - case 2: base = base << 4; - case 4: base = be_u32(base); - /* Reset last_address since our base changed */ - last_address = 0; - - if (st->base == 0) { - st->base = base; - break; - } - - /* we cant cope with files out of order */ - if (base < st->base) { - close(fd); - return PARSER_ERR_INVALID_FILE; - } - - /* if there is a gap, enlarge and fill with zeros */ - unsigned int len = base - st->base; - if (len > st->data_len) { - st->data = realloc(st->data, len); - memset(&st->data[st->data_len], 0, len - st->data_len); - st->data_len = len; - } - break; - } - } - - close(fd); - return PARSER_ERR_OK; - } -} - -parser_err_t hex_close(void *storage) { - hex_t *st = storage; - if (st) free(st->data); - free(st); - return PARSER_ERR_OK; -} - -unsigned int hex_size(void *storage) { - hex_t *st = storage; - return st->data_len; -} - -parser_err_t hex_read(void *storage, void *data, unsigned int *len) { - hex_t *st = storage; - unsigned int left = st->data_len - st->offset; - unsigned int get = left > *len ? *len : left; - - memcpy(data, &st->data[st->offset], get); - st->offset += get; - - *len = get; - return PARSER_ERR_OK; -} - -parser_err_t hex_write(void *storage, void *data, unsigned int len) { - return PARSER_ERR_RDONLY; -} - -parser_t PARSER_HEX = { - "Intel HEX", - hex_init, - hex_open, - hex_close, - hex_size, - hex_read, - hex_write -}; - diff --git a/macosx/src/stm32flash_serial/src/parsers/hex.h b/macosx/src/stm32flash_serial/src/parsers/hex.h deleted file mode 100644 index 02413c9c9..000000000 --- a/macosx/src/stm32flash_serial/src/parsers/hex.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _PARSER_HEX_H -#define _PARSER_HEX_H - -#include "parser.h" - -extern parser_t PARSER_HEX; -#endif diff --git a/macosx/src/stm32flash_serial/src/parsers/parser.h b/macosx/src/stm32flash_serial/src/parsers/parser.h deleted file mode 100644 index c2fae3cf8..000000000 --- a/macosx/src/stm32flash_serial/src/parsers/parser.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _H_PARSER -#define _H_PARSER - -enum parser_err { - PARSER_ERR_OK, - PARSER_ERR_SYSTEM, - PARSER_ERR_INVALID_FILE, - PARSER_ERR_WRONLY, - PARSER_ERR_RDONLY -}; -typedef enum parser_err parser_err_t; - -struct parser { - const char *name; - void* (*init )(); /* initialise the parser */ - parser_err_t (*open )(void *storage, const char *filename, const char write); /* open the file for read|write */ - parser_err_t (*close)(void *storage); /* close and free the parser */ - unsigned int (*size )(void *storage); /* get the total data size */ - parser_err_t (*read )(void *storage, void *data, unsigned int *len); /* read a block of data */ - parser_err_t (*write)(void *storage, void *data, unsigned int len); /* write a block of data */ -}; -typedef struct parser parser_t; - -static inline const char* parser_errstr(parser_err_t err) { - switch(err) { - case PARSER_ERR_OK : return "OK"; - case PARSER_ERR_SYSTEM : return "System Error"; - case PARSER_ERR_INVALID_FILE: return "Invalid File"; - case PARSER_ERR_WRONLY : return "Parser can only write"; - case PARSER_ERR_RDONLY : return "Parser can only read"; - default: - return "Unknown Error"; - } -} - -#endif diff --git a/macosx/src/stm32flash_serial/src/port.c b/macosx/src/stm32flash_serial/src/port.c deleted file mode 100644 index 08e58cc34..000000000 --- a/macosx/src/stm32flash_serial/src/port.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2014 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include - -#include "serial.h" -#include "port.h" - - -extern struct port_interface port_serial; -extern struct port_interface port_i2c; - -static struct port_interface *ports[] = { - &port_serial, - &port_i2c, - NULL, -}; - - -port_err_t port_open(struct port_options *ops, struct port_interface **outport) -{ - int ret; - static struct port_interface **port; - - for (port = ports; *port; port++) { - ret = (*port)->open(*port, ops); - if (ret == PORT_ERR_NODEV) - continue; - if (ret == PORT_ERR_OK) - break; - fprintf(stderr, "Error probing interface \"%s\"\n", - (*port)->name); - } - if (*port == NULL) { - fprintf(stderr, "Cannot handle device \"%s\"\n", - ops->device); - return PORT_ERR_UNKNOWN; - } - - *outport = *port; - return PORT_ERR_OK; -} diff --git a/macosx/src/stm32flash_serial/src/port.h b/macosx/src/stm32flash_serial/src/port.h deleted file mode 100644 index 290f03496..000000000 --- a/macosx/src/stm32flash_serial/src/port.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2014 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _H_PORT -#define _H_PORT - -typedef enum { - PORT_ERR_OK = 0, - PORT_ERR_NODEV, /* No such device */ - PORT_ERR_TIMEDOUT, /* Operation timed out */ - PORT_ERR_UNKNOWN, -} port_err_t; - -/* flags */ -#define PORT_BYTE (1 << 0) /* byte (not frame) oriented */ -#define PORT_GVR_ETX (1 << 1) /* cmd GVR returns protection status */ -#define PORT_CMD_INIT (1 << 2) /* use INIT cmd to autodetect speed */ -#define PORT_RETRY (1 << 3) /* allowed read() retry after timeout */ -#define PORT_STRETCH_W (1 << 4) /* warning for no-stretching commands */ - -/* all options and flags used to open and configure an interface */ -struct port_options { - const char *device; - serial_baud_t baudRate; - const char *serial_mode; - int bus_addr; - int rx_frame_max; - int tx_frame_max; -}; - -/* - * Specify the length of reply for command GET - * This is helpful for frame-oriented protocols, e.g. i2c, to avoid time - * consuming try-fail-timeout-retry operation. - * On byte-oriented protocols, i.e. UART, this information would be skipped - * after read the first byte, so not needed. - */ -struct varlen_cmd { - uint8_t version; - uint8_t length; -}; - -struct port_interface { - const char *name; - unsigned flags; - port_err_t (*open)(struct port_interface *port, struct port_options *ops); - port_err_t (*close)(struct port_interface *port); - port_err_t (*read)(struct port_interface *port, void *buf, size_t nbyte); - port_err_t (*write)(struct port_interface *port, void *buf, size_t nbyte); - port_err_t (*gpio)(struct port_interface *port, serial_gpio_t n, int level); - const char *(*get_cfg_str)(struct port_interface *port); - struct varlen_cmd *cmd_get_reply; - void *private; -}; - -port_err_t port_open(struct port_options *ops, struct port_interface **outport); - -#endif diff --git a/macosx/src/stm32flash_serial/src/protocol.txt b/macosx/src/stm32flash_serial/src/protocol.txt deleted file mode 100644 index 039109908..000000000 --- a/macosx/src/stm32flash_serial/src/protocol.txt +++ /dev/null @@ -1,19 +0,0 @@ -The communication protocol used by ST bootloader is documented in following ST -application notes, depending on communication port. - -In current version of stm32flash are supported only UART and I2C ports. - -* AN3154: CAN protocol used in the STM32 bootloader - http://www.st.com/web/en/resource/technical/document/application_note/CD00264321.pdf - -* AN3155: USART protocol used in the STM32(TM) bootloader - http://www.st.com/web/en/resource/technical/document/application_note/CD00264342.pdf - -* AN4221: I2C protocol used in the STM32 bootloader - http://www.st.com/web/en/resource/technical/document/application_note/DM00072315.pdf - -* AN4286: SPI protocol used in the STM32 bootloader - http://www.st.com/web/en/resource/technical/document/application_note/DM00081379.pdf - -Boot mode selection for STM32 is documented in ST application note AN2606, available in ST website: - http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf diff --git a/macosx/src/stm32flash_serial/src/serial.h b/macosx/src/stm32flash_serial/src/serial.h deleted file mode 100644 index 227ba163b..000000000 --- a/macosx/src/stm32flash_serial/src/serial.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _SERIAL_H -#define _SERIAL_H - -typedef struct serial serial_t; - -typedef enum { - SERIAL_PARITY_NONE, - SERIAL_PARITY_EVEN, - SERIAL_PARITY_ODD, - - SERIAL_PARITY_INVALID -} serial_parity_t; - -typedef enum { - SERIAL_BITS_5, - SERIAL_BITS_6, - SERIAL_BITS_7, - SERIAL_BITS_8, - - SERIAL_BITS_INVALID -} serial_bits_t; - -typedef enum { - SERIAL_BAUD_1200, - SERIAL_BAUD_1800, - SERIAL_BAUD_2400, - SERIAL_BAUD_4800, - SERIAL_BAUD_9600, - SERIAL_BAUD_19200, - SERIAL_BAUD_38400, - SERIAL_BAUD_57600, - SERIAL_BAUD_115200, - SERIAL_BAUD_128000, - SERIAL_BAUD_230400, - SERIAL_BAUD_256000, - SERIAL_BAUD_460800, - SERIAL_BAUD_500000, - SERIAL_BAUD_576000, - SERIAL_BAUD_921600, - SERIAL_BAUD_1000000, - SERIAL_BAUD_1500000, - SERIAL_BAUD_2000000, - - SERIAL_BAUD_INVALID -} serial_baud_t; - -typedef enum { - SERIAL_STOPBIT_1, - SERIAL_STOPBIT_2, - - SERIAL_STOPBIT_INVALID -} serial_stopbit_t; - -typedef enum { - GPIO_RTS = 1, - GPIO_DTR, - GPIO_BRK, -} serial_gpio_t; - -/* common helper functions */ -serial_baud_t serial_get_baud(const unsigned int baud); -unsigned int serial_get_baud_int(const serial_baud_t baud); -serial_bits_t serial_get_bits(const char *mode); -unsigned int serial_get_bits_int(const serial_bits_t bits); -serial_parity_t serial_get_parity(const char *mode); -char serial_get_parity_str(const serial_parity_t parity); -serial_stopbit_t serial_get_stopbit(const char *mode); -unsigned int serial_get_stopbit_int(const serial_stopbit_t stopbit); - -#endif diff --git a/macosx/src/stm32flash_serial/src/serial_common.c b/macosx/src/stm32flash_serial/src/serial_common.c deleted file mode 100644 index 43e48e1ac..000000000 --- a/macosx/src/stm32flash_serial/src/serial_common.c +++ /dev/null @@ -1,154 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include "serial.h" - -serial_baud_t serial_get_baud(const unsigned int baud) { - switch(baud) { - case 1200: return SERIAL_BAUD_1200 ; - case 1800: return SERIAL_BAUD_1800 ; - case 2400: return SERIAL_BAUD_2400 ; - case 4800: return SERIAL_BAUD_4800 ; - case 9600: return SERIAL_BAUD_9600 ; - case 19200: return SERIAL_BAUD_19200 ; - case 38400: return SERIAL_BAUD_38400 ; - case 57600: return SERIAL_BAUD_57600 ; - case 115200: return SERIAL_BAUD_115200; - case 128000: return SERIAL_BAUD_128000; - case 230400: return SERIAL_BAUD_230400; - case 256000: return SERIAL_BAUD_256000; - case 460800: return SERIAL_BAUD_460800; - case 500000: return SERIAL_BAUD_500000; - case 576000: return SERIAL_BAUD_576000; - case 921600: return SERIAL_BAUD_921600; - case 1000000: return SERIAL_BAUD_1000000; - case 1500000: return SERIAL_BAUD_1500000; - case 2000000: return SERIAL_BAUD_2000000; - - default: - return SERIAL_BAUD_INVALID; - } -} - -unsigned int serial_get_baud_int(const serial_baud_t baud) { - switch(baud) { - case SERIAL_BAUD_1200 : return 1200 ; - case SERIAL_BAUD_1800 : return 1800 ; - case SERIAL_BAUD_2400 : return 2400 ; - case SERIAL_BAUD_4800 : return 4800 ; - case SERIAL_BAUD_9600 : return 9600 ; - case SERIAL_BAUD_19200 : return 19200 ; - case SERIAL_BAUD_38400 : return 38400 ; - case SERIAL_BAUD_57600 : return 57600 ; - case SERIAL_BAUD_115200: return 115200; - case SERIAL_BAUD_128000: return 128000; - case SERIAL_BAUD_230400: return 230400; - case SERIAL_BAUD_256000: return 256000; - case SERIAL_BAUD_460800: return 460800; - case SERIAL_BAUD_500000: return 500000; - case SERIAL_BAUD_576000: return 576000; - case SERIAL_BAUD_921600: return 921600; - case SERIAL_BAUD_1000000: return 1000000; - case SERIAL_BAUD_1500000: return 1500000; - case SERIAL_BAUD_2000000: return 2000000; - - case SERIAL_BAUD_INVALID: - default: - return 0; - } -} - -serial_bits_t serial_get_bits(const char *mode) { - if (!mode) - return SERIAL_BITS_INVALID; - switch(mode[0]) { - case '5': return SERIAL_BITS_5; - case '6': return SERIAL_BITS_6; - case '7': return SERIAL_BITS_7; - case '8': return SERIAL_BITS_8; - - default: - return SERIAL_BITS_INVALID; - } -} - -unsigned int serial_get_bits_int(const serial_bits_t bits) { - switch(bits) { - case SERIAL_BITS_5: return 5; - case SERIAL_BITS_6: return 6; - case SERIAL_BITS_7: return 7; - case SERIAL_BITS_8: return 8; - - default: - return 0; - } -} - -serial_parity_t serial_get_parity(const char *mode) { - if (!mode || !mode[0]) - return SERIAL_PARITY_INVALID; - switch(mode[1]) { - case 'N': - case 'n': - return SERIAL_PARITY_NONE; - case 'E': - case 'e': - return SERIAL_PARITY_EVEN; - case 'O': - case 'o': - return SERIAL_PARITY_ODD; - - default: - return SERIAL_PARITY_INVALID; - } -} - -char serial_get_parity_str(const serial_parity_t parity) { - switch(parity) { - case SERIAL_PARITY_NONE: return 'N'; - case SERIAL_PARITY_EVEN: return 'E'; - case SERIAL_PARITY_ODD : return 'O'; - - default: - return ' '; - } -} - -serial_stopbit_t serial_get_stopbit(const char *mode) { - if (!mode || !mode[0] || !mode[1]) - return SERIAL_STOPBIT_INVALID; - switch(mode[2]) { - case '1': return SERIAL_STOPBIT_1; - case '2': return SERIAL_STOPBIT_2; - - default: - return SERIAL_STOPBIT_INVALID; - } -} - -unsigned int serial_get_stopbit_int(const serial_stopbit_t stopbit) { - switch(stopbit) { - case SERIAL_STOPBIT_1: return 1; - case SERIAL_STOPBIT_2: return 2; - - default: - return 0; - } -} - diff --git a/macosx/src/stm32flash_serial/src/serial_platform.c b/macosx/src/stm32flash_serial/src/serial_platform.c deleted file mode 100644 index 98e256921..000000000 --- a/macosx/src/stm32flash_serial/src/serial_platform.c +++ /dev/null @@ -1,5 +0,0 @@ -#if defined(__WIN32__) || defined(__CYGWIN__) -# include "serial_w32.c" -#else -# include "serial_posix.c" -#endif diff --git a/macosx/src/stm32flash_serial/src/serial_posix.c b/macosx/src/stm32flash_serial/src/serial_posix.c deleted file mode 100644 index 284b35b20..000000000 --- a/macosx/src/stm32flash_serial/src/serial_posix.c +++ /dev/null @@ -1,395 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "serial.h" -#include "port.h" - -struct serial { - int fd; - struct termios oldtio; - struct termios newtio; - char setup_str[11]; -}; - -static serial_t *serial_open(const char *device) -{ - serial_t *h = calloc(sizeof(serial_t), 1); - - h->fd = open(device, O_RDWR | O_NOCTTY | O_NDELAY); - if (h->fd < 0) { - free(h); - return NULL; - } - fcntl(h->fd, F_SETFL, 0); - - tcgetattr(h->fd, &h->oldtio); - tcgetattr(h->fd, &h->newtio); - - return h; -} - -static void serial_flush(const serial_t *h) -{ - tcflush(h->fd, TCIFLUSH); -} - -static void serial_close(serial_t *h) -{ - serial_flush(h); - tcsetattr(h->fd, TCSANOW, &h->oldtio); - close(h->fd); - free(h); -} - -static port_err_t serial_setup(serial_t *h, const serial_baud_t baud, - const serial_bits_t bits, - const serial_parity_t parity, - const serial_stopbit_t stopbit) -{ - speed_t port_baud; - tcflag_t port_bits; - tcflag_t port_parity; - tcflag_t port_stop; - struct termios settings; - - switch (baud) { - case SERIAL_BAUD_1200: port_baud = B1200; break; - case SERIAL_BAUD_1800: port_baud = B1800; break; - case SERIAL_BAUD_2400: port_baud = B2400; break; - case SERIAL_BAUD_4800: port_baud = B4800; break; - case SERIAL_BAUD_9600: port_baud = B9600; break; - case SERIAL_BAUD_19200: port_baud = B19200; break; - case SERIAL_BAUD_38400: port_baud = B38400; break; - case SERIAL_BAUD_57600: port_baud = B57600; break; - case SERIAL_BAUD_115200: port_baud = B115200; break; - case SERIAL_BAUD_230400: port_baud = B230400; break; -#ifdef B460800 - case SERIAL_BAUD_460800: port_baud = B460800; break; -#endif /* B460800 */ -#ifdef B921600 - case SERIAL_BAUD_921600: port_baud = B921600; break; -#endif /* B921600 */ -#ifdef B500000 - case SERIAL_BAUD_500000: port_baud = B500000; break; -#endif /* B500000 */ -#ifdef B576000 - case SERIAL_BAUD_576000: port_baud = B576000; break; -#endif /* B576000 */ -#ifdef B1000000 - case SERIAL_BAUD_1000000: port_baud = B1000000; break; -#endif /* B1000000 */ -#ifdef B1500000 - case SERIAL_BAUD_1500000: port_baud = B1500000; break; -#endif /* B1500000 */ -#ifdef B2000000 - case SERIAL_BAUD_2000000: port_baud = B2000000; break; -#endif /* B2000000 */ - - case SERIAL_BAUD_INVALID: - default: - return PORT_ERR_UNKNOWN; - } - - switch (bits) { - case SERIAL_BITS_5: port_bits = CS5; break; - case SERIAL_BITS_6: port_bits = CS6; break; - case SERIAL_BITS_7: port_bits = CS7; break; - case SERIAL_BITS_8: port_bits = CS8; break; - - default: - return PORT_ERR_UNKNOWN; - } - - switch (parity) { - case SERIAL_PARITY_NONE: port_parity = 0; break; - case SERIAL_PARITY_EVEN: port_parity = PARENB; break; - case SERIAL_PARITY_ODD: port_parity = PARENB | PARODD; break; - - default: - return PORT_ERR_UNKNOWN; - } - - switch (stopbit) { - case SERIAL_STOPBIT_1: port_stop = 0; break; - case SERIAL_STOPBIT_2: port_stop = CSTOPB; break; - - default: - return PORT_ERR_UNKNOWN; - } - - /* reset the settings */ -#ifndef __sun /* Used by GNU and BSD. Ignore __SVR4 in test. */ - cfmakeraw(&h->newtio); -#else /* __sun */ - h->newtio.c_iflag &= ~(IGNBRK | BRKINT | PARMRK | ISTRIP | INLCR - | IGNCR | ICRNL | IXON); - if (port_parity) - h->newtio.c_iflag |= INPCK; - - h->newtio.c_oflag &= ~OPOST; - h->newtio.c_lflag &= ~(ECHO | ECHONL | ICANON | ISIG | IEXTEN); - h->newtio.c_cflag &= ~(CSIZE | PARENB); - h->newtio.c_cflag |= CS8; -#endif /* __sun */ -#ifdef __QNXNTO__ - h->newtio.c_cflag &= ~(CSIZE | IHFLOW | OHFLOW); -#else - h->newtio.c_cflag &= ~(CSIZE | CRTSCTS); -#endif - h->newtio.c_cflag &= ~(CSIZE | CRTSCTS); - h->newtio.c_iflag &= ~(IXON | IXOFF | IXANY | IGNPAR); - h->newtio.c_lflag &= ~(ECHOK | ECHOCTL | ECHOKE); - h->newtio.c_oflag &= ~(OPOST | ONLCR); - - /* setup the new settings */ - cfsetispeed(&h->newtio, port_baud); - cfsetospeed(&h->newtio, port_baud); - h->newtio.c_cflag |= - port_parity | - port_bits | - port_stop | - CLOCAL | - CREAD; - - h->newtio.c_cc[VMIN] = 0; - h->newtio.c_cc[VTIME] = 5; /* in units of 0.1 s */ - - /* set the settings */ - serial_flush(h); - if (tcsetattr(h->fd, TCSANOW, &h->newtio) != 0) - return PORT_ERR_UNKNOWN; - -/* this check fails on CDC-ACM devices, bits 16 and 17 of cflag differ! - * it has been disabled below for now -jcw, 2015-11-09 - if (settings.c_cflag != h->newtio.c_cflag) - fprintf(stderr, "c_cflag mismatch %lx\n", - settings.c_cflag ^ h->newtio.c_cflag); - */ - - /* confirm they were set */ - tcgetattr(h->fd, &settings); - if (settings.c_iflag != h->newtio.c_iflag || - settings.c_oflag != h->newtio.c_oflag || - //settings.c_cflag != h->newtio.c_cflag || - settings.c_lflag != h->newtio.c_lflag) - return PORT_ERR_UNKNOWN; - - snprintf(h->setup_str, sizeof(h->setup_str), "%u %d%c%d", - serial_get_baud_int(baud), - serial_get_bits_int(bits), - serial_get_parity_str(parity), - serial_get_stopbit_int(stopbit)); - return PORT_ERR_OK; -} - -/* - * Roger clark. - * This function is no longer used. But has just been commented out in case it needs - * to be reinstated in the future - -static int startswith(const char *haystack, const char *needle) { - return strncmp(haystack, needle, strlen(needle)) == 0; -} -*/ - -static int is_tty(const char *path) { - char resolved[PATH_MAX]; - - if(!realpath(path, resolved)) return 0; - - - /* - * Roger Clark - * Commented out this check, because on OSX some devices are /dev/cu - * and some users use symbolic links to devices, hence the name may not even start - * with /dev - - if(startswith(resolved, "/dev/tty")) return 1; - - return 0; - */ - - return 1; -} - -static port_err_t serial_posix_open(struct port_interface *port, - struct port_options *ops) -{ - serial_t *h; - - /* 1. check device name match */ - if (!is_tty(ops->device)) - return PORT_ERR_NODEV; - - /* 2. check options */ - if (ops->baudRate == SERIAL_BAUD_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_bits(ops->serial_mode) == SERIAL_BITS_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_parity(ops->serial_mode) == SERIAL_PARITY_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_stopbit(ops->serial_mode) == SERIAL_STOPBIT_INVALID) - return PORT_ERR_UNKNOWN; - - /* 3. open it */ - h = serial_open(ops->device); - if (h == NULL) - return PORT_ERR_UNKNOWN; - - /* 4. set options */ - if (serial_setup(h, ops->baudRate, - serial_get_bits(ops->serial_mode), - serial_get_parity(ops->serial_mode), - serial_get_stopbit(ops->serial_mode) - ) != PORT_ERR_OK) { - serial_close(h); - return PORT_ERR_UNKNOWN; - } - - port->private = h; - return PORT_ERR_OK; -} - -static port_err_t serial_posix_close(struct port_interface *port) -{ - serial_t *h; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - serial_close(h); - port->private = NULL; - return PORT_ERR_OK; -} - -static port_err_t serial_posix_read(struct port_interface *port, void *buf, - size_t nbyte) -{ - serial_t *h; - ssize_t r; - uint8_t *pos = (uint8_t *)buf; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - while (nbyte) { - r = read(h->fd, pos, nbyte); - if (r == 0) - return PORT_ERR_TIMEDOUT; - if (r < 0) - return PORT_ERR_UNKNOWN; - - nbyte -= r; - pos += r; - } - return PORT_ERR_OK; -} - -static port_err_t serial_posix_write(struct port_interface *port, void *buf, - size_t nbyte) -{ - serial_t *h; - ssize_t r; - const uint8_t *pos = (const uint8_t *)buf; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - while (nbyte) { - r = write(h->fd, pos, nbyte); - if (r < 1) - return PORT_ERR_UNKNOWN; - - nbyte -= r; - pos += r; - } - return PORT_ERR_OK; -} - -static port_err_t serial_posix_gpio(struct port_interface *port, - serial_gpio_t n, int level) -{ - serial_t *h; - int bit, lines; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - switch (n) { - case GPIO_RTS: - bit = TIOCM_RTS; - break; - - case GPIO_DTR: - bit = TIOCM_DTR; - break; - - case GPIO_BRK: - if (level == 0) - return PORT_ERR_OK; - if (tcsendbreak(h->fd, 1)) - return PORT_ERR_UNKNOWN; - return PORT_ERR_OK; - - default: - return PORT_ERR_UNKNOWN; - } - - /* handle RTS/DTR */ - if (ioctl(h->fd, TIOCMGET, &lines)) - return PORT_ERR_UNKNOWN; - lines = level ? lines | bit : lines & ~bit; - if (ioctl(h->fd, TIOCMSET, &lines)) - return PORT_ERR_UNKNOWN; - - return PORT_ERR_OK; -} - -static const char *serial_posix_get_cfg_str(struct port_interface *port) -{ - serial_t *h; - - h = (serial_t *)port->private; - return h ? h->setup_str : "INVALID"; -} - -struct port_interface port_serial = { - .name = "serial_posix", - .flags = PORT_BYTE | PORT_GVR_ETX | PORT_CMD_INIT | PORT_RETRY, - .open = serial_posix_open, - .close = serial_posix_close, - .read = serial_posix_read, - .write = serial_posix_write, - .gpio = serial_posix_gpio, - .get_cfg_str = serial_posix_get_cfg_str, -}; diff --git a/macosx/src/stm32flash_serial/src/serial_w32.c b/macosx/src/stm32flash_serial/src/serial_w32.c deleted file mode 100644 index 56772c0a0..000000000 --- a/macosx/src/stm32flash_serial/src/serial_w32.c +++ /dev/null @@ -1,341 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - Copyright (C) 2010 Gareth McMullin - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "serial.h" -#include "port.h" - -struct serial { - HANDLE fd; - DCB oldtio; - DCB newtio; - char setup_str[11]; -}; - -static serial_t *serial_open(const char *device) -{ - serial_t *h = calloc(sizeof(serial_t), 1); - char *devName; - - /* timeout in ms */ - COMMTIMEOUTS timeouts = {MAXDWORD, MAXDWORD, 500, 0, 0}; - - /* Fix the device name if required */ - if (strlen(device) > 4 && device[0] != '\\') { - devName = calloc(1, strlen(device) + 5); - sprintf(devName, "\\\\.\\%s", device); - } else { - devName = (char *)device; - } - - /* Create file handle for port */ - h->fd = CreateFile(devName, GENERIC_READ | GENERIC_WRITE, - 0, /* Exclusive access */ - NULL, /* No security */ - OPEN_EXISTING, - 0, /* No overlap */ - NULL); - - if (devName != device) - free(devName); - - if (h->fd == INVALID_HANDLE_VALUE) { - if (GetLastError() == ERROR_FILE_NOT_FOUND) - fprintf(stderr, "File not found: %s\n", device); - return NULL; - } - - SetupComm(h->fd, 4096, 4096); /* Set input and output buffer size */ - - SetCommTimeouts(h->fd, &timeouts); - - SetCommMask(h->fd, EV_ERR); /* Notify us of error events */ - - GetCommState(h->fd, &h->oldtio); /* Retrieve port parameters */ - GetCommState(h->fd, &h->newtio); /* Retrieve port parameters */ - - /* PurgeComm(h->fd, PURGE_RXABORT | PURGE_TXCLEAR | PURGE_TXABORT | PURGE_TXCLEAR); */ - - return h; -} - -static void serial_flush(const serial_t *h) -{ - /* We shouldn't need to flush in non-overlapping (blocking) mode */ - /* tcflush(h->fd, TCIFLUSH); */ -} - -static void serial_close(serial_t *h) -{ - serial_flush(h); - SetCommState(h->fd, &h->oldtio); - CloseHandle(h->fd); - free(h); -} - -static port_err_t serial_setup(serial_t *h, - const serial_baud_t baud, - const serial_bits_t bits, - const serial_parity_t parity, - const serial_stopbit_t stopbit) -{ - switch (baud) { - case SERIAL_BAUD_1200: h->newtio.BaudRate = CBR_1200; break; - /* case SERIAL_BAUD_1800: h->newtio.BaudRate = CBR_1800; break; */ - case SERIAL_BAUD_2400: h->newtio.BaudRate = CBR_2400; break; - case SERIAL_BAUD_4800: h->newtio.BaudRate = CBR_4800; break; - case SERIAL_BAUD_9600: h->newtio.BaudRate = CBR_9600; break; - case SERIAL_BAUD_19200: h->newtio.BaudRate = CBR_19200; break; - case SERIAL_BAUD_38400: h->newtio.BaudRate = CBR_38400; break; - case SERIAL_BAUD_57600: h->newtio.BaudRate = CBR_57600; break; - case SERIAL_BAUD_115200: h->newtio.BaudRate = CBR_115200; break; - case SERIAL_BAUD_128000: h->newtio.BaudRate = CBR_128000; break; - case SERIAL_BAUD_256000: h->newtio.BaudRate = CBR_256000; break; - /* These are not defined in WinBase.h and might work or not */ - case SERIAL_BAUD_230400: h->newtio.BaudRate = 230400; break; - case SERIAL_BAUD_460800: h->newtio.BaudRate = 460800; break; - case SERIAL_BAUD_500000: h->newtio.BaudRate = 500000; break; - case SERIAL_BAUD_576000: h->newtio.BaudRate = 576000; break; - case SERIAL_BAUD_921600: h->newtio.BaudRate = 921600; break; - case SERIAL_BAUD_1000000: h->newtio.BaudRate = 1000000; break; - case SERIAL_BAUD_1500000: h->newtio.BaudRate = 1500000; break; - case SERIAL_BAUD_2000000: h->newtio.BaudRate = 2000000; break; - case SERIAL_BAUD_INVALID: - - default: - return PORT_ERR_UNKNOWN; - } - - switch (bits) { - case SERIAL_BITS_5: h->newtio.ByteSize = 5; break; - case SERIAL_BITS_6: h->newtio.ByteSize = 6; break; - case SERIAL_BITS_7: h->newtio.ByteSize = 7; break; - case SERIAL_BITS_8: h->newtio.ByteSize = 8; break; - - default: - return PORT_ERR_UNKNOWN; - } - - switch (parity) { - case SERIAL_PARITY_NONE: h->newtio.Parity = NOPARITY; break; - case SERIAL_PARITY_EVEN: h->newtio.Parity = EVENPARITY; break; - case SERIAL_PARITY_ODD: h->newtio.Parity = ODDPARITY; break; - - default: - return PORT_ERR_UNKNOWN; - } - - switch (stopbit) { - case SERIAL_STOPBIT_1: h->newtio.StopBits = ONESTOPBIT; break; - case SERIAL_STOPBIT_2: h->newtio.StopBits = TWOSTOPBITS; break; - - default: - return PORT_ERR_UNKNOWN; - } - - /* reset the settings */ - h->newtio.fOutxCtsFlow = FALSE; - h->newtio.fOutxDsrFlow = FALSE; - h->newtio.fOutX = FALSE; - h->newtio.fInX = FALSE; - h->newtio.fNull = 0; - h->newtio.fAbortOnError = 0; - - /* set the settings */ - serial_flush(h); - if (!SetCommState(h->fd, &h->newtio)) - return PORT_ERR_UNKNOWN; - - snprintf(h->setup_str, sizeof(h->setup_str), "%u %d%c%d", - serial_get_baud_int(baud), - serial_get_bits_int(bits), - serial_get_parity_str(parity), - serial_get_stopbit_int(stopbit) - ); - return PORT_ERR_OK; -} - -static port_err_t serial_w32_open(struct port_interface *port, - struct port_options *ops) -{ - serial_t *h; - - /* 1. check device name match */ - if (!((strlen(ops->device) == 4 || strlen(ops->device) == 5) - && !strncmp(ops->device, "COM", 3) && isdigit(ops->device[3])) - && !(!strncmp(ops->device, "\\\\.\\COM", strlen("\\\\.\\COM")) - && isdigit(ops->device[strlen("\\\\.\\COM")]))) - return PORT_ERR_NODEV; - - /* 2. check options */ - if (ops->baudRate == SERIAL_BAUD_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_bits(ops->serial_mode) == SERIAL_BITS_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_parity(ops->serial_mode) == SERIAL_PARITY_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_stopbit(ops->serial_mode) == SERIAL_STOPBIT_INVALID) - return PORT_ERR_UNKNOWN; - - /* 3. open it */ - h = serial_open(ops->device); - if (h == NULL) - return PORT_ERR_UNKNOWN; - - /* 4. set options */ - if (serial_setup(h, ops->baudRate, - serial_get_bits(ops->serial_mode), - serial_get_parity(ops->serial_mode), - serial_get_stopbit(ops->serial_mode) - ) != PORT_ERR_OK) { - serial_close(h); - return PORT_ERR_UNKNOWN; - } - - port->private = h; - return PORT_ERR_OK; -} - -static port_err_t serial_w32_close(struct port_interface *port) -{ - serial_t *h; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - serial_close(h); - port->private = NULL; - return PORT_ERR_OK; -} - -static port_err_t serial_w32_read(struct port_interface *port, void *buf, - size_t nbyte) -{ - serial_t *h; - DWORD r; - uint8_t *pos = (uint8_t *)buf; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - while (nbyte) { - ReadFile(h->fd, pos, nbyte, &r, NULL); - if (r == 0) - return PORT_ERR_TIMEDOUT; - if (r < 0) - return PORT_ERR_UNKNOWN; - - nbyte -= r; - pos += r; - } - return PORT_ERR_OK; -} - -static port_err_t serial_w32_write(struct port_interface *port, void *buf, - size_t nbyte) -{ - serial_t *h; - DWORD r; - uint8_t *pos = (uint8_t *)buf; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - while (nbyte) { - if (!WriteFile(h->fd, pos, nbyte, &r, NULL)) - return PORT_ERR_UNKNOWN; - if (r < 1) - return PORT_ERR_UNKNOWN; - - nbyte -= r; - pos += r; - } - return PORT_ERR_OK; -} - -static port_err_t serial_w32_gpio(struct port_interface *port, - serial_gpio_t n, int level) -{ - serial_t *h; - int bit; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - switch (n) { - case GPIO_RTS: - bit = level ? SETRTS : CLRRTS; - break; - - case GPIO_DTR: - bit = level ? SETDTR : CLRDTR; - break; - - case GPIO_BRK: - if (level == 0) - return PORT_ERR_OK; - if (EscapeCommFunction(h->fd, SETBREAK) == 0) - return PORT_ERR_UNKNOWN; - usleep(500000); - if (EscapeCommFunction(h->fd, CLRBREAK) == 0) - return PORT_ERR_UNKNOWN; - return PORT_ERR_OK; - - default: - return PORT_ERR_UNKNOWN; - } - - /* handle RTS/DTR */ - if (EscapeCommFunction(h->fd, bit) == 0) - return PORT_ERR_UNKNOWN; - - return PORT_ERR_OK; -} - -static const char *serial_w32_get_cfg_str(struct port_interface *port) -{ - serial_t *h; - - h = (serial_t *)port->private; - return h ? h->setup_str : "INVALID"; -} - -struct port_interface port_serial = { - .name = "serial_w32", - .flags = PORT_BYTE | PORT_GVR_ETX | PORT_CMD_INIT | PORT_RETRY, - .open = serial_w32_open, - .close = serial_w32_close, - .read = serial_w32_read, - .write = serial_w32_write, - .gpio = serial_w32_gpio, - .get_cfg_str = serial_w32_get_cfg_str, -}; diff --git a/macosx/src/stm32flash_serial/src/stm32.c b/macosx/src/stm32flash_serial/src/stm32.c deleted file mode 100644 index 74047d244..000000000 --- a/macosx/src/stm32flash_serial/src/stm32.c +++ /dev/null @@ -1,1048 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright 2010 Geoffrey McRae - Copyright 2012-2014 Tormod Volden - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include -#include -#include -#include -#include - -#include "stm32.h" -#include "port.h" -#include "utils.h" - -#define STM32_ACK 0x79 -#define STM32_NACK 0x1F -#define STM32_BUSY 0x76 - -#define STM32_CMD_INIT 0x7F -#define STM32_CMD_GET 0x00 /* get the version and command supported */ -#define STM32_CMD_GVR 0x01 /* get version and read protection status */ -#define STM32_CMD_GID 0x02 /* get ID */ -#define STM32_CMD_RM 0x11 /* read memory */ -#define STM32_CMD_GO 0x21 /* go */ -#define STM32_CMD_WM 0x31 /* write memory */ -#define STM32_CMD_WM_NS 0x32 /* no-stretch write memory */ -#define STM32_CMD_ER 0x43 /* erase */ -#define STM32_CMD_EE 0x44 /* extended erase */ -#define STM32_CMD_EE_NS 0x45 /* extended erase no-stretch */ -#define STM32_CMD_WP 0x63 /* write protect */ -#define STM32_CMD_WP_NS 0x64 /* write protect no-stretch */ -#define STM32_CMD_UW 0x73 /* write unprotect */ -#define STM32_CMD_UW_NS 0x74 /* write unprotect no-stretch */ -#define STM32_CMD_RP 0x82 /* readout protect */ -#define STM32_CMD_RP_NS 0x83 /* readout protect no-stretch */ -#define STM32_CMD_UR 0x92 /* readout unprotect */ -#define STM32_CMD_UR_NS 0x93 /* readout unprotect no-stretch */ -#define STM32_CMD_CRC 0xA1 /* compute CRC */ -#define STM32_CMD_ERR 0xFF /* not a valid command */ - -#define STM32_RESYNC_TIMEOUT 35 /* seconds */ -#define STM32_MASSERASE_TIMEOUT 35 /* seconds */ -#define STM32_SECTERASE_TIMEOUT 5 /* seconds */ -#define STM32_BLKWRITE_TIMEOUT 1 /* seconds */ -#define STM32_WUNPROT_TIMEOUT 1 /* seconds */ -#define STM32_WPROT_TIMEOUT 1 /* seconds */ -#define STM32_RPROT_TIMEOUT 1 /* seconds */ - -#define STM32_CMD_GET_LENGTH 17 /* bytes in the reply */ - -struct stm32_cmd { - uint8_t get; - uint8_t gvr; - uint8_t gid; - uint8_t rm; - uint8_t go; - uint8_t wm; - uint8_t er; /* this may be extended erase */ - uint8_t wp; - uint8_t uw; - uint8_t rp; - uint8_t ur; - uint8_t crc; -}; - -/* Reset code for ARMv7-M (Cortex-M3) and ARMv6-M (Cortex-M0) - * see ARMv7-M or ARMv6-M Architecture Reference Manual (table B3-8) - * or "The definitive guide to the ARM Cortex-M3", section 14.4. - */ -static const uint8_t stm_reset_code[] = { - 0x01, 0x49, // ldr r1, [pc, #4] ; () - 0x02, 0x4A, // ldr r2, [pc, #8] ; () - 0x0A, 0x60, // str r2, [r1, #0] - 0xfe, 0xe7, // endless: b endless - 0x0c, 0xed, 0x00, 0xe0, // .word 0xe000ed0c = NVIC AIRCR register address - 0x04, 0x00, 0xfa, 0x05 // .word 0x05fa0004 = VECTKEY | SYSRESETREQ -}; - -static const uint32_t stm_reset_code_length = sizeof(stm_reset_code); - -extern const stm32_dev_t devices[]; - -static void stm32_warn_stretching(const char *f) -{ - fprintf(stderr, "Attention !!!\n"); - fprintf(stderr, "\tThis %s error could be caused by your I2C\n", f); - fprintf(stderr, "\tcontroller not accepting \"clock stretching\"\n"); - fprintf(stderr, "\tas required by bootloader.\n"); - fprintf(stderr, "\tCheck \"I2C.txt\" in stm32flash source code.\n"); -} - -static stm32_err_t stm32_get_ack_timeout(const stm32_t *stm, time_t timeout) -{ - struct port_interface *port = stm->port; - uint8_t byte; - port_err_t p_err; - time_t t0, t1; - - if (!(port->flags & PORT_RETRY)) - timeout = 0; - - if (timeout) - time(&t0); - - do { - p_err = port->read(port, &byte, 1); - if (p_err == PORT_ERR_TIMEDOUT && timeout) { - time(&t1); - if (t1 < t0 + timeout) - continue; - } - - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Failed to read ACK byte\n"); - return STM32_ERR_UNKNOWN; - } - - if (byte == STM32_ACK) - return STM32_ERR_OK; - if (byte == STM32_NACK) - return STM32_ERR_NACK; - if (byte != STM32_BUSY) { - fprintf(stderr, "Got byte 0x%02x instead of ACK\n", - byte); - return STM32_ERR_UNKNOWN; - } - } while (1); -} - -static stm32_err_t stm32_get_ack(const stm32_t *stm) -{ - return stm32_get_ack_timeout(stm, 0); -} - -static stm32_err_t stm32_send_command_timeout(const stm32_t *stm, - const uint8_t cmd, - time_t timeout) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - port_err_t p_err; - uint8_t buf[2]; - - buf[0] = cmd; - buf[1] = cmd ^ 0xFF; - p_err = port->write(port, buf, 2); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Failed to send command\n"); - return STM32_ERR_UNKNOWN; - } - s_err = stm32_get_ack_timeout(stm, timeout); - if (s_err == STM32_ERR_OK) - return STM32_ERR_OK; - if (s_err == STM32_ERR_NACK) - fprintf(stderr, "Got NACK from device on command 0x%02x\n", cmd); - else - fprintf(stderr, "Unexpected reply from device on command 0x%02x\n", cmd); - return STM32_ERR_UNKNOWN; -} - -static stm32_err_t stm32_send_command(const stm32_t *stm, const uint8_t cmd) -{ - return stm32_send_command_timeout(stm, cmd, 0); -} - -/* if we have lost sync, send a wrong command and expect a NACK */ -static stm32_err_t stm32_resync(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - port_err_t p_err; - uint8_t buf[2], ack; - time_t t0, t1; - - time(&t0); - t1 = t0; - - buf[0] = STM32_CMD_ERR; - buf[1] = STM32_CMD_ERR ^ 0xFF; - while (t1 < t0 + STM32_RESYNC_TIMEOUT) { - p_err = port->write(port, buf, 2); - if (p_err != PORT_ERR_OK) { - usleep(500000); - time(&t1); - continue; - } - p_err = port->read(port, &ack, 1); - if (p_err != PORT_ERR_OK) { - time(&t1); - continue; - } - if (ack == STM32_NACK) - return STM32_ERR_OK; - time(&t1); - } - return STM32_ERR_UNKNOWN; -} - -/* - * some command receive reply frame with variable length, and length is - * embedded in reply frame itself. - * We can guess the length, but if we guess wrong the protocol gets out - * of sync. - * Use resync for frame oriented interfaces (e.g. I2C) and byte-by-byte - * read for byte oriented interfaces (e.g. UART). - * - * to run safely, data buffer should be allocated for 256+1 bytes - * - * len is value of the first byte in the frame. - */ -static stm32_err_t stm32_guess_len_cmd(const stm32_t *stm, uint8_t cmd, - uint8_t *data, unsigned int len) -{ - struct port_interface *port = stm->port; - port_err_t p_err; - - if (stm32_send_command(stm, cmd) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - if (port->flags & PORT_BYTE) { - /* interface is UART-like */ - p_err = port->read(port, data, 1); - if (p_err != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - len = data[0]; - p_err = port->read(port, data + 1, len + 1); - if (p_err != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - return STM32_ERR_OK; - } - - p_err = port->read(port, data, len + 2); - if (p_err == PORT_ERR_OK && len == data[0]) - return STM32_ERR_OK; - if (p_err != PORT_ERR_OK) { - /* restart with only one byte */ - if (stm32_resync(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - if (stm32_send_command(stm, cmd) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - p_err = port->read(port, data, 1); - if (p_err != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - } - - fprintf(stderr, "Re sync (len = %d)\n", data[0]); - if (stm32_resync(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - len = data[0]; - if (stm32_send_command(stm, cmd) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - p_err = port->read(port, data, len + 2); - if (p_err != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - return STM32_ERR_OK; -} - -/* - * Some interface, e.g. UART, requires a specific init sequence to let STM32 - * autodetect the interface speed. - * The sequence is only required one time after reset. - * stm32flash has command line flag "-c" to prevent sending the init sequence - * in case it was already sent before. - * User can easily forget adding "-c". In this case the bootloader would - * interpret the init sequence as part of a command message, then waiting for - * the rest of the message blocking the interface. - * This function sends the init sequence and, in case of timeout, recovers - * the interface. - */ -static stm32_err_t stm32_send_init_seq(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - port_err_t p_err; - uint8_t byte, cmd = STM32_CMD_INIT; - - p_err = port->write(port, &cmd, 1); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Failed to send init to device\n"); - return STM32_ERR_UNKNOWN; - } - p_err = port->read(port, &byte, 1); - if (p_err == PORT_ERR_OK && byte == STM32_ACK) - return STM32_ERR_OK; - if (p_err == PORT_ERR_OK && byte == STM32_NACK) { - /* We could get error later, but let's continue, for now. */ - fprintf(stderr, - "Warning: the interface was not closed properly.\n"); - return STM32_ERR_OK; - } - if (p_err != PORT_ERR_TIMEDOUT) { - fprintf(stderr, "Failed to init device.\n"); - return STM32_ERR_UNKNOWN; - } - - /* - * Check if previous STM32_CMD_INIT was taken as first byte - * of a command. Send a new byte, we should get back a NACK. - */ - p_err = port->write(port, &cmd, 1); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Failed to send init to device\n"); - return STM32_ERR_UNKNOWN; - } - p_err = port->read(port, &byte, 1); - if (p_err == PORT_ERR_OK && byte == STM32_NACK) - return STM32_ERR_OK; - fprintf(stderr, "Failed to init device.\n"); - return STM32_ERR_UNKNOWN; -} - -/* find newer command by higher code */ -#define newer(prev, a) (((prev) == STM32_CMD_ERR) \ - ? (a) \ - : (((prev) > (a)) ? (prev) : (a))) - -stm32_t *stm32_init(struct port_interface *port, const char init) -{ - uint8_t len, val, buf[257]; - stm32_t *stm; - int i, new_cmds; - - stm = calloc(sizeof(stm32_t), 1); - stm->cmd = malloc(sizeof(stm32_cmd_t)); - memset(stm->cmd, STM32_CMD_ERR, sizeof(stm32_cmd_t)); - stm->port = port; - - if ((port->flags & PORT_CMD_INIT) && init) - if (stm32_send_init_seq(stm) != STM32_ERR_OK) - return NULL; - - /* get the version and read protection status */ - if (stm32_send_command(stm, STM32_CMD_GVR) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - - /* From AN, only UART bootloader returns 3 bytes */ - len = (port->flags & PORT_GVR_ETX) ? 3 : 1; - if (port->read(port, buf, len) != PORT_ERR_OK) - return NULL; - stm->version = buf[0]; - stm->option1 = (port->flags & PORT_GVR_ETX) ? buf[1] : 0; - stm->option2 = (port->flags & PORT_GVR_ETX) ? buf[2] : 0; - if (stm32_get_ack(stm) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - - /* get the bootloader information */ - len = STM32_CMD_GET_LENGTH; - if (port->cmd_get_reply) - for (i = 0; port->cmd_get_reply[i].length; i++) - if (stm->version == port->cmd_get_reply[i].version) { - len = port->cmd_get_reply[i].length; - break; - } - if (stm32_guess_len_cmd(stm, STM32_CMD_GET, buf, len) != STM32_ERR_OK) - return NULL; - len = buf[0] + 1; - stm->bl_version = buf[1]; - new_cmds = 0; - for (i = 1; i < len; i++) { - val = buf[i + 1]; - switch (val) { - case STM32_CMD_GET: - stm->cmd->get = val; break; - case STM32_CMD_GVR: - stm->cmd->gvr = val; break; - case STM32_CMD_GID: - stm->cmd->gid = val; break; - case STM32_CMD_RM: - stm->cmd->rm = val; break; - case STM32_CMD_GO: - stm->cmd->go = val; break; - case STM32_CMD_WM: - case STM32_CMD_WM_NS: - stm->cmd->wm = newer(stm->cmd->wm, val); - break; - case STM32_CMD_ER: - case STM32_CMD_EE: - case STM32_CMD_EE_NS: - stm->cmd->er = newer(stm->cmd->er, val); - break; - case STM32_CMD_WP: - case STM32_CMD_WP_NS: - stm->cmd->wp = newer(stm->cmd->wp, val); - break; - case STM32_CMD_UW: - case STM32_CMD_UW_NS: - stm->cmd->uw = newer(stm->cmd->uw, val); - break; - case STM32_CMD_RP: - case STM32_CMD_RP_NS: - stm->cmd->rp = newer(stm->cmd->rp, val); - break; - case STM32_CMD_UR: - case STM32_CMD_UR_NS: - stm->cmd->ur = newer(stm->cmd->ur, val); - break; - case STM32_CMD_CRC: - stm->cmd->crc = newer(stm->cmd->crc, val); - break; - default: - if (new_cmds++ == 0) - fprintf(stderr, - "GET returns unknown commands (0x%2x", - val); - else - fprintf(stderr, ", 0x%2x", val); - } - } - if (new_cmds) - fprintf(stderr, ")\n"); - if (stm32_get_ack(stm) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - - if (stm->cmd->get == STM32_CMD_ERR - || stm->cmd->gvr == STM32_CMD_ERR - || stm->cmd->gid == STM32_CMD_ERR) { - fprintf(stderr, "Error: bootloader did not returned correct information from GET command\n"); - return NULL; - } - - /* get the device ID */ - if (stm32_guess_len_cmd(stm, stm->cmd->gid, buf, 1) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - len = buf[0] + 1; - if (len < 2) { - stm32_close(stm); - fprintf(stderr, "Only %d bytes sent in the PID, unknown/unsupported device\n", len); - return NULL; - } - stm->pid = (buf[1] << 8) | buf[2]; - if (len > 2) { - fprintf(stderr, "This bootloader returns %d extra bytes in PID:", len); - for (i = 2; i <= len ; i++) - fprintf(stderr, " %02x", buf[i]); - fprintf(stderr, "\n"); - } - if (stm32_get_ack(stm) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - - stm->dev = devices; - while (stm->dev->id != 0x00 && stm->dev->id != stm->pid) - ++stm->dev; - - if (!stm->dev->id) { - fprintf(stderr, "Unknown/unsupported device (Device ID: 0x%03x)\n", stm->pid); - stm32_close(stm); - return NULL; - } - - return stm; -} - -void stm32_close(stm32_t *stm) -{ - if (stm) - free(stm->cmd); - free(stm); -} - -stm32_err_t stm32_read_memory(const stm32_t *stm, uint32_t address, - uint8_t data[], unsigned int len) -{ - struct port_interface *port = stm->port; - uint8_t buf[5]; - - if (!len) - return STM32_ERR_OK; - - if (len > 256) { - fprintf(stderr, "Error: READ length limit at 256 bytes\n"); - return STM32_ERR_UNKNOWN; - } - - if (stm->cmd->rm == STM32_CMD_ERR) { - fprintf(stderr, "Error: READ command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->rm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = address >> 24; - buf[1] = (address >> 16) & 0xFF; - buf[2] = (address >> 8) & 0xFF; - buf[3] = address & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_send_command(stm, len - 1) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (port->read(port, data, len) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - return STM32_ERR_OK; -} - -stm32_err_t stm32_write_memory(const stm32_t *stm, uint32_t address, - const uint8_t data[], unsigned int len) -{ - struct port_interface *port = stm->port; - uint8_t cs, buf[256 + 2]; - unsigned int i, aligned_len; - stm32_err_t s_err; - - if (!len) - return STM32_ERR_OK; - - if (len > 256) { - fprintf(stderr, "Error: READ length limit at 256 bytes\n"); - return STM32_ERR_UNKNOWN; - } - - /* must be 32bit aligned */ - if (address & 0x3 || len & 0x3) { - fprintf(stderr, "Error: WRITE address and length must be 4 byte aligned\n"); - return STM32_ERR_UNKNOWN; - } - - if (stm->cmd->wm == STM32_CMD_ERR) { - fprintf(stderr, "Error: WRITE command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - /* send the address and checksum */ - if (stm32_send_command(stm, stm->cmd->wm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = address >> 24; - buf[1] = (address >> 16) & 0xFF; - buf[2] = (address >> 8) & 0xFF; - buf[3] = address & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - aligned_len = (len + 3) & ~3; - cs = aligned_len - 1; - buf[0] = aligned_len - 1; - for (i = 0; i < len; i++) { - cs ^= data[i]; - buf[i + 1] = data[i]; - } - /* padding data */ - for (i = len; i < aligned_len; i++) { - cs ^= 0xFF; - buf[i + 1] = 0xFF; - } - buf[aligned_len + 1] = cs; - if (port->write(port, buf, aligned_len + 2) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_BLKWRITE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->wm != STM32_CMD_WM_NS) - stm32_warn_stretching("write"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_wunprot_memory(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - - if (stm->cmd->uw == STM32_CMD_ERR) { - fprintf(stderr, "Error: WRITE UNPROTECT command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->uw) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_WUNPROT_TIMEOUT); - if (s_err == STM32_NACK) { - fprintf(stderr, "Error: Failed to WRITE UNPROTECT\n"); - return STM32_ERR_UNKNOWN; - } - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->uw != STM32_CMD_UW_NS) - stm32_warn_stretching("WRITE UNPROTECT"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_wprot_memory(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - - if (stm->cmd->wp == STM32_CMD_ERR) { - fprintf(stderr, "Error: WRITE PROTECT command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->wp) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_WPROT_TIMEOUT); - if (s_err == STM32_NACK) { - fprintf(stderr, "Error: Failed to WRITE PROTECT\n"); - return STM32_ERR_UNKNOWN; - } - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->wp != STM32_CMD_WP_NS) - stm32_warn_stretching("WRITE PROTECT"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_runprot_memory(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - - if (stm->cmd->ur == STM32_CMD_ERR) { - fprintf(stderr, "Error: READOUT UNPROTECT command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->ur) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_MASSERASE_TIMEOUT); - if (s_err == STM32_NACK) { - fprintf(stderr, "Error: Failed to READOUT UNPROTECT\n"); - return STM32_ERR_UNKNOWN; - } - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->ur != STM32_CMD_UR_NS) - stm32_warn_stretching("READOUT UNPROTECT"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_readprot_memory(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - - if (stm->cmd->rp == STM32_CMD_ERR) { - fprintf(stderr, "Error: READOUT PROTECT command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->rp) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_RPROT_TIMEOUT); - if (s_err == STM32_NACK) { - fprintf(stderr, "Error: Failed to READOUT PROTECT\n"); - return STM32_ERR_UNKNOWN; - } - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->rp != STM32_CMD_RP_NS) - stm32_warn_stretching("READOUT PROTECT"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_erase_memory(const stm32_t *stm, uint8_t spage, uint8_t pages) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - port_err_t p_err; - - if (!pages) - return STM32_ERR_OK; - - if (stm->cmd->er == STM32_CMD_ERR) { - fprintf(stderr, "Error: ERASE command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->er) != STM32_ERR_OK) { - fprintf(stderr, "Can't initiate chip erase!\n"); - return STM32_ERR_UNKNOWN; - } - - /* The erase command reported by the bootloader is either 0x43, 0x44 or 0x45 */ - /* 0x44 is Extended Erase, a 2 byte based protocol and needs to be handled differently. */ - /* 0x45 is clock no-stretching version of Extended Erase for I2C port. */ - if (stm->cmd->er != STM32_CMD_ER) { - /* Not all chips using Extended Erase support mass erase */ - /* Currently known as not supporting mass erase is the Ultra Low Power STM32L15xx range */ - /* So if someone has not overridden the default, but uses one of these chips, take it out of */ - /* mass erase mode, so it will be done page by page. This maximum might not be correct either! */ - if (stm->pid == 0x416 && pages == 0xFF) - pages = 0xF8; /* works for the STM32L152RB with 128Kb flash */ - - if (pages == 0xFF) { - uint8_t buf[3]; - - /* 0xFFFF the magic number for mass erase */ - buf[0] = 0xFF; - buf[1] = 0xFF; - buf[2] = 0x00; /* checksum */ - if (port->write(port, buf, 3) != PORT_ERR_OK) { - fprintf(stderr, "Mass erase error.\n"); - return STM32_ERR_UNKNOWN; - } - s_err = stm32_get_ack_timeout(stm, STM32_MASSERASE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Mass erase failed. Try specifying the number of pages to be erased.\n"); - if (port->flags & PORT_STRETCH_W - && stm->cmd->er != STM32_CMD_EE_NS) - stm32_warn_stretching("erase"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; - } - - uint16_t pg_num; - uint8_t pg_byte; - uint8_t cs = 0; - uint8_t *buf; - int i = 0; - - buf = malloc(2 + 2 * pages + 1); - if (!buf) - return STM32_ERR_UNKNOWN; - - /* Number of pages to be erased - 1, two bytes, MSB first */ - pg_byte = (pages - 1) >> 8; - buf[i++] = pg_byte; - cs ^= pg_byte; - pg_byte = (pages - 1) & 0xFF; - buf[i++] = pg_byte; - cs ^= pg_byte; - - for (pg_num = spage; pg_num < spage + pages; pg_num++) { - pg_byte = pg_num >> 8; - cs ^= pg_byte; - buf[i++] = pg_byte; - pg_byte = pg_num & 0xFF; - cs ^= pg_byte; - buf[i++] = pg_byte; - } - buf[i++] = cs; - p_err = port->write(port, buf, i); - free(buf); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Page-by-page erase error.\n"); - return STM32_ERR_UNKNOWN; - } - - s_err = stm32_get_ack_timeout(stm, pages * STM32_SECTERASE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Page-by-page erase failed. Check the maximum pages your device supports.\n"); - if (port->flags & PORT_STRETCH_W - && stm->cmd->er != STM32_CMD_EE_NS) - stm32_warn_stretching("erase"); - return STM32_ERR_UNKNOWN; - } - - return STM32_ERR_OK; - } - - /* And now the regular erase (0x43) for all other chips */ - if (pages == 0xFF) { - s_err = stm32_send_command_timeout(stm, 0xFF, STM32_MASSERASE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W) - stm32_warn_stretching("erase"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; - } else { - uint8_t cs = 0; - uint8_t pg_num; - uint8_t *buf; - int i = 0; - - buf = malloc(1 + pages + 1); - if (!buf) - return STM32_ERR_UNKNOWN; - - buf[i++] = pages - 1; - cs ^= (pages-1); - for (pg_num = spage; pg_num < (pages + spage); pg_num++) { - buf[i++] = pg_num; - cs ^= pg_num; - } - buf[i++] = cs; - p_err = port->write(port, buf, i); - free(buf); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Erase failed.\n"); - return STM32_ERR_UNKNOWN; - } - s_err = stm32_get_ack_timeout(stm, STM32_MASSERASE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W) - stm32_warn_stretching("erase"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; - } -} - -static stm32_err_t stm32_run_raw_code(const stm32_t *stm, - uint32_t target_address, - const uint8_t *code, uint32_t code_size) -{ - uint32_t stack_le = le_u32(0x20002000); - uint32_t code_address_le = le_u32(target_address + 8); - uint32_t length = code_size + 8; - uint8_t *mem, *pos; - uint32_t address, w; - - /* Must be 32-bit aligned */ - if (target_address & 0x3) { - fprintf(stderr, "Error: code address must be 4 byte aligned\n"); - return STM32_ERR_UNKNOWN; - } - - mem = malloc(length); - if (!mem) - return STM32_ERR_UNKNOWN; - - memcpy(mem, &stack_le, sizeof(uint32_t)); - memcpy(mem + 4, &code_address_le, sizeof(uint32_t)); - memcpy(mem + 8, code, code_size); - - pos = mem; - address = target_address; - while (length > 0) { - w = length > 256 ? 256 : length; - if (stm32_write_memory(stm, address, pos, w) != STM32_ERR_OK) { - free(mem); - return STM32_ERR_UNKNOWN; - } - - address += w; - pos += w; - length -= w; - } - - free(mem); - return stm32_go(stm, target_address); -} - -stm32_err_t stm32_go(const stm32_t *stm, uint32_t address) -{ - struct port_interface *port = stm->port; - uint8_t buf[5]; - - if (stm->cmd->go == STM32_CMD_ERR) { - fprintf(stderr, "Error: GO command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->go) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = address >> 24; - buf[1] = (address >> 16) & 0xFF; - buf[2] = (address >> 8) & 0xFF; - buf[3] = address & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - return STM32_ERR_OK; -} - -stm32_err_t stm32_reset_device(const stm32_t *stm) -{ - uint32_t target_address = stm->dev->ram_start; - - return stm32_run_raw_code(stm, target_address, stm_reset_code, stm_reset_code_length); -} - -stm32_err_t stm32_crc_memory(const stm32_t *stm, uint32_t address, - uint32_t length, uint32_t *crc) -{ - struct port_interface *port = stm->port; - uint8_t buf[5]; - - if (address & 0x3 || length & 0x3) { - fprintf(stderr, "Start and end addresses must be 4 byte aligned\n"); - return STM32_ERR_UNKNOWN; - } - - if (stm->cmd->crc == STM32_CMD_ERR) { - fprintf(stderr, "Error: CRC command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->crc) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = address >> 24; - buf[1] = (address >> 16) & 0xFF; - buf[2] = (address >> 8) & 0xFF; - buf[3] = address & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = length >> 24; - buf[1] = (length >> 16) & 0xFF; - buf[2] = (length >> 8) & 0xFF; - buf[3] = length & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (port->read(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (buf[4] != (buf[0] ^ buf[1] ^ buf[2] ^ buf[3])) - return STM32_ERR_UNKNOWN; - - *crc = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3]; - return STM32_ERR_OK; -} - -/* - * CRC computed by STM32 is similar to the standard crc32_be() - * implemented, for example, in Linux kernel in ./lib/crc32.c - * But STM32 computes it on units of 32 bits word and swaps the - * bytes of the word before the computation. - * Due to byte swap, I cannot use any CRC available in existing - * libraries, so here is a simple not optimized implementation. - */ -#define CRCPOLY_BE 0x04c11db7 -#define CRC_MSBMASK 0x80000000 -#define CRC_INIT_VALUE 0xFFFFFFFF -uint32_t stm32_sw_crc(uint32_t crc, uint8_t *buf, unsigned int len) -{ - int i; - uint32_t data; - - if (len & 0x3) { - fprintf(stderr, "Buffer length must be multiple of 4 bytes\n"); - return 0; - } - - while (len) { - data = *buf++; - data |= *buf++ << 8; - data |= *buf++ << 16; - data |= *buf++ << 24; - len -= 4; - - crc ^= data; - - for (i = 0; i < 32; i++) - if (crc & CRC_MSBMASK) - crc = (crc << 1) ^ CRCPOLY_BE; - else - crc = (crc << 1); - } - return crc; -} - -stm32_err_t stm32_crc_wrapper(const stm32_t *stm, uint32_t address, - uint32_t length, uint32_t *crc) -{ - uint8_t buf[256]; - uint32_t start, total_len, len, current_crc; - - if (address & 0x3 || length & 0x3) { - fprintf(stderr, "Start and end addresses must be 4 byte aligned\n"); - return STM32_ERR_UNKNOWN; - } - - if (stm->cmd->crc != STM32_CMD_ERR) - return stm32_crc_memory(stm, address, length, crc); - - start = address; - total_len = length; - current_crc = CRC_INIT_VALUE; - while (length) { - len = length > 256 ? 256 : length; - if (stm32_read_memory(stm, address, buf, len) != STM32_ERR_OK) { - fprintf(stderr, - "Failed to read memory at address 0x%08x, target write-protected?\n", - address); - return STM32_ERR_UNKNOWN; - } - current_crc = stm32_sw_crc(current_crc, buf, len); - length -= len; - address += len; - - fprintf(stderr, - "\rCRC address 0x%08x (%.2f%%) ", - address, - (100.0f / (float)total_len) * (float)(address - start) - ); - fflush(stderr); - } - fprintf(stderr, "Done.\n"); - *crc = current_crc; - return STM32_ERR_OK; -} diff --git a/macosx/src/stm32flash_serial/src/stm32.h b/macosx/src/stm32flash_serial/src/stm32.h deleted file mode 100644 index 1688fcb4b..000000000 --- a/macosx/src/stm32flash_serial/src/stm32.h +++ /dev/null @@ -1,84 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _STM32_H -#define _STM32_H - -#include -#include "serial.h" - -#define STM32_MAX_RX_FRAME 256 /* cmd read memory */ -#define STM32_MAX_TX_FRAME (1 + 256 + 1) /* cmd write memory */ - -typedef enum { - STM32_ERR_OK = 0, - STM32_ERR_UNKNOWN, /* Generic error */ - STM32_ERR_NACK, - STM32_ERR_NO_CMD, /* Command not available in bootloader */ -} stm32_err_t; - -typedef struct stm32 stm32_t; -typedef struct stm32_cmd stm32_cmd_t; -typedef struct stm32_dev stm32_dev_t; - -struct stm32 { - const serial_t *serial; - struct port_interface *port; - uint8_t bl_version; - uint8_t version; - uint8_t option1, option2; - uint16_t pid; - stm32_cmd_t *cmd; - const stm32_dev_t *dev; -}; - -struct stm32_dev { - uint16_t id; - const char *name; - uint32_t ram_start, ram_end; - uint32_t fl_start, fl_end; - uint16_t fl_pps; // pages per sector - uint16_t fl_ps; // page size - uint32_t opt_start, opt_end; - uint32_t mem_start, mem_end; -}; - -stm32_t *stm32_init(struct port_interface *port, const char init); -void stm32_close(stm32_t *stm); -stm32_err_t stm32_read_memory(const stm32_t *stm, uint32_t address, - uint8_t data[], unsigned int len); -stm32_err_t stm32_write_memory(const stm32_t *stm, uint32_t address, - const uint8_t data[], unsigned int len); -stm32_err_t stm32_wunprot_memory(const stm32_t *stm); -stm32_err_t stm32_wprot_memory(const stm32_t *stm); -stm32_err_t stm32_erase_memory(const stm32_t *stm, uint8_t spage, - uint8_t pages); -stm32_err_t stm32_go(const stm32_t *stm, uint32_t address); -stm32_err_t stm32_reset_device(const stm32_t *stm); -stm32_err_t stm32_readprot_memory(const stm32_t *stm); -stm32_err_t stm32_runprot_memory(const stm32_t *stm); -stm32_err_t stm32_crc_memory(const stm32_t *stm, uint32_t address, - uint32_t length, uint32_t *crc); -stm32_err_t stm32_crc_wrapper(const stm32_t *stm, uint32_t address, - uint32_t length, uint32_t *crc); -uint32_t stm32_sw_crc(uint32_t crc, uint8_t *buf, unsigned int len); - -#endif - diff --git a/macosx/src/stm32flash_serial/src/stm32flash.1 b/macosx/src/stm32flash_serial/src/stm32flash.1 deleted file mode 100644 index d37292f6a..000000000 --- a/macosx/src/stm32flash_serial/src/stm32flash.1 +++ /dev/null @@ -1,407 +0,0 @@ -.TH STM32FLASH 1 "2013\-11\-03" STM32FLASH "User command" -.SH NAME -stm32flash \- flashing utility for STM32 and STM32W through UART or I2C -.SH SYNOPSIS -.B stm32flash -.RB [ \-cfhjkouvCR ] -.RB [ \-a -.IR bus_address ] -.RB [ \-b -.IR baud_rate ] -.RB [ \-m -.IR serial_mode ] -.RB [ \-r -.IR filename ] -.RB [ \-w -.IR filename ] -.RB [ \-e -.IR num ] -.RB [ \-n -.IR count ] -.RB [ \-g -.IR address ] -.RB [ \-s -.IR start_page ] -.RB [ \-S -.IR address [: length ]] -.RB [ \-F -.IR RX_length [: TX_length ]] -.RB [ \-i -.IR GPIO_string ] -.RI [ tty_device -.R | -.IR i2c_device ] - -.SH DESCRIPTION -.B stm32flash -reads or writes the flash memory of STM32 and STM32W. - -It requires the STM32[W] to embed a bootloader compliant with ST -application note AN3155. -.B stm32flash -uses the serial port -.I tty_device -to interact with the bootloader of STM32[W]. - -.SH OPTIONS -.TP -.BI "\-a" " bus_address" -Specify address on bus for -.IR i2c_device . -This option is mandatory for I2C interface. - -.TP -.BI "\-b" " baud_rate" -Specify baud rate speed of -.IR tty_device . -Please notice that the ST bootloader can automatically detect the baud rate, -as explaned in chapter 2 of AN3155. -This option could be required together with option -.B "\-c" -or if following interaction with bootloader is expected. -Default is -.IR 57600 . - -.TP -.BI "\-m" " mode" -Specify the format of UART data. -.I mode -is a three characters long string where each character specifies, in -this strict order, character size, parity and stop bits. -The only values currenly used are -.I 8e1 -for standard STM32 bootloader and -.I 8n1 -for standard STM32W bootloader. -Default is -.IR 8e1 . - -.TP -.BI "\-r" " filename" -Specify to read the STM32[W] flash and write its content in -.I filename -in raw binary format (see below -.BR "FORMAT CONVERSION" ). - -.TP -.BI "\-w" " filename" -Specify to write the STM32[W] flash with the content of -.IR filename . -File format can be either raw binary or intel hex (see below -.BR "FORMAT CONVERSION" ). -The file format is automatically detected. -To by\-pass format detection and force binary mode (e.g. to -write an intel hex content in STM32[W] flash), use -.B \-f -option. - -.TP -.B \-u -Specify to disable write\-protection from STM32[W] flash. -The STM32[W] will be reset after this operation. - -.TP -.B \-j -Enable the flash read\-protection. - -.TP -.B \-k -Disable the flash read\-protection. - -.TP -.B \-o -Erase only. - -.TP -.BI "\-e" " num" -Specify to erase only -.I num -pages before writing the flash. Default is to erase the whole flash. With -.B \-e 0 -the flash would not be erased. - -.TP -.B \-v -Specify to verify flash content after write operation. - -.TP -.BI "\-n" " count" -Specify to retry failed writes up to -.I count -times. Default is 10 times. - -.TP -.BI "\-g" " address" -Specify address to start execution from (0 = flash start). - -.TP -.BI "\-s" " start_page" -Specify flash page offset (0 = flash start). - -.TP -.BI "\-S" " address" "[:" "length" "]" -Specify start address and optionally length for read/write/erase/crc operations. - -.TP -.BI "\-F" " RX_length" "[:" "TX_length" "]" -Specify the maximum frame size for the current interface. -Due to STM32 bootloader protocol, host will never handle frames bigger than -256 byte in RX or 258 byte in TX. -Due to current code, lowest limit in RX is 20 byte (to read a complete reply -of command GET). Minimum limit in TX is 5 byte, required by protocol. - -.TP -.B \-f -Force binary parser while reading file with -.BR "\-w" "." - -.TP -.B \-h -Show help. - -.TP -.B \-c -Specify to resume the existing UART connection and don't send initial -INIT sequence to detect baud rate. Baud rate must be kept the same as the -existing connection. This is useful if the reset fails. - -.TP -.BI "\-i" " GPIO_string" -Specify the GPIO sequences on the host to force STM32[W] to enter and -exit bootloader mode. GPIO can either be real GPIO connected from host to -STM32[W] beside the UART connection, or UART's modem signals used as -GPIO. (See below -.B BOOTLOADER GPIO SEQUENCE -for the format of -.I GPIO_string -and further explanation). - -.TP -.B \-C -Specify to compute CRC on memory content. -By default the CRC is computed on the whole flash content. -Use -.B "\-S" -to provide different memory address range. - -.TP -.B \-R -Specify to reset the device at exit. -This option is ignored if either -.BR "\-g" "," -.BR "\-j" "," -.B "\-k" -or -.B "\-u" -is also specified. - -.SH BOOTLOADER GPIO SEQUENCE -This feature is currently available on Linux host only. - -As explained in ST application note AN2606, after reset the STM32 will -execute either the application program in user flash or the bootloader, -depending on the level applied at specific pins of STM32 during reset. - -STM32 bootloader is automatically activated by configuring the pins -BOOT0="high" and BOOT1="low" and then by applying a reset. -Application program in user flash is activated by configuring the pin -BOOT0="low" (the level on BOOT1 is ignored) and then by applying a reset. - -When GPIO from host computer are connected to either configuration and -reset pins of STM32, -.B stm32flash -can control the host GPIO to reset STM32 and to force execution of -bootloader or execution of application program. - -The sequence of GPIO values to entry to and exit from bootloader mode is -provided with command line option -.B "\-i" -.IR "GPIO_string" . - -.PD 0 -The format of -.IR "GPIO_string" " is:" -.RS -GPIO_string = [entry sequence][:[exit sequence]] -.P -sequence = [\-]n[,sequence] -.RE -.P -In the above sequences, negative numbers correspond to GPIO at "low" level; -numbers without sign correspond to GPIO at "high" level. -The value "n" can either be the GPIO number on the host system or the -string "rts", "dtr" or "brk". The strings "rts" and "dtr" drive the -corresponding UART's modem lines RTS and DTR as GPIO. -The string "brk" forces the UART to send a BREAK sequence on TX line; -after BREAK the UART is returned in normal "non\-break" mode. -Note: the string "\-brk" has no effect and is ignored. -.PD - -.PD 0 -As example, let's suppose the following connection between host and STM32: -.IP \(bu 2 -host GPIO_3 connected to reset pin of STM32; -.IP \(bu 2 -host GPIO_4 connected to STM32 pin BOOT0; -.IP \(bu 2 -host GPIO_5 connected to STM32 pin BOOT1. -.PD -.P - -In this case, the sequence to enter in bootloader mode is: first put -GPIO_4="high" and GPIO_5="low"; then send reset pulse by GPIO_3="low" -followed by GPIO_3="high". -The corresponding string for -.I GPIO_string -is "4,\-5,\-3,3". - -To exit from bootloade and run the application program, the sequence is: -put GPIO_4="low"; then send reset pulse. -The corresponding string for -.I GPIO_string -is "\-4,\-3,3". - -The complete command line flag is "\-i 4,\-5,\-3,3:\-4,\-3,3". - -STM32W uses pad PA5 to select boot mode; if during reset PA5 is "low" then -STM32W will enter in bootloader mode; if PA5 is "high" it will execute the -program in flash. - -As example, supposing GPIO_3 connected to PA5 and GPIO_2 to STM32W's reset. -The command: -.PD 0 -.RS -stm32flash \-i \-3,\-2,2:3,\-2,2 /dev/ttyS0 -.RE -provides: -.IP \(bu 2 -entry sequence: GPIO_3=low, GPIO_2=low, GPIO_2=high -.IP \(bu 2 -exit sequence: GPIO_3=high, GPIO_2=low, GPIO_2=high -.PD - -.SH EXAMPLES -Get device information: -.RS -.PD 0 -.P -stm32flash /dev/ttyS0 -.PD -.RE - -Write with verify and then start execution: -.RS -.PD 0 -.P -stm32flash \-w filename \-v \-g 0x0 /dev/ttyS0 -.PD -.RE - -Read flash to file: -.RS -.PD 0 -.P -stm32flash \-r filename /dev/ttyS0 -.PD -.RE - -Start execution: -.RS -.PD 0 -.P -stm32flash \-g 0x0 /dev/ttyS0 -.PD -.RE - -Specify: -.PD 0 -.IP \(bu 2 -entry sequence: RTS=low, DTR=low, DTR=high -.IP \(bu 2 -exit sequence: RTS=high, DTR=low, DTR=high -.P -.RS -stm32flash \-i \-rts,\-dtr,dtr:rts,\-dtr,dtr /dev/ttyS0 -.PD -.RE - -.SH FORMAT CONVERSION -Flash images provided by ST or created with ST tools are often in file -format Motorola S\-Record. -Conversion between raw binary, intel hex and Motorola S\-Record can be -done through software package SRecord. - -.SH AUTHORS -The original software package -.B stm32flash -is written by -.I Geoffrey McRae -and is since 2012 maintained by -.IR "Tormod Volden " . - -Man page and extension to STM32W and I2C are written by -.IR "Antonio Borneo " . - -Please report any bugs at the project homepage -http://stm32flash.googlecode.com . - -.SH SEE ALSO -.BR "srec_cat" "(1)," " srec_intel" "(5)," " srec_motorola" "(5)." - -The communication protocol used by ST bootloader is documented in -following ST application notes, depending on communication port. -The current version of -.B stm32flash -only supports -.I UART -and -.I I2C -ports. -.PD 0 -.P -.IP \(bu 2 -AN3154: CAN protocol used in the STM32 bootloader -.P -.RS -http://www.st.com/web/en/resource/technical/document/application_note/CD00264321.pdf -.RE - -.P -.IP \(bu 2 -AN3155: USART protocol used in the STM32(TM) bootloader -.P -.RS -http://www.st.com/web/en/resource/technical/document/application_note/CD00264342.pdf -.RE - -.P -.IP \(bu 2 -AN4221: I2C protocol used in the STM32 bootloader -.P -.RS -http://www.st.com/web/en/resource/technical/document/application_note/DM00072315.pdf -.RE - -.P -.IP \(bu 2 -AN4286: SPI protocol used in the STM32 bootloader -.P -.RS -http://www.st.com/web/en/resource/technical/document/application_note/DM00081379.pdf -.RE - -.PD - - -Boot mode selection for STM32 is documented in ST application note -AN2606, available from the ST website: -.PD 0 -.P -http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf -.PD - -.SH LICENSE -.B stm32flash -is distributed under GNU GENERAL PUBLIC LICENSE Version 2. -Copy of the license is available within the source code in the file -.IR "gpl\-2.0.txt" . diff --git a/macosx/src/stm32flash_serial/src/utils.c b/macosx/src/stm32flash_serial/src/utils.c deleted file mode 100644 index 271bb3ed7..000000000 --- a/macosx/src/stm32flash_serial/src/utils.c +++ /dev/null @@ -1,45 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include "utils.h" - -/* detect CPU endian */ -char cpu_le() { - const uint32_t cpu_le_test = 0x12345678; - return ((const unsigned char*)&cpu_le_test)[0] == 0x78; -} - -uint32_t be_u32(const uint32_t v) { - if (cpu_le()) - return ((v & 0xFF000000) >> 24) | - ((v & 0x00FF0000) >> 8) | - ((v & 0x0000FF00) << 8) | - ((v & 0x000000FF) << 24); - return v; -} - -uint32_t le_u32(const uint32_t v) { - if (!cpu_le()) - return ((v & 0xFF000000) >> 24) | - ((v & 0x00FF0000) >> 8) | - ((v & 0x0000FF00) << 8) | - ((v & 0x000000FF) << 24); - return v; -} diff --git a/macosx/src/stm32flash_serial/src/utils.h b/macosx/src/stm32flash_serial/src/utils.h deleted file mode 100644 index a8d37d2d5..000000000 --- a/macosx/src/stm32flash_serial/src/utils.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _H_UTILS -#define _H_UTILS - -#include - -char cpu_le(); -uint32_t be_u32(const uint32_t v); -uint32_t le_u32(const uint32_t v); - -#endif diff --git a/macosx/stlink/lib/libstlink-shared.1.3.0.dylib b/macosx/stlink/lib/libstlink-shared.1.3.0.dylib deleted file mode 100755 index 1c666561e..000000000 Binary files a/macosx/stlink/lib/libstlink-shared.1.3.0.dylib and /dev/null differ diff --git a/macosx/stlink/lib/libstlink-shared.1.dylib b/macosx/stlink/lib/libstlink-shared.1.dylib deleted file mode 120000 index f94f5cde8..000000000 --- a/macosx/stlink/lib/libstlink-shared.1.dylib +++ /dev/null @@ -1 +0,0 @@ -libstlink-shared.1.3.0.dylib \ No newline at end of file diff --git a/macosx/stlink/lib/libstlink-shared.dylib b/macosx/stlink/lib/libstlink-shared.dylib deleted file mode 120000 index bdf7cc30e..000000000 --- a/macosx/stlink/lib/libstlink-shared.dylib +++ /dev/null @@ -1 +0,0 @@ -libstlink-shared.1.dylib \ No newline at end of file diff --git a/macosx/stlink/lib/libstlink.1.5.1.dylib b/macosx/stlink/lib/libstlink.1.5.1.dylib new file mode 100755 index 000000000..45a8a928f Binary files /dev/null and b/macosx/stlink/lib/libstlink.1.5.1.dylib differ diff --git a/macosx/stlink/lib/libstlink.1.dylib b/macosx/stlink/lib/libstlink.1.dylib new file mode 120000 index 000000000..17bda6767 --- /dev/null +++ b/macosx/stlink/lib/libstlink.1.dylib @@ -0,0 +1 @@ +libstlink.1.5.1.dylib \ No newline at end of file diff --git a/macosx/stlink/lib/libstlink.a b/macosx/stlink/lib/libstlink.a index e7f9e0e6c..ebf35cd1b 100644 Binary files a/macosx/stlink/lib/libstlink.a and b/macosx/stlink/lib/libstlink.a differ diff --git a/macosx/stlink/lib/libstlink.dylib b/macosx/stlink/lib/libstlink.dylib new file mode 120000 index 000000000..9891f18f1 --- /dev/null +++ b/macosx/stlink/lib/libstlink.dylib @@ -0,0 +1 @@ +libstlink.1.dylib \ No newline at end of file diff --git a/macosx/stlink/st-flash b/macosx/stlink/st-flash index 4dca84db6..08224f53f 100755 Binary files a/macosx/stlink/st-flash and b/macosx/stlink/st-flash differ diff --git a/macosx/stlink/st-info b/macosx/stlink/st-info index 14d1a8ba8..d8f8e4239 100755 Binary files a/macosx/stlink/st-info and b/macosx/stlink/st-info differ diff --git a/macosx/stlink/st-util b/macosx/stlink/st-util index 2925855a0..fdd9040b7 100755 Binary files a/macosx/stlink/st-util and b/macosx/stlink/st-util differ diff --git a/macosx/stm32flash/stm32flash b/macosx/stm32flash/stm32flash index dc8d42241..8176d233e 100755 Binary files a/macosx/stm32flash/stm32flash and b/macosx/stm32flash/stm32flash differ diff --git a/src/genpinmap/Arduino/STM32F401V(B-C)Hx/PeripheralPins.c b/src/genpinmap/Arduino/STM32F401V(B-C)Hx/PeripheralPins.c index f1f43bba0..50da3797b 100644 --- a/src/genpinmap/Arduino/STM32F401V(B-C)Hx/PeripheralPins.c +++ b/src/genpinmap/Arduino/STM32F401V(B-C)Hx/PeripheralPins.c @@ -73,6 +73,7 @@ const PinMap PinMap_I2C_SDA[] = { {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C3)}, {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, {NC, NP, 0} }; @@ -125,6 +126,7 @@ const PinMap PinMap_PWM[] = { {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N diff --git a/src/genpinmap/Arduino/STM32F401V(D-E)Hx/PeripheralPins.c b/src/genpinmap/Arduino/STM32F401V(D-E)Hx/PeripheralPins.c index 3f0b127ac..9cee09ba0 100644 --- a/src/genpinmap/Arduino/STM32F401V(D-E)Hx/PeripheralPins.c +++ b/src/genpinmap/Arduino/STM32F401V(D-E)Hx/PeripheralPins.c @@ -73,6 +73,7 @@ const PinMap PinMap_I2C_SDA[] = { {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C3)}, {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, {NC, NP, 0} }; @@ -125,6 +126,7 @@ const PinMap PinMap_PWM[] = { {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N diff --git a/src/genpinmap/Arduino/STM32F730I8Kx/PeripheralPins.c b/src/genpinmap/Arduino/STM32F730I8Kx/PeripheralPins.c new file mode 100644 index 000000000..b3dbfaa75 --- /dev/null +++ b/src/genpinmap/Arduino/STM32F730I8Kx/PeripheralPins.c @@ -0,0 +1,432 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32F730I8Kx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 + {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0 + {PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PF_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_IN9 + {PF_4, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_IN14 + {PF_5, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_IN15 + {PF_6, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_IN4 + {PF_7, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5 + {PF_8, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_IN6 + {PF_9, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_IN7 + {PF_10, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_IN8 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PH_5, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PH_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PH_4, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PH_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 + {PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PF_6, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 + {PF_7, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 + {PF_8, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PF_9, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {PH_6, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1 + {PH_9, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2 + {PH_10, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PH_11, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PH_12, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PH_13, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PH_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PH_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PI_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PI_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PI_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PI_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PI_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_1, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PF_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PG_14, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PH_13, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_0, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PF_6, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PG_9, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PH_14, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PI_9, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_15, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PF_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PG_8, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PG_12, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_14, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_10, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PF_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PG_13, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PG_15, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_2, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_9, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PF_11, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PI_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_8, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PH_7, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PI_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_7, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PH_6, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PI_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_6, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PH_5, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PI_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_RD[] = { + {PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_8, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PD_0, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PH_14, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PI_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_TD[] = { + {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PD_1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PH_13, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PB_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK + {PB_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PC_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PC_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PC_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_NCS + {PD_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PD_12, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PD_13, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PE_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 + {PE_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO0 + {PE_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO1 + {PE_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO2 + {PE_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO3 + {PF_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PF_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 + {PF_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PF_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PG_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO2 + {PG_14, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO3 + {PH_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO0 + {PH_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO1 + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32F730I8Kx/PinNamesVar.h b/src/genpinmap/Arduino/STM32F730I8Kx/PinNamesVar.h new file mode 100644 index 000000000..8ec2fab4a --- /dev/null +++ b/src/genpinmap/Arduino/STM32F730I8Kx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = PC_1, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = PI_8, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = PI_11, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32F730R8Tx/PeripheralPins.c b/src/genpinmap/Arduino/STM32F730R8Tx/PeripheralPins.c new file mode 100644 index 000000000..98872b943 --- /dev/null +++ b/src/genpinmap/Arduino/STM32F730R8Tx/PeripheralPins.c @@ -0,0 +1,323 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32F730R8Tx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 + {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0 + {PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2 + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_2, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_RD[] = { + {PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_8, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_TD[] = { + {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PB_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK + {PB_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PC_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PC_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PC_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_NCS + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32F767V(G-I)Hx/PinNamesVar.h b/src/genpinmap/Arduino/STM32F730R8Tx/PinNamesVar.h similarity index 100% rename from src/genpinmap/Arduino/STM32F767V(G-I)Hx/PinNamesVar.h rename to src/genpinmap/Arduino/STM32F730R8Tx/PinNamesVar.h diff --git a/src/genpinmap/Arduino/STM32F730V8Tx/PeripheralPins.c b/src/genpinmap/Arduino/STM32F730V8Tx/PeripheralPins.c new file mode 100644 index 000000000..ed642d673 --- /dev/null +++ b/src/genpinmap/Arduino/STM32F730V8Tx/PeripheralPins.c @@ -0,0 +1,374 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32F730V8Tx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 + {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0 + {PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2 + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 + {PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_1, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_0, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_15, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_14, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_10, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_2, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_RD[] = { + {PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_8, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PD_0, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_TD[] = { + {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PD_1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PB_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK + {PB_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PC_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PC_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PC_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_NCS + {PD_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PD_12, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PD_13, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PE_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 + {PE_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO0 + {PE_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO1 + {PE_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO2 + {PE_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO3 + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32F730V8Tx/PinNamesVar.h b/src/genpinmap/Arduino/STM32F730V8Tx/PinNamesVar.h new file mode 100644 index 000000000..165f87e58 --- /dev/null +++ b/src/genpinmap/Arduino/STM32F730V8Tx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = PC_1, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32F730Z8Tx/PeripheralPins.c b/src/genpinmap/Arduino/STM32F730Z8Tx/PeripheralPins.c new file mode 100644 index 000000000..c27328fff --- /dev/null +++ b/src/genpinmap/Arduino/STM32F730Z8Tx/PeripheralPins.c @@ -0,0 +1,400 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32F730Z8Tx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 + {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0 + {PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PF_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_IN9 + {PF_4, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_IN14 + {PF_5, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_IN15 + {PF_6, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_IN4 + {PF_7, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5 + {PF_8, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_IN6 + {PF_9, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_IN7 + {PF_10, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_IN8 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 + {PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PF_6, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 + {PF_7, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 + {PF_8, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PF_9, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_1, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PF_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PG_14, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_0, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PF_6, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PG_9, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_15, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PF_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PG_8, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PG_12, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_14, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_10, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PF_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PG_13, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PG_15, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_2, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_9, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PF_11, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_8, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_7, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_6, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_RD[] = { + {PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_8, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PD_0, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_TD[] = { + {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PD_1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PB_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK + {PB_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PC_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PC_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PC_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_NCS + {PD_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PD_12, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PD_13, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PE_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 + {PE_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO0 + {PE_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO1 + {PE_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO2 + {PE_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO3 + {PF_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PF_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 + {PF_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PF_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PG_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO2 + {PG_14, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO3 + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32F730Z8Tx/PinNamesVar.h b/src/genpinmap/Arduino/STM32F730Z8Tx/PinNamesVar.h new file mode 100644 index 000000000..165f87e58 --- /dev/null +++ b/src/genpinmap/Arduino/STM32F730Z8Tx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = PC_1, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32F750N8Hx/PeripheralPins.c b/src/genpinmap/Arduino/STM32F750N8Hx/PeripheralPins.c new file mode 100644 index 000000000..713fa60d2 --- /dev/null +++ b/src/genpinmap/Arduino/STM32F750N8Hx/PeripheralPins.c @@ -0,0 +1,483 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32F750N8Hx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 + {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0 + {PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PF_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_IN9 + {PF_4, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_IN14 + {PF_5, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_IN15 + {PF_6, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_IN4 + {PF_7, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5 + {PF_8, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_IN6 + {PF_9, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_IN7 + {PF_10, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_IN8 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_13, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_15, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PH_5, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PH_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PH_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_14, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PH_4, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PH_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PH_11, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2 + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 + {PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PF_6, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 + {PF_7, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 + {PF_8, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PF_9, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {PH_6, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1 + {PH_9, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2 + {PH_10, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PH_11, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PH_12, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PH_13, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PH_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PH_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PI_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PI_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PI_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PI_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PI_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_1, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PF_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PG_14, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_0, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PF_6, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PG_9, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_15, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PF_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PG_8, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PG_12, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_14, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_10, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PF_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PG_13, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PG_15, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_2, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_9, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PF_11, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PG_14, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + {PI_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_8, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PG_12, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + {PH_7, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PI_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_7, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PG_13, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + {PH_6, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PI_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_6, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PG_8, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + {PH_5, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PI_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_RD[] = { + {PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_5, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PB_8, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_12, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PD_0, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PI_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_TD[] = { + {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_6, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_13, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PD_1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PH_13, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +//*** ETHERNET *** + +#ifdef HAL_ETH_MODULE_ENABLED +const PinMap PinMap_Ethernet[] = { + {PA_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS + {PA_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK|ETH_RX_CLK + {PA_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO + {PA_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL + {PA_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV|ETH_RX_DV + {PB_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2 + {PB_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3 + {PB_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT + {PB_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3 + {PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER + {PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN + {PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0 + {PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1 + {PC_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC + {PC_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2 + {PC_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK + {PC_4, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0 + {PC_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1 + {PE_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3 + {PG_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT + {PG_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN + {PG_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0 + {PG_14, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1 + {PH_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS + {PH_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL + {PH_6, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2 + {PH_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3 + {PI_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER + {NC, NP, 0} +}; +#endif + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PB_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK + {PB_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PC_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PC_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PC_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_NCS + {PD_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PD_12, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PD_13, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PE_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 + {PE_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO0 + {PE_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO1 + {PE_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO2 + {PE_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO3 + {PF_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PF_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 + {PF_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PF_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PG_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO2 + {PG_14, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO3 + {PH_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO0 + {PH_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO1 + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32F750N8Hx/PinNamesVar.h b/src/genpinmap/Arduino/STM32F750N8Hx/PinNamesVar.h new file mode 100644 index 000000000..8ec2fab4a --- /dev/null +++ b/src/genpinmap/Arduino/STM32F750N8Hx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = PC_1, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = PI_8, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = PI_11, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32F750V8Tx/PeripheralPins.c b/src/genpinmap/Arduino/STM32F750V8Tx/PeripheralPins.c new file mode 100644 index 000000000..e5cf1595b --- /dev/null +++ b/src/genpinmap/Arduino/STM32F750V8Tx/PeripheralPins.c @@ -0,0 +1,403 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32F750V8Tx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 + {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0 + {PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_13, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2 + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 + {PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_1, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_0, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_15, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_14, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_10, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_2, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_RD[] = { + {PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_5, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PB_8, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_12, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PD_0, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_TD[] = { + {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_6, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_13, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PD_1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +//*** ETHERNET *** + +#ifdef HAL_ETH_MODULE_ENABLED +const PinMap PinMap_Ethernet[] = { + {PA_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS + {PA_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK|ETH_RX_CLK + {PA_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO + {PA_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL + {PA_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV|ETH_RX_DV + {PB_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2 + {PB_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3 + {PB_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT + {PB_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3 + {PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER + {PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN + {PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0 + {PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1 + {PC_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC + {PC_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2 + {PC_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK + {PC_4, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0 + {PC_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1 + {PE_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3 + {NC, NP, 0} +}; +#endif + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PB_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK + {PB_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PC_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PC_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PC_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_NCS + {PD_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PD_12, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PD_13, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PE_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 + {PE_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO0 + {PE_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO1 + {PE_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO2 + {PE_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO3 + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32F750V8Tx/PinNamesVar.h b/src/genpinmap/Arduino/STM32F750V8Tx/PinNamesVar.h new file mode 100644 index 000000000..165f87e58 --- /dev/null +++ b/src/genpinmap/Arduino/STM32F750V8Tx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = PC_1, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32F750Z8Tx/PeripheralPins.c b/src/genpinmap/Arduino/STM32F750Z8Tx/PeripheralPins.c new file mode 100644 index 000000000..ac78d2682 --- /dev/null +++ b/src/genpinmap/Arduino/STM32F750Z8Tx/PeripheralPins.c @@ -0,0 +1,448 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32F750Z8Tx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 + {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0 + {PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PF_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_IN9 + {PF_4, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_IN14 + {PF_5, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_IN15 + {PF_6, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_IN4 + {PF_7, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5 + {PF_8, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_IN6 + {PF_9, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_IN7 + {PF_10, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_IN8 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_13, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_15, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_14, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2 + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 + {PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PF_6, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 + {PF_7, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 + {PF_8, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PF_9, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_1, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PF_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PG_14, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_0, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PF_6, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PG_9, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_15, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PF_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PG_8, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PG_12, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_14, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_10, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PF_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {PG_13, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PG_15, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_2, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_9, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PF_11, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PG_14, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_8, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PG_12, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_7, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PG_13, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_6, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PG_8, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_RD[] = { + {PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_5, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PB_8, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_12, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PD_0, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_TD[] = { + {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_6, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_13, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PD_1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +//*** ETHERNET *** + +#ifdef HAL_ETH_MODULE_ENABLED +const PinMap PinMap_Ethernet[] = { + {PA_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS + {PA_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK|ETH_RX_CLK + {PA_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO + {PA_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL + {PA_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV|ETH_RX_DV + {PB_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2 + {PB_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3 + {PB_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT + {PB_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3 + {PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER + {PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN + {PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0 + {PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1 + {PC_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC + {PC_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2 + {PC_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK + {PC_4, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0 + {PC_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1 + {PE_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3 + {PG_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT + {PG_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN + {PG_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0 + {PG_14, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1 + {NC, NP, 0} +}; +#endif + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PB_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK + {PB_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PC_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PC_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PC_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_NCS + {PD_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PD_12, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PD_13, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PE_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 + {PE_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO0 + {PE_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO1 + {PE_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO2 + {PE_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO3 + {PF_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PF_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 + {PF_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PF_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PG_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO2 + {PG_14, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO3 + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32F750Z8Tx/PinNamesVar.h b/src/genpinmap/Arduino/STM32F750Z8Tx/PinNamesVar.h new file mode 100644 index 000000000..165f87e58 --- /dev/null +++ b/src/genpinmap/Arduino/STM32F750Z8Tx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = PC_1, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32F767V(G-I)Hx/PeripheralPins.c b/src/genpinmap/Arduino/STM32F767VGHx/PeripheralPins.c similarity index 99% rename from src/genpinmap/Arduino/STM32F767V(G-I)Hx/PeripheralPins.c rename to src/genpinmap/Arduino/STM32F767VGHx/PeripheralPins.c index 7f555de7b..469b77e5a 100644 --- a/src/genpinmap/Arduino/STM32F767V(G-I)Hx/PeripheralPins.c +++ b/src/genpinmap/Arduino/STM32F767VGHx/PeripheralPins.c @@ -26,7 +26,7 @@ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ******************************************************************************* - * Automatically generated from STM32F767V(G-I)Hx.xml + * Automatically generated from STM32F767VGHx.xml */ #include "Arduino.h" #include "PeripheralPins.h" diff --git a/src/genpinmap/Arduino/STM32F767VGHx/PinNamesVar.h b/src/genpinmap/Arduino/STM32F767VGHx/PinNamesVar.h new file mode 100644 index 000000000..165f87e58 --- /dev/null +++ b/src/genpinmap/Arduino/STM32F767VGHx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = PC_1, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32F767VIHx/PeripheralPins.c b/src/genpinmap/Arduino/STM32F767VIHx/PeripheralPins.c new file mode 100644 index 000000000..99cbbf7d0 --- /dev/null +++ b/src/genpinmap/Arduino/STM32F767VIHx/PeripheralPins.c @@ -0,0 +1,441 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32F767VIHx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 + {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_IN0 + {PA_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_IN0 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PA_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PA_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_IN2 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PA_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_IN3 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_IN10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_IN11 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_IN13 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_7, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C4)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_13, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF11_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF1_I2C4)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PA_2, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PA_3, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8, TIM10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9, TIM11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // TIM12_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)}, // TIM12_CH2 + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_5, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 + {PE_6, TIM9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_12, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)}, + {PA_15, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_UART7)}, + {PB_4, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_UART7)}, + {PB_6, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_UART5)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_13, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_14, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)}, + {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_1, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_UART7)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)}, + {PB_3, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_UART7)}, + {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_UART5)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PB_15, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)}, + {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_0, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_14, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_15, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART5)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_14, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_10, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_7, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_2, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_5, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PD_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_6, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_4, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PA_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_3, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_4, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PA_11, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_15, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI6)}, + {PB_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_RD[] = { + {PA_8, CAN3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_CAN3)}, + {PA_11, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_3, CAN3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_CAN3)}, + {PB_5, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PB_8, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_12, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PD_0, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_TD[] = { + {PA_12, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PA_15, CAN3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_CAN3)}, + {PB_4, CAN3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_CAN3)}, + {PB_6, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PB_9, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {PB_13, CAN2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, + {PD_1, CAN1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, + {NC, NP, 0} +}; +#endif + +//*** ETHERNET *** + +#ifdef HAL_ETH_MODULE_ENABLED +const PinMap PinMap_Ethernet[] = { + {PA_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS + {PA_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK|ETH_RX_CLK + {PA_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO + {PA_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL + {PA_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV|ETH_RX_DV + {PB_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2 + {PB_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3 + {PB_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT + {PB_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3 + {PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER + {PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN + {PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0 + {PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1 + {PC_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC + {PC_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2 + {PC_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK + {PC_4, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0 + {PC_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1 + {PE_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3 + {NC, NP, 0} +}; +#endif + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PB_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK + {PB_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_NCS + {PC_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PC_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PC_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_NCS + {PD_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PD_12, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PD_13, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PE_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 + {PE_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO0 + {PE_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO1 + {PE_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO2 + {PE_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO3 + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32F767VIHx/PinNamesVar.h b/src/genpinmap/Arduino/STM32F767VIHx/PinNamesVar.h new file mode 100644 index 000000000..165f87e58 --- /dev/null +++ b/src/genpinmap/Arduino/STM32F767VIHx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = PC_1, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32H750IBKx/PeripheralPins.c b/src/genpinmap/Arduino/STM32H750IBKx/PeripheralPins.c new file mode 100644 index 000000000..4cf4d8acc --- /dev/null +++ b/src/genpinmap/Arduino/STM32H750IBKx/PeripheralPins.c @@ -0,0 +1,570 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32H750IBKx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_INP16 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_INN16 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // ADC1_INP17 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_INP14 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_INP14 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_INP15 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_INP15 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC1_INP18 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC2_INP18 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC1_INN18 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC1_INP19 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC2_INN18 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC2_INP19 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_INP3 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_INP3 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_INN3 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_INP7 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_INN3 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_INP7 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INN5 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_INP9 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INN5 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_INP9 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INP5 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INP5 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INP10 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INP10 + {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_INP10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INN10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_INP11 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INN10 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_INP11 + {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_INN10 + {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_INP11 + {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_INN1 + {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_INP0 + {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_INP1 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_INP4 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_INP4 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_INN4 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_INP8 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_INN4 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_INP8 + {PF_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_INP5 + {PF_4, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_INN5 + {PF_4, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_INP9 + {PF_5, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_INP4 + {PF_6, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_INN4 + {PF_6, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_INP8 + {PF_7, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_INP3 + {PF_8, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_INN3 + {PF_8, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_INP7 + {PF_9, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_INP2 + {PF_10, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_INN2 + {PF_10, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_INP6 + {PF_11, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_INP2 + {PF_12, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_INN2 + {PF_12, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_INP6 + {PF_13, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_INP2 + {PF_14, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_INN2 + {PF_14, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_INP6 + {PH_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_INP13 + {PH_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_INN13 + {PH_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_INP14 + {PH_4, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_INN14 + {PH_4, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_INP15 + {PH_5, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_INN15 + {PH_5, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC3_INP16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_7, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_13, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_15, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PH_5, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PH_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PH_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_14, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PH_4, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PH_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PH_11, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_4, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N + {PE_5, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1 + {PE_6, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PF_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 + {PF_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1 + {PF_8, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PF_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N + {PF_9, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {PF_9, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N + {PH_6, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PH_9, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PH_10, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PH_11, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PH_12, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PH_13, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PH_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PH_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PI_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PI_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PI_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PI_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PI_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_12, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)}, + {PA_15, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)}, + {PB_4, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)}, + {PB_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)}, + {PB_6, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_9, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_13, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, + {PB_14, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)}, + {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_1, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PF_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PG_14, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PH_13, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)}, + {PB_3, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)}, + {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, + {PB_7, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_8, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, + {PB_15, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)}, + {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_0, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PF_6, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PG_9, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PH_14, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PI_9, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_14, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_15, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PF_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PG_8, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PG_12, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, + {PB_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_14, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_10, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PF_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PG_15, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_7, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_2, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + {PB_5, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PD_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_9, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PF_11, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PG_14, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + {PI_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_6, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_4, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_8, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PG_9, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_12, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + {PH_7, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PI_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PA_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_3, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_7, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PG_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_13, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + {PH_6, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PI_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_4, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PA_11, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_15, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI6)}, + {PB_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_6, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PG_8, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + {PG_10, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PH_5, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PI_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_RD[] = { + {PA_9, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PA_11, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_5, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PB_8, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_12, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PD_0, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PD_4, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PD_6, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PD_9, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PE_0, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PH_14, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PI_0, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PI_9, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PI_10, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_TD[] = { + {PA_10, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PA_12, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_6, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PB_7, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PB_9, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_13, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PD_1, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PD_5, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PD_10, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PE_1, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PH_13, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PH_15, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +//*** ETHERNET *** + +#ifdef HAL_ETH_MODULE_ENABLED +const PinMap PinMap_Ethernet[] = { + {PA_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS + {PA_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK|ETH_RX_CLK + {PA_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO + {PA_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL + {PA_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV|ETH_RX_DV + {PA_9, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_ER + {PB_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2 + {PB_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3 + {PB_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_ER + {PB_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT + {PB_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3 + {PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER + {PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN + {PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0 + {PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1 + {PC_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC + {PC_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2 + {PC_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK + {PC_4, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0 + {PC_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1 + {PE_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3 + {PG_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT + {PG_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN + {PG_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1 + {PG_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0 + {PG_14, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1 + {PH_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS + {PH_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL + {PH_6, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2 + {PH_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3 + {PI_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER + {NC, NP, 0} +}; +#endif + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PB_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK + {PB_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_NCS + {PC_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PC_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PC_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_NCS + {PD_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PD_12, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PD_13, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PE_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 + {PE_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO0 + {PE_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO1 + {PE_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO2 + {PE_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO3 + {PF_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PF_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 + {PF_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PF_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PF_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK + {PG_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PG_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO2 + {PG_14, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO3 + {PH_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO0 + {PH_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO1 + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32H750IBKx/PinNamesVar.h b/src/genpinmap/Arduino/STM32H750IBKx/PinNamesVar.h new file mode 100644 index 000000000..1dd7dc434 --- /dev/null +++ b/src/genpinmap/Arduino/STM32H750IBKx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, /* SYS_WKUP0 */ +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PA_2, /* SYS_WKUP1 */ +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = PC_13, /* SYS_WKUP2 */ +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PI_8, /* SYS_WKUP3 */ +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = PI_11, /* SYS_WKUP4 */ +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = PC_1, /* SYS_WKUP5 */ +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32H750VBTx/PeripheralPins.c b/src/genpinmap/Arduino/STM32H750VBTx/PeripheralPins.c new file mode 100644 index 000000000..e8eea8fa6 --- /dev/null +++ b/src/genpinmap/Arduino/STM32H750VBTx/PeripheralPins.c @@ -0,0 +1,459 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32H750VBTx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_INP16 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_INN16 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // ADC1_INP17 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_INP14 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_INP14 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_INP15 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_INP15 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC1_INP18 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC2_INP18 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC1_INN18 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC1_INP19 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC2_INN18 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC2_INP19 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_INP3 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_INP3 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_INN3 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_INP7 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_INN3 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_INP7 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INN5 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_INP9 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INN5 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_INP9 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INP5 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INP5 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INP10 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INP10 + {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_INP10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INN10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_INP11 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INN10 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_INP11 + {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_INN10 + {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_INP11 + {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_INN1 + {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_INP0 + {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_INP1 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_INP4 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_INP4 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_INN4 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_INP8 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_INN4 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_INP8 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_7, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_13, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_4, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N + {PE_5, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1 + {PE_6, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_12, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)}, + {PA_15, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)}, + {PB_4, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)}, + {PB_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)}, + {PB_6, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_9, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_13, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, + {PB_14, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)}, + {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_1, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)}, + {PB_3, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)}, + {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, + {PB_7, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_8, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, + {PB_15, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)}, + {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_0, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_14, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_15, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, + {PB_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_14, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_10, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_7, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_2, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + {PB_5, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PD_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_6, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_4, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PA_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_3, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_4, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PA_11, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_15, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI6)}, + {PB_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_RD[] = { + {PA_9, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PA_11, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_5, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PB_8, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_12, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PD_0, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PD_4, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PD_6, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PD_9, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PE_0, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_TD[] = { + {PA_10, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PA_12, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_6, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PB_7, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PB_9, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_13, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PD_1, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PD_5, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PD_10, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PE_1, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +//*** ETHERNET *** + +#ifdef HAL_ETH_MODULE_ENABLED +const PinMap PinMap_Ethernet[] = { + {PA_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS + {PA_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK|ETH_RX_CLK + {PA_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO + {PA_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL + {PA_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV|ETH_RX_DV + {PA_9, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_ER + {PB_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2 + {PB_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3 + {PB_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_ER + {PB_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT + {PB_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3 + {PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER + {PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN + {PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0 + {PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1 + {PC_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC + {PC_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2 + {PC_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK + {PC_4, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0 + {PC_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1 + {PE_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3 + {NC, NP, 0} +}; +#endif + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PB_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK + {PB_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_NCS + {PC_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PC_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PC_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_NCS + {PD_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PD_12, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PD_13, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PE_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 + {PE_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO0 + {PE_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO1 + {PE_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO2 + {PE_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO3 + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32H750VBTx/PinNamesVar.h b/src/genpinmap/Arduino/STM32H750VBTx/PinNamesVar.h new file mode 100644 index 000000000..fcc6d968b --- /dev/null +++ b/src/genpinmap/Arduino/STM32H750VBTx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, /* SYS_WKUP0 */ +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PA_2, /* SYS_WKUP1 */ +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = PC_13, /* SYS_WKUP2 */ +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = NC, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = PC_1, /* SYS_WKUP5 */ +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32H750XBHx/PeripheralPins.c b/src/genpinmap/Arduino/STM32H750XBHx/PeripheralPins.c new file mode 100644 index 000000000..59970597f --- /dev/null +++ b/src/genpinmap/Arduino/STM32H750XBHx/PeripheralPins.c @@ -0,0 +1,607 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32H750XBHx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_INP16 + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_INN1 + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_INP0 + {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_INN1 + {PA_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC2_INP0 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_INN16 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // ADC1_INP17 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_INP1 + {PA_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_INP1 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_INP14 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_INP14 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_INP15 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_INP15 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC1_INP18 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC2_INP18 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC1_INN18 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC1_INP19 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC2_INN18 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC2_INP19 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_INP3 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_INP3 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_INN3 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_INP7 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_INN3 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_INP7 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INN5 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_INP9 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INN5 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_INP9 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INP5 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INP5 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INP10 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INP10 + {PC_0, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_INP10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INN10 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_INP11 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INN10 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_INP11 + {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_INN10 + {PC_1, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_INP11 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_INN11 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_INP12 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_INN11 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_INP12 + {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_INN11 + {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_INP12 + {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_INN1 + {PC_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_INP0 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_INN12 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_INP13 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_INN12 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_INP13 + {PC_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_INP1 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_INP4 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_INP4 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_INN4 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_INP8 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_INN4 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_INP8 + {PF_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_INP5 + {PF_4, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_INN5 + {PF_4, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_INP9 + {PF_5, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_INP4 + {PF_6, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_INN4 + {PF_6, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_INP8 + {PF_7, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_INP3 + {PF_8, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_INN3 + {PF_8, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_INP7 + {PF_9, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_INP2 + {PF_10, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_INN2 + {PF_10, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_INP6 + {PF_11, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_INP2 + {PF_12, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_INN2 + {PF_12, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_INP6 + {PF_13, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_INP2 + {PF_14, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_INN2 + {PF_14, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_INP6 + {PH_2, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_INP13 + {PH_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC3_INN13 + {PH_3, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_INP14 + {PH_4, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC3_INN14 + {PH_4, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_INP15 + {PH_5, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC3_INN15 + {PH_5, ADC3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC3_INP16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +#ifdef HAL_DAC_MODULE_ENABLED +const PinMap PinMap_DAC[] = { + {PA_4, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 + {PA_5, DAC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 + {NC, NP, 0} +}; +#endif + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_7, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_9, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PD_13, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PF_0, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_15, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PH_5, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PH_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PH_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_8, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PD_12, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PF_1, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PF_14, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {PH_4, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PH_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PH_11, I2C4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_6, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PA_7, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_4, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N + {PB_7, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N + {PB_8, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 + {PB_9, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PB_14, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PB_15, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PC_6, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PC_7, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PC_8, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PC_9, TIM3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PC_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PD_12, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PD_13, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PD_14, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PD_15, TIM4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PE_4, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N + {PE_5, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1 + {PE_6, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2 + {PE_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PE_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PE_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PE_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PE_12, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PE_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PE_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PF_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 + {PF_7, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1 + {PF_8, TIM13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1 + {PF_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N + {PF_9, TIM14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 + {PF_9, TIM17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N + {PH_6, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 + {PH_9, TIM12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2 + {PH_10, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PH_11, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 + {PH_12, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 + {PH_13, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PH_14, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PH_15, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {PI_0, TIM5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 + {PI_2, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4 + {PI_5, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PI_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PI_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PJ_6, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PJ_7, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PJ_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PJ_8, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1 + {PJ_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PJ_9, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N + {PJ_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PJ_10, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2 + {PJ_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PJ_11, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N + {PK_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PK_0, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3 + {PK_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PK_1, TIM8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_12, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)}, + {PA_15, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)}, + {PB_4, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)}, + {PB_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)}, + {PB_6, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_9, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_13, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, + {PB_14, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)}, + {PC_6, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PC_10, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PD_5, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_8, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_1, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PF_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PG_14, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PH_13, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PJ_8, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_1, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)}, + {PA_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)}, + {PB_3, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)}, + {PB_5, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, + {PB_7, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_8, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_12, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, + {PB_15, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)}, + {PC_7, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PC_11, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PD_2, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_6, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_9, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PE_0, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_7, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PF_6, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PG_9, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PH_14, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PI_9, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PJ_9, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_14, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_8, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_4, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_12, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_15, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PF_8, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PG_8, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {PG_12, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, + {PB_0, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PB_15, UART4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, + {PC_9, UART5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, + {PD_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PD_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_14, UART8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, + {PE_10, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PF_9, UART7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)}, + {PG_15, USART6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_7, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_2, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)}, + {PB_5, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_12, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_6, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)}, + {PD_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PE_6, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_14, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_9, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PF_11, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PG_14, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + {PI_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PJ_10, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_6, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_4, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_11, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PE_5, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_13, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_8, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PG_9, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_12, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + {PH_7, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PI_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PJ_11, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PA_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PA_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PB_3, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_10, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PD_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_2, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_12, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_7, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PG_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PG_13, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + {PH_6, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PI_1, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PK_0, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_4, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_4, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_SPI6)}, + {PA_11, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)}, + {PA_15, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI6)}, + {PB_4, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI2)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PE_4, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PE_11, SPI4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)}, + {PF_6, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PG_8, SPI6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI6)}, + {PG_10, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PH_5, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {PI_0, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PK_1, SPI5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI5)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_RD[] = { + {PA_9, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PA_11, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_5, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PB_8, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_12, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PD_0, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PD_4, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PD_6, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PD_9, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PE_0, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PH_14, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PI_0, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PI_9, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PI_10, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_CAN_MODULE_ENABLED +const PinMap PinMap_CAN_TD[] = { + {PA_10, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PA_12, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_6, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PB_7, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PB_9, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PB_13, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PD_1, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PD_5, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PD_10, CANFD2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, + {PE_1, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PH_13, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {PH_15, CANFD1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, + {NC, NP, 0} +}; +#endif + +//*** ETHERNET *** + +#ifdef HAL_ETH_MODULE_ENABLED +const PinMap PinMap_Ethernet[] = { + {PA_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS + {PA_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_REF_CLK|ETH_RX_CLK + {PA_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDIO + {PA_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL + {PA_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS_DV|ETH_RX_DV + {PA_9, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_ER + {PB_0, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2 + {PB_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3 + {PB_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_ER + {PB_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT + {PB_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3 + {PB_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER + {PB_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN + {PB_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0 + {PB_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1 + {PC_1, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_MDC + {PC_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD2 + {PC_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_CLK + {PC_4, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD0 + {PC_5, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD1 + {PE_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD3 + {PG_8, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_PPS_OUT + {PG_11, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_EN + {PG_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1 + {PG_13, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD0 + {PG_14, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TXD1 + {PH_2, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_CRS + {PH_3, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_COL + {PH_6, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD2 + {PH_7, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RXD3 + {PI_10, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_RX_ER + {PI_12, ETH, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_ETH)}, // ETH_TX_ER + {NC, NP, 0} +}; +#endif + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PB_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK + {PB_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_NCS + {PC_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PC_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PC_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_NCS + {PD_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO0 + {PD_12, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO1 + {PD_13, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PE_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 + {PE_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO0 + {PE_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO1 + {PE_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO2 + {PE_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK2_IO3 + {PF_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO3 + {PF_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK1_IO2 + {PF_8, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PF_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PF_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_CLK + {PG_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PG_9, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO2 + {PG_14, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO3 + {PH_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO0 + {PH_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_QUADSPI)}, // QUADSPI_BK2_IO1 + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32H750XBHx/PinNamesVar.h b/src/genpinmap/Arduino/STM32H750XBHx/PinNamesVar.h new file mode 100644 index 000000000..1dd7dc434 --- /dev/null +++ b/src/genpinmap/Arduino/STM32H750XBHx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, /* SYS_WKUP0 */ +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PA_2, /* SYS_WKUP1 */ +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = PC_13, /* SYS_WKUP2 */ +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PI_8, /* SYS_WKUP3 */ +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = PI_11, /* SYS_WKUP4 */ +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = PC_1, /* SYS_WKUP5 */ +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L412C8Tx/PeripheralPins.c b/src/genpinmap/Arduino/STM32L412C8Tx/PeripheralPins.c new file mode 100644 index 000000000..a95b0ea50 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412C8Tx/PeripheralPins.c @@ -0,0 +1,252 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L412C8Tx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PB_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L412C8Tx/PinNamesVar.h b/src/genpinmap/Arduino/STM32L412C8Tx/PinNamesVar.h new file mode 100644 index 000000000..7c65f83ff --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412C8Tx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L412C8Ux/PeripheralPins.c b/src/genpinmap/Arduino/STM32L412C8Ux/PeripheralPins.c new file mode 100644 index 000000000..6ab7ed6d0 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412C8Ux/PeripheralPins.c @@ -0,0 +1,252 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L412C8Ux.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PB_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L412C8Ux/PinNamesVar.h b/src/genpinmap/Arduino/STM32L412C8Ux/PinNamesVar.h new file mode 100644 index 000000000..7c65f83ff --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412C8Ux/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L412CBTx/PeripheralPins.c b/src/genpinmap/Arduino/STM32L412CBTx/PeripheralPins.c new file mode 100644 index 000000000..6f9705bbc --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412CBTx/PeripheralPins.c @@ -0,0 +1,252 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L412CBTx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PB_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L412CBTx/PinNamesVar.h b/src/genpinmap/Arduino/STM32L412CBTx/PinNamesVar.h new file mode 100644 index 000000000..7c65f83ff --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412CBTx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L412CBTxP/PeripheralPins.c b/src/genpinmap/Arduino/STM32L412CBTxP/PeripheralPins.c new file mode 100644 index 000000000..be8e2c950 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412CBTxP/PeripheralPins.c @@ -0,0 +1,245 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L412CBTxP.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L412CBTxP/PinNamesVar.h b/src/genpinmap/Arduino/STM32L412CBTxP/PinNamesVar.h new file mode 100644 index 000000000..7c65f83ff --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412CBTxP/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L412CBUx/PeripheralPins.c b/src/genpinmap/Arduino/STM32L412CBUx/PeripheralPins.c new file mode 100644 index 000000000..ef1f68ace --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412CBUx/PeripheralPins.c @@ -0,0 +1,252 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L412CBUx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PB_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L412CBUx/PinNamesVar.h b/src/genpinmap/Arduino/STM32L412CBUx/PinNamesVar.h new file mode 100644 index 000000000..7c65f83ff --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412CBUx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L412CBUxP/PeripheralPins.c b/src/genpinmap/Arduino/STM32L412CBUxP/PeripheralPins.c new file mode 100644 index 000000000..fc66dd96e --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412CBUxP/PeripheralPins.c @@ -0,0 +1,245 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L412CBUxP.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L412CBUxP/PinNamesVar.h b/src/genpinmap/Arduino/STM32L412CBUxP/PinNamesVar.h new file mode 100644 index 000000000..7c65f83ff --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412CBUxP/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L412K8Tx/PeripheralPins.c b/src/genpinmap/Arduino/STM32L412K8Tx/PeripheralPins.c new file mode 100644 index 000000000..76111ea13 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412K8Tx/PeripheralPins.c @@ -0,0 +1,220 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L412K8Tx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L412K8Tx/PinNamesVar.h b/src/genpinmap/Arduino/STM32L412K8Tx/PinNamesVar.h new file mode 100644 index 000000000..9cfcfcfe5 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412K8Tx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = NC, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L412K8Ux/PeripheralPins.c b/src/genpinmap/Arduino/STM32L412K8Ux/PeripheralPins.c new file mode 100644 index 000000000..900e39c0b --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412K8Ux/PeripheralPins.c @@ -0,0 +1,220 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L412K8Ux.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L412K8Ux/PinNamesVar.h b/src/genpinmap/Arduino/STM32L412K8Ux/PinNamesVar.h new file mode 100644 index 000000000..9cfcfcfe5 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412K8Ux/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = NC, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L412KBTx/PeripheralPins.c b/src/genpinmap/Arduino/STM32L412KBTx/PeripheralPins.c new file mode 100644 index 000000000..7eac73816 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412KBTx/PeripheralPins.c @@ -0,0 +1,220 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L412KBTx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L412KBTx/PinNamesVar.h b/src/genpinmap/Arduino/STM32L412KBTx/PinNamesVar.h new file mode 100644 index 000000000..9cfcfcfe5 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412KBTx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = NC, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L412KBUx/PeripheralPins.c b/src/genpinmap/Arduino/STM32L412KBUx/PeripheralPins.c new file mode 100644 index 000000000..77ac9402b --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412KBUx/PeripheralPins.c @@ -0,0 +1,220 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L412KBUx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L412KBUx/PinNamesVar.h b/src/genpinmap/Arduino/STM32L412KBUx/PinNamesVar.h new file mode 100644 index 000000000..9cfcfcfe5 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412KBUx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = NC, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L412R8Ix/PeripheralPins.c b/src/genpinmap/Arduino/STM32L412R8Ix/PeripheralPins.c new file mode 100644 index 000000000..19a8f2e41 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412R8Ix/PeripheralPins.c @@ -0,0 +1,275 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L412R8Ix.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_4, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PB_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L412R8Ix/PinNamesVar.h b/src/genpinmap/Arduino/STM32L412R8Ix/PinNamesVar.h new file mode 100644 index 000000000..7c65f83ff --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412R8Ix/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L412R8Tx/PeripheralPins.c b/src/genpinmap/Arduino/STM32L412R8Tx/PeripheralPins.c new file mode 100644 index 000000000..00ff2ede2 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412R8Tx/PeripheralPins.c @@ -0,0 +1,275 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L412R8Tx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_4, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PB_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L412R8Tx/PinNamesVar.h b/src/genpinmap/Arduino/STM32L412R8Tx/PinNamesVar.h new file mode 100644 index 000000000..7c65f83ff --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412R8Tx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L412RBIx/PeripheralPins.c b/src/genpinmap/Arduino/STM32L412RBIx/PeripheralPins.c new file mode 100644 index 000000000..cc126ac21 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412RBIx/PeripheralPins.c @@ -0,0 +1,275 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L412RBIx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_4, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PB_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L412RBIx/PinNamesVar.h b/src/genpinmap/Arduino/STM32L412RBIx/PinNamesVar.h new file mode 100644 index 000000000..7c65f83ff --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412RBIx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L412RBIxP/PeripheralPins.c b/src/genpinmap/Arduino/STM32L412RBIxP/PeripheralPins.c new file mode 100644 index 000000000..6588333d8 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412RBIxP/PeripheralPins.c @@ -0,0 +1,271 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L412RBIxP.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_4, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PB_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L412RBIxP/PinNamesVar.h b/src/genpinmap/Arduino/STM32L412RBIxP/PinNamesVar.h new file mode 100644 index 000000000..7c65f83ff --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412RBIxP/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L412RBTx/PeripheralPins.c b/src/genpinmap/Arduino/STM32L412RBTx/PeripheralPins.c new file mode 100644 index 000000000..48eaa6621 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412RBTx/PeripheralPins.c @@ -0,0 +1,275 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L412RBTx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_4, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PB_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L412RBTx/PinNamesVar.h b/src/genpinmap/Arduino/STM32L412RBTx/PinNamesVar.h new file mode 100644 index 000000000..7c65f83ff --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412RBTx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L412RBTxP/PeripheralPins.c b/src/genpinmap/Arduino/STM32L412RBTxP/PeripheralPins.c new file mode 100644 index 000000000..26fe345dd --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412RBTxP/PeripheralPins.c @@ -0,0 +1,271 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L412RBTxP.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_4, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PB_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L412RBTxP/PinNamesVar.h b/src/genpinmap/Arduino/STM32L412RBTxP/PinNamesVar.h new file mode 100644 index 000000000..7c65f83ff --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412RBTxP/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L412T8Yx/PeripheralPins.c b/src/genpinmap/Arduino/STM32L412T8Yx/PeripheralPins.c new file mode 100644 index 000000000..63e4f3dcb --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412T8Yx/PeripheralPins.c @@ -0,0 +1,225 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L412T8Yx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L412T8Yx/PinNamesVar.h b/src/genpinmap/Arduino/STM32L412T8Yx/PinNamesVar.h new file mode 100644 index 000000000..9cfcfcfe5 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412T8Yx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = NC, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L412TBYx/PeripheralPins.c b/src/genpinmap/Arduino/STM32L412TBYx/PeripheralPins.c new file mode 100644 index 000000000..a94f6fcb6 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412TBYx/PeripheralPins.c @@ -0,0 +1,225 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L412TBYx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L412TBYx/PinNamesVar.h b/src/genpinmap/Arduino/STM32L412TBYx/PinNamesVar.h new file mode 100644 index 000000000..9cfcfcfe5 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412TBYx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = NC, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L412TBYxP/PeripheralPins.c b/src/genpinmap/Arduino/STM32L412TBYxP/PeripheralPins.c new file mode 100644 index 000000000..a8e0e1842 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412TBYxP/PeripheralPins.c @@ -0,0 +1,223 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L412TBYxP.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L412TBYxP/PinNamesVar.h b/src/genpinmap/Arduino/STM32L412TBYxP/PinNamesVar.h new file mode 100644 index 000000000..9cfcfcfe5 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L412TBYxP/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = NC, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L422CBTx/PeripheralPins.c b/src/genpinmap/Arduino/STM32L422CBTx/PeripheralPins.c new file mode 100644 index 000000000..8f7d54e1b --- /dev/null +++ b/src/genpinmap/Arduino/STM32L422CBTx/PeripheralPins.c @@ -0,0 +1,252 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L422CBTx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PB_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L422CBTx/PinNamesVar.h b/src/genpinmap/Arduino/STM32L422CBTx/PinNamesVar.h new file mode 100644 index 000000000..7c65f83ff --- /dev/null +++ b/src/genpinmap/Arduino/STM32L422CBTx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L422CBUx/PeripheralPins.c b/src/genpinmap/Arduino/STM32L422CBUx/PeripheralPins.c new file mode 100644 index 000000000..4d2191854 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L422CBUx/PeripheralPins.c @@ -0,0 +1,252 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L422CBUx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PB_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L422CBUx/PinNamesVar.h b/src/genpinmap/Arduino/STM32L422CBUx/PinNamesVar.h new file mode 100644 index 000000000..7c65f83ff --- /dev/null +++ b/src/genpinmap/Arduino/STM32L422CBUx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L422KBTx/PeripheralPins.c b/src/genpinmap/Arduino/STM32L422KBTx/PeripheralPins.c new file mode 100644 index 000000000..156961220 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L422KBTx/PeripheralPins.c @@ -0,0 +1,220 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L422KBTx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L422KBTx/PinNamesVar.h b/src/genpinmap/Arduino/STM32L422KBTx/PinNamesVar.h new file mode 100644 index 000000000..9cfcfcfe5 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L422KBTx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = NC, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L422KBUx/PeripheralPins.c b/src/genpinmap/Arduino/STM32L422KBUx/PeripheralPins.c new file mode 100644 index 000000000..4560ff029 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L422KBUx/PeripheralPins.c @@ -0,0 +1,220 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L422KBUx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L422KBUx/PinNamesVar.h b/src/genpinmap/Arduino/STM32L422KBUx/PinNamesVar.h new file mode 100644 index 000000000..9cfcfcfe5 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L422KBUx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = NC, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L422RBIx/PeripheralPins.c b/src/genpinmap/Arduino/STM32L422RBIx/PeripheralPins.c new file mode 100644 index 000000000..e6f15be00 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L422RBIx/PeripheralPins.c @@ -0,0 +1,275 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L422RBIx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_4, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PB_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L422RBIx/PinNamesVar.h b/src/genpinmap/Arduino/STM32L422RBIx/PinNamesVar.h new file mode 100644 index 000000000..7c65f83ff --- /dev/null +++ b/src/genpinmap/Arduino/STM32L422RBIx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L422RBTx/PeripheralPins.c b/src/genpinmap/Arduino/STM32L422RBTx/PeripheralPins.c new file mode 100644 index 000000000..9ec7d8a8f --- /dev/null +++ b/src/genpinmap/Arduino/STM32L422RBTx/PeripheralPins.c @@ -0,0 +1,275 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L422RBTx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {PC_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 + {PC_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 + {PC_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 + {PC_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 + {PC_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 + {PC_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 + {PC_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 + {PC_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 + {PC_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 + {PC_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_11, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_14, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_1, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PB_13, I2C2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {PC_0, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_11, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PB_13, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_13, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PB_14, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_14, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PB_15, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_15, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_11, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_4, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_10, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_0, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PC_5, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PC_11, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_1, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_12, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_14, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PD_2, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_6, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_13, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_13, USART3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_15, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_3, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_14, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PC_2, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_10, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_13, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_9, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {PB_12, SPI2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PB_11, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L422RBTx/PinNamesVar.h b/src/genpinmap/Arduino/STM32L422RBTx/PinNamesVar.h new file mode 100644 index 000000000..7c65f83ff --- /dev/null +++ b/src/genpinmap/Arduino/STM32L422RBTx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = PC_13, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/src/genpinmap/Arduino/STM32L422TBYx/PeripheralPins.c b/src/genpinmap/Arduino/STM32L422TBYx/PeripheralPins.c new file mode 100644 index 000000000..4a21b5cb7 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L422TBYx/PeripheralPins.c @@ -0,0 +1,225 @@ +/* + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + * Automatically generated from STM32L422TBYx.xml + */ +#include "Arduino.h" +#include "PeripheralPins.h" + +/* ===== + * Note: Commented lines are alternative possibilities which are not used per default. + * If you change them, you will have to know what you do + * ===== + */ + +//*** ADC *** + +#ifdef HAL_ADC_MODULE_ENABLED +const PinMap PinMap_ADC[] = { + {PA_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 + {PA_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_2, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PA_2, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 + {PA_3, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PA_3, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 + {PA_4, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PA_4, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 + {PA_5, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PA_5, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 + {PA_6, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PA_6, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 + {PA_7, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PA_7, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 + {PB_0, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {PB_0, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 + {PB_1, ADC1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_IN16 + {PB_1, ADC2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC2_IN16 + {NC, NP, 0} +}; +#endif + +//*** DAC *** + +//*** No DAC *** + +//*** I2C *** + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SDA[] = { + {PA_10, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_4, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PB_7, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_I2C_MODULE_ENABLED +const PinMap PinMap_I2C_SCL[] = { + {PA_7, I2C3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {PA_9, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_6, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {NC, NP, 0} +}; +#endif + +//*** PWM *** + +#ifdef HAL_TIM_MODULE_ENABLED +const PinMap PinMap_PWM[] = { + {PA_0, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_1, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PA_1, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 1)}, // TIM15_CH1N + {PA_2, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PA_2, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 1, 0)}, // TIM15_CH1 + {PA_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 + {PA_3, TIM15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM15, 2, 0)}, // TIM15_CH2 + {PA_5, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PA_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PA_7, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_8, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_1, TIM1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_3, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 + {PB_6, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 1)}, // TIM16_CH1N + {PB_8, TIM16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_TIM16, 1, 0)}, // TIM16_CH1 + {PB_10, TIM2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {NC, NP, 0} +}; +#endif + +//*** SERIAL *** + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_TX[] = { + {PA_2, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_2, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_9, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RX[] = { + {PA_3, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_3, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_10, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_15, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_USART2)}, + {PB_7, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_10, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_RTS[] = { + {PA_1, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_1, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PB_3, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_UART_MODULE_ENABLED +const PinMap PinMap_UART_CTS[] = { + {PA_0, USART2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_6, LPUART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, + {PA_11, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_4, USART1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NP, 0} +}; +#endif + +//*** SPI *** + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MOSI[] = { + {PA_7, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_12, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_11, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SCLK[] = { + {PA_1, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_5, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_3, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +#ifdef HAL_SPI_MODULE_ENABLED +const PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PA_15, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {PB_0, SPI1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)}, + {NC, NP, 0} +}; +#endif + +//*** CAN *** + +//*** No CAN_RD *** + +//*** No CAN_TD *** + +//*** ETHERNET *** + +//*** No Ethernet *** + +//*** QUADSPI *** + +#ifdef HAL_QSPI_MODULE_ENABLED +const PinMap PinMap_QUADSPI[] = { + {PA_2, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_NCS + {PA_3, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {PA_6, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO3 + {PA_7, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO2 + {PB_0, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO1 + {PB_1, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_BK1_IO0 + {PB_10, QUADSPI, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI_CLK + {NC, NP, 0} +}; +#endif diff --git a/src/genpinmap/Arduino/STM32L422TBYx/PinNamesVar.h b/src/genpinmap/Arduino/STM32L422TBYx/PinNamesVar.h new file mode 100644 index 000000000..9cfcfcfe5 --- /dev/null +++ b/src/genpinmap/Arduino/STM32L422TBYx/PinNamesVar.h @@ -0,0 +1,25 @@ + /* SYS_WKUP */ +#ifdef PWR_WAKEUP_PIN1 + SYS_WKUP1 = PA_0, +#endif +#ifdef PWR_WAKEUP_PIN2 + SYS_WKUP2 = NC, +#endif +#ifdef PWR_WAKEUP_PIN3 + SYS_WKUP3 = NC, +#endif +#ifdef PWR_WAKEUP_PIN4 + SYS_WKUP4 = PA_2, +#endif +#ifdef PWR_WAKEUP_PIN5 + SYS_WKUP5 = NC, +#endif +#ifdef PWR_WAKEUP_PIN6 + SYS_WKUP6 = NC, +#endif +#ifdef PWR_WAKEUP_PIN7 + SYS_WKUP7 = NC, +#endif +#ifdef PWR_WAKEUP_PIN8 + SYS_WKUP8 = NC, +#endif diff --git a/win/serial_upload.bat b/win/serial_upload.bat index 7252d8351..9226e3219 100644 --- a/win/serial_upload.bat +++ b/win/serial_upload.bat @@ -8,16 +8,4 @@ cd %~dp0 rem: the two line below are needed to fix path issues with incorrect slashes before the bin file name set str=%4 set str=%str:/=\% -stm32flash -g 0x8000000 -b 115200 -w %str% %1 -rem: C:\Python27\python.exe stm32loader.py -e -w -p %1 -g -b 115200 %str% - -rem: ------------- use STM's own uploader -rem: ---- Need to remove the COM bit from the comm port as the STM prog just wants the number -set commport=%1 -set commportnum=%commport:COM=% -rem: --- The maple board may nee the -i setting to be -i STM32_Med-density_128K or STM32_Med-density_64K -rem: ---- 64 bit version -rem: "%ProgramFiles(x86)%\STMicroelectronics\Software\Flash Loader Demonstrator\STMFlashLoader.exe" -c --pn %commportnum% --br 230400 -i STM32_High-density_256K -e --all -d --fn %str% --a 0x8000000 -r --a 0x8000000 - -rem: -- 32 bit version -rem: "%ProgramFiles%\STMicroelectronics\Software\Flash Loader Demonstrator\STMFlashLoader.exe" -c --pn %commportnum% --br 230400 -i STM32_Med-density_64K -e --all -d --fn %str% --a 0x8000000 -r --a 0x8000000 +stm32flash\stm32flash.exe -g 0x8000000 -b 115200 -w %str% %1 diff --git a/win/src/stm32flash_serial/src/AUTHORS b/win/src/stm32flash_serial/src/AUTHORS deleted file mode 100644 index d096f2205..000000000 --- a/win/src/stm32flash_serial/src/AUTHORS +++ /dev/null @@ -1,19 +0,0 @@ -Authors ordered by first contribution. - -Geoffrey McRae -Bret Olmsted -Tormod Volden -Jakob Malm -Reuben Dowle -Matthias Kubisch -Paul Fertser -Daniel Strnad -Jérémie Rapin -Christian Pointner -Mats Erik Andersson -Alexey Borovik -Antonio Borneo -Armin van der Togt -Brian Silverman -Georg Hofmann -Luis Rodrigues diff --git a/win/src/stm32flash_serial/src/Android.mk b/win/src/stm32flash_serial/src/Android.mk deleted file mode 100644 index 7be3d0018..000000000 --- a/win/src/stm32flash_serial/src/Android.mk +++ /dev/null @@ -1,20 +0,0 @@ -TOP_LOCAL_PATH := $(call my-dir) - -include $(call all-named-subdir-makefiles, parsers) - -LOCAL_PATH := $(TOP_LOCAL_PATH) - -include $(CLEAR_VARS) -LOCAL_MODULE := stm32flash -LOCAL_SRC_FILES := \ - dev_table.c \ - i2c.c \ - init.c \ - main.c \ - port.c \ - serial_common.c \ - serial_platform.c \ - stm32.c \ - utils.c -LOCAL_STATIC_LIBRARIES := libparsers -include $(BUILD_EXECUTABLE) diff --git a/win/src/stm32flash_serial/src/HOWTO b/win/src/stm32flash_serial/src/HOWTO deleted file mode 100644 index d8f32eb04..000000000 --- a/win/src/stm32flash_serial/src/HOWTO +++ /dev/null @@ -1,35 +0,0 @@ -Add new interfaces: -===================================================================== -Current version 0.4 supports the following interfaces: -- UART Windows (either "COMn" and "\\.\COMn"); -- UART posix/Linux (e.g. "/dev/ttyUSB0"); -- I2C Linux through standard driver "i2c-dev" (e.g. "/dev/i2c-n"). - -Starting from version 0.4, the back-end of stm32flash is modular and -ready to be expanded to support new interfaces. -I'm planning adding SPI on Linux through standard driver "spidev". -You are invited to contribute with more interfaces. - -To add a new interface you need to add a new file, populate the struct -port_interface (check at the end of files i2c.c, serial_posix.c and -serial_w32.c) and provide the relative functions to operate on the -interface: open/close, read/write, get_cfg_str and the optional gpio. -The include the new drive in Makefile and register the new struct -port_interface in file port.c in struct port_interface *ports[]. - -There are several USB-I2C adapter in the market, each providing its -own libraries to communicate with the I2C bus. -Could be interesting to provide as back-end a bridge between stm32flash -and such libraries (I have no plan on this item). - - -Add new STM32 devices: -===================================================================== -Add a new line in file dev_table.c, in table devices[]. -The fields of the table are listed in stm32.h, struct stm32_dev. - - -Cross compile on Linux host for Windows target with MinGW: -===================================================================== -I'm using a 64 bit Arch Linux machines, and I usually run: - make CC=x86_64-w64-mingw32-gcc AR=x86_64-w64-mingw32-ar diff --git a/win/src/stm32flash_serial/src/I2C.txt b/win/src/stm32flash_serial/src/I2C.txt deleted file mode 100644 index 4c05ff62d..000000000 --- a/win/src/stm32flash_serial/src/I2C.txt +++ /dev/null @@ -1,94 +0,0 @@ -About I2C back-end communication in stm32flash -========================================================================== - -Starting from version v0.4, beside the serial communication port, -stm32flash adds support for I2C port to talk with STM32 bootloader. - -The current I2C back-end supports only the API provided by Linux kernel -driver "i2c-dev", so only I2C controllers with Linux kernel driver can be -used. -In Linux source code, most of the drivers for I2C and SMBUS controllers -are in - ./drivers/i2c/busses/ -Only I2C is supported by STM32 bootloader, so check the section below -about SMBUS. -No I2C support for Windows is available in stm32flash v0.4. - -Thanks to the new modular back-end, stm32flash can be easily extended to -support new back-ends and API. Check HOWTO file in stm32flash source code -for details. - -In the market there are several USB-to-I2C dongles; most of them are not -supported by kernel drivers. Manufacturer provide proprietary userspace -libraries using not standardized API. -These API and dongles could be supported in feature versions. - -There are currently 3 versions of STM32 bootloader for I2C communications: -- v1.0 using I2C clock stretching synchronization between host and STM32; -- v1.1 superset of v1.0, adds non stretching commands; -- v1.2 superset of v1.1, adds CRC command and compatibility with i2cdetect. -Details in ST application note AN2606. -All the bootloaders above are tested and working with stm32flash. - - -SMBUS controllers -========================================================================== - -Almost 50% of the drivers in Linux source code folder - ./drivers/i2c/busses/ -are for controllers that "only" support SMBUS protocol. They can NOT -operate with STM32 bootloader. -To identify if your controller supports I2C, use command: - i2cdetect -F n -where "n" is the number of the I2C interface (e.g. n=3 for "/dev/i2c-3"). -Controllers that supports I2C will report - I2C yes -Controller that support both I2C and SMBUS are ok. - -If you are interested on details about SMBUS protocol, you can download -the current specs from - http://smbus.org/specs/smbus20.pdf -and you can read the files in Linux source code - ./Documentation/i2c/i2c-protocol - ./Documentation/i2c/smbus-protocol - - -About bootloader v1.0 -========================================================================== - -Version v1.0 can have issues with some I2C controllers due to use of clock -stretching during commands that require long operations, like flash erase -and programming. - -Clock stretching is a technique to synchronize host and I2C device. When -I2C device wants to force a delay in the communication, it push "low" the -I2C clock; the I2C controller detects it and waits until I2C clock returns -"high". -Most I2C controllers set a "timeout" for clock stretching, ranging from -few milli-seconds to seconds depending on specific HW or SW driver. - -It is possible that the timeout in your I2C controller is smaller than the -delay required for flash erase or programming. In this case the I2C -controller will timeout and report error to stm32flash. -There is no possibility for stm32flash to retry, so it can only signal the -error and exit. - -To by-pass the issue with bootloader v1.0 you can modify the kernel driver -of your I2C controller. Not an easy job, since every controller has its own -way to handle the timeout. - -In my case I'm using the I2C controller integrated in the VGA port of my -laptop HP EliteBook 8460p. I built the 0.25$ VGA-to-I2C adapter reported in - http://www.paintyourdragon.com/?p=43 -To change the timeout of the I2C controller I had to modify the kernel file - drivers/gpu/drm/radeon/radeon_i2c.c -line 969 -- i2c->bit.timeout = usecs_to_jiffies(2200); /* from VESA */ -+ i2c->bit.timeout = msecs_to_jiffies(5000); /* 5s for STM32 */ -and recompile it. -Then - $> modprobe i2c-dev - $> chmod 666 /dev/i2c-7 - #> stm32flash -a 0x39 /dev/i2c-7 - -2014-09-16 Antonio Borneo diff --git a/win/src/stm32flash_serial/src/Makefile b/win/src/stm32flash_serial/src/Makefile deleted file mode 100644 index 0328d5588..000000000 --- a/win/src/stm32flash_serial/src/Makefile +++ /dev/null @@ -1,38 +0,0 @@ -PREFIX = /usr/local -CFLAGS += -Wall -g - -INSTALL = install - -OBJS = dev_table.o \ - i2c.o \ - init.o \ - main.o \ - port.o \ - serial_common.o \ - serial_platform.o \ - stm32.o \ - utils.o - -LIBOBJS = parsers/parsers.a - -all: stm32flash - -serial_platform.o: serial_posix.c serial_w32.c - -parsers/parsers.a: - cd parsers && $(MAKE) parsers.a - -stm32flash: $(OBJS) $(LIBOBJS) - $(CC) $(LDFLAGS) -o $@ $(OBJS) $(LIBOBJS) - -clean: - rm -f $(OBJS) stm32flash - cd parsers && $(MAKE) $@ - -install: all - $(INSTALL) -d $(DESTDIR)$(PREFIX)/bin - $(INSTALL) -m 755 stm32flash $(DESTDIR)$(PREFIX)/bin - $(INSTALL) -d $(DESTDIR)$(PREFIX)/share/man/man1 - $(INSTALL) -m 644 stm32flash.1 $(DESTDIR)$(PREFIX)/share/man/man1 - -.PHONY: all clean install diff --git a/win/src/stm32flash_serial/src/TODO b/win/src/stm32flash_serial/src/TODO deleted file mode 100644 index 41df614ff..000000000 --- a/win/src/stm32flash_serial/src/TODO +++ /dev/null @@ -1,7 +0,0 @@ - -stm32: -- Add support for variable page size - -AUTHORS: -- Add contributors from Geoffrey's commits - diff --git a/win/src/stm32flash_serial/src/dev_table.c b/win/src/stm32flash_serial/src/dev_table.c deleted file mode 100644 index 399cd9d08..000000000 --- a/win/src/stm32flash_serial/src/dev_table.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - Copyright (C) 2014 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include "stm32.h" - -/* - * Device table, corresponds to the "Bootloader device-dependant parameters" - * table in ST document AN2606. - * Note that the option bytes upper range is inclusive! - */ -const stm32_dev_t devices[] = { - /* F0 */ - {0x440, "STM32F051xx" , 0x20001000, 0x20002000, 0x08000000, 0x08010000, 4, 1024, 0x1FFFF800, 0x1FFFF80B, 0x1FFFEC00, 0x1FFFF800}, - {0x444, "STM32F030/F031" , 0x20001000, 0x20002000, 0x08000000, 0x08010000, 4, 1024, 0x1FFFF800, 0x1FFFF80B, 0x1FFFEC00, 0x1FFFF800}, - {0x445, "STM32F042xx" , 0x20001800, 0x20001800, 0x08000000, 0x08008000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFC400, 0x1FFFF800}, - {0x448, "STM32F072xx" , 0x20001800, 0x20004000, 0x08000000, 0x08020000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFC800, 0x1FFFF800}, - /* F1 */ - {0x412, "Low-density" , 0x20000200, 0x20002800, 0x08000000, 0x08008000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x410, "Medium-density" , 0x20000200, 0x20005000, 0x08000000, 0x08020000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x414, "High-density" , 0x20000200, 0x20010000, 0x08000000, 0x08080000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x420, "Medium-density VL" , 0x20000200, 0x20002000, 0x08000000, 0x08020000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x428, "High-density VL" , 0x20000200, 0x20008000, 0x08000000, 0x08080000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x418, "Connectivity line" , 0x20001000, 0x20010000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFB000, 0x1FFFF800}, - {0x430, "XL-density" , 0x20000800, 0x20018000, 0x08000000, 0x08100000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFE000, 0x1FFFF800}, - /* Note that F2 and F4 devices have sectors of different page sizes - and only the first sectors (of one page size) are included here */ - /* F2 */ - {0x411, "STM32F2xx" , 0x20002000, 0x20020000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77DF}, - /* F3 */ - {0x432, "STM32F373/8" , 0x20001400, 0x20008000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800}, - {0x422, "F302xB/303xB/358" , 0x20001400, 0x20010000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800}, - {0x439, "STM32F302x4(6/8)" , 0x20001800, 0x20004000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800}, - {0x438, "F303x4/334/328" , 0x20001800, 0x20003000, 0x08000000, 0x08040000, 2, 2048, 0x1FFFF800, 0x1FFFF80F, 0x1FFFD800, 0x1FFFF800}, - /* F4 */ - {0x413, "STM32F40/1" , 0x20002000, 0x20020000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77DF}, - /* 0x419 is also used for STM32F429/39 but with other bootloader ID... */ - {0x419, "STM32F427/37" , 0x20002000, 0x20030000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77FF}, - {0x423, "STM32F401xB(C)" , 0x20003000, 0x20010000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77FF}, - {0x433, "STM32F401xD(E)" , 0x20003000, 0x20018000, 0x08000000, 0x08100000, 4, 16384, 0x1FFFC000, 0x1FFFC00F, 0x1FFF0000, 0x1FFF77FF}, - /* L0 */ - {0x417, "L05xxx/06xxx" , 0x20001000, 0x20002000, 0x08000000, 0x08010000, 32, 128, 0x1FF80000, 0x1FF8000F, 0x1FF00000, 0x1FF01000}, - /* L1 */ - {0x416, "L1xxx6(8/B)" , 0x20000800, 0x20004000, 0x08000000, 0x08020000, 16, 256, 0x1FF80000, 0x1FF8000F, 0x1FF00000, 0x1FF01000}, - {0x429, "L1xxx6(8/B)A" , 0x20001000, 0x20008000, 0x08000000, 0x08020000, 16, 256, 0x1FF80000, 0x1FF8000F, 0x1FF00000, 0x1FF01000}, - {0x427, "L1xxxC" , 0x20001000, 0x20008000, 0x08000000, 0x08020000, 16, 256, 0x1FF80000, 0x1FF8000F, 0x1FF00000, 0x1FF02000}, - {0x436, "L1xxxD" , 0x20001000, 0x2000C000, 0x08000000, 0x08060000, 16, 256, 0x1ff80000, 0x1ff8000F, 0x1FF00000, 0x1FF02000}, - {0x437, "L1xxxE" , 0x20001000, 0x20014000, 0x08000000, 0x08060000, 16, 256, 0x1ff80000, 0x1ff8000F, 0x1FF00000, 0x1FF02000}, - /* These are not (yet) in AN2606: */ - {0x641, "Medium_Density PL" , 0x20000200, 0x00005000, 0x08000000, 0x08020000, 4, 1024, 0x1FFFF800, 0x1FFFF80F, 0x1FFFF000, 0x1FFFF800}, - {0x9a8, "STM32W-128K" , 0x20000200, 0x20002000, 0x08000000, 0x08020000, 1, 1024, 0, 0, 0, 0}, - {0x9b0, "STM32W-256K" , 0x20000200, 0x20004000, 0x08000000, 0x08040000, 1, 2048, 0, 0, 0, 0}, - {0x0} -}; diff --git a/win/src/stm32flash_serial/src/gpl-2.0.txt b/win/src/stm32flash_serial/src/gpl-2.0.txt deleted file mode 100644 index d159169d1..000000000 --- a/win/src/stm32flash_serial/src/gpl-2.0.txt +++ /dev/null @@ -1,339 +0,0 @@ - GNU GENERAL PUBLIC LICENSE - Version 2, June 1991 - - Copyright (C) 1989, 1991 Free Software Foundation, Inc., - 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The licenses for most software are designed to take away your -freedom to share and change it. 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You may modify your copy or copies of the Program or any portion -of it, thus forming a work based on the Program, and copy and -distribute such modifications or work under the terms of Section 1 -above, provided that you also meet all of these conditions: - - a) You must cause the modified files to carry prominent notices - stating that you changed the files and the date of any change. - - b) You must cause any work that you distribute or publish, that in - whole or in part contains or is derived from the Program or any - part thereof, to be licensed as a whole at no charge to all third - parties under the terms of this License. - - c) If the modified program normally reads commands interactively - when run, you must cause it, when started running for such - interactive use in the most ordinary way, to print or display an - announcement including an appropriate copyright notice and a - notice that there is no warranty (or else, saying that you provide - a warranty) and that users may redistribute the program under - these conditions, and telling the user how to view a copy of this - License. (Exception: if the Program itself is interactive but - does not normally print such an announcement, your work based on - the Program is not required to print an announcement.) - -These requirements apply to the modified work as a whole. If -identifiable sections of that work are not derived from the Program, -and can be reasonably considered independent and separate works in -themselves, then this License, and its terms, do not apply to those -sections when you distribute them as separate works. But when you -distribute the same sections as part of a whole which is a work based -on the Program, the distribution of the whole must be on the terms of -this License, whose permissions for other licensees extend to the -entire whole, and thus to each and every part regardless of who wrote it. - -Thus, it is not the intent of this section to claim rights or contest -your rights to work written entirely by you; rather, the intent is to -exercise the right to control the distribution of derivative or -collective works based on the Program. - -In addition, mere aggregation of another work not based on the Program -with the Program (or with a work based on the Program) on a volume of -a storage or distribution medium does not bring the other work under -the scope of this License. - - 3. You may copy and distribute the Program (or a work based on it, -under Section 2) in object code or executable form under the terms of -Sections 1 and 2 above provided that you also do one of the following: - - a) Accompany it with the complete corresponding machine-readable - source code, which must be distributed under the terms of Sections - 1 and 2 above on a medium customarily used for software interchange; or, - - b) Accompany it with a written offer, valid for at least three - years, to give any third party, for a charge no more than your - cost of physically performing source distribution, a complete - machine-readable copy of the corresponding source code, to be - distributed under the terms of Sections 1 and 2 above on a medium - customarily used for software interchange; or, - - c) Accompany it with the information you received as to the offer - to distribute corresponding source code. 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Any attempt -otherwise to copy, modify, sublicense or distribute the Program is -void, and will automatically terminate your rights under this License. -However, parties who have received copies, or rights, from you under -this License will not have their licenses terminated so long as such -parties remain in full compliance. - - 5. You are not required to accept this License, since you have not -signed it. However, nothing else grants you permission to modify or -distribute the Program or its derivative works. These actions are -prohibited by law if you do not accept this License. Therefore, by -modifying or distributing the Program (or any work based on the -Program), you indicate your acceptance of this License to do so, and -all its terms and conditions for copying, distributing or modifying -the Program or works based on it. - - 6. Each time you redistribute the Program (or any work based on the -Program), the recipient automatically receives a license from the -original licensor to copy, distribute or modify the Program subject to -these terms and conditions. You may not impose any further -restrictions on the recipients' exercise of the rights granted herein. -You are not responsible for enforcing compliance by third parties to -this License. - - 7. If, as a consequence of a court judgment or allegation of patent -infringement or for any other reason (not limited to patent issues), -conditions are imposed on you (whether by court order, agreement or -otherwise) that contradict the conditions of this License, they do not -excuse you from the conditions of this License. If you cannot -distribute so as to satisfy simultaneously your obligations under this -License and any other pertinent obligations, then as a consequence you -may not distribute the Program at all. For example, if a patent -license would not permit royalty-free redistribution of the Program by -all those who receive copies directly or indirectly through you, then -the only way you could satisfy both it and this License would be to -refrain entirely from distribution of the Program. - -If any portion of this section is held invalid or unenforceable under -any particular circumstance, the balance of the section is intended to -apply and the section as a whole is intended to apply in other -circumstances. - -It is not the purpose of this section to induce you to infringe any -patents or other property right claims or to contest validity of any -such claims; this section has the sole purpose of protecting the -integrity of the free software distribution system, which is -implemented by public license practices. Many people have made -generous contributions to the wide range of software distributed -through that system in reliance on consistent application of that -system; it is up to the author/donor to decide if he or she is willing -to distribute software through any other system and a licensee cannot -impose that choice. - -This section is intended to make thoroughly clear what is believed to -be a consequence of the rest of this License. - - 8. If the distribution and/or use of the Program is restricted in -certain countries either by patents or by copyrighted interfaces, the -original copyright holder who places the Program under this License -may add an explicit geographical distribution limitation excluding -those countries, so that distribution is permitted only in or among -countries not thus excluded. In such case, this License incorporates -the limitation as if written in the body of this License. - - 9. The Free Software Foundation may publish revised and/or new versions -of the General Public License from time to time. Such new versions will -be similar in spirit to the present version, but may differ in detail to -address new problems or concerns. - -Each version is given a distinguishing version number. If the Program -specifies a version number of this License which applies to it and "any -later version", you have the option of following the terms and conditions -either of that version or of any later version published by the Free -Software Foundation. If the Program does not specify a version number of -this License, you may choose any version ever published by the Free Software -Foundation. - - 10. If you wish to incorporate parts of the Program into other free -programs whose distribution conditions are different, write to the author -to ask for permission. For software which is copyrighted by the Free -Software Foundation, write to the Free Software Foundation; we sometimes -make exceptions for this. Our decision will be guided by the two goals -of preserving the free status of all derivatives of our free software and -of promoting the sharing and reuse of software generally. - - NO WARRANTY - - 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY -FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN -OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES -PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED -OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS -TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE -PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, -REPAIR OR CORRECTION. - - 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING -WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR -REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, -INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING -OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED -TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY -YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER -PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE -POSSIBILITY OF SUCH DAMAGES. - - END OF TERMS AND CONDITIONS - - How to Apply These Terms to Your New Programs - - If you develop a new program, and you want it to be of the greatest -possible use to the public, the best way to achieve this is to make it -free software which everyone can redistribute and change under these terms. - - To do so, attach the following notices to the program. It is safest -to attach them to the start of each source file to most effectively -convey the exclusion of warranty; and each file should have at least -the "copyright" line and a pointer to where the full notice is found. - - - Copyright (C) - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License along - with this program; if not, write to the Free Software Foundation, Inc., - 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - -Also add information on how to contact you by electronic and paper mail. - -If the program is interactive, make it output a short notice like this -when it starts in an interactive mode: - - Gnomovision version 69, Copyright (C) year name of author - Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. - This is free software, and you are welcome to redistribute it - under certain conditions; type `show c' for details. - -The hypothetical commands `show w' and `show c' should show the appropriate -parts of the General Public License. Of course, the commands you use may -be called something other than `show w' and `show c'; they could even be -mouse-clicks or menu items--whatever suits your program. - -You should also get your employer (if you work as a programmer) or your -school, if any, to sign a "copyright disclaimer" for the program, if -necessary. Here is a sample; alter the names: - - Yoyodyne, Inc., hereby disclaims all copyright interest in the program - `Gnomovision' (which makes passes at compilers) written by James Hacker. - - , 1 April 1989 - Ty Coon, President of Vice - -This General Public License does not permit incorporating your program into -proprietary programs. If your program is a subroutine library, you may -consider it more useful to permit linking proprietary applications with the -library. If this is what you want to do, use the GNU Lesser General -Public License instead of this License. diff --git a/win/src/stm32flash_serial/src/i2c.c b/win/src/stm32flash_serial/src/i2c.c deleted file mode 100644 index 10e6bb15a..000000000 --- a/win/src/stm32flash_serial/src/i2c.c +++ /dev/null @@ -1,209 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2014 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "serial.h" -#include "port.h" - - -#if !defined(__linux__) - -static port_err_t i2c_open(struct port_interface *port, - struct port_options *ops) -{ - return PORT_ERR_NODEV; -} - -struct port_interface port_i2c = { - .name = "i2c", - .open = i2c_open, -}; - -#else - -#ifdef __ANDROID__ -#define I2C_SLAVE 0x0703 /* Use this slave address */ -#define I2C_FUNCS 0x0705 /* Get the adapter functionality mask */ -/* To determine what functionality is present */ -#define I2C_FUNC_I2C 0x00000001 -#else -#include -#include -#endif - -#include - -struct i2c_priv { - int fd; - int addr; -}; - -static port_err_t i2c_open(struct port_interface *port, - struct port_options *ops) -{ - struct i2c_priv *h; - int fd, addr, ret; - unsigned long funcs; - - /* 1. check device name match */ - if (strncmp(ops->device, "/dev/i2c-", strlen("/dev/i2c-"))) - return PORT_ERR_NODEV; - - /* 2. check options */ - addr = ops->bus_addr; - if (addr < 0x03 || addr > 0x77) { - fprintf(stderr, "I2C address out of range [0x03-0x77]\n"); - return PORT_ERR_UNKNOWN; - } - - /* 3. open it */ - h = calloc(sizeof(*h), 1); - if (h == NULL) { - fprintf(stderr, "End of memory\n"); - return PORT_ERR_UNKNOWN; - } - fd = open(ops->device, O_RDWR); - if (fd < 0) { - fprintf(stderr, "Unable to open special file \"%s\"\n", - ops->device); - free(h); - return PORT_ERR_UNKNOWN; - } - - /* 3.5. Check capabilities */ - ret = ioctl(fd, I2C_FUNCS, &funcs); - if (ret < 0) { - fprintf(stderr, "I2C ioctl(funcs) error %d\n", errno); - close(fd); - free(h); - return PORT_ERR_UNKNOWN; - } - if ((funcs & I2C_FUNC_I2C) == 0) { - fprintf(stderr, "Error: controller is not I2C, only SMBUS.\n"); - close(fd); - free(h); - return PORT_ERR_UNKNOWN; - } - - /* 4. set options */ - ret = ioctl(fd, I2C_SLAVE, addr); - if (ret < 0) { - fprintf(stderr, "I2C ioctl(slave) error %d\n", errno); - close(fd); - free(h); - return PORT_ERR_UNKNOWN; - } - - h->fd = fd; - h->addr = addr; - port->private = h; - return PORT_ERR_OK; -} - -static port_err_t i2c_close(struct port_interface *port) -{ - struct i2c_priv *h; - - h = (struct i2c_priv *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - close(h->fd); - free(h); - port->private = NULL; - return PORT_ERR_OK; -} - -static port_err_t i2c_read(struct port_interface *port, void *buf, - size_t nbyte) -{ - struct i2c_priv *h; - int ret; - - h = (struct i2c_priv *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - ret = read(h->fd, buf, nbyte); - if (ret != nbyte) - return PORT_ERR_UNKNOWN; - return PORT_ERR_OK; -} - -static port_err_t i2c_write(struct port_interface *port, void *buf, - size_t nbyte) -{ - struct i2c_priv *h; - int ret; - - h = (struct i2c_priv *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - ret = write(h->fd, buf, nbyte); - if (ret != nbyte) - return PORT_ERR_UNKNOWN; - return PORT_ERR_OK; -} - -static port_err_t i2c_gpio(struct port_interface *port, serial_gpio_t n, - int level) -{ - return PORT_ERR_OK; -} - -static const char *i2c_get_cfg_str(struct port_interface *port) -{ - struct i2c_priv *h; - static char str[11]; - - h = (struct i2c_priv *)port->private; - if (h == NULL) - return "INVALID"; - snprintf(str, sizeof(str), "addr 0x%2x", h->addr); - return str; -} - -static struct varlen_cmd i2c_cmd_get_reply[] = { - {0x10, 11}, - {0x11, 17}, - {0x12, 18}, - { /* sentinel */ } -}; - -struct port_interface port_i2c = { - .name = "i2c", - .flags = PORT_STRETCH_W, - .open = i2c_open, - .close = i2c_close, - .read = i2c_read, - .write = i2c_write, - .gpio = i2c_gpio, - .cmd_get_reply = i2c_cmd_get_reply, - .get_cfg_str = i2c_get_cfg_str, -}; - -#endif diff --git a/win/src/stm32flash_serial/src/init.c b/win/src/stm32flash_serial/src/init.c deleted file mode 100644 index 77a571bd8..000000000 --- a/win/src/stm32flash_serial/src/init.c +++ /dev/null @@ -1,219 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - Copyright (C) 2013 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#include -#include -#include -#include -#include -#include -#include -#include -#include "init.h" -#include "serial.h" -#include "stm32.h" -#include "port.h" - -struct gpio_list { - struct gpio_list *next; - int gpio; -}; - - -static int write_to(const char *filename, const char *value) -{ - int fd, ret; - - fd = open(filename, O_WRONLY); - if (fd < 0) { - fprintf(stderr, "Cannot open file \"%s\"\n", filename); - return 0; - } - ret = write(fd, value, strlen(value)); - if (ret < 0) { - fprintf(stderr, "Error writing in file \"%s\"\n", filename); - close(fd); - return 0; - } - close(fd); - return 1; -} - -#if !defined(__linux__) -static int drive_gpio(int n, int level, struct gpio_list **gpio_to_release) -{ - fprintf(stderr, "GPIO control only available in Linux\n"); - return 0; -} -#else -static int drive_gpio(int n, int level, struct gpio_list **gpio_to_release) -{ - char num[16]; /* sized to carry MAX_INT */ - char file[48]; /* sized to carry longest filename */ - struct stat buf; - struct gpio_list *new; - int ret; - - sprintf(file, "/sys/class/gpio/gpio%d/direction", n); - ret = stat(file, &buf); - if (ret) { - /* file miss, GPIO not exported yet */ - sprintf(num, "%d", n); - ret = write_to("/sys/class/gpio/export", num); - if (!ret) - return 0; - ret = stat(file, &buf); - if (ret) { - fprintf(stderr, "GPIO %d not available\n", n); - return 0; - } - new = (struct gpio_list *)malloc(sizeof(struct gpio_list)); - if (new == NULL) { - fprintf(stderr, "Out of memory\n"); - return 0; - } - new->gpio = n; - new->next = *gpio_to_release; - *gpio_to_release = new; - } - - return write_to(file, level ? "high" : "low"); -} -#endif - -static int release_gpio(int n) -{ - char num[16]; /* sized to carry MAX_INT */ - - sprintf(num, "%d", n); - return write_to("/sys/class/gpio/unexport", num); -} - -static int gpio_sequence(struct port_interface *port, const char *s, size_t l) -{ - struct gpio_list *gpio_to_release = NULL, *to_free; - int ret, level, gpio; - - ret = 1; - while (ret == 1 && *s && l > 0) { - if (*s == '-') { - level = 0; - s++; - l--; - } else - level = 1; - - if (isdigit(*s)) { - gpio = atoi(s); - while (isdigit(*s)) { - s++; - l--; - } - } else if (!strncmp(s, "rts", 3)) { - gpio = -GPIO_RTS; - s += 3; - l -= 3; - } else if (!strncmp(s, "dtr", 3)) { - gpio = -GPIO_DTR; - s += 3; - l -= 3; - } else if (!strncmp(s, "brk", 3)) { - gpio = -GPIO_BRK; - s += 3; - l -= 3; - } else { - fprintf(stderr, "Character \'%c\' is not a digit\n", *s); - ret = 0; - break; - } - - if (*s && (l > 0)) { - if (*s == ',') { - s++; - l--; - } else { - fprintf(stderr, "Character \'%c\' is not a separator\n", *s); - ret = 0; - break; - } - } - if (gpio < 0) - ret = (port->gpio(port, -gpio, level) == PORT_ERR_OK); - else - ret = drive_gpio(gpio, level, &gpio_to_release); - usleep(100000); - } - - while (gpio_to_release) { - release_gpio(gpio_to_release->gpio); - to_free = gpio_to_release; - gpio_to_release = gpio_to_release->next; - free(to_free); - } - usleep(500000); - return ret; -} - -static int gpio_bl_entry(struct port_interface *port, const char *seq) -{ - char *s; - - if (seq == NULL || seq[0] == ':') - return 1; - - s = strchr(seq, ':'); - if (s == NULL) - return gpio_sequence(port, seq, strlen(seq)); - - return gpio_sequence(port, seq, s - seq); -} - -static int gpio_bl_exit(struct port_interface *port, const char *seq) -{ - char *s; - - if (seq == NULL) - return 1; - - s = strchr(seq, ':'); - if (s == NULL || s[1] == '\0') - return 1; - - return gpio_sequence(port, s + 1, strlen(s + 1)); -} - -int init_bl_entry(struct port_interface *port, const char *seq) -{ - if (seq) - return gpio_bl_entry(port, seq); - - return 1; -} - -int init_bl_exit(stm32_t *stm, struct port_interface *port, const char *seq) -{ - if (seq) - return gpio_bl_exit(port, seq); - - if (stm32_reset_device(stm) != STM32_ERR_OK) - return 0; - return 1; -} diff --git a/win/src/stm32flash_serial/src/init.h b/win/src/stm32flash_serial/src/init.h deleted file mode 100644 index 6075b519b..000000000 --- a/win/src/stm32flash_serial/src/init.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - Copyright (C) 2013 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _INIT_H -#define _INIT_H - -#include "stm32.h" -#include "port.h" - -int init_bl_entry(struct port_interface *port, const char *seq); -int init_bl_exit(stm32_t *stm, struct port_interface *port, const char *seq); - -#endif diff --git a/win/src/stm32flash_serial/src/main.c b/win/src/stm32flash_serial/src/main.c deleted file mode 100644 index f081d6131..000000000 --- a/win/src/stm32flash_serial/src/main.c +++ /dev/null @@ -1,774 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright 2010 Geoffrey McRae - Copyright 2011 Steve Markgraf - Copyright 2012 Tormod Volden - Copyright 2013 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include -#include -#include -#include -#include -#include - -#include "init.h" -#include "utils.h" -#include "serial.h" -#include "stm32.h" -#include "parsers/parser.h" -#include "port.h" - -#include "parsers/binary.h" -#include "parsers/hex.h" - -#define VERSION "Arduino_STM32_0.9" - -/* device globals */ -stm32_t *stm = NULL; - -void *p_st = NULL; -parser_t *parser = NULL; - -/* settings */ -struct port_options port_opts = { - .device = NULL, - .baudRate = SERIAL_BAUD_57600, - .serial_mode = "8e1", - .bus_addr = 0, - .rx_frame_max = STM32_MAX_RX_FRAME, - .tx_frame_max = STM32_MAX_TX_FRAME, -}; -int rd = 0; -int wr = 0; -int wu = 0; -int rp = 0; -int ur = 0; -int eraseOnly = 0; -int crc = 0; -int npages = 0; -int spage = 0; -int no_erase = 0; -char verify = 0; -int retry = 10; -char exec_flag = 0; -uint32_t execute = 0; -char init_flag = 1; -char force_binary = 0; -char reset_flag = 0; -char *filename; -char *gpio_seq = NULL; -uint32_t start_addr = 0; -uint32_t readwrite_len = 0; - -/* functions */ -int parse_options(int argc, char *argv[]); -void show_help(char *name); - -static int is_addr_in_ram(uint32_t addr) -{ - return addr >= stm->dev->ram_start && addr < stm->dev->ram_end; -} - -static int is_addr_in_flash(uint32_t addr) -{ - return addr >= stm->dev->fl_start && addr < stm->dev->fl_end; -} - -static int flash_addr_to_page_floor(uint32_t addr) -{ - if (!is_addr_in_flash(addr)) - return 0; - - return (addr - stm->dev->fl_start) / stm->dev->fl_ps; -} - -static int flash_addr_to_page_ceil(uint32_t addr) -{ - if (!(addr >= stm->dev->fl_start && addr <= stm->dev->fl_end)) - return 0; - - return (addr + stm->dev->fl_ps - 1 - stm->dev->fl_start) - / stm->dev->fl_ps; -} - -static uint32_t flash_page_to_addr(int page) -{ - return stm->dev->fl_start + page * stm->dev->fl_ps; -} - -int main(int argc, char* argv[]) { - struct port_interface *port = NULL; - int ret = 1; - stm32_err_t s_err; - parser_err_t perr; - FILE *diag = stdout; - - fprintf(diag, "stm32flash " VERSION "\n\n"); - fprintf(diag, "http://github.com/rogerclarkmelbourne/arduino_stm32\n\n"); - if (parse_options(argc, argv) != 0) - goto close; - - if (rd && filename[0] == '-') { - diag = stderr; - } - - if (wr) { - /* first try hex */ - if (!force_binary) { - parser = &PARSER_HEX; - p_st = parser->init(); - if (!p_st) { - fprintf(stderr, "%s Parser failed to initialize\n", parser->name); - goto close; - } - } - - if (force_binary || (perr = parser->open(p_st, filename, 0)) != PARSER_ERR_OK) { - if (force_binary || perr == PARSER_ERR_INVALID_FILE) { - if (!force_binary) { - parser->close(p_st); - p_st = NULL; - } - - /* now try binary */ - parser = &PARSER_BINARY; - p_st = parser->init(); - if (!p_st) { - fprintf(stderr, "%s Parser failed to initialize\n", parser->name); - goto close; - } - perr = parser->open(p_st, filename, 0); - } - - /* if still have an error, fail */ - if (perr != PARSER_ERR_OK) { - fprintf(stderr, "%s ERROR: %s\n", parser->name, parser_errstr(perr)); - if (perr == PARSER_ERR_SYSTEM) perror(filename); - goto close; - } - } - - fprintf(diag, "Using Parser : %s\n", parser->name); - } else { - parser = &PARSER_BINARY; - p_st = parser->init(); - if (!p_st) { - fprintf(stderr, "%s Parser failed to initialize\n", parser->name); - goto close; - } - } - - if (port_open(&port_opts, &port) != PORT_ERR_OK) { - fprintf(stderr, "Failed to open port: %s\n", port_opts.device); - goto close; - } - - fprintf(diag, "Interface %s: %s\n", port->name, port->get_cfg_str(port)); - if (init_flag && init_bl_entry(port, gpio_seq) == 0) - goto close; - stm = stm32_init(port, init_flag); - if (!stm) - goto close; - - fprintf(diag, "Version : 0x%02x\n", stm->bl_version); - if (port->flags & PORT_GVR_ETX) { - fprintf(diag, "Option 1 : 0x%02x\n", stm->option1); - fprintf(diag, "Option 2 : 0x%02x\n", stm->option2); - } - fprintf(diag, "Device ID : 0x%04x (%s)\n", stm->pid, stm->dev->name); - fprintf(diag, "- RAM : %dKiB (%db reserved by bootloader)\n", (stm->dev->ram_end - 0x20000000) / 1024, stm->dev->ram_start - 0x20000000); - fprintf(diag, "- Flash : %dKiB (sector size: %dx%d)\n", (stm->dev->fl_end - stm->dev->fl_start ) / 1024, stm->dev->fl_pps, stm->dev->fl_ps); - fprintf(diag, "- Option RAM : %db\n", stm->dev->opt_end - stm->dev->opt_start + 1); - fprintf(diag, "- System RAM : %dKiB\n", (stm->dev->mem_end - stm->dev->mem_start) / 1024); - - uint8_t buffer[256]; - uint32_t addr, start, end; - unsigned int len; - int failed = 0; - int first_page, num_pages; - - /* - * Cleanup addresses: - * - * Starting from options - * start_addr, readwrite_len, spage, npages - * and using device memory size, compute - * start, end, first_page, num_pages - */ - if (start_addr || readwrite_len) { - start = start_addr; - - if (is_addr_in_flash(start)) - end = stm->dev->fl_end; - else { - no_erase = 1; - if (is_addr_in_ram(start)) - end = stm->dev->ram_end; - else - end = start + sizeof(uint32_t); - } - - if (readwrite_len && (end > start + readwrite_len)) - end = start + readwrite_len; - - first_page = flash_addr_to_page_floor(start); - if (!first_page && end == stm->dev->fl_end) - num_pages = 0xff; /* mass erase */ - else - num_pages = flash_addr_to_page_ceil(end) - first_page; - } else if (!spage && !npages) { - start = stm->dev->fl_start; - end = stm->dev->fl_end; - first_page = 0; - num_pages = 0xff; /* mass erase */ - } else { - first_page = spage; - start = flash_page_to_addr(first_page); - if (start > stm->dev->fl_end) { - fprintf(stderr, "Address range exceeds flash size.\n"); - goto close; - } - - if (npages) { - num_pages = npages; - end = flash_page_to_addr(first_page + num_pages); - if (end > stm->dev->fl_end) - end = stm->dev->fl_end; - } else { - end = stm->dev->fl_end; - num_pages = flash_addr_to_page_ceil(end) - first_page; - } - - if (!first_page && end == stm->dev->fl_end) - num_pages = 0xff; /* mass erase */ - } - - if (rd) { - unsigned int max_len = port_opts.rx_frame_max; - - fprintf(diag, "Memory read\n"); - - perr = parser->open(p_st, filename, 1); - if (perr != PARSER_ERR_OK) { - fprintf(stderr, "%s ERROR: %s\n", parser->name, parser_errstr(perr)); - if (perr == PARSER_ERR_SYSTEM) - perror(filename); - goto close; - } - - fflush(diag); - addr = start; - while(addr < end) { - uint32_t left = end - addr; - len = max_len > left ? left : max_len; - s_err = stm32_read_memory(stm, addr, buffer, len); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to read memory at address 0x%08x, target write-protected?\n", addr); - goto close; - } - if (parser->write(p_st, buffer, len) != PARSER_ERR_OK) - { - fprintf(stderr, "Failed to write data to file\n"); - goto close; - } - addr += len; - - fprintf(diag, - "\rRead address 0x%08x (%.2f%%) ", - addr, - (100.0f / (float)(end - start)) * (float)(addr - start) - ); - fflush(diag); - } - fprintf(diag, "Done.\n"); - ret = 0; - goto close; - } else if (rp) { - fprintf(stdout, "Read-Protecting flash\n"); - /* the device automatically performs a reset after the sending the ACK */ - reset_flag = 0; - stm32_readprot_memory(stm); - fprintf(stdout, "Done.\n"); - } else if (ur) { - fprintf(stdout, "Read-UnProtecting flash\n"); - /* the device automatically performs a reset after the sending the ACK */ - reset_flag = 0; - stm32_runprot_memory(stm); - fprintf(stdout, "Done.\n"); - } else if (eraseOnly) { - ret = 0; - fprintf(stdout, "Erasing flash\n"); - - if (num_pages != 0xff && - (start != flash_page_to_addr(first_page) - || end != flash_page_to_addr(first_page + num_pages))) { - fprintf(stderr, "Specified start & length are invalid (must be page aligned)\n"); - ret = 1; - goto close; - } - - s_err = stm32_erase_memory(stm, first_page, num_pages); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to erase memory\n"); - ret = 1; - goto close; - } - } else if (wu) { - fprintf(diag, "Write-unprotecting flash\n"); - /* the device automatically performs a reset after the sending the ACK */ - reset_flag = 0; - stm32_wunprot_memory(stm); - fprintf(diag, "Done.\n"); - - } else if (wr) { - fprintf(diag, "Write to memory\n"); - - off_t offset = 0; - ssize_t r; - unsigned int size; - unsigned int max_wlen, max_rlen; - - max_wlen = port_opts.tx_frame_max - 2; /* skip len and crc */ - max_wlen &= ~3; /* 32 bit aligned */ - - max_rlen = port_opts.rx_frame_max; - max_rlen = max_rlen < max_wlen ? max_rlen : max_wlen; - - /* Assume data from stdin is whole device */ - if (filename[0] == '-' && filename[1] == '\0') - size = end - start; - else - size = parser->size(p_st); - - // TODO: It is possible to write to non-page boundaries, by reading out flash - // from partial pages and combining with the input data - // if ((start % stm->dev->fl_ps) != 0 || (end % stm->dev->fl_ps) != 0) { - // fprintf(stderr, "Specified start & length are invalid (must be page aligned)\n"); - // goto close; - // } - - // TODO: If writes are not page aligned, we should probably read out existing flash - // contents first, so it can be preserved and combined with new data - if (!no_erase && num_pages) { - fprintf(diag, "Erasing memory\n"); - s_err = stm32_erase_memory(stm, first_page, num_pages); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to erase memory\n"); - goto close; - } - } - - fflush(diag); - addr = start; - while(addr < end && offset < size) { - uint32_t left = end - addr; - len = max_wlen > left ? left : max_wlen; - len = len > size - offset ? size - offset : len; - - if (parser->read(p_st, buffer, &len) != PARSER_ERR_OK) - goto close; - - if (len == 0) { - if (filename[0] == '-') { - break; - } else { - fprintf(stderr, "Failed to read input file\n"); - goto close; - } - } - - again: - s_err = stm32_write_memory(stm, addr, buffer, len); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to write memory at address 0x%08x\n", addr); - goto close; - } - - if (verify) { - uint8_t compare[len]; - unsigned int offset, rlen; - - offset = 0; - while (offset < len) { - rlen = len - offset; - rlen = rlen < max_rlen ? rlen : max_rlen; - s_err = stm32_read_memory(stm, addr + offset, compare + offset, rlen); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to read memory at address 0x%08x\n", addr + offset); - goto close; - } - offset += rlen; - } - - for(r = 0; r < len; ++r) - if (buffer[r] != compare[r]) { - if (failed == retry) { - fprintf(stderr, "Failed to verify at address 0x%08x, expected 0x%02x and found 0x%02x\n", - (uint32_t)(addr + r), - buffer [r], - compare[r] - ); - goto close; - } - ++failed; - goto again; - } - - failed = 0; - } - - addr += len; - offset += len; - - fprintf(diag, - "\rWrote %saddress 0x%08x (%.2f%%) ", - verify ? "and verified " : "", - addr, - (100.0f / size) * offset - ); - fflush(diag); - - } - - fprintf(diag, "Done.\n"); - ret = 0; - goto close; - } else if (crc) { - uint32_t crc_val = 0; - - fprintf(diag, "CRC computation\n"); - - s_err = stm32_crc_wrapper(stm, start, end - start, &crc_val); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Failed to read CRC\n"); - goto close; - } - fprintf(diag, "CRC(0x%08x-0x%08x) = 0x%08x\n", start, end, - crc_val); - ret = 0; - goto close; - } else - ret = 0; - -close: - if (stm && exec_flag && ret == 0) { - if (execute == 0) - execute = stm->dev->fl_start; - - fprintf(diag, "\nStarting execution at address 0x%08x... ", execute); - fflush(diag); - if (stm32_go(stm, execute) == STM32_ERR_OK) { - reset_flag = 0; - fprintf(diag, "done.\n"); - } else - fprintf(diag, "failed.\n"); - } - - if (stm && reset_flag) { - fprintf(diag, "\nResetting device... "); - fflush(diag); - if (init_bl_exit(stm, port, gpio_seq)) - fprintf(diag, "done.\n"); - else fprintf(diag, "failed.\n"); - } - - if (p_st ) parser->close(p_st); - if (stm ) stm32_close (stm); - if (port) - port->close(port); - - fprintf(diag, "\n"); - return ret; -} - -int parse_options(int argc, char *argv[]) -{ - int c; - char *pLen; - - while ((c = getopt(argc, argv, "a:b:m:r:w:e:vn:g:jkfcChuos:S:F:i:R")) != -1) { - switch(c) { - case 'a': - port_opts.bus_addr = strtoul(optarg, NULL, 0); - break; - - case 'b': - port_opts.baudRate = serial_get_baud(strtoul(optarg, NULL, 0)); - if (port_opts.baudRate == SERIAL_BAUD_INVALID) { - serial_baud_t baudrate; - fprintf(stderr, "Invalid baud rate, valid options are:\n"); - for (baudrate = SERIAL_BAUD_1200; baudrate != SERIAL_BAUD_INVALID; ++baudrate) - fprintf(stderr, " %d\n", serial_get_baud_int(baudrate)); - return 1; - } - break; - - case 'm': - if (strlen(optarg) != 3 - || serial_get_bits(optarg) == SERIAL_BITS_INVALID - || serial_get_parity(optarg) == SERIAL_PARITY_INVALID - || serial_get_stopbit(optarg) == SERIAL_STOPBIT_INVALID) { - fprintf(stderr, "Invalid serial mode\n"); - return 1; - } - port_opts.serial_mode = optarg; - break; - - case 'r': - case 'w': - rd = rd || c == 'r'; - wr = wr || c == 'w'; - if (rd && wr) { - fprintf(stderr, "ERROR: Invalid options, can't read & write at the same time\n"); - return 1; - } - filename = optarg; - if (filename[0] == '-') { - force_binary = 1; - } - break; - case 'e': - if (readwrite_len || start_addr) { - fprintf(stderr, "ERROR: Invalid options, can't specify start page / num pages and start address/length\n"); - return 1; - } - npages = strtoul(optarg, NULL, 0); - if (npages > 0xFF || npages < 0) { - fprintf(stderr, "ERROR: You need to specify a page count between 0 and 255"); - return 1; - } - if (!npages) - no_erase = 1; - break; - case 'u': - wu = 1; - if (rd || wr) { - fprintf(stderr, "ERROR: Invalid options, can't write unprotect and read/write at the same time\n"); - return 1; - } - break; - - case 'j': - rp = 1; - if (rd || wr) { - fprintf(stderr, "ERROR: Invalid options, can't read protect and read/write at the same time\n"); - return 1; - } - break; - - case 'k': - ur = 1; - if (rd || wr) { - fprintf(stderr, "ERROR: Invalid options, can't read unprotect and read/write at the same time\n"); - return 1; - } - break; - - case 'o': - eraseOnly = 1; - if (rd || wr) { - fprintf(stderr, "ERROR: Invalid options, can't erase-only and read/write at the same time\n"); - return 1; - } - break; - - case 'v': - verify = 1; - break; - - case 'n': - retry = strtoul(optarg, NULL, 0); - break; - - case 'g': - exec_flag = 1; - execute = strtoul(optarg, NULL, 0); - if (execute % 4 != 0) { - fprintf(stderr, "ERROR: Execution address must be word-aligned\n"); - return 1; - } - break; - case 's': - if (readwrite_len || start_addr) { - fprintf(stderr, "ERROR: Invalid options, can't specify start page / num pages and start address/length\n"); - return 1; - } - spage = strtoul(optarg, NULL, 0); - break; - case 'S': - if (spage || npages) { - fprintf(stderr, "ERROR: Invalid options, can't specify start page / num pages and start address/length\n"); - return 1; - } else { - start_addr = strtoul(optarg, &pLen, 0); - if (*pLen == ':') { - pLen++; - readwrite_len = strtoul(pLen, NULL, 0); - if (readwrite_len == 0) { - fprintf(stderr, "ERROR: Invalid options, can't specify zero length\n"); - return 1; - } - } - } - break; - case 'F': - port_opts.rx_frame_max = strtoul(optarg, &pLen, 0); - if (*pLen == ':') { - pLen++; - port_opts.tx_frame_max = strtoul(pLen, NULL, 0); - } - if (port_opts.rx_frame_max < 0 - || port_opts.tx_frame_max < 0) { - fprintf(stderr, "ERROR: Invalid negative value for option -F\n"); - return 1; - } - if (port_opts.rx_frame_max == 0) - port_opts.rx_frame_max = STM32_MAX_RX_FRAME; - if (port_opts.tx_frame_max == 0) - port_opts.tx_frame_max = STM32_MAX_TX_FRAME; - if (port_opts.rx_frame_max < 20 - || port_opts.tx_frame_max < 5) { - fprintf(stderr, "ERROR: current code cannot work with small frames.\n"); - fprintf(stderr, "min(RX) = 20, min(TX) = 5\n"); - return 1; - } - if (port_opts.rx_frame_max > STM32_MAX_RX_FRAME) { - fprintf(stderr, "WARNING: Ignore RX length in option -F\n"); - port_opts.rx_frame_max = STM32_MAX_RX_FRAME; - } - if (port_opts.tx_frame_max > STM32_MAX_TX_FRAME) { - fprintf(stderr, "WARNING: Ignore TX length in option -F\n"); - port_opts.tx_frame_max = STM32_MAX_TX_FRAME; - } - break; - case 'f': - force_binary = 1; - break; - - case 'c': - init_flag = 0; - break; - - case 'h': - show_help(argv[0]); - exit(0); - - case 'i': - gpio_seq = optarg; - break; - - case 'R': - reset_flag = 1; - break; - - case 'C': - crc = 1; - break; - } - } - - for (c = optind; c < argc; ++c) { - if (port_opts.device) { - fprintf(stderr, "ERROR: Invalid parameter specified\n"); - show_help(argv[0]); - return 1; - } - port_opts.device = argv[c]; - } - - if (port_opts.device == NULL) { - fprintf(stderr, "ERROR: Device not specified\n"); - show_help(argv[0]); - return 1; - } - - if (!wr && verify) { - fprintf(stderr, "ERROR: Invalid usage, -v is only valid when writing\n"); - show_help(argv[0]); - return 1; - } - - return 0; -} - -void show_help(char *name) { - fprintf(stderr, - "Usage: %s [-bvngfhc] [-[rw] filename] [tty_device | i2c_device]\n" - " -a bus_address Bus address (e.g. for I2C port)\n" - " -b rate Baud rate (default 57600)\n" - " -m mode Serial port mode (default 8e1)\n" - " -r filename Read flash to file (or - stdout)\n" - " -w filename Write flash from file (or - stdout)\n" - " -C Compute CRC of flash content\n" - " -u Disable the flash write-protection\n" - " -j Enable the flash read-protection\n" - " -k Disable the flash read-protection\n" - " -o Erase only\n" - " -e n Only erase n pages before writing the flash\n" - " -v Verify writes\n" - " -n count Retry failed writes up to count times (default 10)\n" - " -g address Start execution at specified address (0 = flash start)\n" - " -S address[:length] Specify start address and optionally length for\n" - " read/write/erase operations\n" - " -F RX_length[:TX_length] Specify the max length of RX and TX frame\n" - " -s start_page Flash at specified page (0 = flash start)\n" - " -f Force binary parser\n" - " -h Show this help\n" - " -c Resume the connection (don't send initial INIT)\n" - " *Baud rate must be kept the same as the first init*\n" - " This is useful if the reset fails\n" - " -i GPIO_string GPIO sequence to enter/exit bootloader mode\n" - " GPIO_string=[entry_seq][:[exit_seq]]\n" - " sequence=[-]n[,sequence]\n" - " -R Reset device at exit.\n" - "\n" - "Examples:\n" - " Get device information:\n" - " %s /dev/ttyS0\n" - " or:\n" - " %s /dev/i2c-0\n" - "\n" - " Write with verify and then start execution:\n" - " %s -w filename -v -g 0x0 /dev/ttyS0\n" - "\n" - " Read flash to file:\n" - " %s -r filename /dev/ttyS0\n" - "\n" - " Read 100 bytes of flash from 0x1000 to stdout:\n" - " %s -r - -S 0x1000:100 /dev/ttyS0\n" - "\n" - " Start execution:\n" - " %s -g 0x0 /dev/ttyS0\n" - "\n" - " GPIO sequence:\n" - " - entry sequence: GPIO_3=low, GPIO_2=low, GPIO_2=high\n" - " - exit sequence: GPIO_3=high, GPIO_2=low, GPIO_2=high\n" - " %s -i -3,-2,2:3,-2,2 /dev/ttyS0\n", - name, - name, - name, - name, - name, - name, - name, - name - ); -} - diff --git a/win/src/stm32flash_serial/src/parsers/Android.mk b/win/src/stm32flash_serial/src/parsers/Android.mk deleted file mode 100644 index afec18cd5..000000000 --- a/win/src/stm32flash_serial/src/parsers/Android.mk +++ /dev/null @@ -1,6 +0,0 @@ -LOCAL_PATH := $(call my-dir) - -include $(CLEAR_VARS) -LOCAL_MODULE := libparsers -LOCAL_SRC_FILES := binary.c hex.c -include $(BUILD_STATIC_LIBRARY) diff --git a/win/src/stm32flash_serial/src/parsers/Makefile b/win/src/stm32flash_serial/src/parsers/Makefile deleted file mode 100644 index bb7df1e02..000000000 --- a/win/src/stm32flash_serial/src/parsers/Makefile +++ /dev/null @@ -1,12 +0,0 @@ - -CFLAGS += -Wall -g - -all: parsers.a - -parsers.a: binary.o hex.o - $(AR) rc $@ binary.o hex.o - -clean: - rm -f *.o parsers.a - -.PHONY: all clean diff --git a/win/src/stm32flash_serial/src/parsers/binary.c b/win/src/stm32flash_serial/src/parsers/binary.c deleted file mode 100644 index f491952bb..000000000 --- a/win/src/stm32flash_serial/src/parsers/binary.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#include -#include -#include -#include -#include - -#include "binary.h" - -typedef struct { - int fd; - char write; - struct stat stat; -} binary_t; - -void* binary_init() { - return calloc(sizeof(binary_t), 1); -} - -parser_err_t binary_open(void *storage, const char *filename, const char write) { - binary_t *st = storage; - if (write) { - if (filename[0] == '-') - st->fd = 1; - else - st->fd = open( - filename, -#ifndef __WIN32__ - O_WRONLY | O_CREAT | O_TRUNC, -#else - O_WRONLY | O_CREAT | O_TRUNC | O_BINARY, -#endif -#ifndef __WIN32__ - S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH -#else - 0 -#endif - ); - st->stat.st_size = 0; - } else { - if (filename[0] == '-') { - st->fd = 0; - } else { - if (stat(filename, &st->stat) != 0) - return PARSER_ERR_INVALID_FILE; - st->fd = open(filename, -#ifndef __WIN32__ - O_RDONLY -#else - O_RDONLY | O_BINARY -#endif - ); - } - } - - st->write = write; - return st->fd == -1 ? PARSER_ERR_SYSTEM : PARSER_ERR_OK; -} - -parser_err_t binary_close(void *storage) { - binary_t *st = storage; - - if (st->fd) close(st->fd); - free(st); - return PARSER_ERR_OK; -} - -unsigned int binary_size(void *storage) { - binary_t *st = storage; - return st->stat.st_size; -} - -parser_err_t binary_read(void *storage, void *data, unsigned int *len) { - binary_t *st = storage; - unsigned int left = *len; - if (st->write) return PARSER_ERR_WRONLY; - - ssize_t r; - while(left > 0) { - r = read(st->fd, data, left); - /* If there is no data to read at all, return OK, but with zero read */ - if (r == 0 && left == *len) { - *len = 0; - return PARSER_ERR_OK; - } - if (r <= 0) return PARSER_ERR_SYSTEM; - left -= r; - data += r; - } - - *len = *len - left; - return PARSER_ERR_OK; -} - -parser_err_t binary_write(void *storage, void *data, unsigned int len) { - binary_t *st = storage; - if (!st->write) return PARSER_ERR_RDONLY; - - ssize_t r; - while(len > 0) { - r = write(st->fd, data, len); - if (r < 1) return PARSER_ERR_SYSTEM; - st->stat.st_size += r; - - len -= r; - data += r; - } - - return PARSER_ERR_OK; -} - -parser_t PARSER_BINARY = { - "Raw BINARY", - binary_init, - binary_open, - binary_close, - binary_size, - binary_read, - binary_write -}; - diff --git a/win/src/stm32flash_serial/src/parsers/binary.h b/win/src/stm32flash_serial/src/parsers/binary.h deleted file mode 100644 index d989acfa0..000000000 --- a/win/src/stm32flash_serial/src/parsers/binary.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _PARSER_BINARY_H -#define _PARSER_BINARY_H - -#include "parser.h" - -extern parser_t PARSER_BINARY; -#endif diff --git a/win/src/stm32flash_serial/src/parsers/hex.c b/win/src/stm32flash_serial/src/parsers/hex.c deleted file mode 100644 index 3baf85623..000000000 --- a/win/src/stm32flash_serial/src/parsers/hex.c +++ /dev/null @@ -1,224 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#include -#include -#include -#include -#include -#include -#include - -#include "hex.h" -#include "../utils.h" - -typedef struct { - size_t data_len, offset; - uint8_t *data; - uint8_t base; -} hex_t; - -void* hex_init() { - return calloc(sizeof(hex_t), 1); -} - -parser_err_t hex_open(void *storage, const char *filename, const char write) { - hex_t *st = storage; - if (write) { - return PARSER_ERR_RDONLY; - } else { - char mark; - int i, fd; - uint8_t checksum; - unsigned int c; - uint32_t base = 0; - unsigned int last_address = 0x0; - - fd = open(filename, O_RDONLY); - if (fd < 0) - return PARSER_ERR_SYSTEM; - - /* read in the file */ - - while(read(fd, &mark, 1) != 0) { - if (mark == '\n' || mark == '\r') continue; - if (mark != ':') - return PARSER_ERR_INVALID_FILE; - - char buffer[9]; - unsigned int reclen, address, type; - uint8_t *record = NULL; - - /* get the reclen, address, and type */ - buffer[8] = 0; - if (read(fd, &buffer, 8) != 8) return PARSER_ERR_INVALID_FILE; - if (sscanf(buffer, "%2x%4x%2x", &reclen, &address, &type) != 3) { - close(fd); - return PARSER_ERR_INVALID_FILE; - } - - /* setup the checksum */ - checksum = - reclen + - ((address & 0xFF00) >> 8) + - ((address & 0x00FF) >> 0) + - type; - - switch(type) { - /* data record */ - case 0: - c = address - last_address; - st->data = realloc(st->data, st->data_len + c + reclen); - - /* if there is a gap, set it to 0xff and increment the length */ - if (c > 0) { - memset(&st->data[st->data_len], 0xff, c); - st->data_len += c; - } - - last_address = address + reclen; - record = &st->data[st->data_len]; - st->data_len += reclen; - break; - - /* extended segment address record */ - case 2: - base = 0; - break; - - /* extended linear address record */ - case 4: - base = address; - break; - } - - buffer[2] = 0; - for(i = 0; i < reclen; ++i) { - if (read(fd, &buffer, 2) != 2 || sscanf(buffer, "%2x", &c) != 1) { - close(fd); - return PARSER_ERR_INVALID_FILE; - } - - /* add the byte to the checksum */ - checksum += c; - - switch(type) { - case 0: - if (record != NULL) { - record[i] = c; - } else { - return PARSER_ERR_INVALID_FILE; - } - break; - - case 2: - case 4: - base = (base << 8) | c; - break; - } - } - - /* read, scan, and verify the checksum */ - if ( - read(fd, &buffer, 2 ) != 2 || - sscanf(buffer, "%2x", &c) != 1 || - (uint8_t)(checksum + c) != 0x00 - ) { - close(fd); - return PARSER_ERR_INVALID_FILE; - } - - switch(type) { - /* EOF */ - case 1: - close(fd); - return PARSER_ERR_OK; - - /* address record */ - case 2: base = base << 4; - case 4: base = be_u32(base); - /* Reset last_address since our base changed */ - last_address = 0; - - if (st->base == 0) { - st->base = base; - break; - } - - /* we cant cope with files out of order */ - if (base < st->base) { - close(fd); - return PARSER_ERR_INVALID_FILE; - } - - /* if there is a gap, enlarge and fill with zeros */ - unsigned int len = base - st->base; - if (len > st->data_len) { - st->data = realloc(st->data, len); - memset(&st->data[st->data_len], 0, len - st->data_len); - st->data_len = len; - } - break; - } - } - - close(fd); - return PARSER_ERR_OK; - } -} - -parser_err_t hex_close(void *storage) { - hex_t *st = storage; - if (st) free(st->data); - free(st); - return PARSER_ERR_OK; -} - -unsigned int hex_size(void *storage) { - hex_t *st = storage; - return st->data_len; -} - -parser_err_t hex_read(void *storage, void *data, unsigned int *len) { - hex_t *st = storage; - unsigned int left = st->data_len - st->offset; - unsigned int get = left > *len ? *len : left; - - memcpy(data, &st->data[st->offset], get); - st->offset += get; - - *len = get; - return PARSER_ERR_OK; -} - -parser_err_t hex_write(void *storage, void *data, unsigned int len) { - return PARSER_ERR_RDONLY; -} - -parser_t PARSER_HEX = { - "Intel HEX", - hex_init, - hex_open, - hex_close, - hex_size, - hex_read, - hex_write -}; - diff --git a/win/src/stm32flash_serial/src/parsers/hex.h b/win/src/stm32flash_serial/src/parsers/hex.h deleted file mode 100644 index 02413c9c9..000000000 --- a/win/src/stm32flash_serial/src/parsers/hex.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _PARSER_HEX_H -#define _PARSER_HEX_H - -#include "parser.h" - -extern parser_t PARSER_HEX; -#endif diff --git a/win/src/stm32flash_serial/src/parsers/parser.h b/win/src/stm32flash_serial/src/parsers/parser.h deleted file mode 100644 index c2fae3cf8..000000000 --- a/win/src/stm32flash_serial/src/parsers/parser.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _H_PARSER -#define _H_PARSER - -enum parser_err { - PARSER_ERR_OK, - PARSER_ERR_SYSTEM, - PARSER_ERR_INVALID_FILE, - PARSER_ERR_WRONLY, - PARSER_ERR_RDONLY -}; -typedef enum parser_err parser_err_t; - -struct parser { - const char *name; - void* (*init )(); /* initialise the parser */ - parser_err_t (*open )(void *storage, const char *filename, const char write); /* open the file for read|write */ - parser_err_t (*close)(void *storage); /* close and free the parser */ - unsigned int (*size )(void *storage); /* get the total data size */ - parser_err_t (*read )(void *storage, void *data, unsigned int *len); /* read a block of data */ - parser_err_t (*write)(void *storage, void *data, unsigned int len); /* write a block of data */ -}; -typedef struct parser parser_t; - -static inline const char* parser_errstr(parser_err_t err) { - switch(err) { - case PARSER_ERR_OK : return "OK"; - case PARSER_ERR_SYSTEM : return "System Error"; - case PARSER_ERR_INVALID_FILE: return "Invalid File"; - case PARSER_ERR_WRONLY : return "Parser can only write"; - case PARSER_ERR_RDONLY : return "Parser can only read"; - default: - return "Unknown Error"; - } -} - -#endif diff --git a/win/src/stm32flash_serial/src/port.c b/win/src/stm32flash_serial/src/port.c deleted file mode 100644 index 08e58cc34..000000000 --- a/win/src/stm32flash_serial/src/port.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2014 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include - -#include "serial.h" -#include "port.h" - - -extern struct port_interface port_serial; -extern struct port_interface port_i2c; - -static struct port_interface *ports[] = { - &port_serial, - &port_i2c, - NULL, -}; - - -port_err_t port_open(struct port_options *ops, struct port_interface **outport) -{ - int ret; - static struct port_interface **port; - - for (port = ports; *port; port++) { - ret = (*port)->open(*port, ops); - if (ret == PORT_ERR_NODEV) - continue; - if (ret == PORT_ERR_OK) - break; - fprintf(stderr, "Error probing interface \"%s\"\n", - (*port)->name); - } - if (*port == NULL) { - fprintf(stderr, "Cannot handle device \"%s\"\n", - ops->device); - return PORT_ERR_UNKNOWN; - } - - *outport = *port; - return PORT_ERR_OK; -} diff --git a/win/src/stm32flash_serial/src/port.h b/win/src/stm32flash_serial/src/port.h deleted file mode 100644 index 290f03496..000000000 --- a/win/src/stm32flash_serial/src/port.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2014 Antonio Borneo - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _H_PORT -#define _H_PORT - -typedef enum { - PORT_ERR_OK = 0, - PORT_ERR_NODEV, /* No such device */ - PORT_ERR_TIMEDOUT, /* Operation timed out */ - PORT_ERR_UNKNOWN, -} port_err_t; - -/* flags */ -#define PORT_BYTE (1 << 0) /* byte (not frame) oriented */ -#define PORT_GVR_ETX (1 << 1) /* cmd GVR returns protection status */ -#define PORT_CMD_INIT (1 << 2) /* use INIT cmd to autodetect speed */ -#define PORT_RETRY (1 << 3) /* allowed read() retry after timeout */ -#define PORT_STRETCH_W (1 << 4) /* warning for no-stretching commands */ - -/* all options and flags used to open and configure an interface */ -struct port_options { - const char *device; - serial_baud_t baudRate; - const char *serial_mode; - int bus_addr; - int rx_frame_max; - int tx_frame_max; -}; - -/* - * Specify the length of reply for command GET - * This is helpful for frame-oriented protocols, e.g. i2c, to avoid time - * consuming try-fail-timeout-retry operation. - * On byte-oriented protocols, i.e. UART, this information would be skipped - * after read the first byte, so not needed. - */ -struct varlen_cmd { - uint8_t version; - uint8_t length; -}; - -struct port_interface { - const char *name; - unsigned flags; - port_err_t (*open)(struct port_interface *port, struct port_options *ops); - port_err_t (*close)(struct port_interface *port); - port_err_t (*read)(struct port_interface *port, void *buf, size_t nbyte); - port_err_t (*write)(struct port_interface *port, void *buf, size_t nbyte); - port_err_t (*gpio)(struct port_interface *port, serial_gpio_t n, int level); - const char *(*get_cfg_str)(struct port_interface *port); - struct varlen_cmd *cmd_get_reply; - void *private; -}; - -port_err_t port_open(struct port_options *ops, struct port_interface **outport); - -#endif diff --git a/win/src/stm32flash_serial/src/protocol.txt b/win/src/stm32flash_serial/src/protocol.txt deleted file mode 100644 index 039109908..000000000 --- a/win/src/stm32flash_serial/src/protocol.txt +++ /dev/null @@ -1,19 +0,0 @@ -The communication protocol used by ST bootloader is documented in following ST -application notes, depending on communication port. - -In current version of stm32flash are supported only UART and I2C ports. - -* AN3154: CAN protocol used in the STM32 bootloader - http://www.st.com/web/en/resource/technical/document/application_note/CD00264321.pdf - -* AN3155: USART protocol used in the STM32(TM) bootloader - http://www.st.com/web/en/resource/technical/document/application_note/CD00264342.pdf - -* AN4221: I2C protocol used in the STM32 bootloader - http://www.st.com/web/en/resource/technical/document/application_note/DM00072315.pdf - -* AN4286: SPI protocol used in the STM32 bootloader - http://www.st.com/web/en/resource/technical/document/application_note/DM00081379.pdf - -Boot mode selection for STM32 is documented in ST application note AN2606, available in ST website: - http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf diff --git a/win/src/stm32flash_serial/src/serial.h b/win/src/stm32flash_serial/src/serial.h deleted file mode 100644 index 227ba163b..000000000 --- a/win/src/stm32flash_serial/src/serial.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _SERIAL_H -#define _SERIAL_H - -typedef struct serial serial_t; - -typedef enum { - SERIAL_PARITY_NONE, - SERIAL_PARITY_EVEN, - SERIAL_PARITY_ODD, - - SERIAL_PARITY_INVALID -} serial_parity_t; - -typedef enum { - SERIAL_BITS_5, - SERIAL_BITS_6, - SERIAL_BITS_7, - SERIAL_BITS_8, - - SERIAL_BITS_INVALID -} serial_bits_t; - -typedef enum { - SERIAL_BAUD_1200, - SERIAL_BAUD_1800, - SERIAL_BAUD_2400, - SERIAL_BAUD_4800, - SERIAL_BAUD_9600, - SERIAL_BAUD_19200, - SERIAL_BAUD_38400, - SERIAL_BAUD_57600, - SERIAL_BAUD_115200, - SERIAL_BAUD_128000, - SERIAL_BAUD_230400, - SERIAL_BAUD_256000, - SERIAL_BAUD_460800, - SERIAL_BAUD_500000, - SERIAL_BAUD_576000, - SERIAL_BAUD_921600, - SERIAL_BAUD_1000000, - SERIAL_BAUD_1500000, - SERIAL_BAUD_2000000, - - SERIAL_BAUD_INVALID -} serial_baud_t; - -typedef enum { - SERIAL_STOPBIT_1, - SERIAL_STOPBIT_2, - - SERIAL_STOPBIT_INVALID -} serial_stopbit_t; - -typedef enum { - GPIO_RTS = 1, - GPIO_DTR, - GPIO_BRK, -} serial_gpio_t; - -/* common helper functions */ -serial_baud_t serial_get_baud(const unsigned int baud); -unsigned int serial_get_baud_int(const serial_baud_t baud); -serial_bits_t serial_get_bits(const char *mode); -unsigned int serial_get_bits_int(const serial_bits_t bits); -serial_parity_t serial_get_parity(const char *mode); -char serial_get_parity_str(const serial_parity_t parity); -serial_stopbit_t serial_get_stopbit(const char *mode); -unsigned int serial_get_stopbit_int(const serial_stopbit_t stopbit); - -#endif diff --git a/win/src/stm32flash_serial/src/serial_common.c b/win/src/stm32flash_serial/src/serial_common.c deleted file mode 100644 index 43e48e1ac..000000000 --- a/win/src/stm32flash_serial/src/serial_common.c +++ /dev/null @@ -1,154 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include "serial.h" - -serial_baud_t serial_get_baud(const unsigned int baud) { - switch(baud) { - case 1200: return SERIAL_BAUD_1200 ; - case 1800: return SERIAL_BAUD_1800 ; - case 2400: return SERIAL_BAUD_2400 ; - case 4800: return SERIAL_BAUD_4800 ; - case 9600: return SERIAL_BAUD_9600 ; - case 19200: return SERIAL_BAUD_19200 ; - case 38400: return SERIAL_BAUD_38400 ; - case 57600: return SERIAL_BAUD_57600 ; - case 115200: return SERIAL_BAUD_115200; - case 128000: return SERIAL_BAUD_128000; - case 230400: return SERIAL_BAUD_230400; - case 256000: return SERIAL_BAUD_256000; - case 460800: return SERIAL_BAUD_460800; - case 500000: return SERIAL_BAUD_500000; - case 576000: return SERIAL_BAUD_576000; - case 921600: return SERIAL_BAUD_921600; - case 1000000: return SERIAL_BAUD_1000000; - case 1500000: return SERIAL_BAUD_1500000; - case 2000000: return SERIAL_BAUD_2000000; - - default: - return SERIAL_BAUD_INVALID; - } -} - -unsigned int serial_get_baud_int(const serial_baud_t baud) { - switch(baud) { - case SERIAL_BAUD_1200 : return 1200 ; - case SERIAL_BAUD_1800 : return 1800 ; - case SERIAL_BAUD_2400 : return 2400 ; - case SERIAL_BAUD_4800 : return 4800 ; - case SERIAL_BAUD_9600 : return 9600 ; - case SERIAL_BAUD_19200 : return 19200 ; - case SERIAL_BAUD_38400 : return 38400 ; - case SERIAL_BAUD_57600 : return 57600 ; - case SERIAL_BAUD_115200: return 115200; - case SERIAL_BAUD_128000: return 128000; - case SERIAL_BAUD_230400: return 230400; - case SERIAL_BAUD_256000: return 256000; - case SERIAL_BAUD_460800: return 460800; - case SERIAL_BAUD_500000: return 500000; - case SERIAL_BAUD_576000: return 576000; - case SERIAL_BAUD_921600: return 921600; - case SERIAL_BAUD_1000000: return 1000000; - case SERIAL_BAUD_1500000: return 1500000; - case SERIAL_BAUD_2000000: return 2000000; - - case SERIAL_BAUD_INVALID: - default: - return 0; - } -} - -serial_bits_t serial_get_bits(const char *mode) { - if (!mode) - return SERIAL_BITS_INVALID; - switch(mode[0]) { - case '5': return SERIAL_BITS_5; - case '6': return SERIAL_BITS_6; - case '7': return SERIAL_BITS_7; - case '8': return SERIAL_BITS_8; - - default: - return SERIAL_BITS_INVALID; - } -} - -unsigned int serial_get_bits_int(const serial_bits_t bits) { - switch(bits) { - case SERIAL_BITS_5: return 5; - case SERIAL_BITS_6: return 6; - case SERIAL_BITS_7: return 7; - case SERIAL_BITS_8: return 8; - - default: - return 0; - } -} - -serial_parity_t serial_get_parity(const char *mode) { - if (!mode || !mode[0]) - return SERIAL_PARITY_INVALID; - switch(mode[1]) { - case 'N': - case 'n': - return SERIAL_PARITY_NONE; - case 'E': - case 'e': - return SERIAL_PARITY_EVEN; - case 'O': - case 'o': - return SERIAL_PARITY_ODD; - - default: - return SERIAL_PARITY_INVALID; - } -} - -char serial_get_parity_str(const serial_parity_t parity) { - switch(parity) { - case SERIAL_PARITY_NONE: return 'N'; - case SERIAL_PARITY_EVEN: return 'E'; - case SERIAL_PARITY_ODD : return 'O'; - - default: - return ' '; - } -} - -serial_stopbit_t serial_get_stopbit(const char *mode) { - if (!mode || !mode[0] || !mode[1]) - return SERIAL_STOPBIT_INVALID; - switch(mode[2]) { - case '1': return SERIAL_STOPBIT_1; - case '2': return SERIAL_STOPBIT_2; - - default: - return SERIAL_STOPBIT_INVALID; - } -} - -unsigned int serial_get_stopbit_int(const serial_stopbit_t stopbit) { - switch(stopbit) { - case SERIAL_STOPBIT_1: return 1; - case SERIAL_STOPBIT_2: return 2; - - default: - return 0; - } -} - diff --git a/win/src/stm32flash_serial/src/serial_platform.c b/win/src/stm32flash_serial/src/serial_platform.c deleted file mode 100644 index 98e256921..000000000 --- a/win/src/stm32flash_serial/src/serial_platform.c +++ /dev/null @@ -1,5 +0,0 @@ -#if defined(__WIN32__) || defined(__CYGWIN__) -# include "serial_w32.c" -#else -# include "serial_posix.c" -#endif diff --git a/win/src/stm32flash_serial/src/serial_posix.c b/win/src/stm32flash_serial/src/serial_posix.c deleted file mode 100644 index 284b35b20..000000000 --- a/win/src/stm32flash_serial/src/serial_posix.c +++ /dev/null @@ -1,395 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "serial.h" -#include "port.h" - -struct serial { - int fd; - struct termios oldtio; - struct termios newtio; - char setup_str[11]; -}; - -static serial_t *serial_open(const char *device) -{ - serial_t *h = calloc(sizeof(serial_t), 1); - - h->fd = open(device, O_RDWR | O_NOCTTY | O_NDELAY); - if (h->fd < 0) { - free(h); - return NULL; - } - fcntl(h->fd, F_SETFL, 0); - - tcgetattr(h->fd, &h->oldtio); - tcgetattr(h->fd, &h->newtio); - - return h; -} - -static void serial_flush(const serial_t *h) -{ - tcflush(h->fd, TCIFLUSH); -} - -static void serial_close(serial_t *h) -{ - serial_flush(h); - tcsetattr(h->fd, TCSANOW, &h->oldtio); - close(h->fd); - free(h); -} - -static port_err_t serial_setup(serial_t *h, const serial_baud_t baud, - const serial_bits_t bits, - const serial_parity_t parity, - const serial_stopbit_t stopbit) -{ - speed_t port_baud; - tcflag_t port_bits; - tcflag_t port_parity; - tcflag_t port_stop; - struct termios settings; - - switch (baud) { - case SERIAL_BAUD_1200: port_baud = B1200; break; - case SERIAL_BAUD_1800: port_baud = B1800; break; - case SERIAL_BAUD_2400: port_baud = B2400; break; - case SERIAL_BAUD_4800: port_baud = B4800; break; - case SERIAL_BAUD_9600: port_baud = B9600; break; - case SERIAL_BAUD_19200: port_baud = B19200; break; - case SERIAL_BAUD_38400: port_baud = B38400; break; - case SERIAL_BAUD_57600: port_baud = B57600; break; - case SERIAL_BAUD_115200: port_baud = B115200; break; - case SERIAL_BAUD_230400: port_baud = B230400; break; -#ifdef B460800 - case SERIAL_BAUD_460800: port_baud = B460800; break; -#endif /* B460800 */ -#ifdef B921600 - case SERIAL_BAUD_921600: port_baud = B921600; break; -#endif /* B921600 */ -#ifdef B500000 - case SERIAL_BAUD_500000: port_baud = B500000; break; -#endif /* B500000 */ -#ifdef B576000 - case SERIAL_BAUD_576000: port_baud = B576000; break; -#endif /* B576000 */ -#ifdef B1000000 - case SERIAL_BAUD_1000000: port_baud = B1000000; break; -#endif /* B1000000 */ -#ifdef B1500000 - case SERIAL_BAUD_1500000: port_baud = B1500000; break; -#endif /* B1500000 */ -#ifdef B2000000 - case SERIAL_BAUD_2000000: port_baud = B2000000; break; -#endif /* B2000000 */ - - case SERIAL_BAUD_INVALID: - default: - return PORT_ERR_UNKNOWN; - } - - switch (bits) { - case SERIAL_BITS_5: port_bits = CS5; break; - case SERIAL_BITS_6: port_bits = CS6; break; - case SERIAL_BITS_7: port_bits = CS7; break; - case SERIAL_BITS_8: port_bits = CS8; break; - - default: - return PORT_ERR_UNKNOWN; - } - - switch (parity) { - case SERIAL_PARITY_NONE: port_parity = 0; break; - case SERIAL_PARITY_EVEN: port_parity = PARENB; break; - case SERIAL_PARITY_ODD: port_parity = PARENB | PARODD; break; - - default: - return PORT_ERR_UNKNOWN; - } - - switch (stopbit) { - case SERIAL_STOPBIT_1: port_stop = 0; break; - case SERIAL_STOPBIT_2: port_stop = CSTOPB; break; - - default: - return PORT_ERR_UNKNOWN; - } - - /* reset the settings */ -#ifndef __sun /* Used by GNU and BSD. Ignore __SVR4 in test. */ - cfmakeraw(&h->newtio); -#else /* __sun */ - h->newtio.c_iflag &= ~(IGNBRK | BRKINT | PARMRK | ISTRIP | INLCR - | IGNCR | ICRNL | IXON); - if (port_parity) - h->newtio.c_iflag |= INPCK; - - h->newtio.c_oflag &= ~OPOST; - h->newtio.c_lflag &= ~(ECHO | ECHONL | ICANON | ISIG | IEXTEN); - h->newtio.c_cflag &= ~(CSIZE | PARENB); - h->newtio.c_cflag |= CS8; -#endif /* __sun */ -#ifdef __QNXNTO__ - h->newtio.c_cflag &= ~(CSIZE | IHFLOW | OHFLOW); -#else - h->newtio.c_cflag &= ~(CSIZE | CRTSCTS); -#endif - h->newtio.c_cflag &= ~(CSIZE | CRTSCTS); - h->newtio.c_iflag &= ~(IXON | IXOFF | IXANY | IGNPAR); - h->newtio.c_lflag &= ~(ECHOK | ECHOCTL | ECHOKE); - h->newtio.c_oflag &= ~(OPOST | ONLCR); - - /* setup the new settings */ - cfsetispeed(&h->newtio, port_baud); - cfsetospeed(&h->newtio, port_baud); - h->newtio.c_cflag |= - port_parity | - port_bits | - port_stop | - CLOCAL | - CREAD; - - h->newtio.c_cc[VMIN] = 0; - h->newtio.c_cc[VTIME] = 5; /* in units of 0.1 s */ - - /* set the settings */ - serial_flush(h); - if (tcsetattr(h->fd, TCSANOW, &h->newtio) != 0) - return PORT_ERR_UNKNOWN; - -/* this check fails on CDC-ACM devices, bits 16 and 17 of cflag differ! - * it has been disabled below for now -jcw, 2015-11-09 - if (settings.c_cflag != h->newtio.c_cflag) - fprintf(stderr, "c_cflag mismatch %lx\n", - settings.c_cflag ^ h->newtio.c_cflag); - */ - - /* confirm they were set */ - tcgetattr(h->fd, &settings); - if (settings.c_iflag != h->newtio.c_iflag || - settings.c_oflag != h->newtio.c_oflag || - //settings.c_cflag != h->newtio.c_cflag || - settings.c_lflag != h->newtio.c_lflag) - return PORT_ERR_UNKNOWN; - - snprintf(h->setup_str, sizeof(h->setup_str), "%u %d%c%d", - serial_get_baud_int(baud), - serial_get_bits_int(bits), - serial_get_parity_str(parity), - serial_get_stopbit_int(stopbit)); - return PORT_ERR_OK; -} - -/* - * Roger clark. - * This function is no longer used. But has just been commented out in case it needs - * to be reinstated in the future - -static int startswith(const char *haystack, const char *needle) { - return strncmp(haystack, needle, strlen(needle)) == 0; -} -*/ - -static int is_tty(const char *path) { - char resolved[PATH_MAX]; - - if(!realpath(path, resolved)) return 0; - - - /* - * Roger Clark - * Commented out this check, because on OSX some devices are /dev/cu - * and some users use symbolic links to devices, hence the name may not even start - * with /dev - - if(startswith(resolved, "/dev/tty")) return 1; - - return 0; - */ - - return 1; -} - -static port_err_t serial_posix_open(struct port_interface *port, - struct port_options *ops) -{ - serial_t *h; - - /* 1. check device name match */ - if (!is_tty(ops->device)) - return PORT_ERR_NODEV; - - /* 2. check options */ - if (ops->baudRate == SERIAL_BAUD_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_bits(ops->serial_mode) == SERIAL_BITS_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_parity(ops->serial_mode) == SERIAL_PARITY_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_stopbit(ops->serial_mode) == SERIAL_STOPBIT_INVALID) - return PORT_ERR_UNKNOWN; - - /* 3. open it */ - h = serial_open(ops->device); - if (h == NULL) - return PORT_ERR_UNKNOWN; - - /* 4. set options */ - if (serial_setup(h, ops->baudRate, - serial_get_bits(ops->serial_mode), - serial_get_parity(ops->serial_mode), - serial_get_stopbit(ops->serial_mode) - ) != PORT_ERR_OK) { - serial_close(h); - return PORT_ERR_UNKNOWN; - } - - port->private = h; - return PORT_ERR_OK; -} - -static port_err_t serial_posix_close(struct port_interface *port) -{ - serial_t *h; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - serial_close(h); - port->private = NULL; - return PORT_ERR_OK; -} - -static port_err_t serial_posix_read(struct port_interface *port, void *buf, - size_t nbyte) -{ - serial_t *h; - ssize_t r; - uint8_t *pos = (uint8_t *)buf; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - while (nbyte) { - r = read(h->fd, pos, nbyte); - if (r == 0) - return PORT_ERR_TIMEDOUT; - if (r < 0) - return PORT_ERR_UNKNOWN; - - nbyte -= r; - pos += r; - } - return PORT_ERR_OK; -} - -static port_err_t serial_posix_write(struct port_interface *port, void *buf, - size_t nbyte) -{ - serial_t *h; - ssize_t r; - const uint8_t *pos = (const uint8_t *)buf; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - while (nbyte) { - r = write(h->fd, pos, nbyte); - if (r < 1) - return PORT_ERR_UNKNOWN; - - nbyte -= r; - pos += r; - } - return PORT_ERR_OK; -} - -static port_err_t serial_posix_gpio(struct port_interface *port, - serial_gpio_t n, int level) -{ - serial_t *h; - int bit, lines; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - switch (n) { - case GPIO_RTS: - bit = TIOCM_RTS; - break; - - case GPIO_DTR: - bit = TIOCM_DTR; - break; - - case GPIO_BRK: - if (level == 0) - return PORT_ERR_OK; - if (tcsendbreak(h->fd, 1)) - return PORT_ERR_UNKNOWN; - return PORT_ERR_OK; - - default: - return PORT_ERR_UNKNOWN; - } - - /* handle RTS/DTR */ - if (ioctl(h->fd, TIOCMGET, &lines)) - return PORT_ERR_UNKNOWN; - lines = level ? lines | bit : lines & ~bit; - if (ioctl(h->fd, TIOCMSET, &lines)) - return PORT_ERR_UNKNOWN; - - return PORT_ERR_OK; -} - -static const char *serial_posix_get_cfg_str(struct port_interface *port) -{ - serial_t *h; - - h = (serial_t *)port->private; - return h ? h->setup_str : "INVALID"; -} - -struct port_interface port_serial = { - .name = "serial_posix", - .flags = PORT_BYTE | PORT_GVR_ETX | PORT_CMD_INIT | PORT_RETRY, - .open = serial_posix_open, - .close = serial_posix_close, - .read = serial_posix_read, - .write = serial_posix_write, - .gpio = serial_posix_gpio, - .get_cfg_str = serial_posix_get_cfg_str, -}; diff --git a/win/src/stm32flash_serial/src/serial_w32.c b/win/src/stm32flash_serial/src/serial_w32.c deleted file mode 100644 index 56772c0a0..000000000 --- a/win/src/stm32flash_serial/src/serial_w32.c +++ /dev/null @@ -1,341 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - Copyright (C) 2010 Gareth McMullin - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "serial.h" -#include "port.h" - -struct serial { - HANDLE fd; - DCB oldtio; - DCB newtio; - char setup_str[11]; -}; - -static serial_t *serial_open(const char *device) -{ - serial_t *h = calloc(sizeof(serial_t), 1); - char *devName; - - /* timeout in ms */ - COMMTIMEOUTS timeouts = {MAXDWORD, MAXDWORD, 500, 0, 0}; - - /* Fix the device name if required */ - if (strlen(device) > 4 && device[0] != '\\') { - devName = calloc(1, strlen(device) + 5); - sprintf(devName, "\\\\.\\%s", device); - } else { - devName = (char *)device; - } - - /* Create file handle for port */ - h->fd = CreateFile(devName, GENERIC_READ | GENERIC_WRITE, - 0, /* Exclusive access */ - NULL, /* No security */ - OPEN_EXISTING, - 0, /* No overlap */ - NULL); - - if (devName != device) - free(devName); - - if (h->fd == INVALID_HANDLE_VALUE) { - if (GetLastError() == ERROR_FILE_NOT_FOUND) - fprintf(stderr, "File not found: %s\n", device); - return NULL; - } - - SetupComm(h->fd, 4096, 4096); /* Set input and output buffer size */ - - SetCommTimeouts(h->fd, &timeouts); - - SetCommMask(h->fd, EV_ERR); /* Notify us of error events */ - - GetCommState(h->fd, &h->oldtio); /* Retrieve port parameters */ - GetCommState(h->fd, &h->newtio); /* Retrieve port parameters */ - - /* PurgeComm(h->fd, PURGE_RXABORT | PURGE_TXCLEAR | PURGE_TXABORT | PURGE_TXCLEAR); */ - - return h; -} - -static void serial_flush(const serial_t *h) -{ - /* We shouldn't need to flush in non-overlapping (blocking) mode */ - /* tcflush(h->fd, TCIFLUSH); */ -} - -static void serial_close(serial_t *h) -{ - serial_flush(h); - SetCommState(h->fd, &h->oldtio); - CloseHandle(h->fd); - free(h); -} - -static port_err_t serial_setup(serial_t *h, - const serial_baud_t baud, - const serial_bits_t bits, - const serial_parity_t parity, - const serial_stopbit_t stopbit) -{ - switch (baud) { - case SERIAL_BAUD_1200: h->newtio.BaudRate = CBR_1200; break; - /* case SERIAL_BAUD_1800: h->newtio.BaudRate = CBR_1800; break; */ - case SERIAL_BAUD_2400: h->newtio.BaudRate = CBR_2400; break; - case SERIAL_BAUD_4800: h->newtio.BaudRate = CBR_4800; break; - case SERIAL_BAUD_9600: h->newtio.BaudRate = CBR_9600; break; - case SERIAL_BAUD_19200: h->newtio.BaudRate = CBR_19200; break; - case SERIAL_BAUD_38400: h->newtio.BaudRate = CBR_38400; break; - case SERIAL_BAUD_57600: h->newtio.BaudRate = CBR_57600; break; - case SERIAL_BAUD_115200: h->newtio.BaudRate = CBR_115200; break; - case SERIAL_BAUD_128000: h->newtio.BaudRate = CBR_128000; break; - case SERIAL_BAUD_256000: h->newtio.BaudRate = CBR_256000; break; - /* These are not defined in WinBase.h and might work or not */ - case SERIAL_BAUD_230400: h->newtio.BaudRate = 230400; break; - case SERIAL_BAUD_460800: h->newtio.BaudRate = 460800; break; - case SERIAL_BAUD_500000: h->newtio.BaudRate = 500000; break; - case SERIAL_BAUD_576000: h->newtio.BaudRate = 576000; break; - case SERIAL_BAUD_921600: h->newtio.BaudRate = 921600; break; - case SERIAL_BAUD_1000000: h->newtio.BaudRate = 1000000; break; - case SERIAL_BAUD_1500000: h->newtio.BaudRate = 1500000; break; - case SERIAL_BAUD_2000000: h->newtio.BaudRate = 2000000; break; - case SERIAL_BAUD_INVALID: - - default: - return PORT_ERR_UNKNOWN; - } - - switch (bits) { - case SERIAL_BITS_5: h->newtio.ByteSize = 5; break; - case SERIAL_BITS_6: h->newtio.ByteSize = 6; break; - case SERIAL_BITS_7: h->newtio.ByteSize = 7; break; - case SERIAL_BITS_8: h->newtio.ByteSize = 8; break; - - default: - return PORT_ERR_UNKNOWN; - } - - switch (parity) { - case SERIAL_PARITY_NONE: h->newtio.Parity = NOPARITY; break; - case SERIAL_PARITY_EVEN: h->newtio.Parity = EVENPARITY; break; - case SERIAL_PARITY_ODD: h->newtio.Parity = ODDPARITY; break; - - default: - return PORT_ERR_UNKNOWN; - } - - switch (stopbit) { - case SERIAL_STOPBIT_1: h->newtio.StopBits = ONESTOPBIT; break; - case SERIAL_STOPBIT_2: h->newtio.StopBits = TWOSTOPBITS; break; - - default: - return PORT_ERR_UNKNOWN; - } - - /* reset the settings */ - h->newtio.fOutxCtsFlow = FALSE; - h->newtio.fOutxDsrFlow = FALSE; - h->newtio.fOutX = FALSE; - h->newtio.fInX = FALSE; - h->newtio.fNull = 0; - h->newtio.fAbortOnError = 0; - - /* set the settings */ - serial_flush(h); - if (!SetCommState(h->fd, &h->newtio)) - return PORT_ERR_UNKNOWN; - - snprintf(h->setup_str, sizeof(h->setup_str), "%u %d%c%d", - serial_get_baud_int(baud), - serial_get_bits_int(bits), - serial_get_parity_str(parity), - serial_get_stopbit_int(stopbit) - ); - return PORT_ERR_OK; -} - -static port_err_t serial_w32_open(struct port_interface *port, - struct port_options *ops) -{ - serial_t *h; - - /* 1. check device name match */ - if (!((strlen(ops->device) == 4 || strlen(ops->device) == 5) - && !strncmp(ops->device, "COM", 3) && isdigit(ops->device[3])) - && !(!strncmp(ops->device, "\\\\.\\COM", strlen("\\\\.\\COM")) - && isdigit(ops->device[strlen("\\\\.\\COM")]))) - return PORT_ERR_NODEV; - - /* 2. check options */ - if (ops->baudRate == SERIAL_BAUD_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_bits(ops->serial_mode) == SERIAL_BITS_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_parity(ops->serial_mode) == SERIAL_PARITY_INVALID) - return PORT_ERR_UNKNOWN; - if (serial_get_stopbit(ops->serial_mode) == SERIAL_STOPBIT_INVALID) - return PORT_ERR_UNKNOWN; - - /* 3. open it */ - h = serial_open(ops->device); - if (h == NULL) - return PORT_ERR_UNKNOWN; - - /* 4. set options */ - if (serial_setup(h, ops->baudRate, - serial_get_bits(ops->serial_mode), - serial_get_parity(ops->serial_mode), - serial_get_stopbit(ops->serial_mode) - ) != PORT_ERR_OK) { - serial_close(h); - return PORT_ERR_UNKNOWN; - } - - port->private = h; - return PORT_ERR_OK; -} - -static port_err_t serial_w32_close(struct port_interface *port) -{ - serial_t *h; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - serial_close(h); - port->private = NULL; - return PORT_ERR_OK; -} - -static port_err_t serial_w32_read(struct port_interface *port, void *buf, - size_t nbyte) -{ - serial_t *h; - DWORD r; - uint8_t *pos = (uint8_t *)buf; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - while (nbyte) { - ReadFile(h->fd, pos, nbyte, &r, NULL); - if (r == 0) - return PORT_ERR_TIMEDOUT; - if (r < 0) - return PORT_ERR_UNKNOWN; - - nbyte -= r; - pos += r; - } - return PORT_ERR_OK; -} - -static port_err_t serial_w32_write(struct port_interface *port, void *buf, - size_t nbyte) -{ - serial_t *h; - DWORD r; - uint8_t *pos = (uint8_t *)buf; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - while (nbyte) { - if (!WriteFile(h->fd, pos, nbyte, &r, NULL)) - return PORT_ERR_UNKNOWN; - if (r < 1) - return PORT_ERR_UNKNOWN; - - nbyte -= r; - pos += r; - } - return PORT_ERR_OK; -} - -static port_err_t serial_w32_gpio(struct port_interface *port, - serial_gpio_t n, int level) -{ - serial_t *h; - int bit; - - h = (serial_t *)port->private; - if (h == NULL) - return PORT_ERR_UNKNOWN; - - switch (n) { - case GPIO_RTS: - bit = level ? SETRTS : CLRRTS; - break; - - case GPIO_DTR: - bit = level ? SETDTR : CLRDTR; - break; - - case GPIO_BRK: - if (level == 0) - return PORT_ERR_OK; - if (EscapeCommFunction(h->fd, SETBREAK) == 0) - return PORT_ERR_UNKNOWN; - usleep(500000); - if (EscapeCommFunction(h->fd, CLRBREAK) == 0) - return PORT_ERR_UNKNOWN; - return PORT_ERR_OK; - - default: - return PORT_ERR_UNKNOWN; - } - - /* handle RTS/DTR */ - if (EscapeCommFunction(h->fd, bit) == 0) - return PORT_ERR_UNKNOWN; - - return PORT_ERR_OK; -} - -static const char *serial_w32_get_cfg_str(struct port_interface *port) -{ - serial_t *h; - - h = (serial_t *)port->private; - return h ? h->setup_str : "INVALID"; -} - -struct port_interface port_serial = { - .name = "serial_w32", - .flags = PORT_BYTE | PORT_GVR_ETX | PORT_CMD_INIT | PORT_RETRY, - .open = serial_w32_open, - .close = serial_w32_close, - .read = serial_w32_read, - .write = serial_w32_write, - .gpio = serial_w32_gpio, - .get_cfg_str = serial_w32_get_cfg_str, -}; diff --git a/win/src/stm32flash_serial/src/stm32.c b/win/src/stm32flash_serial/src/stm32.c deleted file mode 100644 index 74047d244..000000000 --- a/win/src/stm32flash_serial/src/stm32.c +++ /dev/null @@ -1,1048 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright 2010 Geoffrey McRae - Copyright 2012-2014 Tormod Volden - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include -#include -#include -#include -#include - -#include "stm32.h" -#include "port.h" -#include "utils.h" - -#define STM32_ACK 0x79 -#define STM32_NACK 0x1F -#define STM32_BUSY 0x76 - -#define STM32_CMD_INIT 0x7F -#define STM32_CMD_GET 0x00 /* get the version and command supported */ -#define STM32_CMD_GVR 0x01 /* get version and read protection status */ -#define STM32_CMD_GID 0x02 /* get ID */ -#define STM32_CMD_RM 0x11 /* read memory */ -#define STM32_CMD_GO 0x21 /* go */ -#define STM32_CMD_WM 0x31 /* write memory */ -#define STM32_CMD_WM_NS 0x32 /* no-stretch write memory */ -#define STM32_CMD_ER 0x43 /* erase */ -#define STM32_CMD_EE 0x44 /* extended erase */ -#define STM32_CMD_EE_NS 0x45 /* extended erase no-stretch */ -#define STM32_CMD_WP 0x63 /* write protect */ -#define STM32_CMD_WP_NS 0x64 /* write protect no-stretch */ -#define STM32_CMD_UW 0x73 /* write unprotect */ -#define STM32_CMD_UW_NS 0x74 /* write unprotect no-stretch */ -#define STM32_CMD_RP 0x82 /* readout protect */ -#define STM32_CMD_RP_NS 0x83 /* readout protect no-stretch */ -#define STM32_CMD_UR 0x92 /* readout unprotect */ -#define STM32_CMD_UR_NS 0x93 /* readout unprotect no-stretch */ -#define STM32_CMD_CRC 0xA1 /* compute CRC */ -#define STM32_CMD_ERR 0xFF /* not a valid command */ - -#define STM32_RESYNC_TIMEOUT 35 /* seconds */ -#define STM32_MASSERASE_TIMEOUT 35 /* seconds */ -#define STM32_SECTERASE_TIMEOUT 5 /* seconds */ -#define STM32_BLKWRITE_TIMEOUT 1 /* seconds */ -#define STM32_WUNPROT_TIMEOUT 1 /* seconds */ -#define STM32_WPROT_TIMEOUT 1 /* seconds */ -#define STM32_RPROT_TIMEOUT 1 /* seconds */ - -#define STM32_CMD_GET_LENGTH 17 /* bytes in the reply */ - -struct stm32_cmd { - uint8_t get; - uint8_t gvr; - uint8_t gid; - uint8_t rm; - uint8_t go; - uint8_t wm; - uint8_t er; /* this may be extended erase */ - uint8_t wp; - uint8_t uw; - uint8_t rp; - uint8_t ur; - uint8_t crc; -}; - -/* Reset code for ARMv7-M (Cortex-M3) and ARMv6-M (Cortex-M0) - * see ARMv7-M or ARMv6-M Architecture Reference Manual (table B3-8) - * or "The definitive guide to the ARM Cortex-M3", section 14.4. - */ -static const uint8_t stm_reset_code[] = { - 0x01, 0x49, // ldr r1, [pc, #4] ; () - 0x02, 0x4A, // ldr r2, [pc, #8] ; () - 0x0A, 0x60, // str r2, [r1, #0] - 0xfe, 0xe7, // endless: b endless - 0x0c, 0xed, 0x00, 0xe0, // .word 0xe000ed0c = NVIC AIRCR register address - 0x04, 0x00, 0xfa, 0x05 // .word 0x05fa0004 = VECTKEY | SYSRESETREQ -}; - -static const uint32_t stm_reset_code_length = sizeof(stm_reset_code); - -extern const stm32_dev_t devices[]; - -static void stm32_warn_stretching(const char *f) -{ - fprintf(stderr, "Attention !!!\n"); - fprintf(stderr, "\tThis %s error could be caused by your I2C\n", f); - fprintf(stderr, "\tcontroller not accepting \"clock stretching\"\n"); - fprintf(stderr, "\tas required by bootloader.\n"); - fprintf(stderr, "\tCheck \"I2C.txt\" in stm32flash source code.\n"); -} - -static stm32_err_t stm32_get_ack_timeout(const stm32_t *stm, time_t timeout) -{ - struct port_interface *port = stm->port; - uint8_t byte; - port_err_t p_err; - time_t t0, t1; - - if (!(port->flags & PORT_RETRY)) - timeout = 0; - - if (timeout) - time(&t0); - - do { - p_err = port->read(port, &byte, 1); - if (p_err == PORT_ERR_TIMEDOUT && timeout) { - time(&t1); - if (t1 < t0 + timeout) - continue; - } - - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Failed to read ACK byte\n"); - return STM32_ERR_UNKNOWN; - } - - if (byte == STM32_ACK) - return STM32_ERR_OK; - if (byte == STM32_NACK) - return STM32_ERR_NACK; - if (byte != STM32_BUSY) { - fprintf(stderr, "Got byte 0x%02x instead of ACK\n", - byte); - return STM32_ERR_UNKNOWN; - } - } while (1); -} - -static stm32_err_t stm32_get_ack(const stm32_t *stm) -{ - return stm32_get_ack_timeout(stm, 0); -} - -static stm32_err_t stm32_send_command_timeout(const stm32_t *stm, - const uint8_t cmd, - time_t timeout) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - port_err_t p_err; - uint8_t buf[2]; - - buf[0] = cmd; - buf[1] = cmd ^ 0xFF; - p_err = port->write(port, buf, 2); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Failed to send command\n"); - return STM32_ERR_UNKNOWN; - } - s_err = stm32_get_ack_timeout(stm, timeout); - if (s_err == STM32_ERR_OK) - return STM32_ERR_OK; - if (s_err == STM32_ERR_NACK) - fprintf(stderr, "Got NACK from device on command 0x%02x\n", cmd); - else - fprintf(stderr, "Unexpected reply from device on command 0x%02x\n", cmd); - return STM32_ERR_UNKNOWN; -} - -static stm32_err_t stm32_send_command(const stm32_t *stm, const uint8_t cmd) -{ - return stm32_send_command_timeout(stm, cmd, 0); -} - -/* if we have lost sync, send a wrong command and expect a NACK */ -static stm32_err_t stm32_resync(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - port_err_t p_err; - uint8_t buf[2], ack; - time_t t0, t1; - - time(&t0); - t1 = t0; - - buf[0] = STM32_CMD_ERR; - buf[1] = STM32_CMD_ERR ^ 0xFF; - while (t1 < t0 + STM32_RESYNC_TIMEOUT) { - p_err = port->write(port, buf, 2); - if (p_err != PORT_ERR_OK) { - usleep(500000); - time(&t1); - continue; - } - p_err = port->read(port, &ack, 1); - if (p_err != PORT_ERR_OK) { - time(&t1); - continue; - } - if (ack == STM32_NACK) - return STM32_ERR_OK; - time(&t1); - } - return STM32_ERR_UNKNOWN; -} - -/* - * some command receive reply frame with variable length, and length is - * embedded in reply frame itself. - * We can guess the length, but if we guess wrong the protocol gets out - * of sync. - * Use resync for frame oriented interfaces (e.g. I2C) and byte-by-byte - * read for byte oriented interfaces (e.g. UART). - * - * to run safely, data buffer should be allocated for 256+1 bytes - * - * len is value of the first byte in the frame. - */ -static stm32_err_t stm32_guess_len_cmd(const stm32_t *stm, uint8_t cmd, - uint8_t *data, unsigned int len) -{ - struct port_interface *port = stm->port; - port_err_t p_err; - - if (stm32_send_command(stm, cmd) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - if (port->flags & PORT_BYTE) { - /* interface is UART-like */ - p_err = port->read(port, data, 1); - if (p_err != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - len = data[0]; - p_err = port->read(port, data + 1, len + 1); - if (p_err != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - return STM32_ERR_OK; - } - - p_err = port->read(port, data, len + 2); - if (p_err == PORT_ERR_OK && len == data[0]) - return STM32_ERR_OK; - if (p_err != PORT_ERR_OK) { - /* restart with only one byte */ - if (stm32_resync(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - if (stm32_send_command(stm, cmd) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - p_err = port->read(port, data, 1); - if (p_err != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - } - - fprintf(stderr, "Re sync (len = %d)\n", data[0]); - if (stm32_resync(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - len = data[0]; - if (stm32_send_command(stm, cmd) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - p_err = port->read(port, data, len + 2); - if (p_err != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - return STM32_ERR_OK; -} - -/* - * Some interface, e.g. UART, requires a specific init sequence to let STM32 - * autodetect the interface speed. - * The sequence is only required one time after reset. - * stm32flash has command line flag "-c" to prevent sending the init sequence - * in case it was already sent before. - * User can easily forget adding "-c". In this case the bootloader would - * interpret the init sequence as part of a command message, then waiting for - * the rest of the message blocking the interface. - * This function sends the init sequence and, in case of timeout, recovers - * the interface. - */ -static stm32_err_t stm32_send_init_seq(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - port_err_t p_err; - uint8_t byte, cmd = STM32_CMD_INIT; - - p_err = port->write(port, &cmd, 1); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Failed to send init to device\n"); - return STM32_ERR_UNKNOWN; - } - p_err = port->read(port, &byte, 1); - if (p_err == PORT_ERR_OK && byte == STM32_ACK) - return STM32_ERR_OK; - if (p_err == PORT_ERR_OK && byte == STM32_NACK) { - /* We could get error later, but let's continue, for now. */ - fprintf(stderr, - "Warning: the interface was not closed properly.\n"); - return STM32_ERR_OK; - } - if (p_err != PORT_ERR_TIMEDOUT) { - fprintf(stderr, "Failed to init device.\n"); - return STM32_ERR_UNKNOWN; - } - - /* - * Check if previous STM32_CMD_INIT was taken as first byte - * of a command. Send a new byte, we should get back a NACK. - */ - p_err = port->write(port, &cmd, 1); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Failed to send init to device\n"); - return STM32_ERR_UNKNOWN; - } - p_err = port->read(port, &byte, 1); - if (p_err == PORT_ERR_OK && byte == STM32_NACK) - return STM32_ERR_OK; - fprintf(stderr, "Failed to init device.\n"); - return STM32_ERR_UNKNOWN; -} - -/* find newer command by higher code */ -#define newer(prev, a) (((prev) == STM32_CMD_ERR) \ - ? (a) \ - : (((prev) > (a)) ? (prev) : (a))) - -stm32_t *stm32_init(struct port_interface *port, const char init) -{ - uint8_t len, val, buf[257]; - stm32_t *stm; - int i, new_cmds; - - stm = calloc(sizeof(stm32_t), 1); - stm->cmd = malloc(sizeof(stm32_cmd_t)); - memset(stm->cmd, STM32_CMD_ERR, sizeof(stm32_cmd_t)); - stm->port = port; - - if ((port->flags & PORT_CMD_INIT) && init) - if (stm32_send_init_seq(stm) != STM32_ERR_OK) - return NULL; - - /* get the version and read protection status */ - if (stm32_send_command(stm, STM32_CMD_GVR) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - - /* From AN, only UART bootloader returns 3 bytes */ - len = (port->flags & PORT_GVR_ETX) ? 3 : 1; - if (port->read(port, buf, len) != PORT_ERR_OK) - return NULL; - stm->version = buf[0]; - stm->option1 = (port->flags & PORT_GVR_ETX) ? buf[1] : 0; - stm->option2 = (port->flags & PORT_GVR_ETX) ? buf[2] : 0; - if (stm32_get_ack(stm) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - - /* get the bootloader information */ - len = STM32_CMD_GET_LENGTH; - if (port->cmd_get_reply) - for (i = 0; port->cmd_get_reply[i].length; i++) - if (stm->version == port->cmd_get_reply[i].version) { - len = port->cmd_get_reply[i].length; - break; - } - if (stm32_guess_len_cmd(stm, STM32_CMD_GET, buf, len) != STM32_ERR_OK) - return NULL; - len = buf[0] + 1; - stm->bl_version = buf[1]; - new_cmds = 0; - for (i = 1; i < len; i++) { - val = buf[i + 1]; - switch (val) { - case STM32_CMD_GET: - stm->cmd->get = val; break; - case STM32_CMD_GVR: - stm->cmd->gvr = val; break; - case STM32_CMD_GID: - stm->cmd->gid = val; break; - case STM32_CMD_RM: - stm->cmd->rm = val; break; - case STM32_CMD_GO: - stm->cmd->go = val; break; - case STM32_CMD_WM: - case STM32_CMD_WM_NS: - stm->cmd->wm = newer(stm->cmd->wm, val); - break; - case STM32_CMD_ER: - case STM32_CMD_EE: - case STM32_CMD_EE_NS: - stm->cmd->er = newer(stm->cmd->er, val); - break; - case STM32_CMD_WP: - case STM32_CMD_WP_NS: - stm->cmd->wp = newer(stm->cmd->wp, val); - break; - case STM32_CMD_UW: - case STM32_CMD_UW_NS: - stm->cmd->uw = newer(stm->cmd->uw, val); - break; - case STM32_CMD_RP: - case STM32_CMD_RP_NS: - stm->cmd->rp = newer(stm->cmd->rp, val); - break; - case STM32_CMD_UR: - case STM32_CMD_UR_NS: - stm->cmd->ur = newer(stm->cmd->ur, val); - break; - case STM32_CMD_CRC: - stm->cmd->crc = newer(stm->cmd->crc, val); - break; - default: - if (new_cmds++ == 0) - fprintf(stderr, - "GET returns unknown commands (0x%2x", - val); - else - fprintf(stderr, ", 0x%2x", val); - } - } - if (new_cmds) - fprintf(stderr, ")\n"); - if (stm32_get_ack(stm) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - - if (stm->cmd->get == STM32_CMD_ERR - || stm->cmd->gvr == STM32_CMD_ERR - || stm->cmd->gid == STM32_CMD_ERR) { - fprintf(stderr, "Error: bootloader did not returned correct information from GET command\n"); - return NULL; - } - - /* get the device ID */ - if (stm32_guess_len_cmd(stm, stm->cmd->gid, buf, 1) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - len = buf[0] + 1; - if (len < 2) { - stm32_close(stm); - fprintf(stderr, "Only %d bytes sent in the PID, unknown/unsupported device\n", len); - return NULL; - } - stm->pid = (buf[1] << 8) | buf[2]; - if (len > 2) { - fprintf(stderr, "This bootloader returns %d extra bytes in PID:", len); - for (i = 2; i <= len ; i++) - fprintf(stderr, " %02x", buf[i]); - fprintf(stderr, "\n"); - } - if (stm32_get_ack(stm) != STM32_ERR_OK) { - stm32_close(stm); - return NULL; - } - - stm->dev = devices; - while (stm->dev->id != 0x00 && stm->dev->id != stm->pid) - ++stm->dev; - - if (!stm->dev->id) { - fprintf(stderr, "Unknown/unsupported device (Device ID: 0x%03x)\n", stm->pid); - stm32_close(stm); - return NULL; - } - - return stm; -} - -void stm32_close(stm32_t *stm) -{ - if (stm) - free(stm->cmd); - free(stm); -} - -stm32_err_t stm32_read_memory(const stm32_t *stm, uint32_t address, - uint8_t data[], unsigned int len) -{ - struct port_interface *port = stm->port; - uint8_t buf[5]; - - if (!len) - return STM32_ERR_OK; - - if (len > 256) { - fprintf(stderr, "Error: READ length limit at 256 bytes\n"); - return STM32_ERR_UNKNOWN; - } - - if (stm->cmd->rm == STM32_CMD_ERR) { - fprintf(stderr, "Error: READ command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->rm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = address >> 24; - buf[1] = (address >> 16) & 0xFF; - buf[2] = (address >> 8) & 0xFF; - buf[3] = address & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_send_command(stm, len - 1) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (port->read(port, data, len) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - return STM32_ERR_OK; -} - -stm32_err_t stm32_write_memory(const stm32_t *stm, uint32_t address, - const uint8_t data[], unsigned int len) -{ - struct port_interface *port = stm->port; - uint8_t cs, buf[256 + 2]; - unsigned int i, aligned_len; - stm32_err_t s_err; - - if (!len) - return STM32_ERR_OK; - - if (len > 256) { - fprintf(stderr, "Error: READ length limit at 256 bytes\n"); - return STM32_ERR_UNKNOWN; - } - - /* must be 32bit aligned */ - if (address & 0x3 || len & 0x3) { - fprintf(stderr, "Error: WRITE address and length must be 4 byte aligned\n"); - return STM32_ERR_UNKNOWN; - } - - if (stm->cmd->wm == STM32_CMD_ERR) { - fprintf(stderr, "Error: WRITE command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - /* send the address and checksum */ - if (stm32_send_command(stm, stm->cmd->wm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = address >> 24; - buf[1] = (address >> 16) & 0xFF; - buf[2] = (address >> 8) & 0xFF; - buf[3] = address & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - aligned_len = (len + 3) & ~3; - cs = aligned_len - 1; - buf[0] = aligned_len - 1; - for (i = 0; i < len; i++) { - cs ^= data[i]; - buf[i + 1] = data[i]; - } - /* padding data */ - for (i = len; i < aligned_len; i++) { - cs ^= 0xFF; - buf[i + 1] = 0xFF; - } - buf[aligned_len + 1] = cs; - if (port->write(port, buf, aligned_len + 2) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_BLKWRITE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->wm != STM32_CMD_WM_NS) - stm32_warn_stretching("write"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_wunprot_memory(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - - if (stm->cmd->uw == STM32_CMD_ERR) { - fprintf(stderr, "Error: WRITE UNPROTECT command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->uw) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_WUNPROT_TIMEOUT); - if (s_err == STM32_NACK) { - fprintf(stderr, "Error: Failed to WRITE UNPROTECT\n"); - return STM32_ERR_UNKNOWN; - } - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->uw != STM32_CMD_UW_NS) - stm32_warn_stretching("WRITE UNPROTECT"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_wprot_memory(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - - if (stm->cmd->wp == STM32_CMD_ERR) { - fprintf(stderr, "Error: WRITE PROTECT command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->wp) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_WPROT_TIMEOUT); - if (s_err == STM32_NACK) { - fprintf(stderr, "Error: Failed to WRITE PROTECT\n"); - return STM32_ERR_UNKNOWN; - } - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->wp != STM32_CMD_WP_NS) - stm32_warn_stretching("WRITE PROTECT"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_runprot_memory(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - - if (stm->cmd->ur == STM32_CMD_ERR) { - fprintf(stderr, "Error: READOUT UNPROTECT command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->ur) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_MASSERASE_TIMEOUT); - if (s_err == STM32_NACK) { - fprintf(stderr, "Error: Failed to READOUT UNPROTECT\n"); - return STM32_ERR_UNKNOWN; - } - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->ur != STM32_CMD_UR_NS) - stm32_warn_stretching("READOUT UNPROTECT"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_readprot_memory(const stm32_t *stm) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - - if (stm->cmd->rp == STM32_CMD_ERR) { - fprintf(stderr, "Error: READOUT PROTECT command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->rp) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - s_err = stm32_get_ack_timeout(stm, STM32_RPROT_TIMEOUT); - if (s_err == STM32_NACK) { - fprintf(stderr, "Error: Failed to READOUT PROTECT\n"); - return STM32_ERR_UNKNOWN; - } - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W - && stm->cmd->rp != STM32_CMD_RP_NS) - stm32_warn_stretching("READOUT PROTECT"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; -} - -stm32_err_t stm32_erase_memory(const stm32_t *stm, uint8_t spage, uint8_t pages) -{ - struct port_interface *port = stm->port; - stm32_err_t s_err; - port_err_t p_err; - - if (!pages) - return STM32_ERR_OK; - - if (stm->cmd->er == STM32_CMD_ERR) { - fprintf(stderr, "Error: ERASE command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->er) != STM32_ERR_OK) { - fprintf(stderr, "Can't initiate chip erase!\n"); - return STM32_ERR_UNKNOWN; - } - - /* The erase command reported by the bootloader is either 0x43, 0x44 or 0x45 */ - /* 0x44 is Extended Erase, a 2 byte based protocol and needs to be handled differently. */ - /* 0x45 is clock no-stretching version of Extended Erase for I2C port. */ - if (stm->cmd->er != STM32_CMD_ER) { - /* Not all chips using Extended Erase support mass erase */ - /* Currently known as not supporting mass erase is the Ultra Low Power STM32L15xx range */ - /* So if someone has not overridden the default, but uses one of these chips, take it out of */ - /* mass erase mode, so it will be done page by page. This maximum might not be correct either! */ - if (stm->pid == 0x416 && pages == 0xFF) - pages = 0xF8; /* works for the STM32L152RB with 128Kb flash */ - - if (pages == 0xFF) { - uint8_t buf[3]; - - /* 0xFFFF the magic number for mass erase */ - buf[0] = 0xFF; - buf[1] = 0xFF; - buf[2] = 0x00; /* checksum */ - if (port->write(port, buf, 3) != PORT_ERR_OK) { - fprintf(stderr, "Mass erase error.\n"); - return STM32_ERR_UNKNOWN; - } - s_err = stm32_get_ack_timeout(stm, STM32_MASSERASE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Mass erase failed. Try specifying the number of pages to be erased.\n"); - if (port->flags & PORT_STRETCH_W - && stm->cmd->er != STM32_CMD_EE_NS) - stm32_warn_stretching("erase"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; - } - - uint16_t pg_num; - uint8_t pg_byte; - uint8_t cs = 0; - uint8_t *buf; - int i = 0; - - buf = malloc(2 + 2 * pages + 1); - if (!buf) - return STM32_ERR_UNKNOWN; - - /* Number of pages to be erased - 1, two bytes, MSB first */ - pg_byte = (pages - 1) >> 8; - buf[i++] = pg_byte; - cs ^= pg_byte; - pg_byte = (pages - 1) & 0xFF; - buf[i++] = pg_byte; - cs ^= pg_byte; - - for (pg_num = spage; pg_num < spage + pages; pg_num++) { - pg_byte = pg_num >> 8; - cs ^= pg_byte; - buf[i++] = pg_byte; - pg_byte = pg_num & 0xFF; - cs ^= pg_byte; - buf[i++] = pg_byte; - } - buf[i++] = cs; - p_err = port->write(port, buf, i); - free(buf); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Page-by-page erase error.\n"); - return STM32_ERR_UNKNOWN; - } - - s_err = stm32_get_ack_timeout(stm, pages * STM32_SECTERASE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - fprintf(stderr, "Page-by-page erase failed. Check the maximum pages your device supports.\n"); - if (port->flags & PORT_STRETCH_W - && stm->cmd->er != STM32_CMD_EE_NS) - stm32_warn_stretching("erase"); - return STM32_ERR_UNKNOWN; - } - - return STM32_ERR_OK; - } - - /* And now the regular erase (0x43) for all other chips */ - if (pages == 0xFF) { - s_err = stm32_send_command_timeout(stm, 0xFF, STM32_MASSERASE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W) - stm32_warn_stretching("erase"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; - } else { - uint8_t cs = 0; - uint8_t pg_num; - uint8_t *buf; - int i = 0; - - buf = malloc(1 + pages + 1); - if (!buf) - return STM32_ERR_UNKNOWN; - - buf[i++] = pages - 1; - cs ^= (pages-1); - for (pg_num = spage; pg_num < (pages + spage); pg_num++) { - buf[i++] = pg_num; - cs ^= pg_num; - } - buf[i++] = cs; - p_err = port->write(port, buf, i); - free(buf); - if (p_err != PORT_ERR_OK) { - fprintf(stderr, "Erase failed.\n"); - return STM32_ERR_UNKNOWN; - } - s_err = stm32_get_ack_timeout(stm, STM32_MASSERASE_TIMEOUT); - if (s_err != STM32_ERR_OK) { - if (port->flags & PORT_STRETCH_W) - stm32_warn_stretching("erase"); - return STM32_ERR_UNKNOWN; - } - return STM32_ERR_OK; - } -} - -static stm32_err_t stm32_run_raw_code(const stm32_t *stm, - uint32_t target_address, - const uint8_t *code, uint32_t code_size) -{ - uint32_t stack_le = le_u32(0x20002000); - uint32_t code_address_le = le_u32(target_address + 8); - uint32_t length = code_size + 8; - uint8_t *mem, *pos; - uint32_t address, w; - - /* Must be 32-bit aligned */ - if (target_address & 0x3) { - fprintf(stderr, "Error: code address must be 4 byte aligned\n"); - return STM32_ERR_UNKNOWN; - } - - mem = malloc(length); - if (!mem) - return STM32_ERR_UNKNOWN; - - memcpy(mem, &stack_le, sizeof(uint32_t)); - memcpy(mem + 4, &code_address_le, sizeof(uint32_t)); - memcpy(mem + 8, code, code_size); - - pos = mem; - address = target_address; - while (length > 0) { - w = length > 256 ? 256 : length; - if (stm32_write_memory(stm, address, pos, w) != STM32_ERR_OK) { - free(mem); - return STM32_ERR_UNKNOWN; - } - - address += w; - pos += w; - length -= w; - } - - free(mem); - return stm32_go(stm, target_address); -} - -stm32_err_t stm32_go(const stm32_t *stm, uint32_t address) -{ - struct port_interface *port = stm->port; - uint8_t buf[5]; - - if (stm->cmd->go == STM32_CMD_ERR) { - fprintf(stderr, "Error: GO command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->go) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = address >> 24; - buf[1] = (address >> 16) & 0xFF; - buf[2] = (address >> 8) & 0xFF; - buf[3] = address & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - return STM32_ERR_OK; -} - -stm32_err_t stm32_reset_device(const stm32_t *stm) -{ - uint32_t target_address = stm->dev->ram_start; - - return stm32_run_raw_code(stm, target_address, stm_reset_code, stm_reset_code_length); -} - -stm32_err_t stm32_crc_memory(const stm32_t *stm, uint32_t address, - uint32_t length, uint32_t *crc) -{ - struct port_interface *port = stm->port; - uint8_t buf[5]; - - if (address & 0x3 || length & 0x3) { - fprintf(stderr, "Start and end addresses must be 4 byte aligned\n"); - return STM32_ERR_UNKNOWN; - } - - if (stm->cmd->crc == STM32_CMD_ERR) { - fprintf(stderr, "Error: CRC command not implemented in bootloader.\n"); - return STM32_ERR_NO_CMD; - } - - if (stm32_send_command(stm, stm->cmd->crc) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = address >> 24; - buf[1] = (address >> 16) & 0xFF; - buf[2] = (address >> 8) & 0xFF; - buf[3] = address & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - buf[0] = length >> 24; - buf[1] = (length >> 16) & 0xFF; - buf[2] = (length >> 8) & 0xFF; - buf[3] = length & 0xFF; - buf[4] = buf[0] ^ buf[1] ^ buf[2] ^ buf[3]; - if (port->write(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (stm32_get_ack(stm) != STM32_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (port->read(port, buf, 5) != PORT_ERR_OK) - return STM32_ERR_UNKNOWN; - - if (buf[4] != (buf[0] ^ buf[1] ^ buf[2] ^ buf[3])) - return STM32_ERR_UNKNOWN; - - *crc = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3]; - return STM32_ERR_OK; -} - -/* - * CRC computed by STM32 is similar to the standard crc32_be() - * implemented, for example, in Linux kernel in ./lib/crc32.c - * But STM32 computes it on units of 32 bits word and swaps the - * bytes of the word before the computation. - * Due to byte swap, I cannot use any CRC available in existing - * libraries, so here is a simple not optimized implementation. - */ -#define CRCPOLY_BE 0x04c11db7 -#define CRC_MSBMASK 0x80000000 -#define CRC_INIT_VALUE 0xFFFFFFFF -uint32_t stm32_sw_crc(uint32_t crc, uint8_t *buf, unsigned int len) -{ - int i; - uint32_t data; - - if (len & 0x3) { - fprintf(stderr, "Buffer length must be multiple of 4 bytes\n"); - return 0; - } - - while (len) { - data = *buf++; - data |= *buf++ << 8; - data |= *buf++ << 16; - data |= *buf++ << 24; - len -= 4; - - crc ^= data; - - for (i = 0; i < 32; i++) - if (crc & CRC_MSBMASK) - crc = (crc << 1) ^ CRCPOLY_BE; - else - crc = (crc << 1); - } - return crc; -} - -stm32_err_t stm32_crc_wrapper(const stm32_t *stm, uint32_t address, - uint32_t length, uint32_t *crc) -{ - uint8_t buf[256]; - uint32_t start, total_len, len, current_crc; - - if (address & 0x3 || length & 0x3) { - fprintf(stderr, "Start and end addresses must be 4 byte aligned\n"); - return STM32_ERR_UNKNOWN; - } - - if (stm->cmd->crc != STM32_CMD_ERR) - return stm32_crc_memory(stm, address, length, crc); - - start = address; - total_len = length; - current_crc = CRC_INIT_VALUE; - while (length) { - len = length > 256 ? 256 : length; - if (stm32_read_memory(stm, address, buf, len) != STM32_ERR_OK) { - fprintf(stderr, - "Failed to read memory at address 0x%08x, target write-protected?\n", - address); - return STM32_ERR_UNKNOWN; - } - current_crc = stm32_sw_crc(current_crc, buf, len); - length -= len; - address += len; - - fprintf(stderr, - "\rCRC address 0x%08x (%.2f%%) ", - address, - (100.0f / (float)total_len) * (float)(address - start) - ); - fflush(stderr); - } - fprintf(stderr, "Done.\n"); - *crc = current_crc; - return STM32_ERR_OK; -} diff --git a/win/src/stm32flash_serial/src/stm32.h b/win/src/stm32flash_serial/src/stm32.h deleted file mode 100644 index 1688fcb4b..000000000 --- a/win/src/stm32flash_serial/src/stm32.h +++ /dev/null @@ -1,84 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _STM32_H -#define _STM32_H - -#include -#include "serial.h" - -#define STM32_MAX_RX_FRAME 256 /* cmd read memory */ -#define STM32_MAX_TX_FRAME (1 + 256 + 1) /* cmd write memory */ - -typedef enum { - STM32_ERR_OK = 0, - STM32_ERR_UNKNOWN, /* Generic error */ - STM32_ERR_NACK, - STM32_ERR_NO_CMD, /* Command not available in bootloader */ -} stm32_err_t; - -typedef struct stm32 stm32_t; -typedef struct stm32_cmd stm32_cmd_t; -typedef struct stm32_dev stm32_dev_t; - -struct stm32 { - const serial_t *serial; - struct port_interface *port; - uint8_t bl_version; - uint8_t version; - uint8_t option1, option2; - uint16_t pid; - stm32_cmd_t *cmd; - const stm32_dev_t *dev; -}; - -struct stm32_dev { - uint16_t id; - const char *name; - uint32_t ram_start, ram_end; - uint32_t fl_start, fl_end; - uint16_t fl_pps; // pages per sector - uint16_t fl_ps; // page size - uint32_t opt_start, opt_end; - uint32_t mem_start, mem_end; -}; - -stm32_t *stm32_init(struct port_interface *port, const char init); -void stm32_close(stm32_t *stm); -stm32_err_t stm32_read_memory(const stm32_t *stm, uint32_t address, - uint8_t data[], unsigned int len); -stm32_err_t stm32_write_memory(const stm32_t *stm, uint32_t address, - const uint8_t data[], unsigned int len); -stm32_err_t stm32_wunprot_memory(const stm32_t *stm); -stm32_err_t stm32_wprot_memory(const stm32_t *stm); -stm32_err_t stm32_erase_memory(const stm32_t *stm, uint8_t spage, - uint8_t pages); -stm32_err_t stm32_go(const stm32_t *stm, uint32_t address); -stm32_err_t stm32_reset_device(const stm32_t *stm); -stm32_err_t stm32_readprot_memory(const stm32_t *stm); -stm32_err_t stm32_runprot_memory(const stm32_t *stm); -stm32_err_t stm32_crc_memory(const stm32_t *stm, uint32_t address, - uint32_t length, uint32_t *crc); -stm32_err_t stm32_crc_wrapper(const stm32_t *stm, uint32_t address, - uint32_t length, uint32_t *crc); -uint32_t stm32_sw_crc(uint32_t crc, uint8_t *buf, unsigned int len); - -#endif - diff --git a/win/src/stm32flash_serial/src/stm32flash.1 b/win/src/stm32flash_serial/src/stm32flash.1 deleted file mode 100644 index d37292f6a..000000000 --- a/win/src/stm32flash_serial/src/stm32flash.1 +++ /dev/null @@ -1,407 +0,0 @@ -.TH STM32FLASH 1 "2013\-11\-03" STM32FLASH "User command" -.SH NAME -stm32flash \- flashing utility for STM32 and STM32W through UART or I2C -.SH SYNOPSIS -.B stm32flash -.RB [ \-cfhjkouvCR ] -.RB [ \-a -.IR bus_address ] -.RB [ \-b -.IR baud_rate ] -.RB [ \-m -.IR serial_mode ] -.RB [ \-r -.IR filename ] -.RB [ \-w -.IR filename ] -.RB [ \-e -.IR num ] -.RB [ \-n -.IR count ] -.RB [ \-g -.IR address ] -.RB [ \-s -.IR start_page ] -.RB [ \-S -.IR address [: length ]] -.RB [ \-F -.IR RX_length [: TX_length ]] -.RB [ \-i -.IR GPIO_string ] -.RI [ tty_device -.R | -.IR i2c_device ] - -.SH DESCRIPTION -.B stm32flash -reads or writes the flash memory of STM32 and STM32W. - -It requires the STM32[W] to embed a bootloader compliant with ST -application note AN3155. -.B stm32flash -uses the serial port -.I tty_device -to interact with the bootloader of STM32[W]. - -.SH OPTIONS -.TP -.BI "\-a" " bus_address" -Specify address on bus for -.IR i2c_device . -This option is mandatory for I2C interface. - -.TP -.BI "\-b" " baud_rate" -Specify baud rate speed of -.IR tty_device . -Please notice that the ST bootloader can automatically detect the baud rate, -as explaned in chapter 2 of AN3155. -This option could be required together with option -.B "\-c" -or if following interaction with bootloader is expected. -Default is -.IR 57600 . - -.TP -.BI "\-m" " mode" -Specify the format of UART data. -.I mode -is a three characters long string where each character specifies, in -this strict order, character size, parity and stop bits. -The only values currenly used are -.I 8e1 -for standard STM32 bootloader and -.I 8n1 -for standard STM32W bootloader. -Default is -.IR 8e1 . - -.TP -.BI "\-r" " filename" -Specify to read the STM32[W] flash and write its content in -.I filename -in raw binary format (see below -.BR "FORMAT CONVERSION" ). - -.TP -.BI "\-w" " filename" -Specify to write the STM32[W] flash with the content of -.IR filename . -File format can be either raw binary or intel hex (see below -.BR "FORMAT CONVERSION" ). -The file format is automatically detected. -To by\-pass format detection and force binary mode (e.g. to -write an intel hex content in STM32[W] flash), use -.B \-f -option. - -.TP -.B \-u -Specify to disable write\-protection from STM32[W] flash. -The STM32[W] will be reset after this operation. - -.TP -.B \-j -Enable the flash read\-protection. - -.TP -.B \-k -Disable the flash read\-protection. - -.TP -.B \-o -Erase only. - -.TP -.BI "\-e" " num" -Specify to erase only -.I num -pages before writing the flash. Default is to erase the whole flash. With -.B \-e 0 -the flash would not be erased. - -.TP -.B \-v -Specify to verify flash content after write operation. - -.TP -.BI "\-n" " count" -Specify to retry failed writes up to -.I count -times. Default is 10 times. - -.TP -.BI "\-g" " address" -Specify address to start execution from (0 = flash start). - -.TP -.BI "\-s" " start_page" -Specify flash page offset (0 = flash start). - -.TP -.BI "\-S" " address" "[:" "length" "]" -Specify start address and optionally length for read/write/erase/crc operations. - -.TP -.BI "\-F" " RX_length" "[:" "TX_length" "]" -Specify the maximum frame size for the current interface. -Due to STM32 bootloader protocol, host will never handle frames bigger than -256 byte in RX or 258 byte in TX. -Due to current code, lowest limit in RX is 20 byte (to read a complete reply -of command GET). Minimum limit in TX is 5 byte, required by protocol. - -.TP -.B \-f -Force binary parser while reading file with -.BR "\-w" "." - -.TP -.B \-h -Show help. - -.TP -.B \-c -Specify to resume the existing UART connection and don't send initial -INIT sequence to detect baud rate. Baud rate must be kept the same as the -existing connection. This is useful if the reset fails. - -.TP -.BI "\-i" " GPIO_string" -Specify the GPIO sequences on the host to force STM32[W] to enter and -exit bootloader mode. GPIO can either be real GPIO connected from host to -STM32[W] beside the UART connection, or UART's modem signals used as -GPIO. (See below -.B BOOTLOADER GPIO SEQUENCE -for the format of -.I GPIO_string -and further explanation). - -.TP -.B \-C -Specify to compute CRC on memory content. -By default the CRC is computed on the whole flash content. -Use -.B "\-S" -to provide different memory address range. - -.TP -.B \-R -Specify to reset the device at exit. -This option is ignored if either -.BR "\-g" "," -.BR "\-j" "," -.B "\-k" -or -.B "\-u" -is also specified. - -.SH BOOTLOADER GPIO SEQUENCE -This feature is currently available on Linux host only. - -As explained in ST application note AN2606, after reset the STM32 will -execute either the application program in user flash or the bootloader, -depending on the level applied at specific pins of STM32 during reset. - -STM32 bootloader is automatically activated by configuring the pins -BOOT0="high" and BOOT1="low" and then by applying a reset. -Application program in user flash is activated by configuring the pin -BOOT0="low" (the level on BOOT1 is ignored) and then by applying a reset. - -When GPIO from host computer are connected to either configuration and -reset pins of STM32, -.B stm32flash -can control the host GPIO to reset STM32 and to force execution of -bootloader or execution of application program. - -The sequence of GPIO values to entry to and exit from bootloader mode is -provided with command line option -.B "\-i" -.IR "GPIO_string" . - -.PD 0 -The format of -.IR "GPIO_string" " is:" -.RS -GPIO_string = [entry sequence][:[exit sequence]] -.P -sequence = [\-]n[,sequence] -.RE -.P -In the above sequences, negative numbers correspond to GPIO at "low" level; -numbers without sign correspond to GPIO at "high" level. -The value "n" can either be the GPIO number on the host system or the -string "rts", "dtr" or "brk". The strings "rts" and "dtr" drive the -corresponding UART's modem lines RTS and DTR as GPIO. -The string "brk" forces the UART to send a BREAK sequence on TX line; -after BREAK the UART is returned in normal "non\-break" mode. -Note: the string "\-brk" has no effect and is ignored. -.PD - -.PD 0 -As example, let's suppose the following connection between host and STM32: -.IP \(bu 2 -host GPIO_3 connected to reset pin of STM32; -.IP \(bu 2 -host GPIO_4 connected to STM32 pin BOOT0; -.IP \(bu 2 -host GPIO_5 connected to STM32 pin BOOT1. -.PD -.P - -In this case, the sequence to enter in bootloader mode is: first put -GPIO_4="high" and GPIO_5="low"; then send reset pulse by GPIO_3="low" -followed by GPIO_3="high". -The corresponding string for -.I GPIO_string -is "4,\-5,\-3,3". - -To exit from bootloade and run the application program, the sequence is: -put GPIO_4="low"; then send reset pulse. -The corresponding string for -.I GPIO_string -is "\-4,\-3,3". - -The complete command line flag is "\-i 4,\-5,\-3,3:\-4,\-3,3". - -STM32W uses pad PA5 to select boot mode; if during reset PA5 is "low" then -STM32W will enter in bootloader mode; if PA5 is "high" it will execute the -program in flash. - -As example, supposing GPIO_3 connected to PA5 and GPIO_2 to STM32W's reset. -The command: -.PD 0 -.RS -stm32flash \-i \-3,\-2,2:3,\-2,2 /dev/ttyS0 -.RE -provides: -.IP \(bu 2 -entry sequence: GPIO_3=low, GPIO_2=low, GPIO_2=high -.IP \(bu 2 -exit sequence: GPIO_3=high, GPIO_2=low, GPIO_2=high -.PD - -.SH EXAMPLES -Get device information: -.RS -.PD 0 -.P -stm32flash /dev/ttyS0 -.PD -.RE - -Write with verify and then start execution: -.RS -.PD 0 -.P -stm32flash \-w filename \-v \-g 0x0 /dev/ttyS0 -.PD -.RE - -Read flash to file: -.RS -.PD 0 -.P -stm32flash \-r filename /dev/ttyS0 -.PD -.RE - -Start execution: -.RS -.PD 0 -.P -stm32flash \-g 0x0 /dev/ttyS0 -.PD -.RE - -Specify: -.PD 0 -.IP \(bu 2 -entry sequence: RTS=low, DTR=low, DTR=high -.IP \(bu 2 -exit sequence: RTS=high, DTR=low, DTR=high -.P -.RS -stm32flash \-i \-rts,\-dtr,dtr:rts,\-dtr,dtr /dev/ttyS0 -.PD -.RE - -.SH FORMAT CONVERSION -Flash images provided by ST or created with ST tools are often in file -format Motorola S\-Record. -Conversion between raw binary, intel hex and Motorola S\-Record can be -done through software package SRecord. - -.SH AUTHORS -The original software package -.B stm32flash -is written by -.I Geoffrey McRae -and is since 2012 maintained by -.IR "Tormod Volden " . - -Man page and extension to STM32W and I2C are written by -.IR "Antonio Borneo " . - -Please report any bugs at the project homepage -http://stm32flash.googlecode.com . - -.SH SEE ALSO -.BR "srec_cat" "(1)," " srec_intel" "(5)," " srec_motorola" "(5)." - -The communication protocol used by ST bootloader is documented in -following ST application notes, depending on communication port. -The current version of -.B stm32flash -only supports -.I UART -and -.I I2C -ports. -.PD 0 -.P -.IP \(bu 2 -AN3154: CAN protocol used in the STM32 bootloader -.P -.RS -http://www.st.com/web/en/resource/technical/document/application_note/CD00264321.pdf -.RE - -.P -.IP \(bu 2 -AN3155: USART protocol used in the STM32(TM) bootloader -.P -.RS -http://www.st.com/web/en/resource/technical/document/application_note/CD00264342.pdf -.RE - -.P -.IP \(bu 2 -AN4221: I2C protocol used in the STM32 bootloader -.P -.RS -http://www.st.com/web/en/resource/technical/document/application_note/DM00072315.pdf -.RE - -.P -.IP \(bu 2 -AN4286: SPI protocol used in the STM32 bootloader -.P -.RS -http://www.st.com/web/en/resource/technical/document/application_note/DM00081379.pdf -.RE - -.PD - - -Boot mode selection for STM32 is documented in ST application note -AN2606, available from the ST website: -.PD 0 -.P -http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf -.PD - -.SH LICENSE -.B stm32flash -is distributed under GNU GENERAL PUBLIC LICENSE Version 2. -Copy of the license is available within the source code in the file -.IR "gpl\-2.0.txt" . diff --git a/win/src/stm32flash_serial/src/utils.c b/win/src/stm32flash_serial/src/utils.c deleted file mode 100644 index 271bb3ed7..000000000 --- a/win/src/stm32flash_serial/src/utils.c +++ /dev/null @@ -1,45 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - -#include -#include "utils.h" - -/* detect CPU endian */ -char cpu_le() { - const uint32_t cpu_le_test = 0x12345678; - return ((const unsigned char*)&cpu_le_test)[0] == 0x78; -} - -uint32_t be_u32(const uint32_t v) { - if (cpu_le()) - return ((v & 0xFF000000) >> 24) | - ((v & 0x00FF0000) >> 8) | - ((v & 0x0000FF00) << 8) | - ((v & 0x000000FF) << 24); - return v; -} - -uint32_t le_u32(const uint32_t v) { - if (!cpu_le()) - return ((v & 0xFF000000) >> 24) | - ((v & 0x00FF0000) >> 8) | - ((v & 0x0000FF00) << 8) | - ((v & 0x000000FF) << 24); - return v; -} diff --git a/win/src/stm32flash_serial/src/utils.h b/win/src/stm32flash_serial/src/utils.h deleted file mode 100644 index a8d37d2d5..000000000 --- a/win/src/stm32flash_serial/src/utils.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - stm32flash - Open Source ST STM32 flash program for *nix - Copyright (C) 2010 Geoffrey McRae - - This program is free software; you can redistribute it and/or - modify it under the terms of the GNU General Public License - as published by the Free Software Foundation; either version 2 - of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. -*/ - - -#ifndef _H_UTILS -#define _H_UTILS - -#include - -char cpu_le(); -uint32_t be_u32(const uint32_t v); -uint32_t le_u32(const uint32_t v); - -#endif diff --git a/win/stlink/Docs/ST-LINK Utility UM.pdf b/win/stlink/Docs/ST-LINK Utility UM.pdf new file mode 100644 index 000000000..55b7fcba3 Binary files /dev/null and b/win/stlink/Docs/ST-LINK Utility UM.pdf differ diff --git a/win/stlink/Docs/STLINK Utility.pdf b/win/stlink/Docs/STLINK Utility.pdf deleted file mode 100644 index c9cf4c3d9..000000000 Binary files a/win/stlink/Docs/STLINK Utility.pdf and /dev/null differ diff --git a/win/stlink/Docs/Software license agreement.pdf b/win/stlink/Docs/Software license agreement.pdf new file mode 100644 index 000000000..6f26ebf69 Binary files /dev/null and b/win/stlink/Docs/Software license agreement.pdf differ diff --git a/win/stlink/Docs/license.txt b/win/stlink/Docs/license.txt deleted file mode 100644 index e18b63ff5..000000000 --- a/win/stlink/Docs/license.txt +++ /dev/null @@ -1,58 +0,0 @@ -SOFTWARE LICENSE AGREEMENT - - -By using this Licensed Software, You are agreeing to be bound by the terms and conditions of this License Agreement. Do not use the Licensed Software until You have read and agreed to the following terms and conditions. The use of the Licensed Software implies automatically the acceptance of the following terms and conditions. Please indicate your acceptance or NON-acceptance by selecting 'I ACCEPT' or 'I DO NOT ACCEPT' as indicated below in the media. - -DEFINITIONS. - -Licensed Software: means the enclosed SOFTWARE LIBRARY, EXAMPLES, PROJECT TEMPLATE and all the related documentation and design tools licensed in the form of object and/or source code as the case maybe. - -Product: means a product or a system that includes or incorporates solely and exclusively an executable version of the Licensed Software and provided further that such Licensed Software executes solely and exclusively on STM32 microcontrollers devices manufactured by or for ST. - -LICENSE. -STMicroelectronics (ST) grants You a non-exclusive, worldwide, non-transferable (whether by assignment or otherwise) non sub-licensable, revocable, royalty-free limited license of the Licensed Software to: -(i) make copies, prepare derivatives works, of the source code version of the Licensed Software for the sole and exclusive purpose of developing executable versions (in object and source code) of such Licensed Software only for use with the Product; -(ii) make copies, prepare derivatives works of the object code versions of the Licensed Software for the sole purpose of designing, developing and manufacturing the Products; -(iii) make, use, sell, offer to sell, lease, hire out, import and export or otherwise distribute Products. - - -OWNERSHIP AND COPYRIGHT. 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ST does not warrant that the use in whole or in part of the Licensed Software will be interrupted or error free, will meet your requirements, or will operate with the combination of hardware and software selected by You. - -You are responsible for determining whether the Licensed Software will be suitable for your intended use or application or will achieve your intended results. - -ST has not authorized anyone to make any representation or warranty for the Licensed Software, and any technical, applications or design information or advice, quality characterization, reliability data or other services provided by ST shall not constitute any representation or warranty by ST or alter this disclaimer or warranty, and in no additional obligations or liabilities shall arise from ST’s providing such information or services. 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In no event ST or its licensors shall be liable to You or any third party for any indirect, special, consequential, incidental, punitive damages or other damages (including but not limited to, the cost of labour, re-qualification, delay, loss of profits, loss of revenues, loss of data, costs of procurement of substitute goods or services or the like) whether based on contract, tort, or any other legal theory, relating to or in connection with the Licensed Software, the documentation or this Agreement, even if ST has been advised of the possibility of such damages. - -In no event shall ST’s liability to You or any third party under this Agreement, including any claim with respect of any third party intellectual property rights, for any cause of action exceed 100 US$. This section does not apply to the extent prohibited by law. For the purposes of this section, any liability of ST shall be treated in the aggregate. - -TERMINATION. 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Neither Party has the authority or power to bind, to contract in the name of or to create a liability for the other in any way or for any purpose. diff --git a/win/stlink/FlashLoader/0x415.stldr b/win/stlink/FlashLoader/0x415.stldr index a1a1cc19d..17429f030 100644 Binary files a/win/stlink/FlashLoader/0x415.stldr and b/win/stlink/FlashLoader/0x415.stldr differ diff --git a/win/stlink/FlashLoader/0x419_DB1M_On.stldr b/win/stlink/FlashLoader/0x419_DB1M_On.stldr index c8cd5c147..2c276bb5a 100644 Binary files a/win/stlink/FlashLoader/0x419_DB1M_On.stldr and b/win/stlink/FlashLoader/0x419_DB1M_On.stldr differ diff --git a/win/stlink/FlashLoader/0x435.stldr b/win/stlink/FlashLoader/0x435.stldr index 823c6cc73..c865f57a8 100644 Binary files a/win/stlink/FlashLoader/0x435.stldr and b/win/stlink/FlashLoader/0x435.stldr differ diff --git a/win/stlink/FlashLoader/0x436.stldr b/win/stlink/FlashLoader/0x436.stldr index a40818f18..e9c88deaa 100644 Binary files a/win/stlink/FlashLoader/0x436.stldr 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a/win/stlink/ST-LINK_CLI.exe b/win/stlink/ST-LINK_CLI.exe index ca98e331e..c9121c794 100644 Binary files a/win/stlink/ST-LINK_CLI.exe and b/win/stlink/ST-LINK_CLI.exe differ diff --git a/win/stlink/ST-LINK_USB_V2_1_Driver/amd64/WdfCoInstaller01009.dll b/win/stlink/ST-LINK_USB_V2_1_Driver/amd64/WdfCoInstaller01009.dll new file mode 100644 index 000000000..1731b962d Binary files /dev/null and b/win/stlink/ST-LINK_USB_V2_1_Driver/amd64/WdfCoInstaller01009.dll differ diff --git a/win/stlink/ST-LINK_USB_V2_1_Driver/amd64/winusbcoinstaller2.dll b/win/stlink/ST-LINK_USB_V2_1_Driver/amd64/winusbcoinstaller2.dll new file mode 100644 index 000000000..30e55025b Binary files /dev/null and b/win/stlink/ST-LINK_USB_V2_1_Driver/amd64/winusbcoinstaller2.dll differ diff --git a/win/stlink/ST-LINK_USB_V2_Driver/dpinst_amd64.exe b/win/stlink/ST-LINK_USB_V2_1_Driver/dpinst_amd64.exe similarity index 100% rename from win/stlink/ST-LINK_USB_V2_Driver/dpinst_amd64.exe rename to win/stlink/ST-LINK_USB_V2_1_Driver/dpinst_amd64.exe diff --git a/win/stlink/ST-LINK_USB_V2_Driver/dpinst_x86.exe b/win/stlink/ST-LINK_USB_V2_1_Driver/dpinst_x86.exe similarity index 100% rename from win/stlink/ST-LINK_USB_V2_Driver/dpinst_x86.exe rename to win/stlink/ST-LINK_USB_V2_1_Driver/dpinst_x86.exe diff --git a/win/stlink/ST-LINK_USB_V2_Driver/stlink_VCP.inf b/win/stlink/ST-LINK_USB_V2_1_Driver/stlink_VCP.inf similarity index 96% rename from win/stlink/ST-LINK_USB_V2_Driver/stlink_VCP.inf rename to win/stlink/ST-LINK_USB_V2_1_Driver/stlink_VCP.inf index 209c3c2da..8805bd73e 100644 --- a/win/stlink/ST-LINK_USB_V2_Driver/stlink_VCP.inf +++ b/win/stlink/ST-LINK_USB_V2_1_Driver/stlink_VCP.inf @@ -1,74 +1,74 @@ - -; -; Installs the Virtual COM port interface of ST-Link based composite devices. -; - -[Version] -Signature = "$Windows NT$" -Class = Ports -ClassGUID = {4D36E978-E325-11CE-BFC1-08002BE10318} -Provider = %ManufacturerName% -CatalogFile.NTx86 = STLinkVCP_x86.cat -CatalogFile.NTAMD64 = STLinkVCP_x64.cat -DriverVer=12/10/2013,1.0 - -; ========== Manufacturer/Models sections =========== - -[Manufacturer] -%ManufacturerName% = Standard,NTx86,NTamd64 - -; List of devices supporting the Virtual COM port (with the corresponding interface ID) -[Standard.NTx86] -%DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_374A&MI_02 -%DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_374B&MI_02 -%DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_374C&MI_01 - -[Standard.NTamd64] -%DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_374A&MI_02 -%DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_374B&MI_02 -%DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_374C&MI_01 - -; ========== Class definition =========== - -[ClassInstall32] -AddReg = ClassInstall_AddReg - -[ClassInstall_AddReg] -HKR,,,,%ClassName% -HKR,,NoInstallClass,,1 -HKR,,IconPath,%REG_MULTI_SZ%,"%systemroot%\system32\setupapi.dll,-20" -HKR,,LowerLogoVersion,,5.2 - -; =================== Installation =================== - -[USB_InstallVCP] -Include = mdmcpq.inf -CopyFiles = FakeModemCopyFileSection -AddReg = USB_InstallVCP.AddReg - -[USB_InstallVCP.AddReg] -HKR,,DevLoader,,*ntkern -HKR,,NTMPDriver,,usbser.sys -HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider" - -[USB_InstallVCP.Services] -AddService=usbser, 0x00000002, DriverService - -[DriverService] -DisplayName=%DeviceNameVCP% -ServiceType=1 -StartType=3 -ErrorControl=1 -ServiceBinary=%12%\usbser.sys - -; [DestinationDirs] -; If your INF needs to copy files, you must not use the DefaultDestDir directive here. -; You must explicitly reference all file-list-section names in this section. - -; =================== Strings =================== - -[Strings] -ManufacturerName="STMicroelectronics" -ClassName="Universal Serial Bus devices" -DeviceNameVCP="STMicroelectronics STLink Virtual COM Port" -REG_MULTI_SZ = 0x00010000 + +; +; Installs the Virtual COM port interface of ST-Link based composite devices. +; + +[Version] +Signature = "$Windows NT$" +Class = Ports +ClassGUID = {4D36E978-E325-11CE-BFC1-08002BE10318} +Provider = %ManufacturerName% +CatalogFile.NTx86 = STLinkVCP_x86.cat +CatalogFile.NTAMD64 = STLinkVCP_x64.cat +DriverVer=12/10/2013,1.0 + +; ========== Manufacturer/Models sections =========== + +[Manufacturer] +%ManufacturerName% = Standard,NTx86,NTamd64 + +; List of devices supporting the Virtual COM port (with the corresponding interface ID) +[Standard.NTx86] +%DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_374A&MI_02 +%DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_374B&MI_02 +%DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_374C&MI_01 + +[Standard.NTamd64] +%DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_374A&MI_02 +%DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_374B&MI_02 +%DeviceNameVCP% =USB_InstallVCP, USB\VID_0483&PID_374C&MI_01 + +; ========== Class definition =========== + +[ClassInstall32] +AddReg = ClassInstall_AddReg + +[ClassInstall_AddReg] +HKR,,,,%ClassName% +HKR,,NoInstallClass,,1 +HKR,,IconPath,%REG_MULTI_SZ%,"%systemroot%\system32\setupapi.dll,-20" +HKR,,LowerLogoVersion,,5.2 + +; =================== Installation =================== + +[USB_InstallVCP] +Include = mdmcpq.inf +CopyFiles = FakeModemCopyFileSection +AddReg = USB_InstallVCP.AddReg + +[USB_InstallVCP.AddReg] +HKR,,DevLoader,,*ntkern +HKR,,NTMPDriver,,usbser.sys +HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider" + +[USB_InstallVCP.Services] +AddService=usbser, 0x00000002, DriverService + +[DriverService] +DisplayName=%DeviceNameVCP% +ServiceType=1 +StartType=3 +ErrorControl=1 +ServiceBinary=%12%\usbser.sys + +; [DestinationDirs] +; If your INF needs to copy files, you must not use the DefaultDestDir directive here. +; You must explicitly reference all file-list-section names in this section. + +; =================== Strings =================== + +[Strings] +ManufacturerName="STMicroelectronics" +ClassName="Universal Serial Bus devices" +DeviceNameVCP="STMicroelectronics STLink Virtual COM Port" +REG_MULTI_SZ = 0x00010000 diff --git a/win/stlink/ST-LINK_USB_V2_Driver/stlink_dbg_winusb.inf b/win/stlink/ST-LINK_USB_V2_1_Driver/stlink_dbg_winusb.inf similarity index 81% rename from win/stlink/ST-LINK_USB_V2_Driver/stlink_dbg_winusb.inf rename to win/stlink/ST-LINK_USB_V2_1_Driver/stlink_dbg_winusb.inf index 18b3dfd3a..deb8434f0 100644 --- a/win/stlink/ST-LINK_USB_V2_Driver/stlink_dbg_winusb.inf +++ b/win/stlink/ST-LINK_USB_V2_1_Driver/stlink_dbg_winusb.inf @@ -1,120 +1,135 @@ -; -; Installation INF for the STMicroelectronics STLINK for Windows XP SP2 or later. -; - -[Version] -Signature = "$Windows NT$" -Class = STLinkWinUSB -ClassGUID = {88BAE032-5A81-49f0-BC3D-A4FF138216D6} -Provider = %ManufacturerName% -CatalogFile.NTx86 = STLinkDbgWinUSB_x86.cat -CatalogFile.NTAMD64 = STLinkDbgWinUSB_x64.cat -DriverVer=12/10/2013,1.01 - -; ========== Manufacturer/Models sections =========== - -[Manufacturer] -%ManufacturerName% = Standard,NTx86,NTamd64 - -[Standard.NTx86] -%DeviceName% =USB_Install, USB\VID_0483&PID_3748 -%DeviceName% =USB_Install, USB\VID_0483&PID_374A&MI_00 -%DeviceName% =USB_Install, USB\VID_0483&PID_374B&MI_00 -%DeviceNameRW% =USB_InstallRW, USB\VID_0483&PID_374A&MI_01 - -[Standard.NTamd64] -%DeviceName% =USB_Install, USB\VID_0483&PID_3748 -%DeviceName% =USB_Install, USB\VID_0483&PID_374A&MI_00 -%DeviceName% =USB_Install, USB\VID_0483&PID_374B&MI_00 -%DeviceNameRW% =USB_InstallRW, USB\VID_0483&PID_374A&MI_01 - -; ========== Class definition =========== - -[ClassInstall32] -AddReg = ClassInstall_AddReg - -[ClassInstall_AddReg] -HKR,,,,%ClassName% -HKR,,NoInstallClass,,1 -HKR,,IconPath,%REG_MULTI_SZ%,"%systemroot%\system32\setupapi.dll,-20" -HKR,,LowerLogoVersion,,5.2 - -; =================== Installation =================== - -[USB_Install] -Include = winusb.inf -Needs = WINUSB.NT - -[USB_InstallRW] -Include = winusb.inf -Needs = WINUSB.NT - -[USB_Install.Services] -Include =winusb.inf -Addservice = WinUSB, 0x00000002, WinUSB_ServiceInstall - -[USB_InstallRW.Services] -Include =winusb.inf -Addservice = WinUSB, 0x00000002, WinUSB_ServiceInstall - -[WinUSB_ServiceInstall] -DisplayName = %WinUSB_SvcDesc% -ServiceType = 1 ; SERVICE_KERNEL_DRIVER -StartType = 3 ; SERVICE_DEMAND_START -ErrorControl = 1 ; SERVICE_ERROR_NORMAL -ServiceBinary = %12%\WinUSB.sys - -[USB_Install.Wdf] -KmdfService=WINUSB, WinUsb_Install - -[USB_InstallRW.Wdf] -KmdfService=WINUSB, WinUsb_Install - -[WinUsb_Install] -KmdfLibraryVersion=1.9 - -[WinUsb_InstallRW] -KmdfLibraryVersion=1.9 - -[USB_Install.HW] -AddReg=Dev_AddReg - -[USB_InstallRW.HW] -AddReg=Dev_AddRegRW - -[Dev_AddReg] -HKR,,DeviceInterfaceGUIDs,0x10000,%STLink_GUID% - -[Dev_AddRegRW] -HKR,,DeviceInterfaceGUIDs,0x10000,%STLink_GUID_RW% - -[USB_Install.CoInstallers] -AddReg=CoInstallers_AddReg -%11%/WinUSBCoInstaller2.dll -%11%/WdfCoInstaller01009.dll - -[USB_InstallRW.CoInstallers] -AddReg=CoInstallers_AddReg -%11%/WinUSBCoInstaller2.dll -%11%/WdfCoInstaller01009.dll - -[CoInstallers_AddReg] -HKR,,CoInstallers32,0x00010000,"WdfCoInstaller01009.dll,WdfCoInstaller","WinUSBCoInstaller2.dll" - -; [DestinationDirs] -; If your INF needs to copy files, you must not use the DefaultDestDir directive here. -; You must explicitly reference all file-list-section names in this section. - -; =================== Strings =================== - -[Strings] -ManufacturerName="STMicroelectronics" -ClassName="Universal Serial Bus devices" -DeviceName="STMicroelectronics STLink dongle" -DeviceNameRW="STMicroelectronics STLink dongle RW" -WinUSB_SvcDesc="WinUSB Driver for STLink" -REG_MULTI_SZ = 0x00010000 - -;------------Replace GUID below with custom GUID-------------; -STLink_GUID="{DBCE1CD9-A320-4b51-A365-A0C3F3C5FB29}" -STLink_GUID_RW="{8326506F-7260-4854-9C03-26E416F04494}" +; +; Installation INF for the STMicroelectronics STLINK for Windows XP SP2 or later. +; + +[Version] +Signature = "$Windows NT$" +Class = STLinkWinUSB +ClassGUID = {88BAE032-5A81-49f0-BC3D-A4FF138216D6} +Provider = %ManufacturerName% +CatalogFile.NTx86 = STLinkDbgWinUSB_x86.cat +CatalogFile.NTAMD64 = STLinkDbgWinUSB_x64.cat +DriverVer=01/21/2013,1.01 + +; ========== Manufacturer/Models sections =========== + +[Manufacturer] +%ManufacturerName% = Standard,NTx86,NTamd64 + +[Standard.NTx86] +%DeviceName% =USB_Install, USB\VID_0483&PID_3748 +%DeviceName% =USB_Install, USB\VID_0483&PID_374A&MI_00 +%DeviceName% =USB_Install, USB\VID_0483&PID_374B&MI_00 +%DeviceNameRW% =USB_InstallRW, USB\VID_0483&PID_374A&MI_01 + +[Standard.NTamd64] +%DeviceName% =USB_Install, USB\VID_0483&PID_3748 +%DeviceName% =USB_Install, USB\VID_0483&PID_374A&MI_00 +%DeviceName% =USB_Install, USB\VID_0483&PID_374B&MI_00 +%DeviceNameRW% =USB_InstallRW, USB\VID_0483&PID_374A&MI_01 + +; ========== Class definition =========== + +[ClassInstall32] +AddReg = ClassInstall_AddReg + +[ClassInstall_AddReg] +HKR,,,,%ClassName% +HKR,,NoInstallClass,,1 +HKR,,IconPath,%REG_MULTI_SZ%,"%systemroot%\system32\setupapi.dll,-20" +HKR,,LowerLogoVersion,,5.2 + +; =================== Installation =================== + +[USB_Install] +Include = winusb.inf +Needs = WINUSB.NT + +[USB_InstallRW] +Include = winusb.inf +Needs = WINUSB.NT + +[USB_Install.Services] +Include =winusb.inf +Addservice = WinUSB, 0x00000002, WinUSB_ServiceInstall + +[USB_InstallRW.Services] +Include =winusb.inf +Addservice = WinUSB, 0x00000002, WinUSB_ServiceInstall + +[WinUSB_ServiceInstall] +DisplayName = %WinUSB_SvcDesc% +ServiceType = 1 ; SERVICE_KERNEL_DRIVER +StartType = 3 ; SERVICE_DEMAND_START +ErrorControl = 1 ; SERVICE_ERROR_NORMAL +ServiceBinary = %12%\WinUSB.sys + +[USB_Install.Wdf] +KmdfService=WINUSB, WinUsb_Install + +[USB_InstallRW.Wdf] +KmdfService=WINUSB, WinUsb_Install + +[WinUsb_Install] +KmdfLibraryVersion=1.9 + +[USB_Install.HW] +AddReg=Dev_AddReg + +[USB_InstallRW.HW] +AddReg=Dev_AddRegRW + +[Dev_AddReg] +HKR,,DeviceInterfaceGUIDs,0x10000,%STLink_GUID% + +[Dev_AddRegRW] +HKR,,DeviceInterfaceGUIDs,0x10000,%STLink_GUID_RW% + +[USB_Install.CoInstallers] +AddReg=CoInstallers_AddReg +CopyFiles=CoInstallers_CopyFiles + +[USB_InstallRW.CoInstallers] +AddReg=CoInstallers_AddReg +CopyFiles=CoInstallers_CopyFiles + +[CoInstallers_CopyFiles] +WinUSBCoInstaller2.dll +WdfCoInstaller01009.dll + +[CoInstallers_AddReg] +HKR,,CoInstallers32,0x00010000,"WdfCoInstaller01009.dll,WdfCoInstaller","WinUSBCoInstaller2.dll" + +[DestinationDirs] +; If your INF needs to copy files, you must not use the DefaultDestDir directive here. +; You must explicitly reference all file-list-section names in this section. +CoInstallers_CopyFiles=11 + +; ================= Source Media Section ===================== + +[SourceDisksNames] +1 = %DISK_NAME%,,,\x86 +2 = %DISK_NAME%,,,\amd64 + +[SourceDisksFiles.x86] +WinUSBCoInstaller2.dll=1 +WdfCoInstaller01009.dll=1 + +[SourceDisksFiles.amd64] +WinUSBCoInstaller2.dll=2 +WdfCoInstaller01009.dll=2 + +; =================== Strings =================== + +[Strings] +ManufacturerName="STMicroelectronics" +ClassName="Universal Serial Bus devices" +DeviceName="STMicroelectronics STLink dongle" +DeviceNameRW="STMicroelectronics STLink dongle RW" +WinUSB_SvcDesc="WinUSB Driver for STLink" +REG_MULTI_SZ = 0x00010000 +DISK_NAME="WinUSB coinstallers sources on disk" + +;------------Replace GUID below with custom GUID-------------; +STLink_GUID="{DBCE1CD9-A320-4b51-A365-A0C3F3C5FB29}" +STLink_GUID_RW="{8326506F-7260-4854-9C03-26E416F04494}" diff --git a/win/stlink/ST-LINK_USB_V2_Driver/stlink_winusb_install.bat b/win/stlink/ST-LINK_USB_V2_1_Driver/stlink_winusb_install.bat similarity index 94% rename from win/stlink/ST-LINK_USB_V2_Driver/stlink_winusb_install.bat rename to win/stlink/ST-LINK_USB_V2_1_Driver/stlink_winusb_install.bat index 59a3090cc..dccbe947e 100644 --- a/win/stlink/ST-LINK_USB_V2_Driver/stlink_winusb_install.bat +++ b/win/stlink/ST-LINK_USB_V2_1_Driver/stlink_winusb_install.bat @@ -1,8 +1,8 @@ -@echo off -if "%PROCESSOR_ARCHITEW6432%" == "AMD64" goto X64 -if "%PROCESSOR_ARCHITECTURE%" == "AMD64" goto X64 -start "" dpinst_x86.exe -goto END -:X64 -start "" dpinst_amd64.exe -:END +@echo off +if "%PROCESSOR_ARCHITEW6432%" == "AMD64" goto X64 +if "%PROCESSOR_ARCHITECTURE%" == "AMD64" goto X64 +start "" dpinst_x86.exe +goto END +:X64 +start "" dpinst_amd64.exe +:END \ No newline at end of file diff --git a/win/stlink/ST-LINK_USB_V2_Driver/stlinkdbgwinusb_x64.cat b/win/stlink/ST-LINK_USB_V2_1_Driver/stlinkdbgwinusb_x64.cat similarity index 69% rename from win/stlink/ST-LINK_USB_V2_Driver/stlinkdbgwinusb_x64.cat rename to win/stlink/ST-LINK_USB_V2_1_Driver/stlinkdbgwinusb_x64.cat index 2c04b7bfa..b4e906491 100644 Binary files a/win/stlink/ST-LINK_USB_V2_Driver/stlinkdbgwinusb_x64.cat and b/win/stlink/ST-LINK_USB_V2_1_Driver/stlinkdbgwinusb_x64.cat differ diff --git a/win/stlink/ST-LINK_USB_V2_Driver/stlinkdbgwinusb_x86.cat b/win/stlink/ST-LINK_USB_V2_1_Driver/stlinkdbgwinusb_x86.cat similarity index 69% rename from win/stlink/ST-LINK_USB_V2_Driver/stlinkdbgwinusb_x86.cat rename to win/stlink/ST-LINK_USB_V2_1_Driver/stlinkdbgwinusb_x86.cat index 2f3e80e2e..3d7e801eb 100644 Binary files a/win/stlink/ST-LINK_USB_V2_Driver/stlinkdbgwinusb_x86.cat and b/win/stlink/ST-LINK_USB_V2_1_Driver/stlinkdbgwinusb_x86.cat differ diff --git a/win/stlink/ST-LINK_USB_V2_Driver/stlinkvcp_x64.cat b/win/stlink/ST-LINK_USB_V2_1_Driver/stlinkvcp_x64.cat similarity index 100% rename from win/stlink/ST-LINK_USB_V2_Driver/stlinkvcp_x64.cat rename to win/stlink/ST-LINK_USB_V2_1_Driver/stlinkvcp_x64.cat diff --git a/win/stlink/ST-LINK_USB_V2_Driver/stlinkvcp_x86.cat b/win/stlink/ST-LINK_USB_V2_1_Driver/stlinkvcp_x86.cat similarity index 100% rename from win/stlink/ST-LINK_USB_V2_Driver/stlinkvcp_x86.cat rename to win/stlink/ST-LINK_USB_V2_1_Driver/stlinkvcp_x86.cat diff --git a/win/stlink/ST-LINK_USB_V2_1_Driver/x86/WdfCoInstaller01009.dll b/win/stlink/ST-LINK_USB_V2_1_Driver/x86/WdfCoInstaller01009.dll new file mode 100644 index 000000000..30e81af62 Binary files /dev/null and b/win/stlink/ST-LINK_USB_V2_1_Driver/x86/WdfCoInstaller01009.dll differ diff --git a/win/stlink/ST-LINK_USB_V2_1_Driver/x86/winusbcoinstaller2.dll b/win/stlink/ST-LINK_USB_V2_1_Driver/x86/winusbcoinstaller2.dll new file mode 100644 index 000000000..fc450d2b2 Binary files /dev/null and b/win/stlink/ST-LINK_USB_V2_1_Driver/x86/winusbcoinstaller2.dll differ diff --git a/win/stlink/ST-LINK_USB_V2_Driver/stlink_winusb_uninstall.bat b/win/stlink/ST-LINK_USB_V2_Driver/stlink_winusb_uninstall.bat deleted file mode 100644 index 5f91323fc..000000000 --- a/win/stlink/ST-LINK_USB_V2_Driver/stlink_winusb_uninstall.bat +++ /dev/null @@ -1,9 +0,0 @@ -@echo off -if "%PROCESSOR_ARCHITECTURE%"=="x86" goto X86 -dpinst_amd64.exe /u stlink_dbg_winusb.inf -dpinst_amd64.exe /u stlink_VCP.inf -goto END -:X86 -dpinst_x86.exe /u stlink_dbg_winusb.inf -dpinst_x86.exe /u stlink_VCP.inf -:END diff --git a/win/stlink/STLinkUSBDriver.dll b/win/stlink/STLinkUSBDriver.dll index ea88bba60..e25fc7e8b 100644 Binary files a/win/stlink/STLinkUSBDriver.dll and b/win/stlink/STLinkUSBDriver.dll differ diff --git a/win/stlink_upload.bat b/win/stlink_upload.bat index 45008d1b2..3ef99c842 100644 --- a/win/stlink_upload.bat +++ b/win/stlink_upload.bat @@ -14,6 +14,3 @@ rem: ------------- use STLINK CLI rem: echo "" is mandatory to exit ST-Link_CLI tools w 3.0.0.0 when "-Run" option is used, rem: it now wait Enter key press to quit. echo "" | stlink\ST-LINK_CLI.exe -c SWD -P %str% 0x8000000 -Rst -Run - -rem: Using the open source texane-stlink instead of the proprietary STM stlink exe -rem:texane-stlink\st-flash.exe write %str% 0x8000000 \ No newline at end of file diff --git a/win/stm32flash.exe b/win/stm32flash.exe deleted file mode 100644 index 911c0cc05..000000000 Binary files a/win/stm32flash.exe and /dev/null differ diff --git a/win/stm32flash/stm32flash.exe b/win/stm32flash/stm32flash.exe new file mode 100644 index 000000000..13c90779d Binary files /dev/null and b/win/stm32flash/stm32flash.exe differ diff --git a/win/stm32flash/stm32flash64.exe b/win/stm32flash/stm32flash64.exe new file mode 100644 index 000000000..63c527247 Binary files /dev/null and b/win/stm32flash/stm32flash64.exe differ diff --git a/win/stm32loader.py b/win/stm32loader.py deleted file mode 100644 index 72602bbc5..000000000 --- a/win/stm32loader.py +++ /dev/null @@ -1,537 +0,0 @@ -#!/usr/bin/env python - -# -*- coding: utf-8 -*- -# vim: sw=4:ts=4:si:et:enc=utf-8 - -# Author: Ivan A-R -# Project page: http://tuxotronic.org/wiki/projects/stm32loader -# -# This file is part of stm32loader. -# -# stm32loader is free software; you can redistribute it and/or modify it under -# the terms of the GNU General Public License as published by the Free -# Software Foundation; either version 3, or (at your option) any later -# version. -# -# stm32loader is distributed in the hope that it will be useful, but WITHOUT ANY -# WARRANTY; without even the implied warranty of MERCHANTABILITY or -# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -# for more details. -# -# You should have received a copy of the GNU General Public License -# along with stm32loader; see the file COPYING3. If not see -# . - -from __future__ import print_function - -import sys, getopt -import serial -import time -import glob -import time -import tempfile -import os -import subprocess - -try: - from progressbar import * - usepbar = 1 -except: - usepbar = 0 - -# Verbose level -QUIET = 5 - -def mdebug(level, message): - if QUIET >= level: - print(message, file=sys.stderr) - -# Takes chip IDs (obtained via Get ID command) to human-readable names -CHIP_ID_STRS = {0x410: 'STM32F1, performance, medium-density', - 0x411: 'STM32F2', - 0x412: 'STM32F1, performance, low-density', - 0x413: 'STM32F4', - 0x414: 'STM32F1, performance, high-density', - 0x416: 'STM32L1, performance, medium-density', - 0x418: 'STM32F1, connectivity', - 0x420: 'STM32F1, value, medium-density', - 0x428: 'STM32F1, value, high-density', - 0x430: 'STM32F1, performance, XL-density'} - -class CmdException(Exception): - pass - -class CommandInterface(object): - def open(self, aport='/dev/tty.usbserial-FTD3TMCH', abaudrate=115200) : - self.sp = serial.Serial( - port=aport, - baudrate=abaudrate, # baudrate - bytesize=8, # number of databits - parity=serial.PARITY_EVEN, - stopbits=1, - xonxoff=0, # enable software flow control - rtscts=0, # disable RTS/CTS flow control - timeout=0.5 # set a timeout value, None for waiting forever - ) - - - def _wait_for_ack(self, info="", timeout=0): - stop = time.time() + timeout - got = None - while not got: - got = self.sp.read(1) - if time.time() > stop: - break - - if not got: - raise CmdException("No response to %s" % info) - - # wait for ask - ask = ord(got) - - if ask == 0x79: - # ACK - return 1 - elif ask == 0x1F: - # NACK - raise CmdException("Chip replied with a NACK during %s" % info) - - # Unknown response - raise CmdException("Unrecognised response 0x%x to %s" % (ask, info)) - - def reset(self): - self.sp.setDTR(0) - time.sleep(0.1) - self.sp.setDTR(1) - time.sleep(0.5) - - def initChip(self): - # Set boot - self.sp.setRTS(0) - self.reset() - - # Be a bit more persistent when trying to initialise the chip - stop = time.time() + 5.0 - - while time.time() <= stop: - self.sp.write('\x7f') - - got = self.sp.read() - - # The chip will ACK a sync the very first time and - # NACK it every time afterwards - if got and got in '\x79\x1f': - # Synced up - return - - raise CmdException('No response while trying to sync') - - def releaseChip(self): - self.sp.setRTS(1) - self.reset() - - def cmdGeneric(self, cmd): - self.sp.write(chr(cmd)) - self.sp.write(chr(cmd ^ 0xFF)) # Control byte - return self._wait_for_ack(hex(cmd)) - - def cmdGet(self): - if self.cmdGeneric(0x00): - mdebug(10, "*** Get command"); - len = ord(self.sp.read()) - version = ord(self.sp.read()) - mdebug(10, " Bootloader version: "+hex(version)) - dat = map(lambda c: hex(ord(c)), self.sp.read(len)) - mdebug(10, " Available commands: "+str(dat)) - self._wait_for_ack("0x00 end") - return version - else: - raise CmdException("Get (0x00) failed") - - def cmdGetVersion(self): - if self.cmdGeneric(0x01): - mdebug(10, "*** GetVersion command") - version = ord(self.sp.read()) - self.sp.read(2) - self._wait_for_ack("0x01 end") - mdebug(10, " Bootloader version: "+hex(version)) - return version - else: - raise CmdException("GetVersion (0x01) failed") - - def cmdGetID(self): - if self.cmdGeneric(0x02): - mdebug(10, "*** GetID command") - len = ord(self.sp.read()) - id = self.sp.read(len+1) - self._wait_for_ack("0x02 end") - return id - else: - raise CmdException("GetID (0x02) failed") - - - def _encode_addr(self, addr): - byte3 = (addr >> 0) & 0xFF - byte2 = (addr >> 8) & 0xFF - byte1 = (addr >> 16) & 0xFF - byte0 = (addr >> 24) & 0xFF - crc = byte0 ^ byte1 ^ byte2 ^ byte3 - return (chr(byte0) + chr(byte1) + chr(byte2) + chr(byte3) + chr(crc)) - - - def cmdReadMemory(self, addr, lng): - assert(lng <= 256) - if self.cmdGeneric(0x11): - mdebug(10, "*** ReadMemory command") - self.sp.write(self._encode_addr(addr)) - self._wait_for_ack("0x11 address failed") - N = (lng - 1) & 0xFF - crc = N ^ 0xFF - self.sp.write(chr(N) + chr(crc)) - self._wait_for_ack("0x11 length failed") - return map(lambda c: ord(c), self.sp.read(lng)) - else: - raise CmdException("ReadMemory (0x11) failed") - - - def cmdGo(self, addr): - if self.cmdGeneric(0x21): - mdebug(10, "*** Go command") - self.sp.write(self._encode_addr(addr)) - self._wait_for_ack("0x21 go failed") - else: - raise CmdException("Go (0x21) failed") - - - def cmdWriteMemory(self, addr, data): - assert(len(data) <= 256) - if self.cmdGeneric(0x31): - mdebug(10, "*** Write memory command") - self.sp.write(self._encode_addr(addr)) - self._wait_for_ack("0x31 address failed") - #map(lambda c: hex(ord(c)), data) - lng = (len(data)-1) & 0xFF - mdebug(10, " %s bytes to write" % [lng+1]); - self.sp.write(chr(lng)) # len really - crc = 0xFF - for c in data: - crc = crc ^ c - self.sp.write(chr(c)) - self.sp.write(chr(crc)) - self._wait_for_ack("0x31 programming failed") - mdebug(10, " Write memory done") - else: - raise CmdException("Write memory (0x31) failed") - - - def cmdEraseMemory(self, sectors = None): - if self.cmdGeneric(0x43): - mdebug(10, "*** Erase memory command") - if sectors is None: - # Global erase - self.sp.write(chr(0xFF)) - self.sp.write(chr(0x00)) - else: - # Sectors erase - self.sp.write(chr((len(sectors)-1) & 0xFF)) - crc = 0xFF - for c in sectors: - crc = crc ^ c - self.sp.write(chr(c)) - self.sp.write(chr(crc)) - self._wait_for_ack("0x43 erasing failed") - mdebug(10, " Erase memory done") - else: - raise CmdException("Erase memory (0x43) failed") - - - # TODO support for non-global mass erase - GLOBAL_ERASE_TIMEOUT_SECONDS = 20 # This takes a while - def cmdExtendedEraseMemory(self): - if self.cmdGeneric(0x44): - mdebug(10, "*** Extended erase memory command") - # Global mass erase - mdebug(5, "Global mass erase; this may take a while") - self.sp.write(chr(0xFF)) - self.sp.write(chr(0xFF)) - # Checksum - self.sp.write(chr(0x00)) - self._wait_for_ack("0x44 extended erase failed", - timeout=self.GLOBAL_ERASE_TIMEOUT_SECONDS) - mdebug(10, " Extended erase memory done") - else: - raise CmdException("Extended erase memory (0x44) failed") - - - def cmdWriteProtect(self, sectors): - if self.cmdGeneric(0x63): - mdebug(10, "*** Write protect command") - self.sp.write(chr((len(sectors)-1) & 0xFF)) - crc = 0xFF - for c in sectors: - crc = crc ^ c - self.sp.write(chr(c)) - self.sp.write(chr(crc)) - self._wait_for_ack("0x63 write protect failed") - mdebug(10, " Write protect done") - else: - raise CmdException("Write Protect memory (0x63) failed") - - def cmdWriteUnprotect(self): - if self.cmdGeneric(0x73): - mdebug(10, "*** Write Unprotect command") - self._wait_for_ack("0x73 write unprotect failed") - self._wait_for_ack("0x73 write unprotect 2 failed") - mdebug(10, " Write Unprotect done") - else: - raise CmdException("Write Unprotect (0x73) failed") - - def cmdReadoutProtect(self): - if self.cmdGeneric(0x82): - mdebug(10, "*** Readout protect command") - self._wait_for_ack("0x82 readout protect failed") - self._wait_for_ack("0x82 readout protect 2 failed") - mdebug(10, " Read protect done") - else: - raise CmdException("Readout protect (0x82) failed") - - def cmdReadoutUnprotect(self): - if self.cmdGeneric(0x92): - mdebug(10, "*** Readout Unprotect command") - self._wait_for_ack("0x92 readout unprotect failed") - self._wait_for_ack("0x92 readout unprotect 2 failed") - mdebug(10, " Read Unprotect done") - else: - raise CmdException("Readout unprotect (0x92) failed") - - -# Complex commands section - - def readMemory(self, addr, lng): - data = [] - if usepbar: - widgets = ['Reading: ', Percentage(),', ', ETA(), ' ', Bar()] - pbar = ProgressBar(widgets=widgets,maxval=lng, term_width=79).start() - - while lng > 256: - if usepbar: - pbar.update(pbar.maxval-lng) - else: - mdebug(5, "Read %(len)d bytes at 0x%(addr)X" % {'addr': addr, 'len': 256}) - data = data + self.cmdReadMemory(addr, 256) - addr = addr + 256 - lng = lng - 256 - if usepbar: - pbar.update(pbar.maxval-lng) - pbar.finish() - else: - mdebug(5, "Read %(len)d bytes at 0x%(addr)X" % {'addr': addr, 'len': 256}) - data = data + self.cmdReadMemory(addr, lng) - return data - - def writeMemory(self, addr, data): - lng = len(data) - - mdebug(5, "Writing %(lng)d bytes to start address 0x%(addr)X" % - { 'lng': lng, 'addr': addr}) - - if usepbar: - widgets = ['Writing: ', Percentage(),' ', ETA(), ' ', Bar()] - pbar = ProgressBar(widgets=widgets, maxval=lng, term_width=79).start() - - offs = 0 - while lng > 256: - if usepbar: - pbar.update(pbar.maxval-lng) - else: - mdebug(5, "Write %(len)d bytes at 0x%(addr)X" % {'addr': addr, 'len': 256}) - self.cmdWriteMemory(addr, data[offs:offs+256]) - offs = offs + 256 - addr = addr + 256 - lng = lng - 256 - if usepbar: - pbar.update(pbar.maxval-lng) - pbar.finish() - else: - mdebug(5, "Write %(len)d bytes at 0x%(addr)X" % {'addr': addr, 'len': 256}) - self.cmdWriteMemory(addr, data[offs:offs+lng] + ([0xFF] * (256-lng)) ) - - -def usage(): - print("""Usage: %s [-hqVewvr] [-l length] [-p port] [-b baud] [-a addr] [file.bin] - -h This help - -q Quiet - -V Verbose - -e Erase - -w Write - -v Verify - -r Read - -l length Length of read - -p port Serial port (default: first USB-like port in /dev) - -b baud Baud speed (default: 115200) - -a addr Target address - - ./stm32loader.py -e -w -v example/main.bin - - """ % sys.argv[0]) - -def read(filename): - """Read the file to be programmed and turn it into a binary""" - with open(filename, 'rb') as f: - bytes = f.read() - - if bytes.startswith('\x7FELF'): - # Actually an ELF file. Convert to binary - handle, path = tempfile.mkstemp(suffix='.bin', prefix='stm32loader') - - try: - os.close(handle) - - # Try a couple of options for objcopy - for name in ['arm-none-eabi-objcopy', 'arm-linux-gnueabi-objcopy']: - try: - code = subprocess.call([name, '-Obinary', filename, path]) - - if code == 0: - return read(path) - except OSError: - pass - else: - raise Exception('Error %d while converting to a binary file' % code) - finally: - # Remove the temporary file - os.unlink(path) - else: - return [ord(x) for x in bytes] - -if __name__ == "__main__": - - conf = { - 'port': 'auto', - 'baud': 115200, - 'address': 0x08000000, - 'erase': 0, - 'write': 0, - 'verify': 0, - 'read': 0, - 'len': 1000, - 'fname':'' - } - -# http://www.python.org/doc/2.5.2/lib/module-getopt.html - - try: - opts, args = getopt.getopt(sys.argv[1:], "hqVewvrp:b:a:l:g") - except getopt.GetoptError as err: - # print help information and exit: - print(str(err)) # will print something like "option -a not recognized" - usage() - sys.exit(2) - - for o, a in opts: - if o == '-V': - QUIET = 10 - elif o == '-q': - QUIET = 0 - elif o == '-h': - usage() - sys.exit(0) - elif o == '-e': - conf['erase'] = 1 - elif o == '-w': - conf['write'] = 1 - elif o == '-v': - conf['verify'] = 1 - elif o == '-r': - conf['read'] = 1 - elif o == '-p': - conf['port'] = a - elif o == '-b': - conf['baud'] = eval(a) - elif o == '-a': - conf['address'] = eval(a) - elif o == '-l': - conf['len'] = eval(a) - elif o == '-g': - conf['go'] = 1 - else: - assert False, "unhandled option" - - # Try and find the port automatically - if conf['port'] == 'auto': - ports = [] - - # Get a list of all USB-like names in /dev - for name in ['tty.usbserial', 'ttyUSB']: - ports.extend(glob.glob('/dev/%s*' % name)) - - ports = sorted(ports) - - if ports: - # Found something - take it - conf['port'] = ports[0] - - cmd = CommandInterface() - cmd.open(conf['port'], conf['baud']) - mdebug(10, "Open port %(port)s, baud %(baud)d" % {'port':conf['port'], - 'baud':conf['baud']}) - try: - if (conf['write'] or conf['verify']): - mdebug(5, "Reading data from %s" % args[0]) - data = read(args[0]) - - try: - cmd.initChip() - except CmdException: - print("Can't init. Ensure BOOT0=1, BOOT1=0, and reset device") - - bootversion = cmd.cmdGet() - - mdebug(0, "Bootloader version 0x%X" % bootversion) - - if bootversion < 20 or bootversion >= 100: - raise Exception('Unreasonable bootloader version %d' % bootversion) - - chip_id = cmd.cmdGetID() -#assert len(chip_id) == 2, "Unreasonable chip id: %s" % repr(chip_id) - chip_id_num = (ord(chip_id[0]) << 8) | ord(chip_id[1]) - chip_id_str = CHIP_ID_STRS.get(chip_id_num, None) - - if chip_id_str is None: - mdebug(0, 'Warning: unrecognised chip ID 0x%x' % chip_id_num) - else: - mdebug(0, "Chip id 0x%x, %s" % (chip_id_num, chip_id_str)) - - if conf['erase']: - # Pre-3.0 bootloaders use the erase memory - # command. Starting with 3.0, extended erase memory - # replaced this command. - if bootversion < 0x30: - cmd.cmdEraseMemory() - else: - cmd.cmdExtendedEraseMemory() - - if conf['write']: - cmd.writeMemory(conf['address'], data) - - if conf['verify']: - verify = cmd.readMemory(conf['address'], len(data)) - if(data == verify): - print("Verification OK") - else: - print("Verification FAILED") - print(str(len(data)) + ' vs ' + str(len(verify))) - for i in xrange(0, len(data)): - if data[i] != verify[i]: - print(hex(i) + ': ' + hex(data[i]) + ' vs ' + hex(verify[i])) - - if not conf['write'] and conf['read']: - rdata = cmd.readMemory(conf['address'], conf['len']) - file(args[0], 'wb').write(''.join(map(chr,rdata))) - if conf['go']: - cmd.cmdGo(conf['address']) - print("Running from address" ) - - finally: - cmd.releaseChip() - diff --git a/win/texane-stlink/libusb-1.0.dll b/win/texane-stlink/libusb-1.0.dll deleted file mode 100644 index 702b3744f..000000000 Binary files a/win/texane-stlink/libusb-1.0.dll and /dev/null differ diff --git a/win/texane-stlink/st-flash.exe b/win/texane-stlink/st-flash.exe deleted file mode 100644 index d4009e530..000000000 Binary files a/win/texane-stlink/st-flash.exe and /dev/null differ diff --git a/win/texane-stlink/st-util.exe b/win/texane-stlink/st-util.exe deleted file mode 100644 index 512618b1d..000000000 Binary files a/win/texane-stlink/st-util.exe and /dev/null differ