diff --git a/.editorconfig b/.editorconfig new file mode 100644 index 00000000..c7bf2228 --- /dev/null +++ b/.editorconfig @@ -0,0 +1,20 @@ +[*] +end_of_line = lf +insert_final_newline = true +indent_style = space +indent_size = 2 +trim_trailing_whitespace = true + +[*.md] +trim_trailing_whitespace = false + +[*.sh] +# like -i=2 +indent_style = space +indent_size = 2 + +#shell_variant = posix # like -ln=posix +#binary_next_line = true # like -bn +switch_case_indent = true # like -ci +space_redirects = true # like -sr +#keep_padding = true # like -kp diff --git a/.gitattributes b/.gitattributes new file mode 100644 index 00000000..422ae6f5 --- /dev/null +++ b/.gitattributes @@ -0,0 +1,42 @@ +# Set the default behavior, in case people don't have core.autocrlf set. +* text=auto + +# Explicitly declare text files you want to always be normalized and converted +# to native line endings on checkout. +.editorconfig text eol=lf +.flake8 text eol=lf +.gitattributes text eol=lf +.gitignore text eol=lf + +*.adoc text eol=lf +*.c text eol=lf +*.cmake text eol=lf +*.cpp text eol=lf +*.css text eol=lf +*.dtsi text eol=lf +*.gv text eol=lf +*.h text eol=lf +*.html text eol=lf +*.in text eol=lf +*.ino text eol=lf +*.json text eol=lf +*.ld text eol=lf +*.md text eol=lf +*.MD text eol=lf +*.old text eol=lf +*.patch text eol=lf +*.pde text eol=lf +*.properties text eol=lf +*.py text eol=lf +*.s text eol=lf +*.S text eol=lf +*.sh text eol=lf +*.spec text eol=lf +*.txt text eol=lf +*.yml text eol=lf + +# Denote all files that are truly binary and should not be modified. +*.jpg binary +*.pdf binary +*.png binary + diff --git a/.github/workflows/codespell.yml b/.github/workflows/codespell.yml new file mode 100644 index 00000000..744a6d2e --- /dev/null +++ b/.github/workflows/codespell.yml @@ -0,0 +1,28 @@ +name: codespell + +on: + push: + branches: + - main + pull_request: + # Allows you to run this workflow manually from the Actions tab + workflow_dispatch: +jobs: + codespell: + name: Check for spelling errors + runs-on: ubuntu-latest + + steps: + - name: Checkout + uses: actions/checkout@main + + # See: https://github.com/codespell-project/actions-codespell/blob/master/README.md + - name: Spell check + uses: codespell-project/actions-codespell@master + with: + check_filenames: true + check_hidden: true + # In the event of a false positive, add the word in all lower case to this file: + # ignore_words_file: ./extras/codespell-ignore-words-list.txt + skip: src/utility/STM32Cube_FW + path: src diff --git a/.github/workflows/compile-examples.yml b/.github/workflows/compile-examples.yml index 4efa2d9d..da41142d 100644 --- a/.github/workflows/compile-examples.yml +++ b/.github/workflows/compile-examples.yml @@ -22,5 +22,5 @@ jobs: github-token: ${{ secrets.GITHUB_TOKEN }} fqbn: ${{ matrix.fqbn }} platforms: | - - source-url: https://github.com/stm32duino/BoardManagerFiles/raw/master/package_stmicroelectronics_index.json + - source-url: https://github.com/stm32duino/BoardManagerFiles/raw/main/package_stmicroelectronics_index.json name: STMicroelectronics:stm32 diff --git a/.github/workflows/spell-check.yml b/.github/workflows/spell-check.yml deleted file mode 100644 index 6c44bcfb..00000000 --- a/.github/workflows/spell-check.yml +++ /dev/null @@ -1,16 +0,0 @@ -name: Spell Check - -on: [push, pull_request] - -jobs: - build: - runs-on: ubuntu-latest - - steps: - - name: Checkout - uses: actions/checkout@v2 - - - name: Spell check - uses: arduino/actions/libraries/spell-check@master - with: - skip-paths: ./extras/test \ No newline at end of file diff --git a/README.md b/README.md index 2fb6e425..b6e9de98 100644 --- a/README.md +++ b/README.md @@ -1,21 +1,33 @@ # STM32duinoBLE -This library is a fork of ArduinoBLE library to add the support of SPBTLE-RF and SPBTLE-1S BLE modules. -It was successfully tested with the X-NUCLEO-IDB05A2 or X-NUCLEO-IDB05A1 or X-NUCLEO-BNRG2A1 expansion board and a NUCLEO-F401RE -or NUCLEO-L476RG or NUCLEO-L053R8, with B-L475E-IOT01A and with STEVAL-MKSBOX1V1. -In order to use this library with STEVAL-MKSBOX1V1, you need to update the firmware of the SPBTLE-1S BLE module -mounted on that board as described in the following wiki page: - +This library is a fork of ArduinoBLE library to add the support of STM32WBxx, SPBTLE-RF and SPBTLE-1S BLE modules. +It was successfully tested with the NUCLEO-WB15CC, P-NUCELO_WB55RG, STM32WB5MM-DK, X-NUCLEO-IDB05A2 or +X-NUCLEO-IDB05A1 or X-NUCLEO-BNRG2A1 expansion board and a NUCLEO-F401RE or NUCLEO-L476RG or NUCLEO-L053R8, +with B-L475E-IOT01A and with STEVAL-MKSBOX1V1. + + - In order to use this library with SM32WBxx series, you need to update the STM32WB Copro Wireless Binaries +with stm32wbxx_BLE_HCILayer_fw.bin depending of your mcu: +https://github.com/STMicroelectronics/STM32CubeWB/tree/master/Projects/STM32WB_Copro_Wireless_Binaries + Each subdirectories contains binaries and Release_Notes.html which explain how to update it. + + - In order to use this library with STEVAL-MKSBOX1V1, you need to update the firmware of the SPBTLE-1S BLE module +mounted on that board as described in the following wiki page: https://github.com/stm32duino/wiki/wiki/STM32duinoBLE#stm32duinoble-with-steval_mksbox1v1 -In order to use this library with X-NUCLEO-BNRG2A1, you need to update the firmware of the BLUENRG-M2SP BLE module -mounted on that expansion board as described in the following wiki page: - +- In order to use this library with X-NUCLEO-BNRG2A1, you need to update the firmware of the BLUENRG-M2SP BLE module +mounted on that expansion board as described in the following wiki page: https://github.com/stm32duino/wiki/wiki/STM32duinoBLE#stm32duinoble-with-x-nucleo-bnrg2a1 For more information about ArduinoBLE library please visit the official web page at: https://github.com/arduino-libraries/ArduinoBLE +# Configuration +STM32Cube_WPAN has several configuration options, which are set in the `app_conf.h`. +This package has a default configuration named `app_conf_default.h`. +The user can include the file `app_conf_custom.h` to customize the BLE application. +Options wrapped in `#ifndef`, `#endif` in `app_conf_default.h` can be overwritten. +Additional options can be added. + ## License ``` diff --git a/examples/Central/LedControl/LedControl.ino b/examples/Central/LedControl/LedControl.ino index 2f64bc28..13768360 100644 --- a/examples/Central/LedControl/LedControl.ino +++ b/examples/Central/LedControl/LedControl.ino @@ -6,7 +6,17 @@ it will remotely control the BLE Peripheral's LED, when the button is pressed or released. The circuit: - - STEVAL-MKSBOX1V1, B-L475E-IOT01A1, B_L4S5I_IOT01A, or a Nucleo board plus the X-NUCLEO-IDB05A2 or the X-NUCLEO-IDB05A1 or the X-NUCLEO-BNRG2A1 + - Boards with integrated BLE or Nucleo board plus one of BLE X-Nucleo shield:: + - B-L475E-IOT01A1 + - B_L4S5I_IOT01A + - STEVAL-MKBOXPRO + - STEVAL-MKSBOX1V1, + - NUCLEO-WB15CC + - P-NUCLEO-WB55RG + - STM32WB5MM-DK + - X-NUCLEO-IDB05A2 + - X-NUCLEO-IDB05A1 + - X-NUCLEO-BNRG2A1 You can use it with another board that is compatible with this library and the Peripherals -> LED example. @@ -16,7 +26,21 @@ #include -#if defined(ARDUINO_STEVAL_MKSBOX1V1) +#ifdef USER_BTN +const int buttonPin = USER_BTN; // set buttonPin to on-board user button +#else +const int buttonPin = PC13; // set buttonPin to digital pin PC13 */ +#endif + +#if defined(ARDUINO_STEVAL_MKBOXPRO) +/* STEVAL-MKBOXPRO */ +SPIClass SpiHCI(PA7, PA6, PA5); +HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_LP, PA2, PB11, PD4, 1000000, SPI_MODE3); +#if !defined(FAKE_BLELOCALDEVICE) +BLELocalDevice BLEObj(&HCISpiTransport); +BLELocalDevice& BLE = BLEObj; +#endif +#elif defined(ARDUINO_STEVAL_MKSBOX1V1) /* STEVAL-MKSBOX1V1 */ SPIClass SpiHCI(PC3, PD3, PD1); HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_1S, PD0, PD4, PA8, 1000000, SPI_MODE1); @@ -24,7 +48,6 @@ HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_1S, PD0, PD4, PA8, 1000000, BLELocalDevice BLEObj(&HCISpiTransport); BLELocalDevice& BLE = BLEObj; #endif -const int buttonPin = PG1; // set buttonPin to digital pin PG1 #elif defined(ARDUINO_B_L475E_IOT01A) || defined(ARDUINO_B_L4S5I_IOT01A) /* B-L475E-IOT01A1 or B_L4S5I_IOT01A */ SPIClass SpiHCI(PC12, PC11, PC10); @@ -33,14 +56,12 @@ HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, PD13, PE6, PA8, 8000000, BLELocalDevice BLEObj(&HCISpiTransport); BLELocalDevice& BLE = BLEObj; #endif -const int buttonPin = PC13; // set buttonPin to digital pin PC13 -#elif defined(ARDUINO_P_NUCLEO_WB55RG) || defined(ARDUINO_STM32WB5MM_DK) +#elif defined(ARDUINO_NUCLEO_WB15CC) || defined(ARDUINO_P_NUCLEO_WB55RG) || defined(ARDUINO_STM32WB5MM_DK) HCISharedMemTransportClass HCISharedMemTransport; #if !defined(FAKE_BLELOCALDEVICE) BLELocalDevice BLEObj(&HCISharedMemTransport); BLELocalDevice& BLE = BLEObj; #endif -const int buttonPin = PC4; // set buttonPin to digital pin PC4 #else /* Shield IDB05A2 with SPI clock on D3 */ SPIClass SpiHCI(D11, D12, D3); @@ -49,47 +70,41 @@ HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M0, A1, A0, D7, 8000000, SP BLELocalDevice BLEObj(&HCISpiTransport); BLELocalDevice& BLE = BLEObj; #endif -const int buttonPin = PC13; // set buttonPin to digital pin PC13 /* Shield IDB05A2 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M0, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif -const int buttonPin = PC13; // set buttonPin to digital pin PC13 */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M0, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield IDB05A1 with SPI clock on D3 */ -/*SPIClass SpiHCI(D11, D12, D3); -HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif -const int buttonPin = PC13; // set buttonPin to digital pin PC13 */ +// SPIClass SpiHCI(D11, D12, D3); +// HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield IDB05A1 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif -const int buttonPin = PC13; // set buttonPin to digital pin PC13 */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield BNRG2A1 with SPI clock on D3 */ -/*SPIClass SpiHCI(D11, D12, D3); -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif -const int buttonPin = PC13; // set buttonPin to digital pin PC13 */ +// SPIClass SpiHCI(D11, D12, D3); +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield BNRG2A1 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif -const int buttonPin = PC13; // set buttonPin to digital pin PC13 */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif #endif // variables for button diff --git a/examples/Central/PeripheralExplorer/PeripheralExplorer.ino b/examples/Central/PeripheralExplorer/PeripheralExplorer.ino index e5461fa5..52da33ca 100644 --- a/examples/Central/PeripheralExplorer/PeripheralExplorer.ino +++ b/examples/Central/PeripheralExplorer/PeripheralExplorer.ino @@ -5,7 +5,17 @@ is found. Then connects, and discovers + prints all the peripheral's attributes. The circuit: - - STEVAL-MKSBOX1V1, B-L475E-IOT01A1, B_L4S5I_IOT01A, or a Nucleo board plus the X-NUCLEO-IDB05A2 or the X-NUCLEO-IDB05A1 or the X-NUCLEO-BNRG2A1 + - Boards with integrated BLE or Nucleo board plus one of BLE X-Nucleo shield:: + - B-L475E-IOT01A1 + - B_L4S5I_IOT01A + - STEVAL-MKBOXPRO + - STEVAL-MKSBOX1V1, + - NUCLEO-WB15CC + - P-NUCLEO-WB55RG + - STM32WB5MM-DK + - X-NUCLEO-IDB05A2 + - X-NUCLEO-IDB05A1 + - X-NUCLEO-BNRG2A1 You can use it with another board that is compatible with this library and the Peripherals -> LED example. @@ -15,7 +25,16 @@ #include -#if defined(ARDUINO_STEVAL_MKSBOX1V1) +#if defined(ARDUINO_STEVAL_MKBOXPRO) +/* STEVAL-MKBOXPRO */ +SPIClass SpiHCI(PA7, PA6, PA5); +HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_LP, PA2, PB11, PD4, 1000000, SPI_MODE3); +#if !defined(FAKE_BLELOCALDEVICE) +BLELocalDevice BLEObj(&HCISpiTransport); +BLELocalDevice& BLE = BLEObj; +#endif +const int buttonPin = PC13; // set buttonPin to digital pin PC13 +#elif defined(ARDUINO_STEVAL_MKSBOX1V1) /* STEVAL-MKSBOX1V1 */ SPIClass SpiHCI(PC3, PD3, PD1); HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_1S, PD0, PD4, PA8, 1000000, SPI_MODE1); @@ -31,7 +50,7 @@ HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, PD13, PE6, PA8, 8000000, BLELocalDevice BLEObj(&HCISpiTransport); BLELocalDevice& BLE = BLEObj; #endif -#elif defined(ARDUINO_P_NUCLEO_WB55RG) || defined(ARDUINO_STM32WB5MM_DK) +#elif defined(ARDUINO_NUCLEO_WB15CC) || defined(ARDUINO_P_NUCLEO_WB55RG) || defined(ARDUINO_STM32WB5MM_DK) HCISharedMemTransportClass HCISharedMemTransport; #if !defined(FAKE_BLELOCALDEVICE) BLELocalDevice BLEObj(&HCISharedMemTransport); @@ -46,40 +65,40 @@ BLELocalDevice BLEObj(&HCISpiTransport); BLELocalDevice& BLE = BLEObj; #endif /* Shield IDB05A2 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M0, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M0, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield IDB05A1 with SPI clock on D3 */ -/*SPIClass SpiHCI(D11, D12, D3); -HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// SPIClass SpiHCI(D11, D12, D3); +// HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield IDB05A1 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield BNRG2A1 with SPI clock on D3 */ -/*SPIClass SpiHCI(D11, D12, D3); -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// SPIClass SpiHCI(D11, D12, D3); +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield BNRG2A1 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif #endif void setup() { diff --git a/examples/Central/Scan/Scan.ino b/examples/Central/Scan/Scan.ino index bf1bef5f..cc7275fd 100644 --- a/examples/Central/Scan/Scan.ino +++ b/examples/Central/Scan/Scan.ino @@ -5,14 +5,32 @@ address, local name, advertised service UUID's. The circuit: - - STEVAL-MKSBOX1V1, B-L475E-IOT01A1, B_L4S5I_IOT01A, or a Nucleo board plus the X-NUCLEO-IDB05A2 or the X-NUCLEO-IDB05A1 or the X-NUCLEO-BNRG2A1 + - Boards with integrated BLE or Nucleo board plus one of BLE X-Nucleo shield:: + - B-L475E-IOT01A1 + - B_L4S5I_IOT01A + - STEVAL-MKBOXPRO + - STEVAL-MKSBOX1V1, + - NUCLEO-WB15CC + - P-NUCLEO-WB55RG + - STM32WB5MM-DK + - X-NUCLEO-IDB05A2 + - X-NUCLEO-IDB05A1 + - X-NUCLEO-BNRG2A1 This example code is in the public domain. */ #include -#if defined(ARDUINO_STEVAL_MKSBOX1V1) +#if defined(ARDUINO_STEVAL_MKBOXPRO) +/* STEVAL-MKBOXPRO */ +SPIClass SpiHCI(PA7, PA6, PA5); +HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_LP, PA2, PB11, PD4, 1000000, SPI_MODE3); +#if !defined(FAKE_BLELOCALDEVICE) +BLELocalDevice BLEObj(&HCISpiTransport); +BLELocalDevice& BLE = BLEObj; +#endif +#elif defined(ARDUINO_STEVAL_MKSBOX1V1) /* STEVAL-MKSBOX1V1 */ SPIClass SpiHCI(PC3, PD3, PD1); HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_1S, PD0, PD4, PA8, 1000000, SPI_MODE1); @@ -28,7 +46,7 @@ HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, PD13, PE6, PA8, 8000000, BLELocalDevice BLEObj(&HCISpiTransport); BLELocalDevice& BLE = BLEObj; #endif -#elif defined(ARDUINO_P_NUCLEO_WB55RG) || defined(ARDUINO_STM32WB5MM_DK) +#elif defined(ARDUINO_NUCLEO_WB15CC) || defined(ARDUINO_P_NUCLEO_WB55RG) || defined(ARDUINO_STM32WB5MM_DK) HCISharedMemTransportClass HCISharedMemTransport; #if !defined(FAKE_BLELOCALDEVICE) BLELocalDevice BLEObj(&HCISharedMemTransport); @@ -43,40 +61,40 @@ BLELocalDevice BLEObj(&HCISpiTransport); BLELocalDevice& BLE = BLEObj; #endif /* Shield IDB05A2 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M0, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M0, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield IDB05A1 with SPI clock on D3 */ -/*SPIClass SpiHCI(D11, D12, D3); -HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// SPIClass SpiHCI(D11, D12, D3); +// HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield IDB05A1 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield BNRG2A1 with SPI clock on D3 */ -/*SPIClass SpiHCI(D11, D12, D3); -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// SPIClass SpiHCI(D11, D12, D3); +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield BNRG2A1 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif #endif void setup() { diff --git a/examples/Central/ScanCallback/ScanCallback.ino b/examples/Central/ScanCallback/ScanCallback.ino index 4d9bbc77..f2ca6d6c 100644 --- a/examples/Central/ScanCallback/ScanCallback.ino +++ b/examples/Central/ScanCallback/ScanCallback.ino @@ -7,14 +7,32 @@ reported for every single advertisement it makes. The circuit: - - STEVAL-MKSBOX1V1, B-L475E-IOT01A1, B_L4S5I_IOT01A, or a Nucleo board plus the X-NUCLEO-IDB05A2 or the X-NUCLEO-IDB05A1 or the X-NUCLEO-BNRG2A1 + - Boards with integrated BLE or Nucleo board plus one of BLE X-Nucleo shield:: + - B-L475E-IOT01A1 + - B_L4S5I_IOT01A + - STEVAL-MKBOXPRO + - STEVAL-MKSBOX1V1, + - NUCLEO-WB15CC + - P-NUCLEO-WB55RG + - STM32WB5MM-DK + - X-NUCLEO-IDB05A2 + - X-NUCLEO-IDB05A1 + - X-NUCLEO-BNRG2A1 This example code is in the public domain. */ #include -#if defined(ARDUINO_STEVAL_MKSBOX1V1) +#if defined(ARDUINO_STEVAL_MKBOXPRO) +/* STEVAL-MKBOXPRO */ +SPIClass SpiHCI(PA7, PA6, PA5); +HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_LP, PA2, PB11, PD4, 1000000, SPI_MODE3); +#if !defined(FAKE_BLELOCALDEVICE) +BLELocalDevice BLEObj(&HCISpiTransport); +BLELocalDevice& BLE = BLEObj; +#endif +#elif defined(ARDUINO_STEVAL_MKSBOX1V1) /* STEVAL-MKSBOX1V1 */ SPIClass SpiHCI(PC3, PD3, PD1); HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_1S, PD0, PD4, PA8, 1000000, SPI_MODE1); @@ -30,7 +48,7 @@ HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, PD13, PE6, PA8, 8000000, BLELocalDevice BLEObj(&HCISpiTransport); BLELocalDevice& BLE = BLEObj; #endif -#elif defined(ARDUINO_P_NUCLEO_WB55RG) || defined(ARDUINO_STM32WB5MM_DK) +#elif defined(ARDUINO_NUCLEO_WB15CC) || defined(ARDUINO_P_NUCLEO_WB55RG) || defined(ARDUINO_STM32WB5MM_DK) HCISharedMemTransportClass HCISharedMemTransport; #if !defined(FAKE_BLELOCALDEVICE) BLELocalDevice BLEObj(&HCISharedMemTransport); @@ -45,40 +63,40 @@ BLELocalDevice BLEObj(&HCISpiTransport); BLELocalDevice& BLE = BLEObj; #endif /* Shield IDB05A2 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M0, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M0, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield IDB05A1 with SPI clock on D3 */ -/*SPIClass SpiHCI(D11, D12, D3); -HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// SPIClass SpiHCI(D11, D12, D3); +// HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield IDB05A1 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield BNRG2A1 with SPI clock on D3 */ -/*SPIClass SpiHCI(D11, D12, D3); -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// SPIClass SpiHCI(D11, D12, D3); +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield BNRG2A1 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif #endif void setup() { diff --git a/examples/Central/SensorTagButton/SensorTagButton.ino b/examples/Central/SensorTagButton/SensorTagButton.ino index c6377f9f..75ccf254 100644 --- a/examples/Central/SensorTagButton/SensorTagButton.ino +++ b/examples/Central/SensorTagButton/SensorTagButton.ino @@ -8,7 +8,17 @@ outputted to the Serial Monitor when one is pressed. The circuit: - - STEVAL-MKSBOX1V1, B-L475E-IOT01A1, B_L4S5I_IOT01A, or a Nucleo board plus the X-NUCLEO-IDB05A2 or the X-NUCLEO-IDB05A1 or the X-NUCLEO-BNRG2A1 + - Boards with integrated BLE or Nucleo board plus one of BLE X-Nucleo shield:: + - B-L475E-IOT01A1 + - B_L4S5I_IOT01A + - STEVAL-MKBOXPRO + - STEVAL-MKSBOX1V1, + - NUCLEO-WB15CC + - P-NUCLEO-WB55RG + - STM32WB5MM-DK + - X-NUCLEO-IDB05A2 + - X-NUCLEO-IDB05A1 + - X-NUCLEO-BNRG2A1 - TI SensorTag This example code is in the public domain. @@ -16,7 +26,15 @@ #include -#if defined(ARDUINO_STEVAL_MKSBOX1V1) +#if defined(ARDUINO_STEVAL_MKBOXPRO) +/* STEVAL-MKBOXPRO */ +SPIClass SpiHCI(PA7, PA6, PA5); +HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_LP, PA2, PB11, PD4, 1000000, SPI_MODE3); +#if !defined(FAKE_BLELOCALDEVICE) +BLELocalDevice BLEObj(&HCISpiTransport); +BLELocalDevice& BLE = BLEObj; +#endif +#elif defined(ARDUINO_STEVAL_MKSBOX1V1) /* STEVAL-MKSBOX1V1 */ SPIClass SpiHCI(PC3, PD3, PD1); HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_1S, PD0, PD4, PA8, 1000000, SPI_MODE1); @@ -32,7 +50,7 @@ HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, PD13, PE6, PA8, 8000000, BLELocalDevice BLEObj(&HCISpiTransport); BLELocalDevice& BLE = BLEObj; #endif -#elif defined(ARDUINO_P_NUCLEO_WB55RG) || defined(ARDUINO_STM32WB5MM_DK) +#elif defined(ARDUINO_NUCLEO_WB15CC) || defined(ARDUINO_P_NUCLEO_WB55RG) || defined(ARDUINO_STM32WB5MM_DK) HCISharedMemTransportClass HCISharedMemTransport; #if !defined(FAKE_BLELOCALDEVICE) BLELocalDevice BLEObj(&HCISharedMemTransport); @@ -47,40 +65,40 @@ BLELocalDevice BLEObj(&HCISpiTransport); BLELocalDevice& BLE = BLEObj; #endif /* Shield IDB05A2 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M0, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M0, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield IDB05A1 with SPI clock on D3 */ -/*SPIClass SpiHCI(D11, D12, D3); -HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// SPIClass SpiHCI(D11, D12, D3); +// HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield IDB05A1 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield BNRG2A1 with SPI clock on D3 */ -/*SPIClass SpiHCI(D11, D12, D3); -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// SPIClass SpiHCI(D11, D12, D3); +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield BNRG2A1 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif #endif void setup() { @@ -207,7 +225,7 @@ void monitorSensorTagButtons(BLEDevice peripheral) { if (simpleKeyCharacteristic.valueUpdated()) { // yes, get the value, characteristic is 1 byte so use byte value byte value = 0; - + simpleKeyCharacteristic.readValue(value); if (value & 0x01) { diff --git a/examples/Peripheral/ButtonLED/ButtonLED.ino b/examples/Peripheral/ButtonLED/ButtonLED.ino index c3f777d4..8d014ade 100644 --- a/examples/Peripheral/ButtonLED/ButtonLED.ino +++ b/examples/Peripheral/ButtonLED/ButtonLED.ino @@ -6,7 +6,17 @@ represents the state of the button. The circuit: - - STEVAL-MKSBOX1V1, B-L475E-IOT01A1, B_L4S5I_IOT01A, or a Nucleo board plus the X-NUCLEO-IDB05A2 or the X-NUCLEO-IDB05A1 or the X-NUCLEO-BNRG2A1 + - Boards with integrated BLE or Nucleo board plus one of BLE X-Nucleo shield:: + - B-L475E-IOT01A1 + - B_L4S5I_IOT01A + - STEVAL-MKBOXPRO + - STEVAL-MKSBOX1V1, + - NUCLEO-WB15CC + - P-NUCLEO-WB55RG + - STM32WB5MM-DK + - X-NUCLEO-IDB05A2 + - X-NUCLEO-IDB05A1 + - X-NUCLEO-BNRG2A1 You can use a generic BLE central app, like LightBlue (iOS and Android) or nRF Connect (Android), to interact with the services and characteristics @@ -17,7 +27,21 @@ #include -#if defined(ARDUINO_STEVAL_MKSBOX1V1) +#ifdef USER_BTN +const int buttonPin = USER_BTN; // set buttonPin to on-board user button +#else +const int buttonPin = PC13; // set buttonPin to digital pin PC13 */ +#endif + +#if defined(ARDUINO_STEVAL_MKBOXPRO) +/* STEVAL-MKBOXPRO */ +SPIClass SpiHCI(PA7, PA6, PA5); +HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_LP, PA2, PB11, PD4, 1000000, SPI_MODE3); +#if !defined(FAKE_BLELOCALDEVICE) +BLELocalDevice BLEObj(&HCISpiTransport); +BLELocalDevice& BLE = BLEObj; +#endif +#elif defined(ARDUINO_STEVAL_MKSBOX1V1) /* STEVAL-MKSBOX1V1 */ SPIClass SpiHCI(PC3, PD3, PD1); HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_1S, PD0, PD4, PA8, 1000000, SPI_MODE1); @@ -25,7 +49,6 @@ HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_1S, PD0, PD4, PA8, 1000000, BLELocalDevice BLEObj(&HCISpiTransport); BLELocalDevice& BLE = BLEObj; #endif -const int buttonPin = PG1; // set buttonPin to digital pin PG1 #elif defined(ARDUINO_B_L475E_IOT01A) || defined(ARDUINO_B_L4S5I_IOT01A) /* B-L475E-IOT01A1 or B_L4S5I_IOT01A */ SPIClass SpiHCI(PC12, PC11, PC10); @@ -34,14 +57,12 @@ HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, PD13, PE6, PA8, 8000000, BLELocalDevice BLEObj(&HCISpiTransport); BLELocalDevice& BLE = BLEObj; #endif -const int buttonPin = PC13; // set buttonPin to digital pin PC13 -#elif defined(ARDUINO_P_NUCLEO_WB55RG) || defined(ARDUINO_STM32WB5MM_DK) +#elif defined(ARDUINO_NUCLEO_WB15CC) || defined(ARDUINO_P_NUCLEO_WB55RG) || defined(ARDUINO_STM32WB5MM_DK) HCISharedMemTransportClass HCISharedMemTransport; #if !defined(FAKE_BLELOCALDEVICE) BLELocalDevice BLEObj(&HCISharedMemTransport); BLELocalDevice& BLE = BLEObj; #endif -const int buttonPin = PC4; // set buttonPin to digital pin PC4 #else /* Shield IDB05A2 with SPI clock on D3 */ SPIClass SpiHCI(D11, D12, D3); @@ -50,47 +71,41 @@ HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M0, A1, A0, D7, 8000000, SP BLELocalDevice BLEObj(&HCISpiTransport); BLELocalDevice& BLE = BLEObj; #endif -const int buttonPin = PC13; // set buttonPin to digital pin PC13 /* Shield IDB05A2 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M0, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif -const int buttonPin = PC13; // set buttonPin to digital pin PC13 */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M0, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield IDB05A1 with SPI clock on D3 */ -/*SPIClass SpiHCI(D11, D12, D3); -HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif -const int buttonPin = PC13; // set buttonPin to digital pin PC13 */ +// SPIClass SpiHCI(D11, D12, D3); +// HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield IDB05A1 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif -const int buttonPin = PC13; // set buttonPin to digital pin PC13 */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield BNRG2A1 with SPI clock on D3 */ -/*SPIClass SpiHCI(D11, D12, D3); -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif -const int buttonPin = PC13; // set buttonPin to digital pin PC13 */ +// SPIClass SpiHCI(D11, D12, D3); +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield BNRG2A1 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif -const int buttonPin = PC13; // set buttonPin to digital pin PC13 */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif #endif const int ledPin = LED_BUILTIN; // set ledPin to on-board LED diff --git a/examples/Peripheral/CallbackLED/CallbackLED.ino b/examples/Peripheral/CallbackLED/CallbackLED.ino index 28bf40a8..5f3e6d97 100644 --- a/examples/Peripheral/CallbackLED/CallbackLED.ino +++ b/examples/Peripheral/CallbackLED/CallbackLED.ino @@ -6,7 +6,17 @@ library are used. The circuit: - - STEVAL-MKSBOX1V1, B-L475E-IOT01A1, B_L4S5I_IOT01A, or a Nucleo board plus the X-NUCLEO-IDB05A2 or the X-NUCLEO-IDB05A1 or the X-NUCLEO-BNRG2A1 + - Boards with integrated BLE or Nucleo board plus one of BLE X-Nucleo shield:: + - B-L475E-IOT01A1 + - B_L4S5I_IOT01A + - STEVAL-MKBOXPRO + - STEVAL-MKSBOX1V1, + - NUCLEO-WB15CC + - P-NUCLEO-WB55RG + - STM32WB5MM-DK + - X-NUCLEO-IDB05A2 + - X-NUCLEO-IDB05A1 + - X-NUCLEO-BNRG2A1 You can use a generic BLE central app, like LightBlue (iOS and Android) or nRF Connect (Android), to interact with the services and characteristics @@ -17,7 +27,15 @@ #include -#if defined(ARDUINO_STEVAL_MKSBOX1V1) +#if defined(ARDUINO_STEVAL_MKBOXPRO) +/* STEVAL-MKBOXPRO */ +SPIClass SpiHCI(PA7, PA6, PA5); +HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_LP, PA2, PB11, PD4, 1000000, SPI_MODE3); +#if !defined(FAKE_BLELOCALDEVICE) +BLELocalDevice BLEObj(&HCISpiTransport); +BLELocalDevice& BLE = BLEObj; +#endif +#elif defined(ARDUINO_STEVAL_MKSBOX1V1) /* STEVAL-MKSBOX1V1 */ SPIClass SpiHCI(PC3, PD3, PD1); HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_1S, PD0, PD4, PA8, 1000000, SPI_MODE1); @@ -33,7 +51,7 @@ HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, PD13, PE6, PA8, 8000000, BLELocalDevice BLEObj(&HCISpiTransport); BLELocalDevice& BLE = BLEObj; #endif -#elif defined(ARDUINO_P_NUCLEO_WB55RG) || defined(ARDUINO_STM32WB5MM_DK) +#elif defined(ARDUINO_NUCLEO_WB15CC) || defined(ARDUINO_P_NUCLEO_WB55RG) || defined(ARDUINO_STM32WB5MM_DK) HCISharedMemTransportClass HCISharedMemTransport; #if !defined(FAKE_BLELOCALDEVICE) BLELocalDevice BLEObj(&HCISharedMemTransport); @@ -48,40 +66,40 @@ BLELocalDevice BLEObj(&HCISpiTransport); BLELocalDevice& BLE = BLEObj; #endif /* Shield IDB05A2 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M0, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M0, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield IDB05A1 with SPI clock on D3 */ -/*SPIClass SpiHCI(D11, D12, D3); -HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// SPIClass SpiHCI(D11, D12, D3); +// HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield IDB05A1 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield BNRG2A1 with SPI clock on D3 */ -/*SPIClass SpiHCI(D11, D12, D3); -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// SPIClass SpiHCI(D11, D12, D3); +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield BNRG2A1 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif #endif BLEService ledService("19B10000-E8F2-537E-4F6C-D104768A1214"); // create service @@ -94,7 +112,7 @@ const int ledPin = LED_BUILTIN; // pin to use for the LED void setup() { Serial.begin(115200); while (!Serial); - + pinMode(ledPin, OUTPUT); // use the LED pin as an output // begin initialization diff --git a/examples/Peripheral/LED/LED.ino b/examples/Peripheral/LED/LED.ino index 2ea0e5ae..1ce9ea81 100644 --- a/examples/Peripheral/LED/LED.ino +++ b/examples/Peripheral/LED/LED.ino @@ -5,7 +5,17 @@ characteristic to control an LED. The circuit: - - STEVAL-MKSBOX1V1, B-L475E-IOT01A1, B_L4S5I_IOT01A, or a Nucleo board plus the X-NUCLEO-IDB05A2 or the X-NUCLEO-IDB05A1 or the X-NUCLEO-BNRG2A1 + - Boards with integrated BLE or Nucleo board plus one of BLE X-Nucleo shield:: + - B-L475E-IOT01A1 + - B_L4S5I_IOT01A + - STEVAL-MKBOXPRO + - STEVAL-MKSBOX1V1, + - NUCLEO-WB15CC + - P-NUCLEO-WB55RG + - STM32WB5MM-DK + - X-NUCLEO-IDB05A2 + - X-NUCLEO-IDB05A1 + - X-NUCLEO-BNRG2A1 You can use a generic BLE central app, like LightBlue (iOS and Android) or nRF Connect (Android), to interact with the services and characteristics @@ -15,7 +25,15 @@ */ #include -#if defined(ARDUINO_STEVAL_MKSBOX1V1) +#if defined(ARDUINO_STEVAL_MKBOXPRO) +/* STEVAL-MKBOXPRO */ +SPIClass SpiHCI(PA7, PA6, PA5); +HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_LP, PA2, PB11, PD4, 1000000, SPI_MODE3); +#if !defined(FAKE_BLELOCALDEVICE) +BLELocalDevice BLEObj(&HCISpiTransport); +BLELocalDevice& BLE = BLEObj; +#endif +#elif defined(ARDUINO_STEVAL_MKSBOX1V1) /* STEVAL-MKSBOX1V1 */ SPIClass SpiHCI(PC3, PD3, PD1); HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_1S, PD0, PD4, PA8, 1000000, SPI_MODE1); @@ -31,7 +49,7 @@ HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, PD13, PE6, PA8, 8000000, BLELocalDevice BLEObj(&HCISpiTransport); BLELocalDevice& BLE = BLEObj; #endif -#elif defined(ARDUINO_P_NUCLEO_WB55RG) || defined(ARDUINO_STM32WB5MM_DK) +#elif defined(ARDUINO_NUCLEO_WB15CC) || defined(ARDUINO_P_NUCLEO_WB55RG) || defined(ARDUINO_STM32WB5MM_DK) HCISharedMemTransportClass HCISharedMemTransport; #if !defined(FAKE_BLELOCALDEVICE) BLELocalDevice BLEObj(&HCISharedMemTransport); @@ -46,40 +64,40 @@ BLELocalDevice BLEObj(&HCISpiTransport); BLELocalDevice& BLE = BLEObj; #endif /* Shield IDB05A2 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M0, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M0, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield IDB05A1 with SPI clock on D3 */ -/*SPIClass SpiHCI(D11, D12, D3); -HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// SPIClass SpiHCI(D11, D12, D3); +// HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield IDB05A1 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, SPBTLE_RF, A1, A0, D7, 8000000, SPI_MODE0); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield BNRG2A1 with SPI clock on D3 */ -/*SPIClass SpiHCI(D11, D12, D3); -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// SPIClass SpiHCI(D11, D12, D3); +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif /* Shield BNRG2A1 with SPI clock on D13 */ -/*#define SpiHCI SPI -HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); -#if !defined(FAKE_BLELOCALDEVICE) -BLELocalDevice BLEObj(&HCISpiTransport); -BLELocalDevice& BLE = BLEObj; -#endif */ +// #define SpiHCI SPI +// HCISpiTransportClass HCISpiTransport(SpiHCI, BLUENRG_M2SP, A1, A0, D7, 1000000, SPI_MODE1); +// #if !defined(FAKE_BLELOCALDEVICE) +// BLELocalDevice BLEObj(&HCISpiTransport); +// BLELocalDevice& BLE = BLEObj; +// #endif #endif BLEService ledService("19B10000-E8F2-537E-4F6C-D104768A1214"); // BLE LED Service diff --git a/extras/STM32Cube_FW/0001-chore-clean-up-and-adapt-STM32Cube_FW-sources-for-ST.patch b/extras/STM32Cube_FW/0001-chore-clean-up-and-adapt-STM32Cube_FW-sources-for-ST.patch new file mode 100644 index 00000000..171554eb --- /dev/null +++ b/extras/STM32Cube_FW/0001-chore-clean-up-and-adapt-STM32Cube_FW-sources-for-ST.patch @@ -0,0 +1,2330 @@ +From 70812b4e3a184585354f979472a75a648266f53f Mon Sep 17 00:00:00 2001 +From: Frederic Pillon +Date: Mon, 12 Dec 2022 17:15:26 +0100 +Subject: [PATCH 1/3] chore: clean up and adapt STM32Cube_FW sources for + STM32duino + +Signed-off-by: Frederic Pillon +--- + src/utility/STM32Cube_FW/app_conf_default.h | 914 ++++++------------- + src/utility/STM32Cube_FW/ble_bufsize.h | 7 + + src/utility/STM32Cube_FW/hw.h | 28 +- + src/utility/STM32Cube_FW/hw_ipcc.c | 218 +---- + src/utility/STM32Cube_FW/mbox_def.h | 34 - + src/utility/STM32Cube_FW/shci.c | 39 +- + src/utility/STM32Cube_FW/shci.h | 51 +- + src/utility/STM32Cube_FW/shci_tl.c | 37 +- + src/utility/STM32Cube_FW/stm32_wpan_common.h | 39 +- + src/utility/STM32Cube_FW/stm_list.c | 15 +- + src/utility/STM32Cube_FW/stm_list.h | 4 +- + src/utility/STM32Cube_FW/tl.h | 33 - + src/utility/STM32Cube_FW/tl_mbox.c | 143 +-- + 13 files changed, 323 insertions(+), 1239 deletions(-) + rewrite src/utility/STM32Cube_FW/app_conf_default.h (63%) + +diff --git a/src/utility/STM32Cube_FW/app_conf_default.h b/src/utility/STM32Cube_FW/app_conf_default.h +dissimilarity index 63% +index 2606a05..cc8c3e8 100644 +--- a/src/utility/STM32Cube_FW/app_conf_default.h ++++ b/src/utility/STM32Cube_FW/app_conf_default.h +@@ -1,655 +1,259 @@ +-/* USER CODE BEGIN Header */ +-/** +- ****************************************************************************** +- * @file app_conf.h +- * @author MCD Application Team +- * @brief Application configuration file for STM32WPAN Middleware. +- ****************************************************************************** +- * @attention +- * +- * Copyright (c) 2020-2021 STMicroelectronics. +- * All rights reserved. +- * +- * This software is licensed under terms that can be found in the LICENSE file +- * in the root directory of this software component. +- * If no LICENSE file comes with this software, it is provided AS-IS. +- * +- ****************************************************************************** +- */ +-/* USER CODE END Header */ +- +-/* Define to prevent recursive inclusion -------------------------------------*/ +-#ifndef APP_CONF_H +-#define APP_CONF_H +- +-#include "hw.h" +-#include "hw_conf.h" +-#include "hw_if.h" +-#include "ble_bufsize.h" +- +-/****************************************************************************** +- * Application Config +- ******************************************************************************/ +- +-/** +- * Define Secure Connections Support +- */ +-#define CFG_SECURE_NOT_SUPPORTED (0x00) +-#define CFG_SECURE_OPTIONAL (0x01) +-#define CFG_SECURE_MANDATORY (0x02) +- +-#define CFG_SC_SUPPORT CFG_SECURE_OPTIONAL +- +-/** +- * Define Keypress Notification Support +- */ +-#define CFG_KEYPRESS_NOT_SUPPORTED (0x00) +-#define CFG_KEYPRESS_SUPPORTED (0x01) +- +-#define CFG_KEYPRESS_NOTIFICATION_SUPPORT CFG_KEYPRESS_NOT_SUPPORTED +- +-/** +- * Numeric Comparison Answers +- */ +-#define YES (0x01) +-#define NO (0x00) +- +-/** +- * Device name configuration for Generic Access Service +- */ +-#define CFG_GAP_DEVICE_NAME "TEMPLATE" +-#define CFG_GAP_DEVICE_NAME_LENGTH (8) +- +-/** +-* Identity root key used to derive LTK and CSRK +-*/ +-#define CFG_BLE_IRK {0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0, 0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0} +- +-/** +-* Encryption root key used to derive LTK and CSRK +-*/ +-#define CFG_BLE_ERK {0xFE, 0xDC, 0xBA, 0x09, 0x87, 0x65, 0x43, 0x21, 0xFE, 0xDC, 0xBA, 0x09, 0x87, 0x65, 0x43, 0x21} +- +-/** +- * SMPS supply +- * SMPS not used when Set to 0 +- * SMPS used when Set to 1 +- */ +-#define CFG_USE_SMPS 0 +- +-/* USER CODE BEGIN Generic_Parameters */ +-/* USER CODE END Generic_Parameters */ +- +-/**< specific parameters */ +-/*****************************************************/ +- +-/* USER CODE BEGIN Specific_Parameters */ +-#define PUSH_BUTTON_SW1_EXTI_IRQHandler EXTI4_IRQHandler +- +-/* USER CODE END Specific_Parameters */ +- +-/****************************************************************************** +- * Information Table +- * +- * Version +- * [0:3] = Build - 0: Untracked - 15:Released - x: Tracked version +- * [4:7] = branch - 0: Mass Market - x: ... +- * [8:15] = Subversion +- * [16:23] = Version minor +- * [24:31] = Version major +- * +- ******************************************************************************/ +-#define CFG_FW_MAJOR_VERSION (0) +-#define CFG_FW_MINOR_VERSION (0) +-#define CFG_FW_SUBVERSION (1) +-#define CFG_FW_BRANCH (0) +-#define CFG_FW_BUILD (0) +- +-/****************************************************************************** +- * BLE Stack +- ******************************************************************************/ +-/** +- * Maximum number of simultaneous connections that the device will support. +- * Valid values are from 1 to 8 +- */ +-#define CFG_BLE_NUM_LINK 8 +- +-/** +- * Maximum number of Services that can be stored in the GATT database. +- * Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user services +- */ +-#define CFG_BLE_NUM_GATT_SERVICES 8 +- +-/** +- * Maximum number of Attributes +- * (i.e. the number of characteristic + the number of characteristic values + the number of descriptors, excluding the services) +- * that can be stored in the GATT database. +- * Note that certain characteristics and relative descriptors are added automatically during device initialization +- * so this parameters should be 9 plus the number of user Attributes +- */ +-#define CFG_BLE_NUM_GATT_ATTRIBUTES 68 +- +-/** +- * Maximum supported ATT_MTU size +- * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set +- */ +-#define CFG_BLE_MAX_ATT_MTU (156) +- +-/** +- * Size of the storage area for Attribute values +- * This value depends on the number of attributes used by application. In particular the sum of the following quantities (in octets) should be made for each attribute: +- * - attribute value length +- * - 5, if UUID is 16 bit; 19, if UUID is 128 bit +- * - 2, if server configuration descriptor is used +- * - 2*DTM_NUM_LINK, if client configuration descriptor is used +- * - 2, if extended properties is used +- * The total amount of memory needed is the sum of the above quantities for each attribute. +- * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set +- */ +-#define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) +- +-/** +- * Prepare Write List size in terms of number of packet +- * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set +- */ +-#define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU) +- +-/** +- * Number of allocated memory blocks +- * This parameter is overwritten by the CPU2 with an hardcoded optimal value when the parameter CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set +- */ +-#define CFG_BLE_MBLOCK_COUNT (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK)) +- +-/** +- * Enable or disable the Extended Packet length feature. Valid values are 0 or 1. +- */ +-#define CFG_BLE_DATA_LENGTH_EXTENSION 1 +- +-/** +- * Sleep clock accuracy in Slave mode (ppm value) +- */ +-#define CFG_BLE_SLAVE_SCA 500 +- +-/** +- * Sleep clock accuracy in Master mode +- * 0 : 251 ppm to 500 ppm +- * 1 : 151 ppm to 250 ppm +- * 2 : 101 ppm to 150 ppm +- * 3 : 76 ppm to 100 ppm +- * 4 : 51 ppm to 75 ppm +- * 5 : 31 ppm to 50 ppm +- * 6 : 21 ppm to 30 ppm +- * 7 : 0 ppm to 20 ppm +- */ +-#define CFG_BLE_MASTER_SCA 0 +- +-/** +- * LsSource +- * Some information for Low speed clock mapped in bits field +- * - bit 0: 1: Calibration for the RF system wakeup clock source 0: No calibration for the RF system wakeup clock source +- * - bit 1: 1: STM32WB5M Module device 0: Other devices as STM32WBxx SOC, STM32WB1M module +- * - bit 2: 1: HSE/1024 Clock config 0: LSE Clock config +- */ +-#if defined(STM32WB5Mxx) +- #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) +-#else +- #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) +-#endif +- +-/** +- * Start up time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us) +- */ +-#define CFG_BLE_HSE_STARTUP_TIME 0x148 +- +-/** +- * Maximum duration of the connection event when the device is in Slave mode in units of 625/256 us (~2.44 us) +- */ +-#define CFG_BLE_MAX_CONN_EVENT_LENGTH (0xFFFFFFFF) +- +-/** +- * Viterbi Mode +- * 1 : enabled +- * 0 : disabled +- */ +-#define CFG_BLE_VITERBI_MODE 1 +- +-/** +- * BLE stack Options flags to be configured with: +- * - SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY +- * - SHCI_C2_BLE_INIT_OPTIONS_LL_HOST +- * - SHCI_C2_BLE_INIT_OPTIONS_NO_SVC_CHANGE_DESC +- * - SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC +- * - SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RO +- * - SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW +- * - SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV +- * - SHCI_C2_BLE_INIT_OPTIONS_NO_EXT_ADV +- * - SHCI_C2_BLE_INIT_OPTIONS_CS_ALGO2 +- * - SHCI_C2_BLE_INIT_OPTIONS_NO_CS_ALGO2 +- * - SHCI_C2_BLE_INIT_OPTIONS_REDUC_GATTDB_NVM +- * - SHCI_C2_BLE_INIT_OPTIONS_FULL_GATTDB_NVM +- * - SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_USED +- * - SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_NOTUSED +- * - SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_1 +- * - SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3 +- * - SHCI_C2_BLE_INIT_OPTIONS_APPEARANCE_WRITABLE +- * - SHCI_C2_BLE_INIT_OPTIONS_APPEARANCE_READONLY +- * - SHCI_C2_BLE_INIT_OPTIONS_ENHANCED_ATT_SUPPORTED +- * - SHCI_C2_BLE_INIT_OPTIONS_ENHANCED_ATT_NOTSUPPORTED +- * which are used to set following configuration bits: +- * (bit 0): 1: LL only +- * 0: LL + host +- * (bit 1): 1: no service change desc. +- * 0: with service change desc. +- * (bit 2): 1: device name Read-Only +- * 0: device name R/W +- * (bit 3): 1: extended advertizing supported +- * 0: extended advertizing not supported +- * (bit 4): 1: CS Algo #2 supported +- * 0: CS Algo #2 not supported +- * (bit 5): 1: Reduced GATT database in NVM +- * 0: Full GATT database in NVM +- * (bit 6): 1: GATT caching is used +- * 0: GATT caching is not used +- * (bit 7): 1: LE Power Class 1 +- * 0: LE Power Class 2-3 +- * (bit 8): 1: appearance Writable +- * 0: appearance Read-Only +- * (bit 9): 1: Enhanced ATT supported +- * 0: Enhanced ATT not supported +- * other bits: reserved (shall be set to 0) +- */ +-#define CFG_BLE_OPTIONS (SHCI_C2_BLE_INIT_OPTIONS_LL_HOST | SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC | SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW | SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV | SHCI_C2_BLE_INIT_OPTIONS_CS_ALGO2 | SHCI_C2_BLE_INIT_OPTIONS_FULL_GATTDB_NVM | SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_NOTUSED | SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3 | SHCI_C2_BLE_INIT_OPTIONS_APPEARANCE_READONLY | SHCI_C2_BLE_INIT_OPTIONS_ENHANCED_ATT_NOTSUPPORTED) +- +-#define CFG_BLE_MAX_COC_INITIATOR_NBR (32) +- +-#define CFG_BLE_MIN_TX_POWER (-40) +- +-#define CFG_BLE_MAX_TX_POWER (6) +- +-/** +- * BLE Rx model configuration flags to be configured with: +- * - SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_LEGACY +- * - SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_BLOCKER +- * which are used to set following configuration bits: +- * (bit 0): 1: agc_rssi model improved vs RF blockers +- * 0: Legacy agc_rssi model +- * other bits: reserved (shall be set to 0) +- */ +- +-#define CFG_BLE_RX_MODEL_CONFIG (SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_LEGACY) +- +-/* Maximum number of advertising sets. +- * Range: 1 .. 8 with limitation: +- * This parameter is linked to CFG_BLE_MAX_ADV_DATA_LEN such as both compliant with allocated Total memory computed with BLE_EXT_ADV_BUFFER_SIZE based +- * on Max Extended advertising configuration supported. +- * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set +- */ +- +-#define CFG_BLE_MAX_ADV_SET_NBR (8) +- +- /* Maximum advertising data length (in bytes) +- * Range: 31 .. 1650 with limitation: +- * This parameter is linked to CFG_BLE_MAX_ADV_SET_NBR such as both compliant with allocated Total memory computed with BLE_EXT_ADV_BUFFER_SIZE based +- * on Max Extended advertising configuration supported. +- * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set +- */ +- +-#define CFG_BLE_MAX_ADV_DATA_LEN (207) +- +- /* RF TX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. +- * Range: -1280 .. 1280 +- */ +- +-#define CFG_BLE_TX_PATH_COMPENS (0) +- +- /* RF RX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. +- * Range: -1280 .. 1280 +- */ +- +-#define CFG_BLE_RX_PATH_COMPENS (0) +- +- /* BLE core version (16-bit signed integer). +- * - SHCI_C2_BLE_INIT_BLE_CORE_5_2 +- * - SHCI_C2_BLE_INIT_BLE_CORE_5_3 +- * which are used to set: 11(5.2), 12(5.3). +- */ +- +-#define CFG_BLE_CORE_VERSION (SHCI_C2_BLE_INIT_BLE_CORE_5_3) +- +-/****************************************************************************** +- * Transport Layer +- ******************************************************************************/ +-/** +- * Queue length of BLE Event +- * This parameter defines the number of asynchronous events that can be stored in the HCI layer before +- * being reported to the application. When a command is sent to the BLE core coprocessor, the HCI layer +- * is waiting for the event with the Num_HCI_Command_Packets set to 1. The receive queue shall be large +- * enough to store all asynchronous events received in between. +- * When CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE is set to 27, this allow to store three 255 bytes long asynchronous events +- * between the HCI command and its event. +- * This parameter depends on the value given to CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE. When the queue size is to small, +- * the system may hang if the queue is full with asynchronous events and the HCI layer is still waiting +- * for a CC/CS event, In that case, the notification TL_BLE_HCI_ToNot() is called to indicate +- * to the application a HCI command did not receive its command event within 30s (Default HCI Timeout). +- */ +-#define CFG_TLBLE_EVT_QUEUE_LENGTH 5 +-/** +- * This parameter should be set to fit most events received by the HCI layer. It defines the buffer size of each element +- * allocated in the queue of received events and can be used to optimize the amount of RAM allocated by the Memory Manager. +- * It should not exceed 255 which is the maximum HCI packet payload size (a greater value is a lost of memory as it will +- * never be used) +- * It shall be at least 4 to receive the command status event in one frame. +- * The default value is set to 27 to allow receiving an event of MTU size in a single buffer. This value maybe reduced +- * further depending on the application. +- */ +-#define CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE 255 /**< Set to 255 with the memory manager and the mailbox */ +- +-#define TL_BLE_EVENT_FRAME_SIZE ( TL_EVT_HDR_SIZE + CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE ) +-/****************************************************************************** +- * UART interfaces +- ******************************************************************************/ +- +-/** +- * Select UART interfaces +- */ +-#define CFG_UART_GUI hw_uart1 +-#define CFG_DEBUG_TRACE_UART 0 +-/****************************************************************************** +- * USB interface +- ******************************************************************************/ +- +-/** +- * Enable/Disable USB interface +- */ +-#define CFG_USB_INTERFACE_ENABLE 0 +- +-/****************************************************************************** +- * IPCC interface +- ******************************************************************************/ +- +-/** +- * The IPCC is dedicated to the communication between the CPU2 and the CPU1 +- * and shall not be modified by the application +- * The two following definitions shall not be modified +- */ +-#define HAL_IPCC_TX_IRQHandler(...) HW_IPCC_Tx_Handler( ) +-#define HAL_IPCC_RX_IRQHandler(...) HW_IPCC_Rx_Handler( ) +- +-/****************************************************************************** +- * Low Power +- ******************************************************************************/ +-/** +- * When set to 1, the low power mode is enable +- * When set to 0, the device stays in RUN mode +- */ +-#define CFG_LPM_SUPPORTED 1 +- +-/****************************************************************************** +- * RTC interface +- ******************************************************************************/ +-#define HAL_RTCEx_WakeUpTimerIRQHandler(...) HW_TS_RTC_Wakeup_Handler( ) +- +-/****************************************************************************** +- * Timer Server +- ******************************************************************************/ +-/** +- * CFG_RTC_WUCKSEL_DIVIDER: This sets the RTCCLK divider to the wakeup timer. +- * The lower is the value, the better is the power consumption and the accuracy of the timerserver +- * The higher is the value, the finest is the granularity +- * +- * CFG_RTC_ASYNCH_PRESCALER: This sets the asynchronous prescaler of the RTC. It should as high as possible ( to output +- * clock as low as possible) but the output clock should be equal or higher frequency compare to the clock feeding +- * the wakeup timer. A lower clock speed would impact the accuracy of the timer server. +- * +- * CFG_RTC_SYNCH_PRESCALER: This sets the synchronous prescaler of the RTC. +- * When the 1Hz calendar clock is required, it shall be sets according to other settings +- * When the 1Hz calendar clock is not needed, CFG_RTC_SYNCH_PRESCALER should be set to 0x7FFF (MAX VALUE) +- * +- * CFG_RTCCLK_DIVIDER_CONF: +- * Shall be set to either 0,2,4,8,16 +- * When set to either 2,4,8,16, the 1Hhz calendar is supported +- * When set to 0, the user sets its own configuration +- * +- * The following settings are computed with LSI as input to the RTC +- */ +- +-#define CFG_RTCCLK_DIVIDER_CONF 0 +- +-#if (CFG_RTCCLK_DIVIDER_CONF == 0) +-/** +- * Custom configuration +- * It does not support 1Hz calendar +- * It divides the RTC CLK by 16 +- */ +- +-#define CFG_RTCCLK_DIV (16) +-#define CFG_RTC_WUCKSEL_DIVIDER (0) +-#define CFG_RTC_ASYNCH_PRESCALER (0x0F) +-#define CFG_RTC_SYNCH_PRESCALER (0x7FFF) +- +-#else +- +-#if (CFG_RTCCLK_DIVIDER_CONF == 2) +-/** +- * It divides the RTC CLK by 2 +- */ +-#define CFG_RTC_WUCKSEL_DIVIDER (3) +-#endif +- +-#if (CFG_RTCCLK_DIVIDER_CONF == 4) +-/** +- * It divides the RTC CLK by 4 +- */ +-#define CFG_RTC_WUCKSEL_DIVIDER (2) +-#endif +- +-#if (CFG_RTCCLK_DIVIDER_CONF == 8) +-/** +- * It divides the RTC CLK by 8 +- */ +-#define CFG_RTC_WUCKSEL_DIVIDER (1) +-#endif +- +-#if (CFG_RTCCLK_DIVIDER_CONF == 16) +-/** +- * It divides the RTC CLK by 16 +- */ +-#define CFG_RTC_WUCKSEL_DIVIDER (0) +-#endif +- +-#define CFG_RTCCLK_DIV CFG_RTCCLK_DIVIDER_CONF +-#define CFG_RTC_ASYNCH_PRESCALER (CFG_RTCCLK_DIV - 1) +-#define CFG_RTC_SYNCH_PRESCALER (DIVR( LSE_VALUE, (CFG_RTC_ASYNCH_PRESCALER+1) ) - 1 ) +- +-#endif +- +-/** tick timer values */ +-#define CFG_TS_TICK_VAL DIVR( (CFG_RTCCLK_DIV * 1000000), LSE_VALUE ) +-#define CFG_TS_TICK_VAL_PS DIVR( ((uint64_t)CFG_RTCCLK_DIV * 1e12), (uint64_t)LSE_VALUE ) +- +-typedef enum +-{ +- CFG_TIM_PROC_ID_ISR, +- /* USER CODE BEGIN CFG_TimProcID_t */ +- +- /* USER CODE END CFG_TimProcID_t */ +-} CFG_TimProcID_t; +- +-/****************************************************************************** +- * Debug +- ******************************************************************************/ +-/** +- * When set, this resets some hw resources to set the device in the same state than the power up +- * The FW resets only register that may prevent the FW to run properly +- * +- * This shall be set to 0 in a final product +- * +- */ +-#define CFG_HW_RESET_BY_FW 1 +- +-/** +- * keep debugger enabled while in any low power mode when set to 1 +- * should be set to 0 in production +- */ +-#define CFG_DEBUGGER_SUPPORTED 0 +- +-/** +- * When set to 1, the traces are enabled in the BLE services +- */ +-#define CFG_DEBUG_BLE_TRACE 0 +- +-/** +- * Enable or Disable traces in application +- */ +-#define CFG_DEBUG_APP_TRACE 0 +- +-#if (CFG_DEBUG_APP_TRACE != 0) +-#define APP_DBG_MSG PRINT_MESG_DBG +-#else +-#define APP_DBG_MSG PRINT_NO_MESG +-#endif +- +-#if ( (CFG_DEBUG_BLE_TRACE != 0) || (CFG_DEBUG_APP_TRACE != 0) ) +-#define CFG_DEBUG_TRACE 1 +-#endif +- +-#if (CFG_DEBUG_TRACE != 0) +-#undef CFG_LPM_SUPPORTED +-#undef CFG_DEBUGGER_SUPPORTED +-#define CFG_LPM_SUPPORTED 0 +-#define CFG_DEBUGGER_SUPPORTED 1 +-#endif +- +-/** +- * When CFG_DEBUG_TRACE_FULL is set to 1, the trace are output with the API name, the file name and the line number +- * When CFG_DEBUG_TRACE_LIGHT is set to 1, only the debug message is output +- * +- * When both are set to 0, no trace are output +- * When both are set to 1, CFG_DEBUG_TRACE_FULL is selected +- */ +-#define CFG_DEBUG_TRACE_LIGHT 0 +-#define CFG_DEBUG_TRACE_FULL 0 +- +-#if (( CFG_DEBUG_TRACE != 0 ) && ( CFG_DEBUG_TRACE_LIGHT == 0 ) && (CFG_DEBUG_TRACE_FULL == 0)) +-#undef CFG_DEBUG_TRACE_FULL +-#undef CFG_DEBUG_TRACE_LIGHT +-#define CFG_DEBUG_TRACE_FULL 0 +-#define CFG_DEBUG_TRACE_LIGHT 1 +-#endif +- +-#if ( CFG_DEBUG_TRACE == 0 ) +-#undef CFG_DEBUG_TRACE_FULL +-#undef CFG_DEBUG_TRACE_LIGHT +-#define CFG_DEBUG_TRACE_FULL 0 +-#define CFG_DEBUG_TRACE_LIGHT 0 +-#endif +- +-/** +- * When not set, the traces is looping on sending the trace over UART +- */ +-#define DBG_TRACE_USE_CIRCULAR_QUEUE 1 +- +-/** +- * max buffer Size to queue data traces and max data trace allowed. +- * Only Used if DBG_TRACE_USE_CIRCULAR_QUEUE is defined +- */ +-#define DBG_TRACE_MSG_QUEUE_SIZE 4096 +-#define MAX_DBG_TRACE_MSG_SIZE 1024 +- +-/* USER CODE BEGIN Defines */ +-#define CFG_LED_SUPPORTED 1 +-#define CFG_BUTTON_SUPPORTED 1 +- +-#define PUSH_BUTTON_SW1_EXTI_IRQHandler EXTI4_IRQHandler +-#define PUSH_BUTTON_SW2_EXTI_IRQHandler EXTI0_IRQHandler +-#define PUSH_BUTTON_SW3_EXTI_IRQHandler EXTI1_IRQHandler +-/* USER CODE END Defines */ +- +-/****************************************************************************** +- * Scheduler +- ******************************************************************************/ +- +-/** +- * These are the lists of task id registered to the scheduler +- * Each task id shall be in the range [0:31] +- * This mechanism allows to implement a generic code in the API TL_BLE_HCI_StatusNot() to comply with +- * the requirement that a HCI/ACI command shall never be sent if there is already one pending +- */ +- +-/**< Add in that list all tasks that may send a ACI/HCI command */ +-typedef enum +-{ +- CFG_TASK_BLE_HCI_CMD_ID, +- CFG_TASK_SYS_HCI_CMD_ID, +- CFG_TASK_HCI_ACL_DATA_ID, +- CFG_TASK_SYS_LOCAL_CMD_ID, +- CFG_TASK_TX_TO_HOST_ID, +- /* USER CODE BEGIN CFG_Task_Id_With_HCI_Cmd_t */ +- CFG_TASK_SW1_BUTTON_PUSHED_ID, +- CFG_TASK_SW2_BUTTON_PUSHED_ID, +- CFG_TASK_SW3_BUTTON_PUSHED_ID, +- /* USER CODE END CFG_Task_Id_With_HCI_Cmd_t */ +- CFG_LAST_TASK_ID_WITH_HCICMD, /**< Shall be LAST in the list */ +-} CFG_Task_Id_With_HCI_Cmd_t; +- +-/**< Add in that list all tasks that never send a ACI/HCI command */ +-typedef enum +-{ +- CFG_FIRST_TASK_ID_WITH_NO_HCICMD = CFG_LAST_TASK_ID_WITH_HCICMD - 1, /**< Shall be FIRST in the list */ +- CFG_TASK_SYSTEM_HCI_ASYNCH_EVT_ID, +- /* USER CODE BEGIN CFG_Task_Id_With_NO_HCI_Cmd_t */ +- +- /* USER CODE END CFG_Task_Id_With_NO_HCI_Cmd_t */ +- CFG_LAST_TASK_ID_WITH_NO_HCICMD /**< Shall be LAST in the list */ +-} CFG_Task_Id_With_NO_HCI_Cmd_t; +- +-#define CFG_TASK_NBR CFG_LAST_TASK_ID_WITH_NO_HCICMD +- +-/** +- * This is the list of priority required by the application +- * Each Id shall be in the range 0..31 +- */ +-typedef enum +-{ +- CFG_SCH_PRIO_0, +- /* USER CODE BEGIN CFG_SCH_Prio_Id_t */ +- +- /* USER CODE END CFG_SCH_Prio_Id_t */ +-} CFG_SCH_Prio_Id_t; +- +-/** +- * This is a bit mapping over 32bits listing all events id supported in the application +- */ +-typedef enum +-{ +- CFG_IDLEEVT_SYSTEM_HCI_CMD_EVT_RSP_ID, +- /* USER CODE BEGIN CFG_IdleEvt_Id_t */ +- +- /* USER CODE END CFG_IdleEvt_Id_t */ +-} CFG_IdleEvt_Id_t; +- +-/****************************************************************************** +- * LOW POWER +- ******************************************************************************/ +-/** +- * Supported requester to the MCU Low Power Manager - can be increased up to 32 +- * It list a bit mapping of all user of the Low Power Manager +- */ +-typedef enum +-{ +- CFG_LPM_APP, +- CFG_LPM_APP_BLE, +- /* USER CODE BEGIN CFG_LPM_Id_t */ +- +- /* USER CODE END CFG_LPM_Id_t */ +-} CFG_LPM_Id_t; +- +-/****************************************************************************** +- * OTP manager +- ******************************************************************************/ +-#define CFG_OTP_BASE_ADDRESS OTP_AREA_BASE +- +-#define CFG_OTP_END_ADRESS OTP_AREA_END_ADDR +- +-#endif /*APP_CONF_H */ +- ++/** ++ ****************************************************************************** ++ * @file app_conf_default.h ++ * @author MCD Application Team ++ * @brief Default application configuration file for STM32WPAN Middleware. ++ ****************************************************************************** ++ * @attention ++ * ++ * Copyright (c) 2020-2021 STMicroelectronics. ++ * All rights reserved. ++ * ++ * This software is licensed under terms that can be found in the LICENSE file ++ * in the root directory of this software component. ++ * If no LICENSE file comes with this software, it is provided AS-IS. ++ * ++ ****************************************************************************** ++ */ ++ ++/* Define to prevent recursive inclusion -------------------------------------*/ ++#ifndef APP_CONF_DEFAULT_H ++#define APP_CONF_DEFAULT_H ++ ++/****************************************************************************** ++ * Application Config ++ ******************************************************************************/ ++ ++/**< generic parameters ******************************************************/ ++/* HCI related defines */ ++ ++#define ACI_HAL_SET_TX_POWER_LEVEL 0xFC0F ++#define ACI_WRITE_CONFIG_DATA_OPCODE 0xFC0C ++#define ACI_READ_CONFIG_DATA_OPCODE 0xFC0D ++#define MAX_HCI_ACL_PACKET_SIZE (sizeof(TL_PacketHeader_t) + 5 + 251) ++#define HCI_RESET 0x0C03 ++ ++#ifndef BLE_SHARED_MEM_BYTE_ORDER ++ #define BLE_SHARED_MEM_BYTE_ORDER MSBFIRST ++#endif ++#define BLE_MODULE_SHARED_MEM_BUFFER_SIZE 128 ++ ++/** ++ * Define Tx Power ++ */ ++#define CFG_TX_POWER (0x18) /* -0.15dBm */ ++ ++/****************************************************************************** ++ * BLE Stack ++ ******************************************************************************/ ++/** ++ * Maximum number of simultaneous connections that the device will support. ++ * Valid values are from 1 to 8 ++ */ ++#define CFG_BLE_NUM_LINK 8 ++ ++/** ++ * Maximum number of Services that can be stored in the GATT database. ++ * Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user services ++ */ ++#define CFG_BLE_NUM_GATT_SERVICES 8 ++ ++/** ++ * Maximum number of Attributes ++ * (i.e. the number of characteristic + the number of characteristic values + the number of descriptors, excluding the services) ++ * that can be stored in the GATT database. ++ * Note that certain characteristics and relative descriptors are added automatically during device initialization ++ * so this parameters should be 9 plus the number of user Attributes ++ */ ++#define CFG_BLE_NUM_GATT_ATTRIBUTES 68 ++ ++/** ++ * Maximum supported ATT_MTU size ++ * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set ++ */ ++#define CFG_BLE_MAX_ATT_MTU (156) ++ ++/** ++ * Size of the storage area for Attribute values ++ * This value depends on the number of attributes used by application. In particular the sum of the following quantities (in octets) should be made for each attribute: ++ * - attribute value length ++ * - 5, if UUID is 16 bit; 19, if UUID is 128 bit ++ * - 2, if server configuration descriptor is used ++ * - 2*DTM_NUM_LINK, if client configuration descriptor is used ++ * - 2, if extended properties is used ++ * The total amount of memory needed is the sum of the above quantities for each attribute. ++ * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set ++ */ ++#define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) ++ ++/** ++ * Prepare Write List size in terms of number of packet ++ * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set ++ */ ++// #define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU) ++#define CFG_BLE_PREPARE_WRITE_LIST_SIZE (0x3A) ++ ++/** ++ * Number of allocated memory blocks ++ * This parameter is overwritten by the CPU2 with an hardcoded optimal value when the parameter CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set ++ */ ++// #define CFG_BLE_MBLOCK_COUNT (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK)) ++#define CFG_BLE_MBLOCK_COUNT (0x79) ++ ++/** ++ * Enable or disable the Extended Packet length feature. Valid values are 0 or 1. ++ */ ++#define CFG_BLE_DATA_LENGTH_EXTENSION 1 ++ ++/** ++ * Sleep clock accuracy in Slave mode (ppm value) ++ */ ++#define CFG_BLE_SLAVE_SCA 500 ++ ++/** ++ * Sleep clock accuracy in Master mode ++ * 0 : 251 ppm to 500 ppm ++ * 1 : 151 ppm to 250 ppm ++ * 2 : 101 ppm to 150 ppm ++ * 3 : 76 ppm to 100 ppm ++ * 4 : 51 ppm to 75 ppm ++ * 5 : 31 ppm to 50 ppm ++ * 6 : 21 ppm to 30 ppm ++ * 7 : 0 ppm to 20 ppm ++ */ ++#define CFG_BLE_MASTER_SCA 0 ++ ++/** ++ * LsSource ++ * Some information for Low speed clock mapped in bits field ++ * - bit 0: 1: Calibration for the RF system wakeup clock source 0: No calibration for the RF system wakeup clock source ++ * - bit 1: 1: STM32WB5M Module device 0: Other devices as STM32WBxx SOC, STM32WB1M module ++ * - bit 2: 1: HSE/1024 Clock config 0: LSE Clock config ++ */ ++#if defined(STM32WB5Mxx) ++ #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) ++#else ++ #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) ++#endif ++ ++/** ++ * Start up time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us) ++ */ ++#define CFG_BLE_HSE_STARTUP_TIME 0x148 ++ ++/** ++ * Maximum duration of the connection event when the device is in Slave mode in units of 625/256 us (~2.44 us) ++ */ ++#define CFG_BLE_MAX_CONN_EVENT_LENGTH (0xFFFFFFFF) ++ ++/** ++ * Viterbi Mode ++ * 1 : enabled ++ * 0 : disabled ++ */ ++#define CFG_BLE_VITERBI_MODE 1 ++ ++/** ++ * BLE stack Options flags to be configured with: ++ * - SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY ++ * - SHCI_C2_BLE_INIT_OPTIONS_LL_HOST ++ * - SHCI_C2_BLE_INIT_OPTIONS_NO_SVC_CHANGE_DESC ++ * - SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC ++ * - SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RO ++ * - SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW ++ * - SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV ++ * - SHCI_C2_BLE_INIT_OPTIONS_NO_EXT_ADV ++ * - SHCI_C2_BLE_INIT_OPTIONS_CS_ALGO2 ++ * - SHCI_C2_BLE_INIT_OPTIONS_NO_CS_ALGO2 ++ * - SHCI_C2_BLE_INIT_OPTIONS_REDUC_GATTDB_NVM ++ * - SHCI_C2_BLE_INIT_OPTIONS_FULL_GATTDB_NVM ++ * - SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_USED ++ * - SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_NOTUSED ++ * - SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_1 ++ * - SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3 ++ * - SHCI_C2_BLE_INIT_OPTIONS_APPEARANCE_WRITABLE ++ * - SHCI_C2_BLE_INIT_OPTIONS_APPEARANCE_READONLY ++ * - SHCI_C2_BLE_INIT_OPTIONS_ENHANCED_ATT_SUPPORTED ++ * - SHCI_C2_BLE_INIT_OPTIONS_ENHANCED_ATT_NOTSUPPORTED ++ * which are used to set following configuration bits: ++ * (bit 0): 1: LL only ++ * 0: LL + host ++ * (bit 1): 1: no service change desc. ++ * 0: with service change desc. ++ * (bit 2): 1: device name Read-Only ++ * 0: device name R/W ++ * (bit 3): 1: extended advertizing supported ++ * 0: extended advertizing not supported ++ * (bit 4): 1: CS Algo #2 supported ++ * 0: CS Algo #2 not supported ++ * (bit 5): 1: Reduced GATT database in NVM ++ * 0: Full GATT database in NVM ++ * (bit 6): 1: GATT caching is used ++ * 0: GATT caching is not used ++ * (bit 7): 1: LE Power Class 1 ++ * 0: LE Power Class 2-3 ++ * (bit 8): 1: appearance Writable ++ * 0: appearance Read-Only ++ * (bit 9): 1: Enhanced ATT supported ++ * 0: Enhanced ATT not supported ++ * other bits: reserved (shall be set to 0) ++ */ ++#define CFG_BLE_OPTIONS (SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY) ++ ++#define CFG_BLE_MAX_COC_INITIATOR_NBR (32) ++ ++#define CFG_BLE_MIN_TX_POWER (-40) ++ ++#define CFG_BLE_MAX_TX_POWER (6) ++ ++/** ++ * BLE Rx model configuration flags to be configured with: ++ * - SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_LEGACY ++ * - SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_BLOCKER ++ * which are used to set following configuration bits: ++ * (bit 0): 1: agc_rssi model improved vs RF blockers ++ * 0: Legacy agc_rssi model ++ * other bits: reserved (shall be set to 0) ++ */ ++ ++#define CFG_BLE_RX_MODEL_CONFIG (SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_LEGACY) ++ ++/* Maximum number of advertising sets. ++ * Range: 1 .. 8 with limitation: ++ * This parameter is linked to CFG_BLE_MAX_ADV_DATA_LEN such as both compliant with allocated Total memory computed with BLE_EXT_ADV_BUFFER_SIZE based ++ * on Max Extended advertising configuration supported. ++ * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set ++ */ ++ ++#define CFG_BLE_MAX_ADV_SET_NBR (8) ++ ++ /* Maximum advertising data length (in bytes) ++ * Range: 31 .. 1650 with limitation: ++ * This parameter is linked to CFG_BLE_MAX_ADV_SET_NBR such as both compliant with allocated Total memory computed with BLE_EXT_ADV_BUFFER_SIZE based ++ * on Max Extended advertising configuration supported. ++ * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set ++ */ ++ ++#define CFG_BLE_MAX_ADV_DATA_LEN (207) ++ ++ /* RF TX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. ++ * Range: -1280 .. 1280 ++ */ ++ ++#define CFG_BLE_TX_PATH_COMPENS (0) ++ ++ /* RF RX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. ++ * Range: -1280 .. 1280 ++ */ ++ ++#define CFG_BLE_RX_PATH_COMPENS (0) ++ ++ /* BLE core version (16-bit signed integer). ++ * - SHCI_C2_BLE_INIT_BLE_CORE_5_2 ++ * - SHCI_C2_BLE_INIT_BLE_CORE_5_3 ++ * which are used to set: 11(5.2), 12(5.3). ++ */ ++ ++#define CFG_BLE_CORE_VERSION (SHCI_C2_BLE_INIT_BLE_CORE_5_3) ++ ++#endif /* APP_CONF_DEFAULT_H */ +diff --git a/src/utility/STM32Cube_FW/ble_bufsize.h b/src/utility/STM32Cube_FW/ble_bufsize.h +index 4269fa4..cea5da8 100644 +--- a/src/utility/STM32Cube_FW/ble_bufsize.h ++++ b/src/utility/STM32Cube_FW/ble_bufsize.h +@@ -75,6 +75,13 @@ + ((pw) + MAX(BLE_MEM_BLOCK_X_MTU(mtu, n_link), \ + BLE_MBLOCKS_SECURE_CONNECTIONS)) + ++/* ++ * BLE_DEFAULT_MBLOCKS_COUNT: default memory blocks count ++ */ ++#define BLE_DEFAULT_MBLOCKS_COUNT(n_link) \ ++ BLE_MBLOCKS_CALC(BLE_DEFAULT_PREP_WRITE_LIST_SIZE, \ ++ BLE_DEFAULT_MAX_ATT_MTU, n_link) ++ + /* + * BLE_FIXED_BUFFER_SIZE_BYTES: + * A part of the RAM, is dynamically allocated by initializing all the pointers +diff --git a/src/utility/STM32Cube_FW/hw.h b/src/utility/STM32Cube_FW/hw.h +index 503fa2c..fcf0451 100644 +--- a/src/utility/STM32Cube_FW/hw.h ++++ b/src/utility/STM32Cube_FW/hw.h +@@ -26,14 +26,21 @@ extern "C" { + #endif + + /* Includes ------------------------------------------------------------------*/ ++#include "stm32_def.h" ++#include "stm32wbxx_ll_bus.h" ++#include "stm32wbxx_ll_exti.h" ++#include "stm32wbxx_ll_system.h" ++#include "stm32wbxx_ll_rcc.h" ++#include "stm32wbxx_ll_ipcc.h" ++#include "stm32wbxx_ll_cortex.h" ++#include "stm32wbxx_ll_utils.h" ++#include "stm32wbxx_ll_pwr.h" + + /****************************************************************************** + * HW IPCC + ******************************************************************************/ + void HW_IPCC_Enable( void ); + void HW_IPCC_Init( void ); +- void HW_IPCC_Rx_Handler( void ); +- void HW_IPCC_Tx_Handler( void ); + + void HW_IPCC_BLE_Init( void ); + void HW_IPCC_BLE_SendCmd( void ); +@@ -80,23 +87,6 @@ extern "C" { + void HW_IPCC_TRACES_Init( void ); + void HW_IPCC_TRACES_EvtNot( void ); + +- void HW_IPCC_MAC_802_15_4_Init( void ); +- void HW_IPCC_MAC_802_15_4_SendCmd( void ); +- void HW_IPCC_MAC_802_15_4_SendAck( void ); +- void HW_IPCC_MAC_802_15_4_CmdEvtNot( void ); +- void HW_IPCC_MAC_802_15_4_EvtNot( void ); +- +- void HW_IPCC_ZIGBEE_Init( void ); +- +- void HW_IPCC_ZIGBEE_SendM4RequestToM0(void); /* M4 Request to M0 */ +- void HW_IPCC_ZIGBEE_RecvAppliAckFromM0(void); /* Request ACK from M0 */ +- +- void HW_IPCC_ZIGBEE_RecvM0NotifyToM4(void); /* M0 Notify to M4 */ +- void HW_IPCC_ZIGBEE_SendM4AckToM0Notify(void); /* Notify ACK from M4 */ +- void HW_IPCC_ZIGBEE_RecvM0RequestToM4(void); /* M0 Request to M4 */ +- void HW_IPCC_ZIGBEE_SendM4AckToM0Request(void); /* Request ACK from M4 */ +- +- + #ifdef __cplusplus + } + #endif +diff --git a/src/utility/STM32Cube_FW/hw_ipcc.c b/src/utility/STM32Cube_FW/hw_ipcc.c +index fd620b8..0c1868f 100644 +--- a/src/utility/STM32Cube_FW/hw_ipcc.c ++++ b/src/utility/STM32Cube_FW/hw_ipcc.c +@@ -1,4 +1,3 @@ +-/* USER CODE BEGIN Header */ + /** + ****************************************************************************** + * @file hw_ipcc.c +@@ -16,10 +15,10 @@ + * + ****************************************************************************** + */ +-/* USER CODE END Header */ + ++#if defined(STM32WBxx) + /* Includes ------------------------------------------------------------------*/ +-#include "app_common.h" ++#include "hw.h" + #include "mbox_def.h" + + /* Global variables ---------------------------------------------------------*/ +@@ -56,34 +55,17 @@ static void HW_IPCC_LLD_BLE_ReceiveRspHandler( void ); + static void HW_IPCC_LLD_BLE_ReceiveM0CmdHandler( void ); + #endif + +-#ifdef MAC_802_15_4_WB +-static void HW_IPCC_MAC_802_15_4_CmdEvtHandler( void ); +-static void HW_IPCC_MAC_802_15_4_NotEvtHandler( void ); +-#endif +- +-#ifdef ZIGBEE_WB +-static void HW_IPCC_ZIGBEE_CmdEvtHandler( void ); +-static void HW_IPCC_ZIGBEE_StackNotifEvtHandler( void ); +-static void HW_IPCC_ZIGBEE_StackM0RequestHandler( void ); +-#endif +- + /* Public function definition -----------------------------------------------*/ + + /****************************************************************************** + * INTERRUPT HANDLER + ******************************************************************************/ +-void HW_IPCC_Rx_Handler( void ) ++void IPCC_C1_RX_IRQHandler( void ) + { + if (HW_IPCC_RX_PENDING( HW_IPCC_SYSTEM_EVENT_CHANNEL )) + { + HW_IPCC_SYS_EvtHandler(); + } +-#ifdef MAC_802_15_4_WB +- else if (HW_IPCC_RX_PENDING( HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL )) +- { +- HW_IPCC_MAC_802_15_4_NotEvtHandler(); +- } +-#endif /* MAC_802_15_4_WB */ + #ifdef THREAD_WB + else if (HW_IPCC_RX_PENDING( HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL )) + { +@@ -114,16 +96,6 @@ void HW_IPCC_Rx_Handler( void ) + HW_IPCC_LLD_BLE_ReceiveM0CmdHandler(); + } + #endif /* LLD_TESTS_WB */ +-#ifdef ZIGBEE_WB +- else if (HW_IPCC_RX_PENDING( HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL )) +- { +- HW_IPCC_ZIGBEE_StackNotifEvtHandler(); +- } +- else if (HW_IPCC_RX_PENDING( HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL )) +- { +- HW_IPCC_ZIGBEE_StackM0RequestHandler(); +- } +-#endif /* ZIGBEE_WB */ + else if (HW_IPCC_RX_PENDING( HW_IPCC_BLE_EVENT_CHANNEL )) + { + HW_IPCC_BLE_EvtHandler(); +@@ -132,22 +104,14 @@ void HW_IPCC_Rx_Handler( void ) + { + HW_IPCC_TRACES_EvtHandler(); + } +- +- return; + } + +-void HW_IPCC_Tx_Handler( void ) ++void IPCC_C1_TX_IRQHandler( void ) + { + if (HW_IPCC_TX_PENDING( HW_IPCC_SYSTEM_CMD_RSP_CHANNEL )) + { + HW_IPCC_SYS_CmdEvtHandler(); + } +-#ifdef MAC_802_15_4_WB +- else if (HW_IPCC_TX_PENDING( HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL )) +- { +- HW_IPCC_MAC_802_15_4_CmdEvtHandler(); +- } +-#endif /* MAC_802_15_4_WB */ + #ifdef THREAD_WB + else if (HW_IPCC_TX_PENDING( HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL )) + { +@@ -157,12 +121,6 @@ void HW_IPCC_Tx_Handler( void ) + #ifdef LLD_TESTS_WB + // No TX handler for LLD tests + #endif /* LLD_TESTS_WB */ +-#ifdef ZIGBEE_WB +- if (HW_IPCC_TX_PENDING( HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL )) +- { +- HW_IPCC_ZIGBEE_CmdEvtHandler(); +- } +-#endif /* ZIGBEE_WB */ + else if (HW_IPCC_TX_PENDING( HW_IPCC_MM_RELEASE_BUFFER_CHANNEL )) + { + HW_IPCC_MM_FreeBufHandler(); +@@ -171,8 +129,6 @@ void HW_IPCC_Tx_Handler( void ) + { + HW_IPCC_BLE_AclDataEvtHandler(); + } +- +- return; + } + /****************************************************************************** + * GENERAL +@@ -204,8 +160,6 @@ void HW_IPCC_Enable( void ) + __SEV( ); /* Set the internal event flag and send an event to the CPU2 */ + __WFE( ); /* Clear the internal event flag */ + LL_PWR_EnableBootC2( ); +- +- return; + } + + void HW_IPCC_Init( void ) +@@ -217,8 +171,6 @@ void HW_IPCC_Init( void ) + + HAL_NVIC_EnableIRQ(IPCC_C1_RX_IRQn); + HAL_NVIC_EnableIRQ(IPCC_C1_TX_IRQn); +- +- return; + } + + /****************************************************************************** +@@ -227,15 +179,11 @@ void HW_IPCC_Init( void ) + void HW_IPCC_BLE_Init( void ) + { + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_BLE_EVENT_CHANNEL ); +- +- return; + } + + void HW_IPCC_BLE_SendCmd( void ) + { + LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_BLE_CMD_CHANNEL ); +- +- return; + } + + static void HW_IPCC_BLE_EvtHandler( void ) +@@ -243,16 +191,12 @@ static void HW_IPCC_BLE_EvtHandler( void ) + HW_IPCC_BLE_RxEvtNot(); + + LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_BLE_EVENT_CHANNEL ); +- +- return; + } + + void HW_IPCC_BLE_SendAclData( void ) + { + LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL ); + LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL ); +- +- return; + } + + static void HW_IPCC_BLE_AclDataEvtHandler( void ) +@@ -260,8 +204,6 @@ static void HW_IPCC_BLE_AclDataEvtHandler( void ) + LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL ); + + HW_IPCC_BLE_AclDataAckNot(); +- +- return; + } + + __weak void HW_IPCC_BLE_AclDataAckNot( void ){}; +@@ -273,16 +215,12 @@ __weak void HW_IPCC_BLE_RxEvtNot( void ){}; + void HW_IPCC_SYS_Init( void ) + { + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_SYSTEM_EVENT_CHANNEL ); +- +- return; + } + + void HW_IPCC_SYS_SendCmd( void ) + { + LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL ); + LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL ); +- +- return; + } + + static void HW_IPCC_SYS_CmdEvtHandler( void ) +@@ -290,8 +228,6 @@ static void HW_IPCC_SYS_CmdEvtHandler( void ) + LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL ); + + HW_IPCC_SYS_CmdEvtNot(); +- +- return; + } + + static void HW_IPCC_SYS_EvtHandler( void ) +@@ -299,61 +235,11 @@ static void HW_IPCC_SYS_EvtHandler( void ) + HW_IPCC_SYS_EvtNot(); + + LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_SYSTEM_EVENT_CHANNEL ); +- +- return; + } + + __weak void HW_IPCC_SYS_CmdEvtNot( void ){}; + __weak void HW_IPCC_SYS_EvtNot( void ){}; + +-/****************************************************************************** +- * MAC 802.15.4 +- ******************************************************************************/ +-#ifdef MAC_802_15_4_WB +-void HW_IPCC_MAC_802_15_4_Init( void ) +-{ +- LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL ); +- +- return; +-} +- +-void HW_IPCC_MAC_802_15_4_SendCmd( void ) +-{ +- LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL ); +- LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL ); +- +- return; +-} +- +-void HW_IPCC_MAC_802_15_4_SendAck( void ) +-{ +- LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL ); +- LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL ); +- +- return; +-} +- +-static void HW_IPCC_MAC_802_15_4_CmdEvtHandler( void ) +-{ +- LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL ); +- +- HW_IPCC_MAC_802_15_4_CmdEvtNot(); +- +- return; +-} +- +-static void HW_IPCC_MAC_802_15_4_NotEvtHandler( void ) +-{ +- LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL ); +- +- HW_IPCC_MAC_802_15_4_EvtNot(); +- +- return; +-} +-__weak void HW_IPCC_MAC_802_15_4_CmdEvtNot( void ){}; +-__weak void HW_IPCC_MAC_802_15_4_EvtNot( void ){}; +-#endif +- + /****************************************************************************** + * THREAD + ******************************************************************************/ +@@ -393,8 +279,6 @@ void HW_IPCC_THREAD_CliSendAck( void ) + { + LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL ); + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL ); +- +- return; + } + + static void HW_IPCC_OT_CmdEvtHandler( void ) +@@ -402,8 +286,6 @@ static void HW_IPCC_OT_CmdEvtHandler( void ) + LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL ); + + HW_IPCC_OT_CmdEvtNot(); +- +- return; + } + + static void HW_IPCC_THREAD_NotEvtHandler( void ) +@@ -411,8 +293,6 @@ static void HW_IPCC_THREAD_NotEvtHandler( void ) + LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL ); + + HW_IPCC_THREAD_EvtNot(); +- +- return; + } + + static void HW_IPCC_THREAD_CliNotEvtHandler( void ) +@@ -420,8 +300,6 @@ static void HW_IPCC_THREAD_CliNotEvtHandler( void ) + LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL ); + + HW_IPCC_THREAD_CliEvtNot(); +- +- return; + } + + __weak void HW_IPCC_OT_CmdEvtNot( void ){}; +@@ -438,7 +316,6 @@ void HW_IPCC_LLDTESTS_Init( void ) + { + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL ); + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL ); +- return; + } + + void HW_IPCC_LLDTESTS_SendCliCmd( void ) +@@ -451,28 +328,24 @@ static void HW_IPCC_LLDTESTS_ReceiveCliRspHandler( void ) + { + LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL ); + HW_IPCC_LLDTESTS_ReceiveCliRsp(); +- return; + } + + void HW_IPCC_LLDTESTS_SendCliRspAck( void ) + { + LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL ); + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL ); +- return; + } + + static void HW_IPCC_LLDTESTS_ReceiveM0CmdHandler( void ) + { + LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL ); + HW_IPCC_LLDTESTS_ReceiveM0Cmd(); +- return; + } + + void HW_IPCC_LLDTESTS_SendM0CmdAck( void ) + { + LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL ); + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL ); +- return; + } + __weak void HW_IPCC_LLDTESTS_ReceiveCliRsp( void ){}; + __weak void HW_IPCC_LLDTESTS_ReceiveM0Cmd( void ){}; +@@ -486,13 +359,11 @@ void HW_IPCC_LLD_BLE_Init( void ) + { + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_RSP_CHANNEL ); + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_M0_CMD_CHANNEL ); +- return; + } + + void HW_IPCC_LLD_BLE_SendCliCmd( void ) + { + LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_LLD_BLE_CLI_CMD_CHANNEL ); +- return; + } + + /*static void HW_IPCC_LLD_BLE_ReceiveCliRspHandler( void ) +@@ -506,21 +377,18 @@ void HW_IPCC_LLD_BLE_SendCliRspAck( void ) + { + LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLD_BLE_CLI_RSP_CHANNEL ); + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_CLI_RSP_CHANNEL ); +- return; + } + + static void HW_IPCC_LLD_BLE_ReceiveM0CmdHandler( void ) + { + //LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_M0_CMD_CHANNEL ); + HW_IPCC_LLD_BLE_ReceiveM0Cmd(); +- return; + } + + void HW_IPCC_LLD_BLE_SendM0CmdAck( void ) + { + LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLD_BLE_M0_CMD_CHANNEL ); + //LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_M0_CMD_CHANNEL ); +- return; + } + __weak void HW_IPCC_LLD_BLE_ReceiveCliRsp( void ){}; + __weak void HW_IPCC_LLD_BLE_ReceiveM0Cmd( void ){}; +@@ -529,93 +397,22 @@ __weak void HW_IPCC_LLD_BLE_ReceiveM0Cmd( void ){}; + void HW_IPCC_LLD_BLE_SendCmd( void ) + { + LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_LLD_BLE_CMD_CHANNEL ); +- return; + } + + static void HW_IPCC_LLD_BLE_ReceiveRspHandler( void ) + { + LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_RSP_CHANNEL ); + HW_IPCC_LLD_BLE_ReceiveRsp(); +- return; + } + + void HW_IPCC_LLD_BLE_SendRspAck( void ) + { + LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLD_BLE_RSP_CHANNEL ); + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_RSP_CHANNEL ); +- return; + } + + #endif /* LLD_BLE_WB */ + +-/****************************************************************************** +- * ZIGBEE +- ******************************************************************************/ +-#ifdef ZIGBEE_WB +-void HW_IPCC_ZIGBEE_Init( void ) +-{ +- LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL ); +- LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL ); +- +- return; +-} +- +-void HW_IPCC_ZIGBEE_SendM4RequestToM0( void ) +-{ +- LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL ); +- LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL ); +- +- return; +-} +- +-void HW_IPCC_ZIGBEE_SendM4AckToM0Notify( void ) +-{ +- LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL ); +- LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL ); +- +- return; +-} +- +-static void HW_IPCC_ZIGBEE_CmdEvtHandler( void ) +-{ +- LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL ); +- +- HW_IPCC_ZIGBEE_RecvAppliAckFromM0(); +- +- return; +-} +- +-static void HW_IPCC_ZIGBEE_StackNotifEvtHandler( void ) +-{ +- LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL ); +- +- HW_IPCC_ZIGBEE_RecvM0NotifyToM4(); +- +- return; +-} +- +-static void HW_IPCC_ZIGBEE_StackM0RequestHandler( void ) +-{ +- LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL ); +- +- HW_IPCC_ZIGBEE_RecvM0RequestToM4(); +- +- return; +-} +- +-void HW_IPCC_ZIGBEE_SendM4AckToM0Request( void ) +-{ +- LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL ); +- LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL ); +- +- return; +-} +- +-__weak void HW_IPCC_ZIGBEE_RecvAppliAckFromM0( void ){}; +-__weak void HW_IPCC_ZIGBEE_RecvM0NotifyToM4( void ){}; +-__weak void HW_IPCC_ZIGBEE_RecvM0RequestToM4( void ){}; +-#endif /* ZIGBEE_WB */ +- + /****************************************************************************** + * MEMORY MANAGER + ******************************************************************************/ +@@ -632,8 +429,6 @@ void HW_IPCC_MM_SendFreeBuf( void (*cb)( void ) ) + + LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL ); + } +- +- return; + } + + static void HW_IPCC_MM_FreeBufHandler( void ) +@@ -643,8 +438,6 @@ static void HW_IPCC_MM_FreeBufHandler( void ) + FreeBufCb(); + + LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL ); +- +- return; + } + + /****************************************************************************** +@@ -662,8 +455,7 @@ static void HW_IPCC_TRACES_EvtHandler( void ) + HW_IPCC_TRACES_EvtNot(); + + LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_TRACES_CHANNEL ); +- +- return; + } + + __weak void HW_IPCC_TRACES_EvtNot( void ){}; ++#endif /* STM32WBxx */ +diff --git a/src/utility/STM32Cube_FW/mbox_def.h b/src/utility/STM32Cube_FW/mbox_def.h +index 68b71f9..0c974f8 100644 +--- a/src/utility/STM32Cube_FW/mbox_def.h ++++ b/src/utility/STM32Cube_FW/mbox_def.h +@@ -106,12 +106,6 @@ extern "C" { + uint8_t *m0cmd_buffer; + } MB_BleLldTable_t; + +- typedef struct +- { +- uint8_t *notifM0toM4_buffer; +- uint8_t *appliCmdM4toM0_buffer; +- uint8_t *requestM0toM4_buffer; +- } MB_ZigbeeTable_t; + /** + * msg + * [0:7] = cmd/evt +@@ -139,13 +133,6 @@ extern "C" { + uint8_t *traces_queue; + } MB_TracesTable_t; + +- typedef struct +- { +- uint8_t *p_cmdrsp_buffer; +- uint8_t *p_notack_buffer; +- uint8_t *evt_queue; +- } MB_Mac_802_15_4_t; +- + typedef struct + { + MB_DeviceInfoTable_t *p_device_info_table; +@@ -154,8 +141,6 @@ extern "C" { + MB_SysTable_t *p_sys_table; + MB_MemManagerTable_t *p_mem_manager_table; + MB_TracesTable_t *p_traces_table; +- MB_Mac_802_15_4_t *p_mac_802_15_4_table; +- MB_ZigbeeTable_t *p_zigbee_table; + MB_LldTestsTable_t *p_lld_tests_table; + MB_BleLldTable_t *p_ble_lld_table; + } MB_RefTable_t; +@@ -199,15 +184,6 @@ typedef struct + * | | + * |<---HW_IPCC_SYSTEM_EVENT_CHANNEL-----------------| + * | | +- * | (ZIGBEE) | +- * |----HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL------------>| +- * | | +- * |----HW_IPCC_ZIGBEE_CMD_CLI_CHANNEL-------------->| +- * | | +- * |<---HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL-------| +- * | | +- * |<---HW_IPCC_ZIGBEE_CLI_NOTIF_ACK_CHANNEL---------| +- * | | + * | (THREAD) | + * |----HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL----------->| + * | | +@@ -231,11 +207,6 @@ typedef struct + * | | + * |<---HW_IPCC_BLE_LLD_M0_CMD_CHANNEL---------------| + * | | +- * | (MAC) | +- * |----HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL-------->| +- * | | +- * |<---HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL| +- * | | + * | (BUFFER) | + * |----HW_IPCC_MM_RELEASE_BUFFER_CHANNE------------>| + * | | +@@ -253,8 +224,6 @@ typedef struct + #define HW_IPCC_BLE_CMD_CHANNEL LL_IPCC_CHANNEL_1 + #define HW_IPCC_SYSTEM_CMD_RSP_CHANNEL LL_IPCC_CHANNEL_2 + #define HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL LL_IPCC_CHANNEL_3 +-#define HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL LL_IPCC_CHANNEL_3 +-#define HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL LL_IPCC_CHANNEL_3 + #define HW_IPCC_MM_RELEASE_BUFFER_CHANNEL LL_IPCC_CHANNEL_4 + #define HW_IPCC_THREAD_CLI_CMD_CHANNEL LL_IPCC_CHANNEL_5 + #define HW_IPCC_LLDTESTS_CLI_CMD_CHANNEL LL_IPCC_CHANNEL_5 +@@ -266,8 +235,6 @@ typedef struct + #define HW_IPCC_BLE_EVENT_CHANNEL LL_IPCC_CHANNEL_1 + #define HW_IPCC_SYSTEM_EVENT_CHANNEL LL_IPCC_CHANNEL_2 + #define HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL LL_IPCC_CHANNEL_3 +-#define HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL LL_IPCC_CHANNEL_3 +-#define HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL LL_IPCC_CHANNEL_3 + #define HW_IPCC_LLDTESTS_M0_CMD_CHANNEL LL_IPCC_CHANNEL_3 + #define HW_IPCC_BLE_LLD_M0_CMD_CHANNEL LL_IPCC_CHANNEL_3 + #define HW_IPCC_TRACES_CHANNEL LL_IPCC_CHANNEL_4 +@@ -275,6 +242,5 @@ typedef struct + #define HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL LL_IPCC_CHANNEL_5 + #define HW_IPCC_BLE_LLD_CLI_RSP_CHANNEL LL_IPCC_CHANNEL_5 + #define HW_IPCC_BLE_LLD_RSP_CHANNEL LL_IPCC_CHANNEL_5 +-#define HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL LL_IPCC_CHANNEL_5 + #endif /*__MBOX_H */ + +diff --git a/src/utility/STM32Cube_FW/shci.c b/src/utility/STM32Cube_FW/shci.c +index 301db76..a847522 100644 +--- a/src/utility/STM32Cube_FW/shci.c ++++ b/src/utility/STM32Cube_FW/shci.c +@@ -16,7 +16,7 @@ + ****************************************************************************** + */ + +- ++#if defined(STM32WBxx) + /* Includes ------------------------------------------------------------------*/ + #include "stm32_wpan_common.h" + +@@ -352,24 +352,6 @@ SHCI_CmdStatus_t SHCI_C2_BLE_LLD_Init( uint8_t param_size, uint8_t * p_param ) + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); + } + +-SHCI_CmdStatus_t SHCI_C2_ZIGBEE_Init( void ) +-{ +- /** +- * Buffer is large enough to hold command complete without payload +- */ +- uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; +- TL_EvtPacket_t * p_rsp; +- +- p_rsp = (TL_EvtPacket_t *)local_buffer; +- +- shci_send( SHCI_OPCODE_C2_ZIGBEE_INIT, +- 0, +- 0, +- p_rsp ); +- +- return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +-} +- + SHCI_CmdStatus_t SHCI_C2_DEBUG_Init( SHCI_C2_DEBUG_Init_Cmd_Packet_t *pCmdPacket ) + { + /** +@@ -527,24 +509,6 @@ SHCI_CmdStatus_t SHCI_C2_RADIO_AllowLowPower( SHCI_C2_FLASH_Ip_t Ip,uint8_t Fla + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); + } + +-SHCI_CmdStatus_t SHCI_C2_MAC_802_15_4_Init( void ) +-{ +- /** +- * Buffer is large enough to hold command complete without payload +- */ +- uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; +- TL_EvtPacket_t * p_rsp; +- +- p_rsp = (TL_EvtPacket_t *)local_buffer; +- +- shci_send( SHCI_OPCODE_C2_MAC_802_15_4_INIT, +- 0, +- 0, +- p_rsp ); +- +- return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +-} +- + SHCI_CmdStatus_t SHCI_C2_Reinit( void ) + { + /** +@@ -739,3 +703,4 @@ SHCI_CmdStatus_t SHCI_GetWirelessFwInfo( WirelessFwInfo_t* pWirelessInfo ) + + return (SHCI_Success); + } ++#endif /* STM32WBxx */ +diff --git a/src/utility/STM32Cube_FW/shci.h b/src/utility/STM32Cube_FW/shci.h +index 7ca9021..a0f1e4d 100644 +--- a/src/utility/STM32Cube_FW/shci.h ++++ b/src/utility/STM32Cube_FW/shci.h +@@ -49,7 +49,6 @@ extern "C" { + ERR_BLE_INIT = 0, /* This event is currently not reported by the CPU2 */ + ERR_THREAD_LLD_FATAL_ERROR = 125, /* The LLD driver used on 802_15_4 detected a fatal error */ + ERR_THREAD_UNKNOWN_CMD = 126, /* The command send by the CPU1 to control the Thread stack is unknown */ +- ERR_ZIGBEE_UNKNOWN_CMD = 200, /* The command send by the CPU1 to control the Zigbee stack is unknown */ + } SCHI_SystemErrCode_t; + + #define SHCI_EVTCODE ( 0xFF ) +@@ -216,9 +215,7 @@ extern "C" { + SHCI_OCF_C2_FLASH_STORE_DATA, + SHCI_OCF_C2_FLASH_ERASE_DATA, + SHCI_OCF_C2_RADIO_ALLOW_LOW_POWER, +- SHCI_OCF_C2_MAC_802_15_4_INIT, + SHCI_OCF_C2_REINIT, +- SHCI_OCF_C2_ZIGBEE_INIT, + SHCI_OCF_C2_LLD_TESTS_INIT, + SHCI_OCF_C2_EXTPA_CONFIG, + SHCI_OCF_C2_SET_FLASH_ACTIVITY_CONTROL, +@@ -436,7 +433,7 @@ extern "C" { + * PrWriteListSize + * NOTE: This parameter is ignored by the CPU2 when the parameter "Options" is set to "LL_only" ( see Options description in that structure ) + * +- * Maximum number of supported “prepare write request” ++ * Maximum number of supported "prepare write request" + * - Min value: given by the macro DEFAULT_PREP_WRITE_LIST_SIZE + * - Max value: a value higher than the minimum required can be specified, but it is not recommended + */ +@@ -503,7 +500,7 @@ extern "C" { + * MaxConnEventLength + * This parameter determines the maximum duration of a slave connection event. When this duration is reached the slave closes + * the current connections event (whatever is the CE_length parameter specified by the master in HCI_CREATE_CONNECTION HCI command), +- * expressed in units of 625/256 µs (~2.44 µs) ++ * expressed in units of 625/256 µs (~2.44 µs) + * - Min value: 0 (if 0 is specified, the master and slave perform only a single TX-RX exchange per connection event) + * - Max value: 1638400 (4000 ms). A higher value can be specified (max 0xFFFFFFFF) but results in a maximum connection time + * of 4000 ms as specified. In this case the parameter is not applied, and the predicted CE length calculated on slave is not shortened +@@ -512,7 +509,7 @@ extern "C" { + + /** + * HsStartupTime +- * Startup time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 µs (~2.44 µs). ++ * Startup time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 µs (~2.44 µs). + * - Min value: 0 + * - Max value: 820 (~2 ms). A higher value can be specified, but the value that implemented in stack is forced to ~2 ms + */ +@@ -678,8 +675,6 @@ extern "C" { + { + uint8_t thread_config; + uint8_t ble_config; +- uint8_t mac_802_15_4_config; +- uint8_t zigbee_config; + } SHCI_C2_DEBUG_TracesConfig_t; + + typedef PACKED_STRUCT +@@ -743,8 +738,6 @@ extern "C" { + { + BLE_ENABLE, + THREAD_ENABLE, +- ZIGBEE_ENABLE, +- MAC_ENABLE, + } SHCI_C2_CONCURRENT_Mode_Param_t; + /** No response parameters*/ + +@@ -767,18 +760,13 @@ extern "C" { + { + BLE_IP, + THREAD_IP, +- ZIGBEE_IP, + } SHCI_C2_FLASH_Ip_t; + /** No response parameters*/ + + #define SHCI_OPCODE_C2_RADIO_ALLOW_LOW_POWER (( SHCI_OGF << 10) + SHCI_OCF_C2_RADIO_ALLOW_LOW_POWER) + +-#define SHCI_OPCODE_C2_MAC_802_15_4_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_MAC_802_15_4_INIT) +- + #define SHCI_OPCODE_C2_REINIT (( SHCI_OGF << 10) + SHCI_OCF_C2_REINIT) + +-#define SHCI_OPCODE_C2_ZIGBEE_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_ZIGBEE_INIT) +- + #define SHCI_OPCODE_C2_LLD_TESTS_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_LLD_TESTS_INIT) + + #define SHCI_OPCODE_C2_BLE_LLD_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_BLE_LLD_INIT) +@@ -893,7 +881,7 @@ extern "C" { + #define FUS_DEVICE_INFO_TABLE_VALIDITY_KEYWORD (0xA94656B9) + + /* +- * At startup, the informations relative to the wireless binary are stored in RAM trough a structure defined by ++ * At startup, the information relative to the wireless binary are stored in RAM through a structure defined by + * MB_WirelessFwInfoTable_t.This structure contains 4 fields (Version,MemorySize, Stack_info and a reserved part) + * each of those coded on 32 bits as shown on the table below: + * +@@ -949,9 +937,6 @@ extern "C" { + #define INFO_STACK_TYPE_BLE_HCI_EXT_ADV 0x07 + #define INFO_STACK_TYPE_THREAD_FTD 0x10 + #define INFO_STACK_TYPE_THREAD_MTD 0x11 +-#define INFO_STACK_TYPE_ZIGBEE_FFD 0x30 +-#define INFO_STACK_TYPE_ZIGBEE_RFD 0x31 +-#define INFO_STACK_TYPE_MAC 0x40 + #define INFO_STACK_TYPE_BLE_THREAD_FTD_STATIC 0x50 + #define INFO_STACK_TYPE_BLE_THREAD_FTD_DYAMIC 0x51 + #define INFO_STACK_TYPE_802154_LLD_TESTS 0x60 +@@ -960,12 +945,7 @@ extern "C" { + #define INFO_STACK_TYPE_BLE_LLD_TESTS 0x63 + #define INFO_STACK_TYPE_BLE_RLV 0x64 + #define INFO_STACK_TYPE_802154_RLV 0x65 +-#define INFO_STACK_TYPE_BLE_ZIGBEE_FFD_STATIC 0x70 +-#define INFO_STACK_TYPE_BLE_ZIGBEE_RFD_STATIC 0x71 +-#define INFO_STACK_TYPE_BLE_ZIGBEE_FFD_DYNAMIC 0x78 +-#define INFO_STACK_TYPE_BLE_ZIGBEE_RFD_DYNAMIC 0x79 + #define INFO_STACK_TYPE_RLV 0x80 +-#define INFO_STACK_TYPE_BLE_MAC_STATIC 0x90 + + typedef struct { + /** +@@ -1139,7 +1119,7 @@ typedef struct { + * @brief Starts the LLD tests CLI + * + * @param param_size : Nb of bytes +- * @param p_param : pointeur with data to give from M4 to M0 ++ * @param p_param : pointer with data to give from M4 to M0 + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_LLDTESTS_Init( uint8_t param_size, uint8_t * p_param ); +@@ -1149,20 +1129,11 @@ typedef struct { + * @brief Starts the LLD tests BLE + * + * @param param_size : Nb of bytes +- * @param p_param : pointeur with data to give from M4 to M0 ++ * @param p_param : pointer with data to give from M4 to M0 + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_BLE_LLD_Init( uint8_t param_size, uint8_t * p_param ); + +- /** +- * SHCI_C2_ZIGBEE_Init +- * @brief Starts the Zigbee Stack +- * +- * @param None +- * @retval Status +- */ +- SHCI_CmdStatus_t SHCI_C2_ZIGBEE_Init( void ); +- + /** + * SHCI_C2_DEBUG_Init + * @brief Starts the Traces +@@ -1237,16 +1208,6 @@ typedef struct { + */ + SHCI_CmdStatus_t SHCI_C2_RADIO_AllowLowPower( SHCI_C2_FLASH_Ip_t Ip,uint8_t FlagRadioLowPowerOn); + +- +- /** +- * SHCI_C2_MAC_802_15_4_Init +- * @brief Starts the MAC 802.15.4 on M0 +- * +- * @param None +- * @retval Status +- */ +- SHCI_CmdStatus_t SHCI_C2_MAC_802_15_4_Init( void ); +- + /** + * SHCI_GetWirelessFwInfo + * @brief This function read back the informations relative to the wireless binary loaded. +diff --git a/src/utility/STM32Cube_FW/shci_tl.c b/src/utility/STM32Cube_FW/shci_tl.c +index 449b8b1..b3cee00 100644 +--- a/src/utility/STM32Cube_FW/shci_tl.c ++++ b/src/utility/STM32Cube_FW/shci_tl.c +@@ -16,12 +16,13 @@ + ****************************************************************************** + */ + +- ++#if defined(STM32WBxx) + /* Includes ------------------------------------------------------------------*/ + #include "stm32_wpan_common.h" + + #include "stm_list.h" + #include "shci_tl.h" ++#include "stm32_def.h" + + /* Private typedef -----------------------------------------------------------*/ + typedef enum +@@ -70,8 +71,6 @@ void shci_init(void(* UserEvtRx)(void* pData), void* pConf) + shci_register_io_bus (&shciContext.io); + + TlInit((TL_CmdPacket_t *)(((SHCI_TL_HciInitConf_t *)pConf)->p_cmdbuffer)); +- +- return; + } + + void shci_user_evt_proc(void) +@@ -127,8 +126,6 @@ void shci_user_evt_proc(void) + shci_notify_asynch_evt((void*) &SHciAsynchEventQueue); + } + +- +- return; + } + + void shci_resume_flow( void ) +@@ -140,8 +137,6 @@ void shci_resume_flow( void ) + * be called + */ + shci_notify_asynch_evt((void*) &SHciAsynchEventQueue); +- +- return; + } + + void shci_send( uint16_t cmd_code, uint8_t len_cmd_payload, uint8_t * p_cmd_payload, TL_EvtPacket_t * p_rsp ) +@@ -164,8 +159,20 @@ void shci_send( uint16_t cmd_code, uint8_t len_cmd_payload, uint8_t * p_cmd_payl + memcpy( &(p_rsp->evtserial), pCmdBuffer, ((TL_EvtSerial_t*)pCmdBuffer)->evt.plen + TL_EVT_HDR_SIZE ); + + Cmd_SetStatus(SHCI_TL_CmdAvailable); ++} ++ ++void shci_notify_asynch_evt(void *pdata) ++{ ++ UNUSED(pdata); ++ /* Need to parse data in future version */ ++ shci_user_evt_proc(); ++} + +- return; ++void shci_register_io_bus(tSHciIO *fops) ++{ ++ /* Register IO bus services */ ++ fops->Init = TL_SYS_Init; ++ fops->Send = TL_SYS_SendCmd; + } + + /* Private functions ---------------------------------------------------------*/ +@@ -190,8 +197,6 @@ static void TlInit( TL_CmdPacket_t * p_cmdbuffer ) + Conf.IoBusCallBackUserEvt = TlUserEvtReceived; + shciContext.io.Init(&Conf); + } +- +- return; + } + + static void Cmd_SetStatus(SHCI_TL_CmdStatus_t shcicmdstatus) +@@ -212,24 +217,18 @@ static void Cmd_SetStatus(SHCI_TL_CmdStatus_t shcicmdstatus) + StatusNotCallBackFunction( SHCI_TL_CmdAvailable ); + } + } +- +- return; + } + + static void TlCmdEvtReceived(TL_EvtPacket_t *shcievt) + { + (void)(shcievt); + shci_cmd_resp_release(0); /**< Notify the application the Cmd response has been received */ +- +- return; + } + + static void TlUserEvtReceived(TL_EvtPacket_t *shcievt) + { + LST_insert_tail(&SHciAsynchEventQueue, (tListNode *)shcievt); + shci_notify_asynch_evt((void*) &SHciAsynchEventQueue); /**< Notify the application a full HCI event has been received */ +- +- return; + } + + /* Weak implementation ----------------------------------------------------------------*/ +@@ -239,8 +238,6 @@ __WEAK void shci_cmd_resp_wait(uint32_t timeout) + + CmdRspStatusFlag = SHCI_TL_CMD_RESP_WAIT; + while(CmdRspStatusFlag != SHCI_TL_CMD_RESP_RELEASE); +- +- return; + } + + __WEAK void shci_cmd_resp_release(uint32_t flag) +@@ -248,7 +245,5 @@ __WEAK void shci_cmd_resp_release(uint32_t flag) + (void)flag; + + CmdRspStatusFlag = SHCI_TL_CMD_RESP_RELEASE; +- +- return; + } +- ++#endif /* STM32WBxx */ +diff --git a/src/utility/STM32Cube_FW/stm32_wpan_common.h b/src/utility/STM32Cube_FW/stm32_wpan_common.h +index f407bb9..5a2b2a5 100644 +--- a/src/utility/STM32Cube_FW/stm32_wpan_common.h ++++ b/src/utility/STM32Cube_FW/stm32_wpan_common.h +@@ -25,19 +25,9 @@ + extern "C" { + #endif + +-#if defined ( __CC_ARM )||defined (__ARMCC_VERSION) +- #define __ASM __asm /*!< asm keyword for ARM Compiler */ +- #define __INLINE __inline /*!< inline keyword for ARM Compiler */ +- #define __STATIC_INLINE static __inline +-#elif defined ( __ICCARM__ ) +- #define __ASM __asm /*!< asm keyword for IAR Compiler */ +- #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */ +- #define __STATIC_INLINE static inline +-#elif defined ( __GNUC__ ) +- #define __ASM __asm /*!< asm keyword for GNU Compiler */ +- #define __INLINE inline /*!< inline keyword for GNU Compiler */ +- #define __STATIC_INLINE static inline +-#endif ++#define __ASM __asm /*!< asm keyword for GNU Compiler */ ++#define __INLINE inline /*!< inline keyword for GNU Compiler */ ++#define __STATIC_INLINE static inline + + #include + #include +@@ -140,29 +130,8 @@ extern "C" { + /* ----------------------------------- * + * Packed usage (compiler dependent) * + * ----------------------------------- */ +-#undef PACKED__ + #undef PACKED_STRUCT +- +-#if defined ( __CC_ARM ) +- #if defined ( __GNUC__ ) +- /* GNU extension */ +- #define PACKED__ __attribute__((packed)) +- #define PACKED_STRUCT struct PACKED__ +- #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050U) +- #define PACKED__ __attribute__((packed)) +- #define PACKED_STRUCT struct PACKED__ +- #else +- #define PACKED__(TYPE) __packed TYPE +- #define PACKED_STRUCT PACKED__(struct) +- #endif +-#elif defined ( __GNUC__ ) +- #define PACKED__ __attribute__((packed)) +- #define PACKED_STRUCT struct PACKED__ +-#elif defined (__ICCARM__) +- #define PACKED_STRUCT __packed struct +-#else +- #define PACKED_STRUCT __packed struct +-#endif ++#define PACKED_STRUCT struct __packed + + #ifdef __cplusplus + } +diff --git a/src/utility/STM32Cube_FW/stm_list.c b/src/utility/STM32Cube_FW/stm_list.c +index 4c92864..9892441 100644 +--- a/src/utility/STM32Cube_FW/stm_list.c ++++ b/src/utility/STM32Cube_FW/stm_list.c +@@ -16,13 +16,13 @@ + ****************************************************************************** + */ + +- ++#if defined(STM32WBxx) + /****************************************************************************** + * Include Files + ******************************************************************************/ +-#include "utilities_common.h" +- + #include "stm_list.h" ++#include "cmsis_gcc.h" ++#include "stm32_wpan_common.h" + + /****************************************************************************** + * Function Definitions +@@ -33,20 +33,20 @@ void LST_init_head (tListNode * listHead) + listHead->prev = listHead; + } + +-uint8_t LST_is_empty (tListNode * listHead) ++bool LST_is_empty (tListNode * listHead) + { + uint32_t primask_bit; +- uint8_t return_value; ++ bool return_value; + + primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ + __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ + if(listHead->next == listHead) + { +- return_value = TRUE; ++ return_value = true; + } + else + { +- return_value = FALSE; ++ return_value = false; + } + __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ + +@@ -204,3 +204,4 @@ void LST_get_prev_node (tListNode * ref_node, tListNode ** node) + + __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ + } ++#endif /* STM32WBxx */ +diff --git a/src/utility/STM32Cube_FW/stm_list.h b/src/utility/STM32Cube_FW/stm_list.h +index b7c3254..769c211 100644 +--- a/src/utility/STM32Cube_FW/stm_list.h ++++ b/src/utility/STM32Cube_FW/stm_list.h +@@ -21,6 +21,8 @@ + #define _STM_LIST_H_ + + /* Includes ------------------------------------------------------------------*/ ++#include "stdint.h" ++#include "stdbool.h" + #include "stm32_wpan_common.h" + + typedef PACKED_STRUCT _tListNode { +@@ -30,7 +32,7 @@ typedef PACKED_STRUCT _tListNode { + + void LST_init_head (tListNode * listHead); + +-uint8_t LST_is_empty (tListNode * listHead); ++bool LST_is_empty (tListNode * listHead); + + void LST_insert_head (tListNode * listHead, tListNode * node); + +diff --git a/src/utility/STM32Cube_FW/tl.h b/src/utility/STM32Cube_FW/tl.h +index c199bb2..982bb58 100644 +--- a/src/utility/STM32Cube_FW/tl.h ++++ b/src/utility/STM32Cube_FW/tl.h +@@ -202,19 +202,6 @@ typedef struct + uint8_t *p_BleLldM0CmdBuffer; + } TL_BLE_LLD_Config_t; + +-typedef struct +-{ +- uint8_t *p_Mac_802_15_4_CmdRspBuffer; +- uint8_t *p_Mac_802_15_4_NotAckBuffer; +-} TL_MAC_802_15_4_Config_t; +- +-typedef struct +-{ +- uint8_t *p_ZigbeeOtCmdRspBuffer; +- uint8_t *p_ZigbeeNotAckBuffer; +- uint8_t *p_ZigbeeNotifRequestBuffer; +-} TL_ZIGBEE_Config_t; +- + /** + * @brief Contain the BLE HCI Init Configuration + * @{ +@@ -308,26 +295,6 @@ void TL_MM_EvtDone( TL_EvtPacket_t * hcievt ); + void TL_TRACES_Init( void ); + void TL_TRACES_EvtReceived( TL_EvtPacket_t * hcievt ); + +-/****************************************************************************** +- * MAC 802.15.4 +- ******************************************************************************/ +-void TL_MAC_802_15_4_Init( TL_MAC_802_15_4_Config_t *p_Config ); +-void TL_MAC_802_15_4_SendCmd( void ); +-void TL_MAC_802_15_4_CmdEvtReceived( TL_EvtPacket_t * Otbuffer ); +-void TL_MAC_802_15_4_NotReceived( TL_EvtPacket_t * Notbuffer ); +-void TL_MAC_802_15_4_SendAck ( void ); +- +-/****************************************************************************** +- * ZIGBEE +- ******************************************************************************/ +-void TL_ZIGBEE_Init( TL_ZIGBEE_Config_t *p_Config ); +-void TL_ZIGBEE_SendM4RequestToM0( void ); +-void TL_ZIGBEE_SendM4AckToM0Notify ( void ); +-void TL_ZIGBEE_NotReceived( TL_EvtPacket_t * Notbuffer ); +-void TL_ZIGBEE_CmdEvtReceived( TL_EvtPacket_t * Otbuffer ); +-void TL_ZIGBEE_M0RequestReceived(TL_EvtPacket_t * Otbuffer ); +-void TL_ZIGBEE_SendM4AckToM0Request(void); +- + #ifdef __cplusplus + } /* extern "C" */ + #endif +diff --git a/src/utility/STM32Cube_FW/tl_mbox.c b/src/utility/STM32Cube_FW/tl_mbox.c +index fcd7766..a9abb18 100644 +--- a/src/utility/STM32Cube_FW/tl_mbox.c ++++ b/src/utility/STM32Cube_FW/tl_mbox.c +@@ -16,6 +16,7 @@ + ****************************************************************************** + */ + ++#if defined(STM32WBxx) + /* Includes ------------------------------------------------------------------*/ + #include "stm32_wpan_common.h" + #include "hw.h" +@@ -51,15 +52,13 @@ PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_BleLldTable_t TL_BleLldTable; + PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_SysTable_t TL_SysTable; + PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_MemManagerTable_t TL_MemManagerTable; + PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_TracesTable_t TL_TracesTable; +-PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_Mac_802_15_4_t TL_Mac_802_15_4_Table; +-PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_ZigbeeTable_t TL_Zigbee_Table; + + /**< tables */ + PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static tListNode FreeBufQueue; + PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static tListNode TracesEvtQueue; + PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static uint8_t CsBuffer[sizeof(TL_PacketHeader_t) + TL_EVT_HDR_SIZE + sizeof(TL_CsEvt_t)]; +-PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static tListNode EvtQueue; +-PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static tListNode SystemEvtQueue; ++PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static tListNode EvtQueue; ++PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static tListNode SystemEvtQueue; + + + static tListNode LocalFreeBufQueue; +@@ -97,8 +96,6 @@ void TL_Init( void ) + TL_RefTable.p_sys_table = &TL_SysTable; + TL_RefTable.p_mem_manager_table = &TL_MemManagerTable; + TL_RefTable.p_traces_table = &TL_TracesTable; +- TL_RefTable.p_mac_802_15_4_table = &TL_Mac_802_15_4_Table; +- TL_RefTable.p_zigbee_table = &TL_Zigbee_Table; + HW_IPCC_Init(); + + return; +@@ -452,139 +449,6 @@ void TL_BLE_LLD_SendRspAck( void ) + } + #endif /* BLE_LLD_WB */ + +-#ifdef MAC_802_15_4_WB +-/****************************************************************************** +- * MAC 802.15.4 +- ******************************************************************************/ +-void TL_MAC_802_15_4_Init( TL_MAC_802_15_4_Config_t *p_Config ) +-{ +- MB_Mac_802_15_4_t * p_mac_802_15_4_table; +- +- p_mac_802_15_4_table = TL_RefTable.p_mac_802_15_4_table; +- +- p_mac_802_15_4_table->p_cmdrsp_buffer = p_Config->p_Mac_802_15_4_CmdRspBuffer; +- p_mac_802_15_4_table->p_notack_buffer = p_Config->p_Mac_802_15_4_NotAckBuffer; +- +- HW_IPCC_MAC_802_15_4_Init(); +- +- return; +-} +- +-void TL_MAC_802_15_4_SendCmd( void ) +-{ +- ((TL_CmdPacket_t *)(TL_RefTable.p_mac_802_15_4_table->p_cmdrsp_buffer))->cmdserial.type = TL_OTCMD_PKT_TYPE; +- +- HW_IPCC_MAC_802_15_4_SendCmd(); +- +- return; +-} +- +-void TL_MAC_802_15_4_SendAck ( void ) +-{ +- ((TL_CmdPacket_t *)(TL_RefTable.p_mac_802_15_4_table->p_notack_buffer))->cmdserial.type = TL_OTACK_PKT_TYPE; +- +- HW_IPCC_MAC_802_15_4_SendAck(); +- +- return; +-} +- +-void HW_IPCC_MAC_802_15_4_CmdEvtNot(void) +-{ +- TL_MAC_802_15_4_CmdEvtReceived( (TL_EvtPacket_t*)(TL_RefTable.p_mac_802_15_4_table->p_cmdrsp_buffer) ); +- +- return; +-} +- +-void HW_IPCC_MAC_802_15_4_EvtNot( void ) +-{ +- TL_MAC_802_15_4_NotReceived( (TL_EvtPacket_t*)(TL_RefTable.p_mac_802_15_4_table->p_notack_buffer) ); +- +- return; +-} +- +-__WEAK void TL_MAC_802_15_4_CmdEvtReceived( TL_EvtPacket_t * Otbuffer ){}; +-__WEAK void TL_MAC_802_15_4_NotReceived( TL_EvtPacket_t * Notbuffer ){}; +-#endif +- +-#ifdef ZIGBEE_WB +-/****************************************************************************** +- * ZIGBEE +- ******************************************************************************/ +-void TL_ZIGBEE_Init( TL_ZIGBEE_Config_t *p_Config ) +-{ +- MB_ZigbeeTable_t * p_zigbee_table; +- +- p_zigbee_table = TL_RefTable.p_zigbee_table; +- p_zigbee_table->appliCmdM4toM0_buffer = p_Config->p_ZigbeeOtCmdRspBuffer; +- p_zigbee_table->notifM0toM4_buffer = p_Config->p_ZigbeeNotAckBuffer; +- p_zigbee_table->requestM0toM4_buffer = p_Config->p_ZigbeeNotifRequestBuffer; +- +- HW_IPCC_ZIGBEE_Init(); +- +- return; +-} +- +-/* Zigbee M4 to M0 Request */ +-void TL_ZIGBEE_SendM4RequestToM0( void ) +-{ +- ((TL_CmdPacket_t *)(TL_RefTable.p_zigbee_table->appliCmdM4toM0_buffer))->cmdserial.type = TL_OTCMD_PKT_TYPE; +- +- HW_IPCC_ZIGBEE_SendM4RequestToM0(); +- +- return; +-} +- +-/* Used to receive an ACK from the M0 */ +-void HW_IPCC_ZIGBEE_RecvAppliAckFromM0(void) +-{ +- TL_ZIGBEE_CmdEvtReceived( (TL_EvtPacket_t*)(TL_RefTable.p_zigbee_table->appliCmdM4toM0_buffer) ); +- +- return; +-} +- +-/* Zigbee notification from M0 to M4 */ +-void HW_IPCC_ZIGBEE_RecvM0NotifyToM4( void ) +-{ +- TL_ZIGBEE_NotReceived( (TL_EvtPacket_t*)(TL_RefTable.p_zigbee_table->notifM0toM4_buffer) ); +- +- return; +-} +- +-/* Send an ACK to the M0 for a Notification */ +-void TL_ZIGBEE_SendM4AckToM0Notify ( void ) +-{ +- ((TL_CmdPacket_t *)(TL_RefTable.p_zigbee_table->notifM0toM4_buffer))->cmdserial.type = TL_OTACK_PKT_TYPE; +- +- HW_IPCC_ZIGBEE_SendM4AckToM0Notify(); +- +- return; +-} +- +-/* Zigbee M0 to M4 Request */ +-void HW_IPCC_ZIGBEE_RecvM0RequestToM4( void ) +-{ +- TL_ZIGBEE_M0RequestReceived( (TL_EvtPacket_t*)(TL_RefTable.p_zigbee_table->requestM0toM4_buffer) ); +- +- return; +-} +- +-/* Send an ACK to the M0 for a Request */ +-void TL_ZIGBEE_SendM4AckToM0Request(void) +-{ +- ((TL_CmdPacket_t *)(TL_RefTable.p_zigbee_table->requestM0toM4_buffer))->cmdserial.type = TL_OTACK_PKT_TYPE; +- +- HW_IPCC_ZIGBEE_SendM4AckToM0Request(); +- +- return; +-} +- +- +-__WEAK void TL_ZIGBEE_CmdEvtReceived( TL_EvtPacket_t * Otbuffer ){}; +-__WEAK void TL_ZIGBEE_NotReceived( TL_EvtPacket_t * Notbuffer ){}; +-#endif +- +- +- + /****************************************************************************** + * MEMORY MANAGER + ******************************************************************************/ +@@ -846,3 +710,4 @@ static void OutputDbgTrace(TL_MB_PacketType_t packet_type, uint8_t* buffer) + + return; + } ++#endif /* STM32WBxx */ +-- +2.38.0.windows.1 + diff --git a/extras/STM32Cube_FW/0002-fix-include-a-timeout-when-waiting-for-the-cmd_resp.patch b/extras/STM32Cube_FW/0002-fix-include-a-timeout-when-waiting-for-the-cmd_resp.patch new file mode 100644 index 00000000..81ac67fd --- /dev/null +++ b/extras/STM32Cube_FW/0002-fix-include-a-timeout-when-waiting-for-the-cmd_resp.patch @@ -0,0 +1,41 @@ +From a3c689a99506126587dfd7285c4b198db4a790e5 Mon Sep 17 00:00:00 2001 +From: Frederic Pillon +Date: Mon, 12 Dec 2022 17:17:48 +0100 +Subject: [PATCH 2/3] fix: include a timeout when waiting for the cmd_resp + +Signed-off-by: Frederic Pillon +--- + src/utility/STM32Cube_FW/shci_tl.c | 9 ++++++--- + 1 file changed, 6 insertions(+), 3 deletions(-) + +diff --git a/src/utility/STM32Cube_FW/shci_tl.c b/src/utility/STM32Cube_FW/shci_tl.c +index b3cee00..1abd1be 100644 +--- a/src/utility/STM32Cube_FW/shci_tl.c ++++ b/src/utility/STM32Cube_FW/shci_tl.c +@@ -23,6 +23,7 @@ + #include "stm_list.h" + #include "shci_tl.h" + #include "stm32_def.h" ++#include "wiring_time.h" + + /* Private typedef -----------------------------------------------------------*/ + typedef enum +@@ -234,10 +235,12 @@ static void TlUserEvtReceived(TL_EvtPacket_t *shcievt) + /* Weak implementation ----------------------------------------------------------------*/ + __WEAK void shci_cmd_resp_wait(uint32_t timeout) + { +- (void)timeout; +- + CmdRspStatusFlag = SHCI_TL_CMD_RESP_WAIT; +- while(CmdRspStatusFlag != SHCI_TL_CMD_RESP_RELEASE); ++ for (unsigned long start = millis(); (millis() - start) < timeout;) { ++ if (CmdRspStatusFlag == SHCI_TL_CMD_RESP_RELEASE) { ++ break; ++ } ++ } + } + + __WEAK void shci_cmd_resp_release(uint32_t flag) +-- +2.38.0.windows.1 + diff --git a/extras/STM32Cube_FW/0003-chore-add-support-for-customize-app_conf_default.h.patch b/extras/STM32Cube_FW/0003-chore-add-support-for-customize-app_conf_default.h.patch new file mode 100644 index 00000000..a10fa6e7 --- /dev/null +++ b/extras/STM32Cube_FW/0003-chore-add-support-for-customize-app_conf_default.h.patch @@ -0,0 +1,197 @@ +From 81472cc135126cb46701a058647de2cf82160fb9 Mon Sep 17 00:00:00 2001 +From: Frederic Pillon +Date: Mon, 12 Dec 2022 17:29:27 +0100 +Subject: [PATCH 3/3] chore: add support for customize app_conf_default.h + +Signed-off-by: Frederic Pillon +--- + src/utility/STM32Cube_FW/app_conf_default.h | 88 ++++++++++++++++----- + 1 file changed, 68 insertions(+), 20 deletions(-) + +diff --git a/src/utility/STM32Cube_FW/app_conf_default.h b/src/utility/STM32Cube_FW/app_conf_default.h +index cc8c3e8..35cad34 100644 +--- a/src/utility/STM32Cube_FW/app_conf_default.h ++++ b/src/utility/STM32Cube_FW/app_conf_default.h +@@ -41,7 +41,9 @@ + /** + * Define Tx Power + */ +-#define CFG_TX_POWER (0x18) /* -0.15dBm */ ++#ifndef CFG_TX_POWER ++ #define CFG_TX_POWER (0x18) /* -0.15dBm */ ++#endif + + /****************************************************************************** + * BLE Stack +@@ -50,13 +52,25 @@ + * Maximum number of simultaneous connections that the device will support. + * Valid values are from 1 to 8 + */ +-#define CFG_BLE_NUM_LINK 8 ++#ifndef CFG_BLE_NUM_LINK ++#ifdef STM32WB15xx ++ #define CFG_BLE_NUM_LINK 3 ++#else ++ #define CFG_BLE_NUM_LINK 8 ++#endif ++#endif + + /** + * Maximum number of Services that can be stored in the GATT database. + * Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user services + */ +-#define CFG_BLE_NUM_GATT_SERVICES 8 ++#ifndef CFG_BLE_NUM_GATT_SERVICES ++#ifdef STM32WB15xx ++ #define CFG_BLE_NUM_GATT_SERVICES 4 ++#else ++ #define CFG_BLE_NUM_GATT_SERVICES 8 ++#endif ++#endif + + /** + * Maximum number of Attributes +@@ -65,13 +79,21 @@ + * Note that certain characteristics and relative descriptors are added automatically during device initialization + * so this parameters should be 9 plus the number of user Attributes + */ +-#define CFG_BLE_NUM_GATT_ATTRIBUTES 68 ++#ifndef CFG_BLE_NUM_GATT_ATTRIBUTES ++#ifdef STM32WB15xx ++ #define CFG_BLE_NUM_GATT_ATTRIBUTES 30 ++#else ++ #define CFG_BLE_NUM_GATT_ATTRIBUTES 68 ++#endif ++#endif + + /** + * Maximum supported ATT_MTU size + * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set + */ +-#define CFG_BLE_MAX_ATT_MTU (156) ++#ifndef CFG_BLE_MAX_ATT_MTU ++ #define CFG_BLE_MAX_ATT_MTU (156) ++#endif + + /** + * Size of the storage area for Attribute values +@@ -84,14 +106,22 @@ + * The total amount of memory needed is the sum of the above quantities for each attribute. + * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set + */ +-#define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) ++#ifndef CFG_BLE_ATT_VALUE_ARRAY_SIZE ++#ifdef STM32WB15xx ++ #define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1290) ++#else ++ #define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) ++#endif ++#endif + + /** + * Prepare Write List size in terms of number of packet + * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set + */ + // #define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU) +-#define CFG_BLE_PREPARE_WRITE_LIST_SIZE (0x3A) ++#ifndef CFG_BLE_PREPARE_WRITE_LIST_SIZE ++ #define CFG_BLE_PREPARE_WRITE_LIST_SIZE (0x3A) ++#endif + + /** + * Number of allocated memory blocks +@@ -103,12 +133,16 @@ + /** + * Enable or disable the Extended Packet length feature. Valid values are 0 or 1. + */ +-#define CFG_BLE_DATA_LENGTH_EXTENSION 1 ++#ifndef CFG_BLE_DATA_LENGTH_EXTENSION ++ #define CFG_BLE_DATA_LENGTH_EXTENSION 1 ++#endif + + /** + * Sleep clock accuracy in Slave mode (ppm value) + */ +-#define CFG_BLE_SLAVE_SCA 500 ++#ifndef CFG_BLE_SLAVE_SCA ++ #define CFG_BLE_SLAVE_SCA 500 ++#endif + + /** + * Sleep clock accuracy in Master mode +@@ -121,7 +155,9 @@ + * 6 : 21 ppm to 30 ppm + * 7 : 0 ppm to 20 ppm + */ +-#define CFG_BLE_MASTER_SCA 0 ++#ifndef CFG_BLE_MASTER_SCA ++ #define CFG_BLE_MASTER_SCA 0 ++#endif + + /** + * LsSource +@@ -130,21 +166,27 @@ + * - bit 1: 1: STM32WB5M Module device 0: Other devices as STM32WBxx SOC, STM32WB1M module + * - bit 2: 1: HSE/1024 Clock config 0: LSE Clock config + */ +-#if defined(STM32WB5Mxx) +- #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) +-#else +- #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) ++#ifndef CFG_BLE_LS_SOURCE ++ #if defined(STM32WB5Mxx) ++ #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) ++ #else ++ #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) ++ #endif + #endif + + /** + * Start up time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us) + */ +-#define CFG_BLE_HSE_STARTUP_TIME 0x148 ++#ifndef CFG_BLE_HSE_STARTUP_TIME ++ #define CFG_BLE_HSE_STARTUP_TIME 0x148 ++#endif + + /** + * Maximum duration of the connection event when the device is in Slave mode in units of 625/256 us (~2.44 us) + */ +-#define CFG_BLE_MAX_CONN_EVENT_LENGTH (0xFFFFFFFF) ++#ifndef CFG_BLE_MAX_CONN_EVENT_LENGTH ++ #define CFG_BLE_MAX_CONN_EVENT_LENGTH (0xFFFFFFFF) ++#endif + + /** + * Viterbi Mode +@@ -224,8 +266,11 @@ + * on Max Extended advertising configuration supported. + * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set + */ +- +-#define CFG_BLE_MAX_ADV_SET_NBR (8) ++#if defined(STM32WB15xx) ++ #define CFG_BLE_MAX_ADV_SET_NBR (3) ++#else ++ #define CFG_BLE_MAX_ADV_SET_NBR (8) ++#endif + + /* Maximum advertising data length (in bytes) + * Range: 31 .. 1650 with limitation: +@@ -233,8 +278,11 @@ + * on Max Extended advertising configuration supported. + * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set + */ +- +-#define CFG_BLE_MAX_ADV_DATA_LEN (207) ++#if defined(STM32WB15xx) ++ #define CFG_BLE_MAX_ADV_DATA_LEN (414) ++#else ++ #define CFG_BLE_MAX_ADV_DATA_LEN (207) ++#endif + + /* RF TX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. + * Range: -1280 .. 1280 +-- +2.38.0.windows.1 + diff --git a/keywords.txt b/keywords.txt index 9214671b..e13de56d 100644 --- a/keywords.txt +++ b/keywords.txt @@ -143,5 +143,5 @@ BLEUpdated LITERAL1 SPBTLE_RF LITERAL1 SPBTLE_1S LITERAL1 BLUENRG_M2SP LITERAL1 +BLUENRG_LP LITERAL1 BLEChip_t LITERAL1 - diff --git a/library.properties b/library.properties index e9f8de55..e36e566c 100644 --- a/library.properties +++ b/library.properties @@ -1,5 +1,5 @@ name=STM32duinoBLE -version=1.2.1 +version=1.2.2 author=Arduino, SRA maintainer=stm32duino sentence=Fork of ArduinoBLE library to add the support of STM32WB, SPBTLE-RF, SPBTLE-1S, BLUENRG-M2SP and BLUENRG-M0 BLE modules. diff --git a/src/local/BLELocalDevice.cpp b/src/local/BLELocalDevice.cpp index d4824f53..b5869b5a 100644 --- a/src/local/BLELocalDevice.cpp +++ b/src/local/BLELocalDevice.cpp @@ -51,6 +51,20 @@ int BLELocalDevice::begin() return 0; } + uint8_t randomNumber[8]; + if (HCI.leRand(randomNumber) != 0) { + end(); + return 0; + } + /* Random address only requires 6 bytes (48 bits) + * Force both MSB bits to b00 in order to define Static Random Address + */ + randomNumber[5] |= 0xC0; + if (HCI.leSetRandomAddress((uint8_t*)randomNumber) != 0) { + end(); + return 0; + } + uint8_t hciVer; uint16_t hciRev; uint8_t lmpVer; diff --git a/src/utility/BLEUuid.cpp b/src/utility/BLEUuid.cpp index fba6244a..0465ea9a 100644 --- a/src/utility/BLEUuid.cpp +++ b/src/utility/BLEUuid.cpp @@ -30,6 +30,11 @@ BLEUuid::BLEUuid(const char * str) : memset(_data, 0x00, sizeof(_data)); _length = 0; + + if (str == NULL) { + return; + } + for (int i = strlen(str) - 1; i >= 0 && _length < BLE_UUID_MAX_LENGTH; i -= 2) { if (str[i] == '-') { i++; diff --git a/src/utility/HCI.cpp b/src/utility/HCI.cpp index 96b42537..f9c7d9c1 100644 --- a/src/utility/HCI.cpp +++ b/src/utility/HCI.cpp @@ -68,6 +68,7 @@ #define OCF_LE_CREATE_CONN 0x000d #define OCF_LE_CANCEL_CONN 0x000e #define OCF_LE_CONN_UPDATE 0x0013 +#define OCF_LE_RAND 0x0018 #define HCI_OE_USER_ENDED_CONNECTION 0x13 @@ -392,6 +393,17 @@ int HCIClass::leConnUpdate(uint16_t handle, uint16_t minInterval, uint16_t maxIn return sendCommand(OGF_LE_CTL << 10 | OCF_LE_CONN_UPDATE, sizeof(leConnUpdateData), &leConnUpdateData); } +int HCIClass::leRand(uint8_t randomNumber[8]) +{ + int result = sendCommand(OGF_LE_CTL << 10 | OCF_LE_RAND); + + if (result == 0) { + memcpy(randomNumber, _cmdResponse, 8); + } + + return result; +} + int HCIClass::sendAclPkt(uint16_t handle, uint8_t cid, uint8_t plen, void* data) { while (_pendingPkt >= _maxPkt) { diff --git a/src/utility/HCI.h b/src/utility/HCI.h index 0efd8125..b4a40e63 100644 --- a/src/utility/HCI.h +++ b/src/utility/HCI.h @@ -63,6 +63,7 @@ class HCIClass { virtual int leConnUpdate(uint16_t handle, uint16_t minInterval, uint16_t maxInterval, uint16_t latency, uint16_t supervisionTimeout); virtual int leCancelConn(); + virtual int leRand(uint8_t randomNumber[8]); virtual int sendAclPkt(uint16_t handle, uint8_t cid, uint8_t plen, void* data); diff --git a/src/utility/HCISharedMemTransport.cpp b/src/utility/HCISharedMemTransport.cpp index ee2a41a6..e51b5fa6 100644 --- a/src/utility/HCISharedMemTransport.cpp +++ b/src/utility/HCISharedMemTransport.cpp @@ -25,7 +25,7 @@ /* Private variables ---------------------------------------------------------*/ PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static TL_CmdPacket_t BleCmdBuffer; -PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static uint8_t EvtPool[POOL_SIZE]; +PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static uint8_t EvtPool[POOL_SIZE]; PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static TL_CmdPacket_t SystemCmdBuffer; PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static uint8_t SystemSpareEvtBuffer[sizeof(TL_PacketHeader_t) + TL_EVT_HDR_SIZE + 255]; @@ -48,17 +48,12 @@ volatile uint16_t _write_index; /* fifo position when receiving */ /* var of different device steps during init and receiving */ volatile bool phase_bd_addr; volatile bool phase_tx_power; -volatile bool phase_gatt_init; -volatile bool phase_gap_init; -volatile bool phase_random_addr; -volatile bool phase_get_random_addr; volatile bool phase_reset; volatile bool phase_running; -volatile bool is_random_addr_msg; + /** Bluetooth Device Address */ static uint8_t bd_addr_udn[CONFIG_DATA_PUBADDR_LEN]; -static uint8_t helper_random_addr[6]; /* Private functions ---------------------------------------------------------*/ /** @@ -186,16 +181,10 @@ void evt_received(TL_EvtPacket_t *hcievt) (hcievt->evtserial.evt.payload[0] == 0x01) && (hcievt->evtserial.evt.payload[1] == 0x0C) && (hcievt->evtserial.evt.payload[2] == 0xFC)) { - /* First setting must be global address and is_random_addr_msg should be false - * Second setting must be static random address and is_random_addr_msg should be true + /* First setting must be global address */ - if(!is_random_addr_msg) { - phase_bd_addr = true; - is_random_addr_msg = true; - } else { - phase_random_addr = true; - is_random_addr_msg = false; - } + phase_bd_addr = true; + if (hcievt->evtserial.evt.payload[3] != 0) { #if defined(PRINT_IPCC_INFO) printf("Error: wrong BD Addr\r\n"); @@ -218,50 +207,7 @@ void evt_received(TL_EvtPacket_t *hcievt) /* rx data is no more useful : not stored in the _rxbuff */ break; } - /* check the Rx event of complete the previous gatt init 0xFD01 */ - if ((hcievt->evtserial.evt.evtcode == TL_BLEEVT_CC_OPCODE) && - (hcievt->evtserial.evt.payload[0] == 0x01) && - (hcievt->evtserial.evt.payload[1] == 0x01) && - (hcievt->evtserial.evt.payload[2] == 0xFD)) { - phase_gatt_init = true; - if (hcievt->evtserial.evt.payload[3] != 0) { -#if defined(PRINT_IPCC_INFO) - printf("Error: wrong Random Addr\r\n"); -#endif /*(PRINT_IPCC_INFO)*/ - } - /* rx data is no more useful : not stored in the _rxbuff */ - break; - } - /* check the Rx event of complete the previous gap init 0xFC8A */ - if ((hcievt->evtserial.evt.evtcode == TL_BLEEVT_CC_OPCODE) && - (hcievt->evtserial.evt.payload[0] == 0x01) && - (hcievt->evtserial.evt.payload[1] == 0x8A) && - (hcievt->evtserial.evt.payload[2] == 0xFC)) { - phase_gap_init = true; - if (hcievt->evtserial.evt.payload[3] != 0) { -#if defined(PRINT_IPCC_INFO) - printf("Error: wrong Random Addr\r\n"); -#endif /*(PRINT_IPCC_INFO)*/ - } - /* rx data is no more useful : not stored in the _rxbuff */ - break; - } - /* check the Rx event of complete the previous get random addr opcode 0xFC0D */ - if ((hcievt->evtserial.evt.evtcode == TL_BLEEVT_CC_OPCODE) && - (hcievt->evtserial.evt.payload[0] == 0x01) && - (hcievt->evtserial.evt.payload[1] == 0x0D) && - (hcievt->evtserial.evt.payload[2] == 0xFC)) { - if (hcievt->evtserial.evt.payload[3] != 0) { -#if defined(PRINT_IPCC_INFO) - printf("Error: wrong Random Addr\r\n"); -#endif /*(PRINT_IPCC_INFO)*/ - } - memcpy(helper_random_addr, &hcievt->evtserial.evt.payload[5], 6); - phase_get_random_addr = true; - /* rx data is no more useful : not stored in the _rxbuff */ - break; - } /* check if the reset phase is in progress (opcode is 0x0C03) */ if ((hcievt->evtserial.evt.evtcode == TL_BLEEVT_CC_OPCODE) && (hcievt->evtserial.evt.payload[0] == 0x01) && @@ -391,10 +337,10 @@ static bool get_bd_address(uint8_t *bd_addr) bd_addr[0] = (uint8_t)(udn & 0x000000FF); bd_addr[1] = (uint8_t)((udn & 0x0000FF00) >> 8); - bd_addr[2] = (uint8_t)((udn & 0x00FF0000) >> 16); - bd_addr[3] = (uint8_t)device_id; - bd_addr[4] = (uint8_t)(company_id & 0x000000FF); - bd_addr[5] = (uint8_t)((company_id & 0x0000FF00) >> 8); + bd_addr[2] = (uint8_t)device_id; + bd_addr[3] = (uint8_t)(company_id & 0x000000FF); + bd_addr[4] = (uint8_t)((company_id & 0x0000FF00) >> 8); + bd_addr[5] = (uint8_t)((company_id & 0x00FF0000) >> 16); bd_found = true; } else { @@ -448,13 +394,8 @@ HCISharedMemTransportClass::HCISharedMemTransportClass() phase_bd_addr = false; phase_tx_power = false; - phase_gatt_init = false; - phase_gap_init = false; - phase_random_addr = false; - phase_get_random_addr = false; phase_reset = false; phase_running = false; - is_random_addr_msg = false; } HCISharedMemTransportClass::~HCISharedMemTransportClass() @@ -517,13 +458,8 @@ void HCISharedMemTransportClass::end() /* the HCI RESET command ready to be processed again */ phase_bd_addr = false; phase_tx_power = false; - phase_gatt_init = false; - phase_gap_init = false; - phase_random_addr = false; - phase_get_random_addr = false; phase_reset = false; phase_running = false; - is_random_addr_msg = false; } void HCISharedMemTransportClass::wait(unsigned long timeout) @@ -614,34 +550,11 @@ size_t HCISharedMemTransportClass::write(const uint8_t *data, size_t length) while (!phase_bd_addr); /* this sequence is now complete */ - /* set the random address */ - bt_ipm_set_random_addr(); - /* wait for the Rx complete */ - while (!phase_random_addr); - /* set the Tx power */ bt_ipm_set_power(); /* wait for the Rx complete */ while (!phase_tx_power); - /* gatt init */ - bt_ipm_gatt_init(); - /* wait for the Rx complete */ - while (!phase_gatt_init); - - /* gap init */ - bt_ipm_gap_init(); - /* wait for the Rx complete */ - while (!phase_gap_init); - - /* get the random address */ - bt_ipm_get_random_addr(); - /* wait for the Rx complete */ - while (!phase_get_random_addr); - - /* Now we can copy the random address and save it in the transport class */ - memcpy(_random_addr, helper_random_addr, 6); - /* this sequence is now complete */ phase_running = true; @@ -731,12 +644,21 @@ int HCISharedMemTransportClass::stm32wb_start_ble(void) CFG_BLE_MAX_ATT_MTU, CFG_BLE_SLAVE_SCA, CFG_BLE_MASTER_SCA, - CFG_BLE_LSE_SOURCE, + CFG_BLE_LS_SOURCE, CFG_BLE_MAX_CONN_EVENT_LENGTH, CFG_BLE_HSE_STARTUP_TIME, CFG_BLE_VITERBI_MODE, - CFG_BLE_LL_ONLY, - 0 /** TODO Should be read from HW */ + CFG_BLE_OPTIONS, + 0, /** TODO Should be read from HW */ + CFG_BLE_MAX_COC_INITIATOR_NBR, + CFG_BLE_MIN_TX_POWER, + CFG_BLE_MAX_TX_POWER, + CFG_BLE_RX_MODEL_CONFIG, + CFG_BLE_MAX_ADV_SET_NBR, + CFG_BLE_MAX_ADV_DATA_LEN, + CFG_BLE_TX_PATH_COMPENS, + CFG_BLE_RX_PATH_COMPENS, + CFG_BLE_CORE_VERSION }; /** * Starts the BLE Stack on CPU2 @@ -822,43 +744,6 @@ int HCISharedMemTransportClass::bt_ipm_set_addr(void) return 0; /* Error */ } -int HCISharedMemTransportClass::bt_ipm_set_random_addr(void) -{ - /* the specific table for set addr is 8 bytes: - * one byte for config_offset - * one byte for length - * 6 bytes for payload */ - uint8_t data[4 + 8]; - - /* - * Static random Address - * The two upper bits shall be set to 1 - * The lowest 32bits is read from the UDN to differentiate between devices - * The RNG may be used to provide a random number on each power on - */ - uint32_t srd_bd_addr[2]; - - phase_random_addr = false; - - srd_bd_addr[1] = 0x0000ED6E; - srd_bd_addr[0] = LL_FLASH_GetUDN( ); - - data[0] = BT_BUF_CMD; - data[1] = uint8_t(ACI_WRITE_CONFIG_DATA_OPCODE & 0x000000FF); /* OCF */ - data[2] = uint8_t((ACI_WRITE_CONFIG_DATA_OPCODE & 0x0000FF00) >> 8); /* OGF */ - data[3] = 8; /* length of parameters */ - /* fill the ACI_HAL_WRITE_CONFIG_DATA with the addr*/ - data[4] = 0x2E; /* the offset */ - data[5] = 6; /* is the length of the random address */ - memcpy(data + 6, srd_bd_addr, 6); - /* send the ACI_HAL_WRITE_CONFIG_DATA */ - if (mbox_write(data[0], 11, &data[1]) != 11) { - /* Error: no data are written */ - return 0; - } - /* now wait for the corresponding Rx event */ - return 1; /* success */ -} int HCISharedMemTransportClass::bt_ipm_set_power(void) { @@ -885,78 +770,4 @@ int HCISharedMemTransportClass::bt_ipm_set_power(void) return 1; /* success */ } -int HCISharedMemTransportClass::bt_ipm_gatt_init(void) -{ - /* the specific table for gatt init */ - uint8_t data[4]; - - phase_gatt_init = false; - - data[0] = BT_BUF_CMD; /* the type */ - data[1] = 0x01; /* the OPCODE */ - data[2] = 0xFD; - data[3] = 0; /* the length */ - - /* send the GATT_INIT */ - if (mbox_write(data[0], 3, &data[1]) != 3) { - /* Error: no data are written */ - return 0; - } - /* now wait for the corresponding Rx event */ - return 1; /* success */ -} - -int HCISharedMemTransportClass::bt_ipm_gap_init(void) -{ - /* the specific table for gap init is 3 bytes: - * Role byte, enable_privacy byte, device_name_char_len byte */ - uint8_t data[4 + 3]; - - phase_gap_init = false; - - data[0] = BT_BUF_CMD; /* the type */ - data[1] = 0x8A; /* the OPCODE */ - data[2] = 0xFC; - data[3] = 3; /* the length */ - /* fill the GAP_INIT */ - data[4] = 0x0F; /* role */ - data[5] = 0x00; /* enable_privacy */ - data[6] = 0x00; /* device_name_char_len */ - - /* send the GAP_INIT */ - if (mbox_write(data[0], 6, &data[1]) != 6) { - /* Error: no data are written */ - return 0; - } - /* now wait for the corresponding Rx event */ - return 1; /* success */ -} - -int HCISharedMemTransportClass::bt_ipm_get_random_addr(void) -{ - /* the specific table for set addr is 8 bytes: - * one byte for config_offset - * one byte for length - * 6 bytes for payload */ - uint8_t data[4 + 1]; - - phase_get_random_addr = false; - - /* create ACI_READ_CONFIG_DATA_OPCODE */ - data[0] = BT_BUF_CMD; - data[1] = uint8_t(ACI_READ_CONFIG_DATA_OPCODE & 0x000000FF); /* OCF */ - data[2] = uint8_t((ACI_READ_CONFIG_DATA_OPCODE & 0x0000FF00) >> 8); /* OGF */ - data[3] = 1; /* length of parameters */ - /* fill the ACI_READ_CONFIG_DATA_OPCODE with the offset*/ - data[4] = 0x2E; /* the offset */ - - /* send the ACI_READ_CONFIG_DATA_OPCODE */ - if (mbox_write(data[0], 4, &data[1]) != 4) { - /* Error: no data are written */ - return 0; - } - /* now wait for the corresponding Rx event */ - return 1; /* success */ -} - #endif /* STM32WBxx */ diff --git a/src/utility/HCISharedMemTransport.h b/src/utility/HCISharedMemTransport.h index 464a24f6..58fb871d 100644 --- a/src/utility/HCISharedMemTransport.h +++ b/src/utility/HCISharedMemTransport.h @@ -84,13 +84,8 @@ class HCISharedMemTransportClass : public HCITransportInterface { void start_ble_rf(void); void stm32wb_reset(void); int stm32wb_start_ble(void); - int bt_ipm_ble_init(void); int bt_ipm_set_addr(void); - int bt_ipm_set_random_addr(void); int bt_ipm_set_power(void); - int bt_ipm_gatt_init(void); - int bt_ipm_gap_init(void); - int bt_ipm_get_random_addr(void); uint8_t _random_addr[6]; }; diff --git a/src/utility/HCISpiTransport.cpp b/src/utility/HCISpiTransport.cpp index a503b427..5c18083f 100644 --- a/src/utility/HCISpiTransport.cpp +++ b/src/utility/HCISpiTransport.cpp @@ -33,6 +33,7 @@ HCISpiTransportClass::HCISpiTransportClass(SPIClass &spi, BLEChip_t ble_chip, ui _write_index = 0; _write_index_initial = 0; _initial_phase = 1; + _random_addr_done = false; } HCISpiTransportClass::~HCISpiTransportClass() @@ -66,7 +67,7 @@ int HCISpiTransportClass::begin() digitalWrite(_ble_rst, HIGH); delay(5); - if (_ble_chip == SPBTLE_RF || _ble_chip == BLUENRG_M0) { + if (_ble_chip == SPBTLE_RF || _ble_chip == BLUENRG_M0 || _ble_chip == BLUENRG_LP) { // Wait for Blue Initialize wait_for_blue_initialize(); } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { @@ -97,7 +98,7 @@ void HCISpiTransportClass::wait(unsigned long timeout) int HCISpiTransportClass::available() { - if (_ble_chip != SPBTLE_RF && _ble_chip != SPBTLE_1S && _ble_chip != BLUENRG_M2SP && _ble_chip != BLUENRG_M0) { + if (_ble_chip != SPBTLE_RF && _ble_chip != SPBTLE_1S && _ble_chip != BLUENRG_M2SP && _ble_chip != BLUENRG_M0 && _ble_chip != BLUENRG_LP) { return 0; } @@ -112,10 +113,15 @@ int HCISpiTransportClass::available() data_avail = 0; + // Wait for BlueNRG-LP to be ready (needs to be done after each HCI RESET) + if (_ble_chip == BLUENRG_LP && _initial_phase) { + delay(100); + } + while (digitalRead(_spi_irq) == 1 && _write_index != BLE_MODULE_SPI_BUFFER_SIZE) { uint8_t header_master[5] = {0x0b, 0x00, 0x00, 0x00, 0x00}; - if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { detachInterrupt(_spi_irq); } @@ -172,7 +178,7 @@ int HCISpiTransportClass::available() } } } - } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { uint16_t byte_count = (header_master[4] << 8) | header_master[3]; if (byte_count > 0) { @@ -222,13 +228,13 @@ int HCISpiTransportClass::available() _spi->endTransaction(); - if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { attachInterrupt(_spi_irq, SPI_Irq_Callback, RISING); } } if (ble_reset) { - if (_ble_chip == SPBTLE_RF || _ble_chip == BLUENRG_M0) { + if (_ble_chip == SPBTLE_RF || _ble_chip == BLUENRG_M0 || _ble_chip == BLUENRG_LP) { /* BLE chip was reset: we need to enable LL_ONLY */ enable_ll_only(); wait_for_enable_ll_only(); @@ -238,18 +244,32 @@ int HCISpiTransportClass::available() } /* Call Gatt Init and Gap Init to activate the random BLE address */ - aci_gatt_init(); - wait_for_aci_gatt_init(); - aci_gap_init(); - wait_for_aci_gap_init(); - /* Call Read Config Parameter to retrieve the random BLE address */ - aci_read_config_parameter(); - wait_for_aci_read_config_parameter(); - - /* Now we can update the write index and close the initial phase */ - _write_index = _write_index_initial; - _initial_phase = 0; - _write_index_initial = 0; + if (!_random_addr_done) { + aci_gatt_init(); + wait_for_aci_gatt_init(); + aci_gap_init(); + wait_for_aci_gap_init(); + /* Call Read Config Parameter to retrieve the random BLE address */ + aci_read_config_parameter(); + wait_for_aci_read_config_parameter(); + if (_ble_chip == BLUENRG_LP) { + hci_reset(); + _read_index = _write_index = _write_index_initial = 0; + _initial_phase = 1; + } else { + /* Now we can update the write index and close the initial phase */ + _write_index = _write_index_initial; + _initial_phase = 0; + _write_index_initial = 0; + } + } else { + set_address(); + wait_for_set_address(); + /* Now we can update the write index and close the initial phase */ + _write_index = _write_index_initial; + _initial_phase = 0; + _write_index_initial = 0; + } } if (_read_index != _write_index) { @@ -297,7 +317,7 @@ size_t HCISpiTransportClass::write(const uint8_t *data, size_t length) int result = 0; uint32_t tickstart = millis(); - if (_ble_chip != SPBTLE_RF && _ble_chip != SPBTLE_1S && _ble_chip != BLUENRG_M2SP && _ble_chip != BLUENRG_M0) { + if (_ble_chip != SPBTLE_RF && _ble_chip != SPBTLE_1S && _ble_chip != BLUENRG_M2SP && _ble_chip != BLUENRG_M0 && _ble_chip != BLUENRG_LP) { return 0; } @@ -332,7 +352,7 @@ size_t HCISpiTransportClass::write(const uint8_t *data, size_t length) result = -3; break; } - } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { uint32_t tickstart_data_available = millis(); result = 0; @@ -406,7 +426,7 @@ void HCISpiTransportClass::wait_for_blue_initialize() while (digitalRead(_spi_irq) == 1) { uint8_t header_master[5] = {0x0b, 0x00, 0x00, 0x00, 0x00}; - if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { detachInterrupt(_spi_irq); } @@ -469,13 +489,38 @@ void HCISpiTransportClass::wait_for_blue_initialize() } } } + } else if (_ble_chip == BLUENRG_LP) { + uint8_t byte_count = (header_master[4] << 8) | header_master[3]; + + if (byte_count > 0) { + /* Read the response */ + if (byte_count == 7) { + for (int j = 0; j < byte_count; j++) { + event[j] = _spi->transfer(0xFF); + } + + if (event[0] == 0x82 && + event[1] == 0xFF && + event[2] == 0x03 && + event[3] == 0x00 && + event[4] == 0x01 && + event[5] == 0x00 && + event[6] == 0x01) { + event_blue_initialize = 1; + } + } else { + for (int j = 0; j < byte_count; j++) { + _spi->transfer(0xFF); + } + } + } } digitalWrite(_cs_pin, HIGH); _spi->endTransaction(); - if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { attachInterrupt(_spi_irq, SPI_Irq_Callback, RISING); } } @@ -498,7 +543,7 @@ void HCISpiTransportClass::wait_for_enable_ll_only() while (digitalRead(_spi_irq) == 1) { uint8_t header_master[5] = {0x0b, 0x00, 0x00, 0x00, 0x00}; - if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { detachInterrupt(_spi_irq); } @@ -534,7 +579,7 @@ void HCISpiTransportClass::wait_for_enable_ll_only() } } } - } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { uint16_t byte_count = (header_master[4] << 8) | header_master[3]; if (byte_count > 0) { @@ -561,7 +606,7 @@ void HCISpiTransportClass::wait_for_enable_ll_only() _spi->endTransaction(); - if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { attachInterrupt(_spi_irq, SPI_Irq_Callback, RISING); } } @@ -601,7 +646,7 @@ void HCISpiTransportClass::enable_ll_only() digitalWrite(_cs_pin, HIGH); _spi->endTransaction(); - } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { uint32_t tickstart_data_available = millis(); result = 0; @@ -660,7 +705,7 @@ void HCISpiTransportClass::wait_for_aci_gatt_init() while (digitalRead(_spi_irq) == 1) { uint8_t header_master[5] = {0x0b, 0x00, 0x00, 0x00, 0x00}; - if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { detachInterrupt(_spi_irq); } @@ -696,7 +741,7 @@ void HCISpiTransportClass::wait_for_aci_gatt_init() } } } - } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { uint16_t byte_count = (header_master[4] << 8) | header_master[3]; if (byte_count > 0) { @@ -723,7 +768,7 @@ void HCISpiTransportClass::wait_for_aci_gatt_init() _spi->endTransaction(); - if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { attachInterrupt(_spi_irq, SPI_Irq_Callback, RISING); } } @@ -763,7 +808,7 @@ void HCISpiTransportClass::aci_gatt_init() digitalWrite(_cs_pin, HIGH); _spi->endTransaction(); - } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { uint32_t tickstart_data_available = millis(); result = 0; @@ -822,7 +867,7 @@ void HCISpiTransportClass::wait_for_aci_gap_init() while (digitalRead(_spi_irq) == 1) { uint8_t header_master[5] = {0x0b, 0x00, 0x00, 0x00, 0x00}; - if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { detachInterrupt(_spi_irq); } @@ -858,7 +903,7 @@ void HCISpiTransportClass::wait_for_aci_gap_init() } } } - } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { uint16_t byte_count = (header_master[4] << 8) | header_master[3]; if (byte_count > 0) { @@ -885,7 +930,7 @@ void HCISpiTransportClass::wait_for_aci_gap_init() _spi->endTransaction(); - if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { attachInterrupt(_spi_irq, SPI_Irq_Callback, RISING); } } @@ -895,7 +940,16 @@ void HCISpiTransportClass::wait_for_aci_gap_init() void HCISpiTransportClass::aci_gap_init() { uint8_t header_master[5] = {0x0a, 0x00, 0x00, 0x00, 0x00}; - uint8_t cmd[7] = {0x01, 0x8A, 0xFC, 0x03, 0x0F, 0x00, 0x00}; // ACI_GAP_INIT + uint8_t cmd_lp[8] = {0x01, 0x8A, 0xFC, 0x04, 0x0F, 0x00, 0x00, 0x00}; // ACI_GAP_INIT + uint8_t cmd_others[7] = {0x01, 0x8A, 0xFC, 0x03, 0x0F, 0x00, 0x00}; // ACI_GAP_INIT + uint8_t *cmd, cmd_size; + if (_ble_chip == BLUENRG_LP) { + cmd = cmd_lp; + cmd_size = 8; + } else { + cmd = cmd_others; + cmd_size = 7; + } int result = 0; do { @@ -912,9 +966,9 @@ void HCISpiTransportClass::aci_gap_init() /* device is ready */ if (header_master[0] == 0x02) { /* Write the data */ - if (header_master[1] >= 7) { + if (header_master[1] >= cmd_size) { /* Write the data */ - _spi->transfer((void *)cmd, 7); + _spi->transfer((void *)cmd, cmd_size); } else { result = -2; } @@ -925,7 +979,7 @@ void HCISpiTransportClass::aci_gap_init() digitalWrite(_cs_pin, HIGH); _spi->endTransaction(); - } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { uint32_t tickstart_data_available = millis(); result = 0; @@ -952,9 +1006,9 @@ void HCISpiTransportClass::aci_gap_init() /* Write the header */ _spi->transfer(header_master, 5); - if ((int)((((uint16_t)header_master[2]) << 8) | ((uint16_t)header_master[1])) >= 7) { + if ((int)((((uint16_t)header_master[2]) << 8) | ((uint16_t)header_master[1])) >= cmd_size) { /* Write the data */ - _spi->transfer((void *)cmd, 7); + _spi->transfer((void *)cmd, cmd_size); } else { result = -2; } @@ -984,7 +1038,7 @@ void HCISpiTransportClass::wait_for_aci_read_config_parameter() while (digitalRead(_spi_irq) == 1) { uint8_t header_master[5] = {0x0b, 0x00, 0x00, 0x00, 0x00}; - if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { detachInterrupt(_spi_irq); } @@ -1021,7 +1075,7 @@ void HCISpiTransportClass::wait_for_aci_read_config_parameter() } } } - } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { uint16_t byte_count = (header_master[4] << 8) | header_master[3]; if (byte_count > 0) { @@ -1040,6 +1094,7 @@ void HCISpiTransportClass::wait_for_aci_read_config_parameter() data[6] == 0x00) { memcpy(_random_addr, &data[8], 6); status = 1; + _random_addr_done = true; } } } @@ -1049,7 +1104,7 @@ void HCISpiTransportClass::wait_for_aci_read_config_parameter() _spi->endTransaction(); - if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { attachInterrupt(_spi_irq, SPI_Irq_Callback, RISING); } } @@ -1089,7 +1144,7 @@ void HCISpiTransportClass::aci_read_config_parameter() digitalWrite(_cs_pin, HIGH); _spi->endTransaction(); - } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP) { + } else if (_ble_chip == SPBTLE_1S || _ble_chip == BLUENRG_M2SP || _ble_chip == BLUENRG_LP) { uint32_t tickstart_data_available = millis(); result = 0; @@ -1131,3 +1186,162 @@ void HCISpiTransportClass::aci_read_config_parameter() } } while (result < 0); } + +void HCISpiTransportClass::hci_reset() +{ + uint8_t header_master[5] = {0x0a, 0x00, 0x00, 0x00, 0x00}; + uint8_t cmd[4] = {0x01, 0x03, 0x0C, 0x00}; // HCI_RESET + int result = 0; + + do { + if (_ble_chip == BLUENRG_LP) { + uint32_t tickstart_data_available = millis(); + result = 0; + + detachInterrupt(_spi_irq); + + _spi->beginTransaction(_spiSettings); + + digitalWrite(_cs_pin, LOW); + + while (!(digitalRead(_spi_irq) == 1)) { + if ((millis() - tickstart_data_available) > 1000) { + result = -3; + break; + } + } + + if (result == -3) { + digitalWrite(_cs_pin, HIGH); + _spi->endTransaction(); + attachInterrupt(_spi_irq, SPI_Irq_Callback, RISING); + break; + } + + /* Write the header */ + _spi->transfer(header_master, 5); + + if ((int)((((uint16_t)header_master[2]) << 8) | ((uint16_t)header_master[1])) >= 4) { + /* Write the data */ + _spi->transfer((void *)cmd, 4); + } else { + result = -2; + } + + digitalWrite(_cs_pin, HIGH); + + _spi->endTransaction(); + + attachInterrupt(_spi_irq, SPI_Irq_Callback, RISING); + } + } while (result < 0); +} + +void HCISpiTransportClass::set_address() +{ + uint8_t header_master[5] = {0x0a, 0x00, 0x00, 0x00, 0x00}; + uint8_t cmd[10] = {0x01, 0x05, 0x20, 0x06}; // SET ADDR + int result = 0; + memcpy(&cmd[4], _random_addr, 6); + + do { + if (_ble_chip == BLUENRG_LP) { + uint32_t tickstart_data_available = millis(); + result = 0; + + detachInterrupt(_spi_irq); + + _spi->beginTransaction(_spiSettings); + + digitalWrite(_cs_pin, LOW); + + while (!(digitalRead(_spi_irq) == 1)) { + if ((millis() - tickstart_data_available) > 1000) { + result = -3; + break; + } + } + + if (result == -3) { + digitalWrite(_cs_pin, HIGH); + _spi->endTransaction(); + attachInterrupt(_spi_irq, SPI_Irq_Callback, RISING); + break; + } + + /* Write the header */ + _spi->transfer(header_master, 5); + + if ((int)((((uint16_t)header_master[2]) << 8) | ((uint16_t)header_master[1])) >= 10) { + /* Write the data */ + _spi->transfer((void *)cmd, 10); + } else { + result = -2; + } + + digitalWrite(_cs_pin, HIGH); + + _spi->endTransaction(); + + attachInterrupt(_spi_irq, SPI_Irq_Callback, RISING); + } + } while (result < 0); +} + +void HCISpiTransportClass::wait_for_set_address() +{ + uint8_t data[15]; + int status = 0; + + if (_ble_chip != BLUENRG_LP) return; + + do { + while (!data_avail); + + if (digitalRead(_spi_irq) == 0) { + continue; + } + + data_avail = 0; + while (digitalRead(_spi_irq) == 1) { + uint8_t header_master[5] = {0x0b, 0x00, 0x00, 0x00, 0x00}; + uint16_t byte_count = 0; + + detachInterrupt(_spi_irq); + + _spi->beginTransaction(_spiSettings); + + digitalWrite(_cs_pin, LOW); + + /* Write the header */ + _spi->transfer(header_master, 5); + + byte_count = (header_master[4] << 8) | header_master[3]; + + if (byte_count > 0) { + /* Read the response */ + for (int j = 0; j < byte_count; j++) { + data[j] = _spi->transfer(0xFF); + } + + if (byte_count >= 7) { // 040E0401052000 + if (data[0] == 0x04 && + data[1] == 0x0E && + data[2] == 0x04 && + data[3] == 0x01 && + data[4] == 0x05 && + data[5] == 0x20 && + data[6] == 0x00) { + status = 1; + } + } + } + + digitalWrite(_cs_pin, HIGH); + + _spi->endTransaction(); + + attachInterrupt(_spi_irq, SPI_Irq_Callback, RISING); + } + } while (!status); +} diff --git a/src/utility/HCISpiTransport.h b/src/utility/HCISpiTransport.h index 9c3afc34..34af1aa9 100644 --- a/src/utility/HCISpiTransport.h +++ b/src/utility/HCISpiTransport.h @@ -27,7 +27,8 @@ typedef enum BLEChip_s { SPBTLE_RF, SPBTLE_1S, BLUENRG_M2SP, - BLUENRG_M0 + BLUENRG_M0, + BLUENRG_LP } BLEChip_t; #ifndef BLE_SPI_BYTE_ORDER @@ -61,6 +62,9 @@ class HCISpiTransportClass : public HCITransportInterface { void aci_gap_init(); void wait_for_aci_read_config_parameter(); void aci_read_config_parameter(); + void hci_reset(); + void set_address(); + void wait_for_set_address(); SPIClass *_spi; SPISettings _spiSettings; BLEChip_t _ble_chip; @@ -73,6 +77,7 @@ class HCISpiTransportClass : public HCITransportInterface { uint16_t _write_index_initial; uint8_t _initial_phase; uint8_t _random_addr[6]; + bool _random_addr_done; }; #endif /* _HCI_SPI_TRANSPORT_H_ */ diff --git a/src/utility/STM32Cube_FW/LICENSE.md b/src/utility/STM32Cube_FW/LICENSE.md new file mode 100644 index 00000000..1af52330 --- /dev/null +++ b/src/utility/STM32Cube_FW/LICENSE.md @@ -0,0 +1,80 @@ +SLA0044 Rev5/February 2018 + +## Software license agreement + +### __ULTIMATE LIBERTY SOFTWARE LICENSE AGREEMENT__ + +BY INSTALLING, COPYING, DOWNLOADING, ACCESSING OR OTHERWISE USING THIS SOFTWARE +OR ANY PART THEREOF (AND THE RELATED DOCUMENTATION) FROM STMICROELECTRONICS +INTERNATIONAL N.V, SWISS BRANCH AND/OR ITS AFFILIATED COMPANIES +(STMICROELECTRONICS), THE RECIPIENT, ON BEHALF OF HIMSELF OR HERSELF, OR ON +BEHALF OF ANY ENTITY BY WHICH SUCH RECIPIENT IS EMPLOYED AND/OR ENGAGED AGREES +TO BE BOUND BY THIS SOFTWARE LICENSE AGREEMENT. + +Under STMicroelectronics’ intellectual property rights, the redistribution, +reproduction and use in source and binary forms of the software or any part +thereof, with or without modification, are permitted provided that the following +conditions are met: + +1. Redistribution of source code (modified or not) must retain any copyright +notice, this list of conditions and the disclaimer set forth below as items 10 +and 11. + +2. Redistributions in binary form, except as embedded into microcontroller or +microprocessor device manufactured by or for STMicroelectronics or a software +update for such device, must reproduce any copyright notice provided with the +binary code, this list of conditions, and the disclaimer set forth below as +items 10 and 11, in documentation and/or other materials provided with the +distribution. + +3. Neither the name of STMicroelectronics nor the names of other contributors to +this software may be used to endorse or promote products derived from this +software or part thereof without specific written permission. + +4. This software or any part thereof, including modifications and/or derivative +works of this software, must be used and execute solely and exclusively on or in +combination with a microcontroller or microprocessor device manufactured by or +for STMicroelectronics. + +5. No use, reproduction or redistribution of this software partially or totally +may be done in any manner that would subject this software to any Open Source +Terms. “Open Source Terms†shall mean any open source license which requires as +part of distribution of software that the source code of such software is +distributed therewith or otherwise made available, or open source license that +substantially complies with the Open Source definition specified at +www.opensource.org and any other comparable open source license such as for +example GNU General Public License (GPL), Eclipse Public License (EPL), Apache +Software License, BSD license or MIT license. + +6. STMicroelectronics has no obligation to provide any maintenance, support or +updates for the software. + +7. The software is and will remain the exclusive property of STMicroelectronics +and its licensors. The recipient will not take any action that jeopardizes +STMicroelectronics and its licensors' proprietary rights or acquire any rights +in the software, except the limited rights specified hereunder. + +8. The recipient shall comply with all applicable laws and regulations affecting +the use of the software or any part thereof including any applicable export +control law or regulation. + +9. Redistribution and use of this software or any part thereof other than as +permitted under this license is void and will automatically terminate your +rights under this license. + +10. THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" AND +ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND +NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS, WHICH ARE +DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT SHALL +STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF +LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +11. EXCEPT AS EXPRESSLY PERMITTED HEREUNDER, NO LICENSE OR OTHER RIGHTS, WHETHER +EXPRESS OR IMPLIED, ARE GRANTED UNDER ANY PATENT OR OTHER INTELLECTUAL PROPERTY +RIGHTS OF STMICROELECTRONICS OR ANY THIRD PARTY. diff --git a/src/utility/STM32Cube_FW/README.md b/src/utility/STM32Cube_FW/README.md index 880fcbbc..69041d4c 100644 --- a/src/utility/STM32Cube_FW/README.md +++ b/src/utility/STM32Cube_FW/README.md @@ -1,6 +1,6 @@ ## Source -[STMicroelectronics/STM32CubeWB Release v1.8.0](https://github.com/STMicroelectronics/STM32CubeWB/releases/tag/v1.8.0) -- Application: [BLE_TransparentMode](https://github.com/STMicroelectronics/STM32CubeWB/tree/v1.8.0/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_TransparentMode) +[STMicroelectronics/STM32CubeWB Release vv1.15.0](https://github.com/STMicroelectronics/STM32CubeWB/releases/tag/vv1.15.0) +- Application: [BLE_TransparentMode](https://github.com/STMicroelectronics/STM32CubeWB/tree/vv1.15.0/Projects/P-NUCLEO-WB55.Nucleo/Applications/BLE/BLE_TransparentMode) diff --git a/src/utility/STM32Cube_FW/app_conf.h b/src/utility/STM32Cube_FW/app_conf.h index 667dbbd4..3246393f 100644 --- a/src/utility/STM32Cube_FW/app_conf.h +++ b/src/utility/STM32Cube_FW/app_conf.h @@ -1,158 +1,20 @@ -/** - ****************************************************************************** - * File Name : app_conf.h - * Description : Application configuration file for STM32WPAN Middleware. - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2020 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under Ultimate Liberty license - * SLA0044, the "License"; You may not use this file except in compliance with - * the License. You may obtain a copy of the License at: - * www.st.com/SLA0044 - * - ****************************************************************************** - */ +//----------------------------- +// @file app_conf.h +// @author Kasper Meldgaard +// @brief Wrapper for BLE app configuration based on comment by fpistm +// (https://github.com/stm32duino/STM32duinoBLE/issues/34). +// @date 15-11-2021 +// @copyright Copyright (c) 2021 -/* Define to prevent recursive inclusion -------------------------------------*/ #ifndef APP_CONF_H #define APP_CONF_H #include "hw.h" #include "ble_bufsize.h" - -/****************************************************************************** - * Application Config - ******************************************************************************/ - -/**< generic parameters ******************************************************/ -/* HCI related defines */ - -#define ACI_HAL_SET_TX_POWER_LEVEL 0xFC0F -#define ACI_WRITE_CONFIG_DATA_OPCODE 0xFC0C -#define ACI_READ_CONFIG_DATA_OPCODE 0xFC0D -#define MAX_HCI_ACL_PACKET_SIZE (sizeof(TL_PacketHeader_t) + 5 + 251) -#define HCI_RESET 0x0C03 - -#ifndef BLE_SHARED_MEM_BYTE_ORDER - #define BLE_SHARED_MEM_BYTE_ORDER MSBFIRST +#if __has_include("app_conf_custom.h") + #include "app_conf_custom.h" #endif -#define BLE_MODULE_SHARED_MEM_BUFFER_SIZE 128 - -/** - * Define Tx Power - */ -#define CFG_TX_POWER (0x18) /* -0.15dBm */ - -/****************************************************************************** - * BLE Stack - ******************************************************************************/ -/** - * Maximum number of simultaneous connections that the device will support. - * Valid values are from 1 to 8 - */ -#define CFG_BLE_NUM_LINK 8 - -/** - * Maximum number of Services that can be stored in the GATT database. - * Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user services - */ -#define CFG_BLE_NUM_GATT_SERVICES 8 - -/** - * Maximum number of Attributes - * (i.e. the number of characteristic + the number of characteristic values + the number of descriptors, excluding the services) - * that can be stored in the GATT database. - * Note that certain characteristics and relative descriptors are added automatically during device initialization - * so this parameters should be 9 plus the number of user Attributes - */ -#define CFG_BLE_NUM_GATT_ATTRIBUTES 68 - -/** - * Maximum supported ATT_MTU size - */ -#define CFG_BLE_MAX_ATT_MTU (156) - -/** - * Size of the storage area for Attribute values - * This value depends on the number of attributes used by application. In particular the sum of the following quantities (in octets) should be made for each attribute: - * - attribute value length - * - 5, if UUID is 16 bit; 19, if UUID is 128 bit - * - 2, if server configuration descriptor is used - * - 2*DTM_NUM_LINK, if client configuration descriptor is used - * - 2, if extended properties is used - * The total amount of memory needed is the sum of the above quantities for each attribute. - */ -#define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) - -/** - * Prepare Write List size in terms of number of packet - */ -//#define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU) -#define CFG_BLE_PREPARE_WRITE_LIST_SIZE (0x3A) - -/** - * Number of allocated memory blocks - */ -//#define CFG_BLE_MBLOCK_COUNT (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK)) -#define CFG_BLE_MBLOCK_COUNT (0x79) -/** - * Enable or disable the Extended Packet length feature. Valid values are 0 or 1. - */ -#define CFG_BLE_DATA_LENGTH_EXTENSION 1 - -/** - * Sleep clock accuracy in Slave mode (ppm value) - */ -#define CFG_BLE_SLAVE_SCA 500 - -/** - * Sleep clock accuracy in Master mode - * 0 : 251 ppm to 500 ppm - * 1 : 151 ppm to 250 ppm - * 2 : 101 ppm to 150 ppm - * 3 : 76 ppm to 100 ppm - * 4 : 51 ppm to 75 ppm - * 5 : 31 ppm to 50 ppm - * 6 : 21 ppm to 30 ppm - * 7 : 0 ppm to 20 ppm - */ -#define CFG_BLE_MASTER_SCA 0 - -/** - * Source for the 32 kHz slow speed clock - * 1 : internal RO - * 0 : external crystal ( no calibration ) - */ -#define CFG_BLE_LSE_SOURCE 0 - -/** - * Start up time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us) - */ -#define CFG_BLE_HSE_STARTUP_TIME 0x148 - -/** - * Maximum duration of the connection event when the device is in Slave mode in units of 625/256 us (~2.44 us) - */ -#define CFG_BLE_MAX_CONN_EVENT_LENGTH ( 0xFFFFFFFF ) - -/** - * Viterbi Mode - * 1 : enabled - * 0 : disabled - */ -#define CFG_BLE_VITERBI_MODE 1 - -/** - * LL Only Mode - * 1 : LL Only - * 0 : LL + Host - */ -#define CFG_BLE_LL_ONLY 1 +#include "app_conf_default.h" #endif /* APP_CONF_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/utility/STM32Cube_FW/app_conf_default.h b/src/utility/STM32Cube_FW/app_conf_default.h new file mode 100644 index 00000000..35cad34f --- /dev/null +++ b/src/utility/STM32Cube_FW/app_conf_default.h @@ -0,0 +1,307 @@ +/** + ****************************************************************************** + * @file app_conf_default.h + * @author MCD Application Team + * @brief Default application configuration file for STM32WPAN Middleware. + ****************************************************************************** + * @attention + * + * Copyright (c) 2020-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef APP_CONF_DEFAULT_H +#define APP_CONF_DEFAULT_H + +/****************************************************************************** + * Application Config + ******************************************************************************/ + +/**< generic parameters ******************************************************/ +/* HCI related defines */ + +#define ACI_HAL_SET_TX_POWER_LEVEL 0xFC0F +#define ACI_WRITE_CONFIG_DATA_OPCODE 0xFC0C +#define ACI_READ_CONFIG_DATA_OPCODE 0xFC0D +#define MAX_HCI_ACL_PACKET_SIZE (sizeof(TL_PacketHeader_t) + 5 + 251) +#define HCI_RESET 0x0C03 + +#ifndef BLE_SHARED_MEM_BYTE_ORDER + #define BLE_SHARED_MEM_BYTE_ORDER MSBFIRST +#endif +#define BLE_MODULE_SHARED_MEM_BUFFER_SIZE 128 + +/** + * Define Tx Power + */ +#ifndef CFG_TX_POWER + #define CFG_TX_POWER (0x18) /* -0.15dBm */ +#endif + +/****************************************************************************** + * BLE Stack + ******************************************************************************/ +/** + * Maximum number of simultaneous connections that the device will support. + * Valid values are from 1 to 8 + */ +#ifndef CFG_BLE_NUM_LINK +#ifdef STM32WB15xx + #define CFG_BLE_NUM_LINK 3 +#else + #define CFG_BLE_NUM_LINK 8 +#endif +#endif + +/** + * Maximum number of Services that can be stored in the GATT database. + * Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user services + */ +#ifndef CFG_BLE_NUM_GATT_SERVICES +#ifdef STM32WB15xx + #define CFG_BLE_NUM_GATT_SERVICES 4 +#else + #define CFG_BLE_NUM_GATT_SERVICES 8 +#endif +#endif + +/** + * Maximum number of Attributes + * (i.e. the number of characteristic + the number of characteristic values + the number of descriptors, excluding the services) + * that can be stored in the GATT database. + * Note that certain characteristics and relative descriptors are added automatically during device initialization + * so this parameters should be 9 plus the number of user Attributes + */ +#ifndef CFG_BLE_NUM_GATT_ATTRIBUTES +#ifdef STM32WB15xx + #define CFG_BLE_NUM_GATT_ATTRIBUTES 30 +#else + #define CFG_BLE_NUM_GATT_ATTRIBUTES 68 +#endif +#endif + +/** + * Maximum supported ATT_MTU size + * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set + */ +#ifndef CFG_BLE_MAX_ATT_MTU + #define CFG_BLE_MAX_ATT_MTU (156) +#endif + +/** + * Size of the storage area for Attribute values + * This value depends on the number of attributes used by application. In particular the sum of the following quantities (in octets) should be made for each attribute: + * - attribute value length + * - 5, if UUID is 16 bit; 19, if UUID is 128 bit + * - 2, if server configuration descriptor is used + * - 2*DTM_NUM_LINK, if client configuration descriptor is used + * - 2, if extended properties is used + * The total amount of memory needed is the sum of the above quantities for each attribute. + * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set + */ +#ifndef CFG_BLE_ATT_VALUE_ARRAY_SIZE +#ifdef STM32WB15xx + #define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1290) +#else + #define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) +#endif +#endif + +/** + * Prepare Write List size in terms of number of packet + * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set + */ +// #define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU) +#ifndef CFG_BLE_PREPARE_WRITE_LIST_SIZE + #define CFG_BLE_PREPARE_WRITE_LIST_SIZE (0x3A) +#endif + +/** + * Number of allocated memory blocks + * This parameter is overwritten by the CPU2 with an hardcoded optimal value when the parameter CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set + */ +// #define CFG_BLE_MBLOCK_COUNT (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK)) +#define CFG_BLE_MBLOCK_COUNT (0x79) + +/** + * Enable or disable the Extended Packet length feature. Valid values are 0 or 1. + */ +#ifndef CFG_BLE_DATA_LENGTH_EXTENSION + #define CFG_BLE_DATA_LENGTH_EXTENSION 1 +#endif + +/** + * Sleep clock accuracy in Slave mode (ppm value) + */ +#ifndef CFG_BLE_SLAVE_SCA + #define CFG_BLE_SLAVE_SCA 500 +#endif + +/** + * Sleep clock accuracy in Master mode + * 0 : 251 ppm to 500 ppm + * 1 : 151 ppm to 250 ppm + * 2 : 101 ppm to 150 ppm + * 3 : 76 ppm to 100 ppm + * 4 : 51 ppm to 75 ppm + * 5 : 31 ppm to 50 ppm + * 6 : 21 ppm to 30 ppm + * 7 : 0 ppm to 20 ppm + */ +#ifndef CFG_BLE_MASTER_SCA + #define CFG_BLE_MASTER_SCA 0 +#endif + +/** + * LsSource + * Some information for Low speed clock mapped in bits field + * - bit 0: 1: Calibration for the RF system wakeup clock source 0: No calibration for the RF system wakeup clock source + * - bit 1: 1: STM32WB5M Module device 0: Other devices as STM32WBxx SOC, STM32WB1M module + * - bit 2: 1: HSE/1024 Clock config 0: LSE Clock config + */ +#ifndef CFG_BLE_LS_SOURCE + #if defined(STM32WB5Mxx) + #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) + #else + #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) + #endif +#endif + +/** + * Start up time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us) + */ +#ifndef CFG_BLE_HSE_STARTUP_TIME + #define CFG_BLE_HSE_STARTUP_TIME 0x148 +#endif + +/** + * Maximum duration of the connection event when the device is in Slave mode in units of 625/256 us (~2.44 us) + */ +#ifndef CFG_BLE_MAX_CONN_EVENT_LENGTH + #define CFG_BLE_MAX_CONN_EVENT_LENGTH (0xFFFFFFFF) +#endif + +/** + * Viterbi Mode + * 1 : enabled + * 0 : disabled + */ +#define CFG_BLE_VITERBI_MODE 1 + +/** + * BLE stack Options flags to be configured with: + * - SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY + * - SHCI_C2_BLE_INIT_OPTIONS_LL_HOST + * - SHCI_C2_BLE_INIT_OPTIONS_NO_SVC_CHANGE_DESC + * - SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC + * - SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RO + * - SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW + * - SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV + * - SHCI_C2_BLE_INIT_OPTIONS_NO_EXT_ADV + * - SHCI_C2_BLE_INIT_OPTIONS_CS_ALGO2 + * - SHCI_C2_BLE_INIT_OPTIONS_NO_CS_ALGO2 + * - SHCI_C2_BLE_INIT_OPTIONS_REDUC_GATTDB_NVM + * - SHCI_C2_BLE_INIT_OPTIONS_FULL_GATTDB_NVM + * - SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_USED + * - SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_NOTUSED + * - SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_1 + * - SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3 + * - SHCI_C2_BLE_INIT_OPTIONS_APPEARANCE_WRITABLE + * - SHCI_C2_BLE_INIT_OPTIONS_APPEARANCE_READONLY + * - SHCI_C2_BLE_INIT_OPTIONS_ENHANCED_ATT_SUPPORTED + * - SHCI_C2_BLE_INIT_OPTIONS_ENHANCED_ATT_NOTSUPPORTED + * which are used to set following configuration bits: + * (bit 0): 1: LL only + * 0: LL + host + * (bit 1): 1: no service change desc. + * 0: with service change desc. + * (bit 2): 1: device name Read-Only + * 0: device name R/W + * (bit 3): 1: extended advertizing supported + * 0: extended advertizing not supported + * (bit 4): 1: CS Algo #2 supported + * 0: CS Algo #2 not supported + * (bit 5): 1: Reduced GATT database in NVM + * 0: Full GATT database in NVM + * (bit 6): 1: GATT caching is used + * 0: GATT caching is not used + * (bit 7): 1: LE Power Class 1 + * 0: LE Power Class 2-3 + * (bit 8): 1: appearance Writable + * 0: appearance Read-Only + * (bit 9): 1: Enhanced ATT supported + * 0: Enhanced ATT not supported + * other bits: reserved (shall be set to 0) + */ +#define CFG_BLE_OPTIONS (SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY) + +#define CFG_BLE_MAX_COC_INITIATOR_NBR (32) + +#define CFG_BLE_MIN_TX_POWER (-40) + +#define CFG_BLE_MAX_TX_POWER (6) + +/** + * BLE Rx model configuration flags to be configured with: + * - SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_LEGACY + * - SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_BLOCKER + * which are used to set following configuration bits: + * (bit 0): 1: agc_rssi model improved vs RF blockers + * 0: Legacy agc_rssi model + * other bits: reserved (shall be set to 0) + */ + +#define CFG_BLE_RX_MODEL_CONFIG (SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_LEGACY) + +/* Maximum number of advertising sets. + * Range: 1 .. 8 with limitation: + * This parameter is linked to CFG_BLE_MAX_ADV_DATA_LEN such as both compliant with allocated Total memory computed with BLE_EXT_ADV_BUFFER_SIZE based + * on Max Extended advertising configuration supported. + * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set + */ +#if defined(STM32WB15xx) + #define CFG_BLE_MAX_ADV_SET_NBR (3) +#else + #define CFG_BLE_MAX_ADV_SET_NBR (8) +#endif + + /* Maximum advertising data length (in bytes) + * Range: 31 .. 1650 with limitation: + * This parameter is linked to CFG_BLE_MAX_ADV_SET_NBR such as both compliant with allocated Total memory computed with BLE_EXT_ADV_BUFFER_SIZE based + * on Max Extended advertising configuration supported. + * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set + */ +#if defined(STM32WB15xx) + #define CFG_BLE_MAX_ADV_DATA_LEN (414) +#else + #define CFG_BLE_MAX_ADV_DATA_LEN (207) +#endif + + /* RF TX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. + * Range: -1280 .. 1280 + */ + +#define CFG_BLE_TX_PATH_COMPENS (0) + + /* RF RX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. + * Range: -1280 .. 1280 + */ + +#define CFG_BLE_RX_PATH_COMPENS (0) + + /* BLE core version (16-bit signed integer). + * - SHCI_C2_BLE_INIT_BLE_CORE_5_2 + * - SHCI_C2_BLE_INIT_BLE_CORE_5_3 + * which are used to set: 11(5.2), 12(5.3). + */ + +#define CFG_BLE_CORE_VERSION (SHCI_C2_BLE_INIT_BLE_CORE_5_3) + +#endif /* APP_CONF_DEFAULT_H */ diff --git a/src/utility/STM32Cube_FW/ble_bufsize.h b/src/utility/STM32Cube_FW/ble_bufsize.h index 2961cd99..cea5da84 100644 --- a/src/utility/STM32Cube_FW/ble_bufsize.h +++ b/src/utility/STM32Cube_FW/ble_bufsize.h @@ -1,17 +1,16 @@ /***************************************************************************** * @file ble_bufsize.h - * @author MCD Application Team + * @author MDG * @brief Definition of BLE stack buffers size ***************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2018-2022 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under Ultimate Liberty license - * SLA0044, the "License"; You may not use this file except in compliance with - * the License. You may obtain a copy of the License at: - * www.st.com/SLA0044 + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ***************************************************************************** */ @@ -25,11 +24,6 @@ */ #define BLE_DEFAULT_ATT_MTU 23 -/* - * BLE_DEFAULT_MAX_ATT_MTU: maximum supported ATT MTU size. - */ -#define BLE_DEFAULT_MAX_ATT_MTU 158 - /* * BLE_DEFAULT_MAX_ATT_SIZE: maximum attribute size. */ @@ -92,33 +86,45 @@ * BLE_FIXED_BUFFER_SIZE_BYTES: * A part of the RAM, is dynamically allocated by initializing all the pointers * defined in a global context variable "mem_alloc_ctx_p". - * This initialization is made in the Dynamic_allocator functions, which + * This initialization is made in the Dynamic_allocator functions, which * assign a portion of RAM given by the external application to the above * mentioned "global pointers". * - * The size of this Dynamic RAM is made of 2 main components: + * The size of this Dynamic RAM is made of 2 main components: * - a part that is parameters-dependent (num of links, GATT buffers, ...), - * and which value is defined by the following macro; + * and which value is made explicit by the following macro; * - a part, that may be considered "fixed", i.e. independent from the above * mentioned parameters. */ -#if (SLAVE_ONLY == 0) && (LL_ONLY == 0) - #define BLE_FIXED_BUFFER_SIZE_BYTES 6960 /* Full stack */ -#elif SLAVE_ONLY == 0 - #define BLE_FIXED_BUFFER_SIZE_BYTES 6256 /* LL only */ +#if (BEACON_ONLY != 0) +#define BLE_FIXED_BUFFER_SIZE_BYTES 4092 /* Beacon only */ +#elif (LL_ONLY_BASIC != 0) +#define BLE_FIXED_BUFFER_SIZE_BYTES 5788 /* LL only Basic*/ +#elif (LL_ONLY != 0) +#define BLE_FIXED_BUFFER_SIZE_BYTES 6036 /* LL only Full */ +#elif (SLAVE_ONLY != 0) +#define BLE_FIXED_BUFFER_SIZE_BYTES 6292 /* Peripheral only */ +#elif (BASIC_FEATURES != 0) +#define BLE_FIXED_BUFFER_SIZE_BYTES 6624 /* Basic Features */ #else - #define BLE_FIXED_BUFFER_SIZE_BYTES 6696 /* Slave only */ +#define BLE_FIXED_BUFFER_SIZE_BYTES 7144 /* Full stack */ #endif /* * BLE_PER_LINK_SIZE_BYTES: additional memory size used per link */ -#if (SLAVE_ONLY == 0) && (LL_ONLY == 0) - #define BLE_PER_LINK_SIZE_BYTES 380 /* Full stack */ -#elif SLAVE_ONLY == 0 - #define BLE_PER_LINK_SIZE_BYTES 196 /* LL only */ +#if (BEACON_ONLY != 0) +#define BLE_PER_LINK_SIZE_BYTES 112 /* Beacon only */ +#elif (LL_ONLY_BASIC != 0) +#define BLE_PER_LINK_SIZE_BYTES 244 /* LL only Basic */ +#elif (LL_ONLY != 0) +#define BLE_PER_LINK_SIZE_BYTES 244 /* LL only Full */ +#elif (SLAVE_ONLY != 0) +#define BLE_PER_LINK_SIZE_BYTES 336 /* Peripheral only */ +#elif (BASIC_FEATURES != 0) +#define BLE_PER_LINK_SIZE_BYTES 412 /* Basic Features */ #else - #define BLE_PER_LINK_SIZE_BYTES 332 /* Slave only */ +#define BLE_PER_LINK_SIZE_BYTES 424 /* Full stack */ #endif /* @@ -126,16 +132,31 @@ * needed for the storage of data structures (except GATT database elements) * whose size depends on the number of supported connections. * - * @param num_links: Maximum number of simultaneous connections that the device + * @param n_link: Maximum number of simultaneous connections that the device * will support. Valid values are from 1 to 8. * * @param mblocks_count: Number of memory blocks allocated for packets. */ #define BLE_TOTAL_BUFFER_SIZE(n_link, mblocks_count) \ - (BLE_FIXED_BUFFER_SIZE_BYTES + \ + (16 + BLE_FIXED_BUFFER_SIZE_BYTES + \ (BLE_PER_LINK_SIZE_BYTES * (n_link)) + \ ((BLE_MEM_BLOCK_SIZE + 12) * (mblocks_count))) +/* + * BLE_EXT_ADV_BUFFER_SIZE + * additional memory size used for Extended advertising; + * It has to be added to BLE_TOTAL_BUFFER_SIZE() if the Extended advertising + * feature is used. + * + * @param set_nbr: Maximum number of advertising sets. + * Valid values are from 1 to 8. + * + * @param data_len: Maximum size of advertising data. + * Valid values are from 31 to 1650. + */ +#define BLE_EXT_ADV_BUFFER_SIZE(set_nbr, data_len) \ + (2512 + ((892 + (DIVC(data_len, 207) * 244)) * (set_nbr))) + /* * BLE_TOTAL_BUFFER_SIZE_GATT: this macro returns the amount of memory, * in bytes, needed for the storage of GATT database elements. @@ -158,4 +179,4 @@ (40 * (num_gatt_attributes)) + (48 * (num_gatt_services))) -#endif /* ! BLE_BUFSIZE_H__ */ +#endif /* BLE_BUFSIZE_H__ */ diff --git a/src/utility/STM32Cube_FW/hw.h b/src/utility/STM32Cube_FW/hw.h index 09b12aff..fcf04517 100644 --- a/src/utility/STM32Cube_FW/hw.h +++ b/src/utility/STM32Cube_FW/hw.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -26,7 +25,7 @@ extern "C" { #endif -/* Includes ------------------------------------------------------------------*/ + /* Includes ------------------------------------------------------------------*/ #include "stm32_def.h" #include "stm32wbxx_ll_bus.h" #include "stm32wbxx_ll_exti.h" @@ -37,56 +36,56 @@ extern "C" { #include "stm32wbxx_ll_utils.h" #include "stm32wbxx_ll_pwr.h" -/****************************************************************************** - * HW IPCC - ******************************************************************************/ -void HW_IPCC_Enable(void); -void HW_IPCC_Init(void); - -void HW_IPCC_BLE_Init(void); -void HW_IPCC_BLE_SendCmd(void); -void HW_IPCC_MM_SendFreeBuf(void (*cb)(void)); -void HW_IPCC_BLE_RxEvtNot(void); -void HW_IPCC_BLE_SendAclData(void); -void HW_IPCC_BLE_AclDataAckNot(void); - -void HW_IPCC_SYS_Init(void); -void HW_IPCC_SYS_SendCmd(void); -void HW_IPCC_SYS_CmdEvtNot(void); -void HW_IPCC_SYS_EvtNot(void); - -void HW_IPCC_THREAD_Init(void); -void HW_IPCC_OT_SendCmd(void); -void HW_IPCC_CLI_SendCmd(void); -void HW_IPCC_THREAD_SendAck(void); -void HW_IPCC_OT_CmdEvtNot(void); -void HW_IPCC_CLI_CmdEvtNot(void); -void HW_IPCC_THREAD_EvtNot(void); -void HW_IPCC_THREAD_CliSendAck(void); -void HW_IPCC_THREAD_CliEvtNot(void); - - -void HW_IPCC_LLDTESTS_Init(void); -void HW_IPCC_LLDTESTS_SendCliCmd(void); -void HW_IPCC_LLDTESTS_ReceiveCliRsp(void); -void HW_IPCC_LLDTESTS_SendCliRspAck(void); -void HW_IPCC_LLDTESTS_ReceiveM0Cmd(void); -void HW_IPCC_LLDTESTS_SendM0CmdAck(void); - - -void HW_IPCC_LLD_BLE_Init(void); -void HW_IPCC_LLD_BLE_SendCliCmd(void); -void HW_IPCC_LLD_BLE_ReceiveCliRsp(void); -void HW_IPCC_LLD_BLE_SendCliRspAck(void); -void HW_IPCC_LLD_BLE_ReceiveM0Cmd(void); -void HW_IPCC_LLD_BLE_SendM0CmdAck(void); -void HW_IPCC_LLD_BLE_SendCmd(void); -void HW_IPCC_LLD_BLE_ReceiveRsp(void); -void HW_IPCC_LLD_BLE_SendRspAck(void); - - -void HW_IPCC_TRACES_Init(void); -void HW_IPCC_TRACES_EvtNot(void); + /****************************************************************************** + * HW IPCC + ******************************************************************************/ + void HW_IPCC_Enable( void ); + void HW_IPCC_Init( void ); + + void HW_IPCC_BLE_Init( void ); + void HW_IPCC_BLE_SendCmd( void ); + void HW_IPCC_MM_SendFreeBuf( void (*cb)( void ) ); + void HW_IPCC_BLE_RxEvtNot( void ); + void HW_IPCC_BLE_SendAclData( void ); + void HW_IPCC_BLE_AclDataAckNot( void ); + + void HW_IPCC_SYS_Init( void ); + void HW_IPCC_SYS_SendCmd( void ); + void HW_IPCC_SYS_CmdEvtNot( void ); + void HW_IPCC_SYS_EvtNot( void ); + + void HW_IPCC_THREAD_Init( void ); + void HW_IPCC_OT_SendCmd( void ); + void HW_IPCC_CLI_SendCmd( void ); + void HW_IPCC_THREAD_SendAck( void ); + void HW_IPCC_OT_CmdEvtNot( void ); + void HW_IPCC_CLI_CmdEvtNot( void ); + void HW_IPCC_THREAD_EvtNot( void ); + void HW_IPCC_THREAD_CliSendAck( void ); + void HW_IPCC_THREAD_CliEvtNot( void ); + + + void HW_IPCC_LLDTESTS_Init( void ); + void HW_IPCC_LLDTESTS_SendCliCmd( void ); + void HW_IPCC_LLDTESTS_ReceiveCliRsp( void ); + void HW_IPCC_LLDTESTS_SendCliRspAck( void ); + void HW_IPCC_LLDTESTS_ReceiveM0Cmd( void ); + void HW_IPCC_LLDTESTS_SendM0CmdAck( void ); + + + void HW_IPCC_BLE_LLD_Init( void ); + void HW_IPCC_BLE_LLD_SendCliCmd( void ); + void HW_IPCC_BLE_LLD_ReceiveCliRsp( void ); + void HW_IPCC_BLE_LLD_SendCliRspAck( void ); + void HW_IPCC_BLE_LLD_ReceiveM0Cmd( void ); + void HW_IPCC_BLE_LLD_SendM0CmdAck( void ); + void HW_IPCC_BLE_LLD_SendCmd( void ); + void HW_IPCC_BLE_LLD_ReceiveRsp( void ); + void HW_IPCC_BLE_LLD_SendRspAck( void ); + + + void HW_IPCC_TRACES_Init( void ); + void HW_IPCC_TRACES_EvtNot( void ); #ifdef __cplusplus } @@ -94,4 +93,3 @@ void HW_IPCC_TRACES_EvtNot(void); #endif /*__HW_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/utility/STM32Cube_FW/hw_ipcc.c b/src/utility/STM32Cube_FW/hw_ipcc.c index 925075f8..0c1868f6 100644 --- a/src/utility/STM32Cube_FW/hw_ipcc.c +++ b/src/utility/STM32Cube_FW/hw_ipcc.c @@ -1,21 +1,21 @@ /** - ****************************************************************************** - * File Name : Target/hw_ipcc.c - * Description : Hardware IPCC source file for STM32WPAN Middleware. - * - ****************************************************************************** + ****************************************************************************** + * @file hw_ipcc.c + * @author MCD Application Team + * @brief Hardware IPCC source file for STM32WPAN Middleware. + ****************************************************************************** * @attention * - *

© Copyright (c) 2020 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2020-2021 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under Ultimate Liberty license - * SLA0044, the "License"; You may not use this file except in compliance with - * the License. You may obtain a copy of the License at: - * www.st.com/SLA0044 + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ + #if defined(STM32WBxx) /* Includes ------------------------------------------------------------------*/ #include "hw.h" @@ -29,20 +29,30 @@ /* Private macros ------------------------------------------------------------*/ /* Private typedef -----------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/ -static void (*FreeBufCb)(void); +static void (*FreeBufCb)( void ); /* Private function prototypes -----------------------------------------------*/ -static void HW_IPCC_BLE_EvtHandler(void); -static void HW_IPCC_BLE_AclDataEvtHandler(void); -static void HW_IPCC_MM_FreeBufHandler(void); -static void HW_IPCC_SYS_CmdEvtHandler(void); -static void HW_IPCC_SYS_EvtHandler(void); -static void HW_IPCC_TRACES_EvtHandler(void); +static void HW_IPCC_BLE_EvtHandler( void ); +static void HW_IPCC_BLE_AclDataEvtHandler( void ); +static void HW_IPCC_MM_FreeBufHandler( void ); +static void HW_IPCC_SYS_CmdEvtHandler( void ); +static void HW_IPCC_SYS_EvtHandler( void ); +static void HW_IPCC_TRACES_EvtHandler( void ); #ifdef THREAD_WB - static void HW_IPCC_OT_CmdEvtHandler(void); - static void HW_IPCC_THREAD_NotEvtHandler(void); - static void HW_IPCC_THREAD_CliNotEvtHandler(void); +static void HW_IPCC_OT_CmdEvtHandler( void ); +static void HW_IPCC_THREAD_NotEvtHandler( void ); +static void HW_IPCC_THREAD_CliNotEvtHandler( void ); +#endif + +#ifdef LLD_TESTS_WB +static void HW_IPCC_LLDTESTS_ReceiveCliRspHandler( void ); +static void HW_IPCC_LLDTESTS_ReceiveM0CmdHandler( void ); +#endif +#ifdef LLD_BLE_WB +/*static void HW_IPCC_LLD_BLE_ReceiveCliRspHandler( void );*/ +static void HW_IPCC_LLD_BLE_ReceiveRspHandler( void ); +static void HW_IPCC_LLD_BLE_ReceiveM0CmdHandler( void ); #endif /* Public function definition -----------------------------------------------*/ @@ -50,61 +60,93 @@ static void HW_IPCC_TRACES_EvtHandler(void); /****************************************************************************** * INTERRUPT HANDLER ******************************************************************************/ - -void IPCC_C1_RX_IRQHandler(void) +void IPCC_C1_RX_IRQHandler( void ) { - if (HW_IPCC_RX_PENDING(HW_IPCC_SYSTEM_EVENT_CHANNEL)) { - HW_IPCC_SYS_EvtHandler(); + if (HW_IPCC_RX_PENDING( HW_IPCC_SYSTEM_EVENT_CHANNEL )) + { + HW_IPCC_SYS_EvtHandler(); } #ifdef THREAD_WB - else if (HW_IPCC_RX_PENDING(HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL)) { + else if (HW_IPCC_RX_PENDING( HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL )) + { HW_IPCC_THREAD_NotEvtHandler(); - } else if (HW_IPCC_RX_PENDING(HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL)) { + } + else if (HW_IPCC_RX_PENDING( HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL )) + { HW_IPCC_THREAD_CliNotEvtHandler(); } #endif /* THREAD_WB */ - else if (HW_IPCC_RX_PENDING(HW_IPCC_BLE_EVENT_CHANNEL)) { +#ifdef LLD_TESTS_WB + else if (HW_IPCC_RX_PENDING( HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL )) + { + HW_IPCC_LLDTESTS_ReceiveCliRspHandler(); + } + else if (HW_IPCC_RX_PENDING( HW_IPCC_LLDTESTS_M0_CMD_CHANNEL )) + { + HW_IPCC_LLDTESTS_ReceiveM0CmdHandler(); + } +#endif /* LLD_TESTS_WB */ +#ifdef LLD_BLE_WB + else if (HW_IPCC_RX_PENDING( HW_IPCC_LLD_BLE_RSP_CHANNEL )) + { + HW_IPCC_LLD_BLE_ReceiveRspHandler(); + } + else if (HW_IPCC_RX_PENDING( HW_IPCC_LLD_BLE_M0_CMD_CHANNEL )) + { + HW_IPCC_LLD_BLE_ReceiveM0CmdHandler(); + } +#endif /* LLD_TESTS_WB */ + else if (HW_IPCC_RX_PENDING( HW_IPCC_BLE_EVENT_CHANNEL )) + { HW_IPCC_BLE_EvtHandler(); - } else if (HW_IPCC_RX_PENDING(HW_IPCC_TRACES_CHANNEL)) { + } + else if (HW_IPCC_RX_PENDING( HW_IPCC_TRACES_CHANNEL )) + { HW_IPCC_TRACES_EvtHandler(); } } -void IPCC_C1_TX_IRQHandler(void) +void IPCC_C1_TX_IRQHandler( void ) { - if (HW_IPCC_TX_PENDING(HW_IPCC_SYSTEM_CMD_RSP_CHANNEL)) { + if (HW_IPCC_TX_PENDING( HW_IPCC_SYSTEM_CMD_RSP_CHANNEL )) + { HW_IPCC_SYS_CmdEvtHandler(); } #ifdef THREAD_WB - else if (HW_IPCC_TX_PENDING(HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL)) { + else if (HW_IPCC_TX_PENDING( HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL )) + { HW_IPCC_OT_CmdEvtHandler(); } #endif /* THREAD_WB */ - else if (HW_IPCC_TX_PENDING(HW_IPCC_SYSTEM_CMD_RSP_CHANNEL)) { - HW_IPCC_SYS_CmdEvtHandler(); - } else if (HW_IPCC_TX_PENDING(HW_IPCC_MM_RELEASE_BUFFER_CHANNEL)) { +#ifdef LLD_TESTS_WB +// No TX handler for LLD tests +#endif /* LLD_TESTS_WB */ + else if (HW_IPCC_TX_PENDING( HW_IPCC_MM_RELEASE_BUFFER_CHANNEL )) + { HW_IPCC_MM_FreeBufHandler(); - } else if (HW_IPCC_TX_PENDING(HW_IPCC_HCI_ACL_DATA_CHANNEL)) { + } + else if (HW_IPCC_TX_PENDING( HW_IPCC_HCI_ACL_DATA_CHANNEL )) + { HW_IPCC_BLE_AclDataEvtHandler(); } } - /****************************************************************************** * GENERAL ******************************************************************************/ -void HW_IPCC_Enable(void) +void HW_IPCC_Enable( void ) { /** * Such as IPCC IP available to the CPU2, it is required to keep the IPCC clock running - when FUS is running on CPU2 and CPU1 enters deep sleep mode + * when FUS is running on CPU2 and CPU1 enters deep sleep mode */ LL_C2_AHB3_GRP1_EnableClock(LL_C2_AHB3_GRP1_PERIPH_IPCC); /** - * When the device is out of standby, it is required to use the EXTI mechanism to wakeup CPU2 - */ - LL_C2_EXTI_EnableEvent_32_63(LL_EXTI_LINE_41); - LL_EXTI_EnableRisingTrig_32_63(LL_EXTI_LINE_41); + * When the device is out of standby, it is required to use the EXTI mechanism to wakeup CPU2 + */ + LL_EXTI_EnableRisingTrig_32_63( LL_EXTI_LINE_41 ); + /* It is required to have at least a system clock cycle before a SEV after LL_EXTI_EnableRisingTrig_32_63() */ + LL_C2_EXTI_EnableEvent_32_63( LL_EXTI_LINE_41 ); /** * In case the SBSFU is implemented, it may have already set the C2BOOT bit to startup the CPU2. @@ -115,234 +157,305 @@ void HW_IPCC_Enable(void) * When SHCI_C2_Reinit( ) is not called, generating an event to the CPU2 does not have any effect * So, by default, the application shall both set the event flag and set the C2BOOT bit. */ - __SEV(); /* Set the internal event flag and send an event to the CPU2 */ - __WFE(); /* Clear the internal event flag */ - LL_PWR_EnableBootC2(); - - return; + __SEV( ); /* Set the internal event flag and send an event to the CPU2 */ + __WFE( ); /* Clear the internal event flag */ + LL_PWR_EnableBootC2( ); } -void HW_IPCC_Init(void) +void HW_IPCC_Init( void ) { - LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_IPCC); + LL_AHB3_GRP1_EnableClock( LL_AHB3_GRP1_PERIPH_IPCC ); - LL_C1_IPCC_EnableIT_RXO(IPCC); - LL_C1_IPCC_EnableIT_TXF(IPCC); + LL_C1_IPCC_EnableIT_RXO( IPCC ); + LL_C1_IPCC_EnableIT_TXF( IPCC ); HAL_NVIC_EnableIRQ(IPCC_C1_RX_IRQn); HAL_NVIC_EnableIRQ(IPCC_C1_TX_IRQn); - - return; } /****************************************************************************** * BLE ******************************************************************************/ -void HW_IPCC_BLE_Init(void) +void HW_IPCC_BLE_Init( void ) { - LL_C1_IPCC_EnableReceiveChannel(IPCC, HW_IPCC_BLE_EVENT_CHANNEL); - - return; + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_BLE_EVENT_CHANNEL ); } -void HW_IPCC_BLE_SendCmd(void) +void HW_IPCC_BLE_SendCmd( void ) { - LL_C1_IPCC_SetFlag_CHx(IPCC, HW_IPCC_BLE_CMD_CHANNEL); - - return; + LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_BLE_CMD_CHANNEL ); } -static void HW_IPCC_BLE_EvtHandler(void) +static void HW_IPCC_BLE_EvtHandler( void ) { HW_IPCC_BLE_RxEvtNot(); - LL_C1_IPCC_ClearFlag_CHx(IPCC, HW_IPCC_BLE_EVENT_CHANNEL); - - return; + LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_BLE_EVENT_CHANNEL ); } -void HW_IPCC_BLE_SendAclData(void) +void HW_IPCC_BLE_SendAclData( void ) { - LL_C1_IPCC_SetFlag_CHx(IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL); - LL_C1_IPCC_EnableTransmitChannel(IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL); - - return; + LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL ); + LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL ); } -static void HW_IPCC_BLE_AclDataEvtHandler(void) +static void HW_IPCC_BLE_AclDataEvtHandler( void ) { - LL_C1_IPCC_DisableTransmitChannel(IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL); + LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL ); HW_IPCC_BLE_AclDataAckNot(); - - return; } -__WEAK void HW_IPCC_BLE_AclDataAckNot(void) {}; -__WEAK void HW_IPCC_BLE_RxEvtNot(void) {}; +__weak void HW_IPCC_BLE_AclDataAckNot( void ){}; +__weak void HW_IPCC_BLE_RxEvtNot( void ){}; /****************************************************************************** * SYSTEM ******************************************************************************/ -void HW_IPCC_SYS_Init(void) +void HW_IPCC_SYS_Init( void ) { - LL_C1_IPCC_EnableReceiveChannel(IPCC, HW_IPCC_SYSTEM_EVENT_CHANNEL); - - return; + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_SYSTEM_EVENT_CHANNEL ); } -void HW_IPCC_SYS_SendCmd(void) +void HW_IPCC_SYS_SendCmd( void ) { - LL_C1_IPCC_SetFlag_CHx(IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL); - LL_C1_IPCC_EnableTransmitChannel(IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL); - - return; + LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL ); + LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL ); } -static void HW_IPCC_SYS_CmdEvtHandler(void) +static void HW_IPCC_SYS_CmdEvtHandler( void ) { - LL_C1_IPCC_DisableTransmitChannel(IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL); + LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL ); HW_IPCC_SYS_CmdEvtNot(); - - return; } -static void HW_IPCC_SYS_EvtHandler(void) +static void HW_IPCC_SYS_EvtHandler( void ) { HW_IPCC_SYS_EvtNot(); - LL_C1_IPCC_ClearFlag_CHx(IPCC, HW_IPCC_SYSTEM_EVENT_CHANNEL); - - return; + LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_SYSTEM_EVENT_CHANNEL ); } -__WEAK void HW_IPCC_SYS_CmdEvtNot(void) {}; -__WEAK void HW_IPCC_SYS_EvtNot(void) {}; +__weak void HW_IPCC_SYS_CmdEvtNot( void ){}; +__weak void HW_IPCC_SYS_EvtNot( void ){}; /****************************************************************************** * THREAD ******************************************************************************/ #ifdef THREAD_WB -void HW_IPCC_THREAD_Init(void) +void HW_IPCC_THREAD_Init( void ) { - LL_C1_IPCC_EnableReceiveChannel(IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL); - LL_C1_IPCC_EnableReceiveChannel(IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL); + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL ); + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL ); return; } -void HW_IPCC_OT_SendCmd(void) +void HW_IPCC_OT_SendCmd( void ) { - LL_C1_IPCC_SetFlag_CHx(IPCC, HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL); - LL_C1_IPCC_EnableTransmitChannel(IPCC, HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL); + LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL ); + LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL ); return; } -void HW_IPCC_CLI_SendCmd(void) +void HW_IPCC_CLI_SendCmd( void ) { - LL_C1_IPCC_SetFlag_CHx(IPCC, HW_IPCC_THREAD_CLI_CMD_CHANNEL); + LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_THREAD_CLI_CMD_CHANNEL ); return; } -void HW_IPCC_THREAD_SendAck(void) +void HW_IPCC_THREAD_SendAck( void ) { - LL_C1_IPCC_ClearFlag_CHx(IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL); - LL_C1_IPCC_EnableReceiveChannel(IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL); + LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL ); + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL ); return; } -void HW_IPCC_THREAD_CliSendAck(void) +void HW_IPCC_THREAD_CliSendAck( void ) { - LL_C1_IPCC_ClearFlag_CHx(IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL); - LL_C1_IPCC_EnableReceiveChannel(IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL); - - return; + LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL ); + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL ); } -static void HW_IPCC_OT_CmdEvtHandler(void) +static void HW_IPCC_OT_CmdEvtHandler( void ) { - LL_C1_IPCC_DisableTransmitChannel(IPCC, HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL); + LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL ); HW_IPCC_OT_CmdEvtNot(); - - return; } -static void HW_IPCC_THREAD_NotEvtHandler(void) +static void HW_IPCC_THREAD_NotEvtHandler( void ) { - LL_C1_IPCC_DisableReceiveChannel(IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL); + LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL ); HW_IPCC_THREAD_EvtNot(); +} + +static void HW_IPCC_THREAD_CliNotEvtHandler( void ) +{ + LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL ); + + HW_IPCC_THREAD_CliEvtNot(); +} + +__weak void HW_IPCC_OT_CmdEvtNot( void ){}; +__weak void HW_IPCC_CLI_CmdEvtNot( void ){}; +__weak void HW_IPCC_THREAD_EvtNot( void ){}; +#endif /* THREAD_WB */ + +/****************************************************************************** + * LLD TESTS + ******************************************************************************/ +#ifdef LLD_TESTS_WB +void HW_IPCC_LLDTESTS_Init( void ) +{ + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL ); + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL ); +} + +void HW_IPCC_LLDTESTS_SendCliCmd( void ) +{ + LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_LLDTESTS_CLI_CMD_CHANNEL ); return; } -static void HW_IPCC_THREAD_CliNotEvtHandler(void) +static void HW_IPCC_LLDTESTS_ReceiveCliRspHandler( void ) { - LL_C1_IPCC_DisableReceiveChannel(IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL); + LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL ); + HW_IPCC_LLDTESTS_ReceiveCliRsp(); +} - HW_IPCC_THREAD_CliEvtNot(); +void HW_IPCC_LLDTESTS_SendCliRspAck( void ) +{ + LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL ); + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL ); +} + +static void HW_IPCC_LLDTESTS_ReceiveM0CmdHandler( void ) +{ + LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL ); + HW_IPCC_LLDTESTS_ReceiveM0Cmd(); +} + +void HW_IPCC_LLDTESTS_SendM0CmdAck( void ) +{ + LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL ); + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL ); +} +__weak void HW_IPCC_LLDTESTS_ReceiveCliRsp( void ){}; +__weak void HW_IPCC_LLDTESTS_ReceiveM0Cmd( void ){}; +#endif /* LLD_TESTS_WB */ + +/****************************************************************************** + * LLD BLE + ******************************************************************************/ +#ifdef LLD_BLE_WB +void HW_IPCC_LLD_BLE_Init( void ) +{ + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_RSP_CHANNEL ); + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_M0_CMD_CHANNEL ); +} + +void HW_IPCC_LLD_BLE_SendCliCmd( void ) +{ + LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_LLD_BLE_CLI_CMD_CHANNEL ); +} +/*static void HW_IPCC_LLD_BLE_ReceiveCliRspHandler( void ) +{ + LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_CLI_RSP_CHANNEL ); + HW_IPCC_LLD_BLE_ReceiveCliRsp(); return; +}*/ + +void HW_IPCC_LLD_BLE_SendCliRspAck( void ) +{ + LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLD_BLE_CLI_RSP_CHANNEL ); + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_CLI_RSP_CHANNEL ); } -__WEAK void HW_IPCC_OT_CmdEvtNot(void) {}; -__WEAK void HW_IPCC_CLI_CmdEvtNot(void) {}; -__WEAK void HW_IPCC_THREAD_EvtNot(void) {}; +static void HW_IPCC_LLD_BLE_ReceiveM0CmdHandler( void ) +{ + //LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_M0_CMD_CHANNEL ); + HW_IPCC_LLD_BLE_ReceiveM0Cmd(); +} -#endif /* THREAD_WB */ +void HW_IPCC_LLD_BLE_SendM0CmdAck( void ) +{ + LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLD_BLE_M0_CMD_CHANNEL ); + //LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_M0_CMD_CHANNEL ); +} +__weak void HW_IPCC_LLD_BLE_ReceiveCliRsp( void ){}; +__weak void HW_IPCC_LLD_BLE_ReceiveM0Cmd( void ){}; + +/* Transparent Mode */ +void HW_IPCC_LLD_BLE_SendCmd( void ) +{ + LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_LLD_BLE_CMD_CHANNEL ); +} + +static void HW_IPCC_LLD_BLE_ReceiveRspHandler( void ) +{ + LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_RSP_CHANNEL ); + HW_IPCC_LLD_BLE_ReceiveRsp(); +} + +void HW_IPCC_LLD_BLE_SendRspAck( void ) +{ + LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLD_BLE_RSP_CHANNEL ); + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_RSP_CHANNEL ); +} + +#endif /* LLD_BLE_WB */ /****************************************************************************** * MEMORY MANAGER ******************************************************************************/ -void HW_IPCC_MM_SendFreeBuf(void (*cb)(void)) +void HW_IPCC_MM_SendFreeBuf( void (*cb)( void ) ) { - if (LL_C1_IPCC_IsActiveFlag_CHx(IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL)) { + if ( LL_C1_IPCC_IsActiveFlag_CHx( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL ) ) + { FreeBufCb = cb; - LL_C1_IPCC_EnableTransmitChannel(IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL); - } else { + LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL ); + } + else + { cb(); - LL_C1_IPCC_SetFlag_CHx(IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL); + LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL ); } - - return; } -static void HW_IPCC_MM_FreeBufHandler(void) +static void HW_IPCC_MM_FreeBufHandler( void ) { - LL_C1_IPCC_DisableTransmitChannel(IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL); + LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL ); FreeBufCb(); - LL_C1_IPCC_SetFlag_CHx(IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL); - - return; + LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL ); } /****************************************************************************** * TRACES ******************************************************************************/ -void HW_IPCC_TRACES_Init(void) +void HW_IPCC_TRACES_Init( void ) { - LL_C1_IPCC_EnableReceiveChannel(IPCC, HW_IPCC_TRACES_CHANNEL); + LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_TRACES_CHANNEL ); return; } -static void HW_IPCC_TRACES_EvtHandler(void) +static void HW_IPCC_TRACES_EvtHandler( void ) { HW_IPCC_TRACES_EvtNot(); - LL_C1_IPCC_ClearFlag_CHx(IPCC, HW_IPCC_TRACES_CHANNEL); - - return; + LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_TRACES_CHANNEL ); } -__WEAK void HW_IPCC_TRACES_EvtNot(void) {}; +__weak void HW_IPCC_TRACES_EvtNot( void ){}; #endif /* STM32WBxx */ -/******************* (C) COPYRIGHT 2019 STMicroelectronics *****END OF FILE****/ diff --git a/src/utility/STM32Cube_FW/mbox_def.h b/src/utility/STM32Cube_FW/mbox_def.h index d5a7d46b..0c974f8f 100644 --- a/src/utility/STM32Cube_FW/mbox_def.h +++ b/src/utility/STM32Cube_FW/mbox_def.h @@ -4,17 +4,16 @@ * @author MCD Application Team * @brief Mailbox definition ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** */ @@ -28,110 +27,146 @@ extern "C" { #include "stm32_wpan_common.h" -/** - * This file shall be identical between the CPU1 and the CPU2 - */ - -/** - ********************************************************************************* - * TABLES - ********************************************************************************* - */ - -/** - * Version - * [0:3] = Build - 0: Untracked - 15:Released - x: Tracked version - * [4:7] = branch - 0: Mass Market - x: ... - * [8:15] = Subversion - * [16:23] = Version minor - * [24:31] = Version major - * - * Memory Size - * [0:7] = Flash ( Number of 4k sector) - * [8:15] = Reserved ( Shall be set to 0 - may be used as flash extension ) - * [16:23] = SRAM2b ( Number of 1k sector) - * [24:31] = SRAM2a ( Number of 1k sector) - */ -typedef PACKED_STRUCT { - uint32_t Version; -} MB_SafeBootInfoTable_t; - -typedef PACKED_STRUCT { - uint32_t Version; - uint32_t MemorySize; - uint32_t FusInfo; -} MB_FusInfoTable_t; - -typedef PACKED_STRUCT { - uint32_t Version; - uint32_t MemorySize; - uint32_t InfoStack; - uint32_t Reserved; -} MB_WirelessFwInfoTable_t; - -typedef struct { - MB_SafeBootInfoTable_t SafeBootInfoTable; - MB_FusInfoTable_t FusInfoTable; - MB_WirelessFwInfoTable_t WirelessFwInfoTable; -} MB_DeviceInfoTable_t; - -typedef struct { - uint8_t *pcmd_buffer; - uint8_t *pcs_buffer; - uint8_t *pevt_queue; - uint8_t *phci_acl_data_buffer; -} MB_BleTable_t; - -typedef struct { - uint8_t *notack_buffer; - uint8_t *clicmdrsp_buffer; - uint8_t *otcmdrsp_buffer; -} MB_ThreadTable_t; - -typedef struct { - uint8_t *clicmdrsp_buffer; - uint8_t *m0cmd_buffer; -} MB_LldTestsTable_t; - -typedef struct { - uint8_t *cmdrsp_buffer; - uint8_t *m0cmd_buffer; -} MB_LldBleTable_t; + /** + * This file shall be identical between the CPU1 and the CPU2 + */ + + /** + ********************************************************************************* + * TABLES + ********************************************************************************* + */ + + /** + * Version + * [0:3] = Build - 0: Untracked - 15:Released - x: Tracked version + * [4:7] = branch - 0: Mass Market - x: ... + * [8:15] = Subversion + * [16:23] = Version minor + * [24:31] = Version major + * + * Memory Size + * [0:7] = Flash ( Number of 4k sector) + * [8:15] = Reserved ( Shall be set to 0 - may be used as flash extension ) + * [16:23] = SRAM2b ( Number of 1k sector) + * [24:31] = SRAM2a ( Number of 1k sector) + */ + typedef PACKED_STRUCT + { + uint32_t Version; + } MB_SafeBootInfoTable_t; + + typedef PACKED_STRUCT + { + uint32_t Version; + uint32_t MemorySize; + uint32_t FusInfo; + } MB_FusInfoTable_t; + + typedef PACKED_STRUCT + { + uint32_t Version; + uint32_t MemorySize; + uint32_t InfoStack; + uint32_t Reserved; + } MB_WirelessFwInfoTable_t; + + typedef struct + { + MB_SafeBootInfoTable_t SafeBootInfoTable; + MB_FusInfoTable_t FusInfoTable; + MB_WirelessFwInfoTable_t WirelessFwInfoTable; + } MB_DeviceInfoTable_t; + + typedef struct + { + uint8_t *pcmd_buffer; + uint8_t *pcs_buffer; + uint8_t *pevt_queue; + uint8_t *phci_acl_data_buffer; + } MB_BleTable_t; + + typedef struct + { + uint8_t *notack_buffer; + uint8_t *clicmdrsp_buffer; + uint8_t *otcmdrsp_buffer; + uint8_t *clinot_buffer; + } MB_ThreadTable_t; + + typedef struct + { + uint8_t *clicmdrsp_buffer; + uint8_t *m0cmd_buffer; + } MB_LldTestsTable_t; + + typedef struct + { + uint8_t *cmdrsp_buffer; + uint8_t *m0cmd_buffer; + } MB_BleLldTable_t; + + /** + * msg + * [0:7] = cmd/evt + * [8:31] = Reserved + */ + typedef struct + { + uint8_t *pcmd_buffer; + uint8_t *sys_queue; + } MB_SysTable_t; + + typedef struct + { + uint8_t *spare_ble_buffer; + uint8_t *spare_sys_buffer; + uint8_t *blepool; + uint32_t blepoolsize; + uint8_t *pevt_free_buffer_queue; + uint8_t *traces_evt_pool; + uint32_t tracespoolsize; + } MB_MemManagerTable_t; + + typedef struct + { + uint8_t *traces_queue; + } MB_TracesTable_t; + + typedef struct + { + MB_DeviceInfoTable_t *p_device_info_table; + MB_BleTable_t *p_ble_table; + MB_ThreadTable_t *p_thread_table; + MB_SysTable_t *p_sys_table; + MB_MemManagerTable_t *p_mem_manager_table; + MB_TracesTable_t *p_traces_table; + MB_LldTestsTable_t *p_lld_tests_table; + MB_BleLldTable_t *p_ble_lld_table; +} MB_RefTable_t; /** - * msg - * [0:7] = cmd/evt - * [8:31] = Reserved + * This table shall be used only in the case the CPU2 runs the FUS. + * It is used by the command SHCI_GetWirelessFwInfo() */ -typedef struct { - uint8_t *pcmd_buffer; - uint8_t *sys_queue; -} MB_SysTable_t; - -typedef struct { - uint8_t *spare_ble_buffer; - uint8_t *spare_sys_buffer; - uint8_t *blepool; - uint32_t blepoolsize; - uint8_t *pevt_free_buffer_queue; - uint8_t *traces_evt_pool; - uint32_t tracespoolsize; -} MB_MemManagerTable_t; - -typedef struct { - uint8_t *traces_queue; -} MB_TracesTable_t; - -typedef struct { - MB_DeviceInfoTable_t *p_device_info_table; - MB_BleTable_t *p_ble_table; - MB_ThreadTable_t *p_thread_table; - MB_SysTable_t *p_sys_table; - MB_MemManagerTable_t *p_mem_manager_table; - MB_TracesTable_t *p_traces_table; - MB_LldTestsTable_t *p_lld_tests_table; - MB_LldBleTable_t *p_lld_ble_table; -} MB_RefTable_t; +typedef struct +{ + uint32_t DeviceInfoTableState; + uint8_t Reserved1; + uint8_t LastFusActiveState; + uint8_t LastWirelessStackState; + uint8_t CurrentWirelessStackType; + uint32_t SafeBootVersion; + uint32_t FusVersion; + uint32_t FusMemorySize; + uint32_t WirelessStackVersion; + uint32_t WirelessStackMemorySize; + uint32_t WirelessFirmwareBleInfo; + uint32_t WirelessFirmwareThreadInfo; + uint32_t Reserved2; + uint64_t UID64; + uint16_t DeviceId; +} MB_FUS_DeviceInfoTable_t ; #ifdef __cplusplus } @@ -165,12 +200,12 @@ typedef struct { * | | * |<---HW_IPCC_BLE_EVENT_CHANNEL--------------------| * | | - * | (LLD BLE) | - * |----HW_IPCC_LLD_BLE_CMD_CHANNEL----------------->| + * | (BLE LLD) | + * |----HW_IPCC_BLE_LLD_CMD_CHANNEL----------------->| * | | - * |<---HW_IPCC_LLD_BLE_RSP_CHANNEL------------------| + * |<---HW_IPCC_BLE_LLD_RSP_CHANNEL------------------| * | | - * |<---HW_IPCC_LLD_BLE_M0_CMD_CHANNEL---------------| + * |<---HW_IPCC_BLE_LLD_M0_CMD_CHANNEL---------------| * | | * | (BUFFER) | * |----HW_IPCC_MM_RELEASE_BUFFER_CHANNE------------>| @@ -192,8 +227,8 @@ typedef struct { #define HW_IPCC_MM_RELEASE_BUFFER_CHANNEL LL_IPCC_CHANNEL_4 #define HW_IPCC_THREAD_CLI_CMD_CHANNEL LL_IPCC_CHANNEL_5 #define HW_IPCC_LLDTESTS_CLI_CMD_CHANNEL LL_IPCC_CHANNEL_5 -#define HW_IPCC_LLD_BLE_CLI_CMD_CHANNEL LL_IPCC_CHANNEL_5 -#define HW_IPCC_LLD_BLE_CMD_CHANNEL LL_IPCC_CHANNEL_5 +#define HW_IPCC_BLE_LLD_CLI_CMD_CHANNEL LL_IPCC_CHANNEL_5 +#define HW_IPCC_BLE_LLD_CMD_CHANNEL LL_IPCC_CHANNEL_5 #define HW_IPCC_HCI_ACL_DATA_CHANNEL LL_IPCC_CHANNEL_6 /** CPU2 */ @@ -201,12 +236,11 @@ typedef struct { #define HW_IPCC_SYSTEM_EVENT_CHANNEL LL_IPCC_CHANNEL_2 #define HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL LL_IPCC_CHANNEL_3 #define HW_IPCC_LLDTESTS_M0_CMD_CHANNEL LL_IPCC_CHANNEL_3 -#define HW_IPCC_LLD_BLE_M0_CMD_CHANNEL LL_IPCC_CHANNEL_3 +#define HW_IPCC_BLE_LLD_M0_CMD_CHANNEL LL_IPCC_CHANNEL_3 #define HW_IPCC_TRACES_CHANNEL LL_IPCC_CHANNEL_4 #define HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL LL_IPCC_CHANNEL_5 #define HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL LL_IPCC_CHANNEL_5 -#define HW_IPCC_LLD_BLE_CLI_RSP_CHANNEL LL_IPCC_CHANNEL_5 -#define HW_IPCC_LLD_BLE_RSP_CHANNEL LL_IPCC_CHANNEL_5 +#define HW_IPCC_BLE_LLD_CLI_RSP_CHANNEL LL_IPCC_CHANNEL_5 +#define HW_IPCC_BLE_LLD_RSP_CHANNEL LL_IPCC_CHANNEL_5 #endif /*__MBOX_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/utility/STM32Cube_FW/shci.c b/src/utility/STM32Cube_FW/shci.c index d23157f2..a8475222 100644 --- a/src/utility/STM32Cube_FW/shci.c +++ b/src/utility/STM32Cube_FW/shci.c @@ -4,17 +4,16 @@ * @author MCD Application Team * @brief HCI command for the system channel ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** */ #if defined(STM32WBxx) @@ -38,413 +37,494 @@ * C2 COMMAND * These commands are sent to the CPU2 */ -uint8_t SHCI_C2_FUS_GetState(SHCI_FUS_GetState_ErrorCode_t *p_error_code) +uint8_t SHCI_C2_FUS_GetState( SHCI_FUS_GetState_ErrorCode_t *p_error_code ) { /** * A command status event + payload has the same size than the expected command complete */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE + 1]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; - shci_send(SHCI_OPCODE_C2_FUS_GET_STATE, - 0, - 0, - p_rsp); + shci_send( SHCI_OPCODE_C2_FUS_GET_STATE, + 0, + 0, + p_rsp ); - if (p_error_code != 0) { - *p_error_code = (SHCI_FUS_GetState_ErrorCode_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[1]); + if(p_error_code != 0) + { + *p_error_code = (SHCI_FUS_GetState_ErrorCode_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[1]); } - return (((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } -SHCI_CmdStatus_t SHCI_C2_FUS_FwUpgrade(uint32_t fw_src_add, uint32_t fw_dest_add) +SHCI_CmdStatus_t SHCI_C2_FUS_FwUpgrade( uint32_t fw_src_add, uint32_t fw_dest_add ) { /** * TL_BLEEVT_CS_BUFFER_SIZE is 15 bytes so it is large enough to hold the 8 bytes of command parameters * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; uint32_t *p_cmd; uint8_t cmd_length; - p_cmd = (uint32_t *)local_buffer; + p_cmd = (uint32_t*)local_buffer; cmd_length = 0; - if (fw_src_add != 0) { + if(fw_src_add != 0) + { *p_cmd = fw_src_add; cmd_length += 4; } - if (fw_dest_add != 0) { - *(p_cmd + 1) = fw_dest_add; + if(fw_dest_add != 0) + { + *(p_cmd+1) = fw_dest_add; cmd_length += 4; } p_rsp = (TL_EvtPacket_t *)local_buffer; - shci_send(SHCI_OPCODE_C2_FUS_FW_UPGRADE, - cmd_length, - local_buffer, - p_rsp); + shci_send( SHCI_OPCODE_C2_FUS_FW_UPGRADE, + cmd_length, + local_buffer, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } -SHCI_CmdStatus_t SHCI_C2_FUS_FwDelete(void) +SHCI_CmdStatus_t SHCI_C2_FUS_FwDelete( void ) { /** * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; - shci_send(SHCI_OPCODE_C2_FUS_FW_DELETE, - 0, - 0, - p_rsp); + shci_send( SHCI_OPCODE_C2_FUS_FW_DELETE, + 0, + 0, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } -SHCI_CmdStatus_t SHCI_C2_FUS_UpdateAuthKey(SHCI_C2_FUS_UpdateAuthKey_Cmd_Param_t *pParam) +SHCI_CmdStatus_t SHCI_C2_FUS_UpdateAuthKey( SHCI_C2_FUS_UpdateAuthKey_Cmd_Param_t *pParam ) { /** * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; - shci_send(SHCI_OPCODE_C2_FUS_UPDATE_AUTH_KEY, - sizeof(SHCI_C2_FUS_UpdateAuthKey_Cmd_Param_t), - (uint8_t *)pParam, - p_rsp); + shci_send( SHCI_OPCODE_C2_FUS_UPDATE_AUTH_KEY, + sizeof( SHCI_C2_FUS_UpdateAuthKey_Cmd_Param_t ), + (uint8_t*)pParam, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } -SHCI_CmdStatus_t SHCI_C2_FUS_LockAuthKey(void) +SHCI_CmdStatus_t SHCI_C2_FUS_LockAuthKey( void ) { /** * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; - shci_send(SHCI_OPCODE_C2_FUS_LOCK_AUTH_KEY, - 0, - 0, - p_rsp); + shci_send( SHCI_OPCODE_C2_FUS_LOCK_AUTH_KEY, + 0, + 0, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } -SHCI_CmdStatus_t SHCI_C2_FUS_StoreUsrKey(SHCI_C2_FUS_StoreUsrKey_Cmd_Param_t *pParam, uint8_t *p_key_index) +SHCI_CmdStatus_t SHCI_C2_FUS_StoreUsrKey( SHCI_C2_FUS_StoreUsrKey_Cmd_Param_t *pParam, uint8_t *p_key_index ) { /** * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE + 1]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; uint8_t local_payload_len; - if (pParam->KeyType == KEYTYPE_ENCRYPTED) { + if(pParam->KeyType == KEYTYPE_ENCRYPTED) + { /** * When the key is encrypted, the 12 bytes IV Key is included in the payload as well * The IV key is always 12 bytes */ local_payload_len = pParam->KeySize + 2 + 12; - } else { + } + else + { local_payload_len = pParam->KeySize + 2; } p_rsp = (TL_EvtPacket_t *)local_buffer; - shci_send(SHCI_OPCODE_C2_FUS_STORE_USR_KEY, - local_payload_len, - (uint8_t *)pParam, - p_rsp); + shci_send( SHCI_OPCODE_C2_FUS_STORE_USR_KEY, + local_payload_len , + (uint8_t*)pParam, + p_rsp ); - *p_key_index = (((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[1]); + *p_key_index = (((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[1]); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } -SHCI_CmdStatus_t SHCI_C2_FUS_LoadUsrKey(uint8_t key_index) +SHCI_CmdStatus_t SHCI_C2_FUS_LoadUsrKey( uint8_t key_index ) { /** * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; local_buffer[0] = key_index; - shci_send(SHCI_OPCODE_C2_FUS_LOAD_USR_KEY, - 1, - local_buffer, - p_rsp); + shci_send( SHCI_OPCODE_C2_FUS_LOAD_USR_KEY, + 1, + local_buffer, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } -SHCI_CmdStatus_t SHCI_C2_FUS_StartWs(void) +SHCI_CmdStatus_t SHCI_C2_FUS_StartWs( void ) { /** * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; - shci_send(SHCI_OPCODE_C2_FUS_START_WS, - 0, - 0, - p_rsp); + shci_send( SHCI_OPCODE_C2_FUS_START_WS, + 0, + 0, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } +SHCI_CmdStatus_t SHCI_C2_FUS_LockUsrKey( uint8_t key_index ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; -SHCI_CmdStatus_t SHCI_C2_FUS_LockUsrKey(uint8_t key_index) + local_buffer[0] = key_index; + + shci_send( SHCI_OPCODE_C2_FUS_LOCK_USR_KEY, + 1, + local_buffer, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_FUS_UnloadUsrKey( uint8_t key_index ) { /** * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; local_buffer[0] = key_index; - shci_send(SHCI_OPCODE_C2_FUS_LOCK_USR_KEY, - 1, - local_buffer, - p_rsp); + shci_send( SHCI_OPCODE_C2_FUS_UNLOAD_USR_KEY, + 1, + local_buffer, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_FUS_ActivateAntiRollback( void ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_FUS_ACTIVATE_ANTIROLLBACK, + 0, + 0, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } -SHCI_CmdStatus_t SHCI_C2_BLE_Init(SHCI_C2_Ble_Init_Cmd_Packet_t *pCmdPacket) +SHCI_CmdStatus_t SHCI_C2_BLE_Init( SHCI_C2_Ble_Init_Cmd_Packet_t *pCmdPacket ) { /** * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; - shci_send(SHCI_OPCODE_C2_BLE_INIT, - sizeof(SHCI_C2_Ble_Init_Cmd_Param_t), - (uint8_t *)&pCmdPacket->Param, - p_rsp); + shci_send( SHCI_OPCODE_C2_BLE_INIT, + sizeof( SHCI_C2_Ble_Init_Cmd_Param_t ), + (uint8_t*)&pCmdPacket->Param, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } -SHCI_CmdStatus_t SHCI_C2_THREAD_Init(void) +SHCI_CmdStatus_t SHCI_C2_THREAD_Init( void ) { /** * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; - shci_send(SHCI_OPCODE_C2_THREAD_INIT, - 0, - 0, - p_rsp); + shci_send( SHCI_OPCODE_C2_THREAD_INIT, + 0, + 0, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } -SHCI_CmdStatus_t SHCI_C2_LLDTESTS_Init(uint8_t param_size, uint8_t *p_param) +SHCI_CmdStatus_t SHCI_C2_LLDTESTS_Init( uint8_t param_size, uint8_t * p_param ) { /** * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; - shci_send(SHCI_OPCODE_C2_LLD_TESTS_INIT, - param_size, - p_param, - p_rsp); + shci_send( SHCI_OPCODE_C2_LLD_TESTS_INIT, + param_size, + p_param, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } -SHCI_CmdStatus_t SHCI_C2_LLD_BLE_Init(uint8_t param_size, uint8_t *p_param) +SHCI_CmdStatus_t SHCI_C2_BLE_LLD_Init( uint8_t param_size, uint8_t * p_param ) { /** * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; - shci_send(SHCI_OPCODE_C2_LLD_BLE_INIT, - param_size, - p_param, - p_rsp); + shci_send( SHCI_OPCODE_C2_BLE_LLD_INIT, + param_size, + p_param, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } -SHCI_CmdStatus_t SHCI_C2_DEBUG_Init(SHCI_C2_DEBUG_Init_Cmd_Packet_t *pCmdPacket) +SHCI_CmdStatus_t SHCI_C2_DEBUG_Init( SHCI_C2_DEBUG_Init_Cmd_Packet_t *pCmdPacket ) { /** * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; - shci_send(SHCI_OPCODE_C2_DEBUG_INIT, - sizeof(SHCI_C2_DEBUG_init_Cmd_Param_t), - (uint8_t *)&pCmdPacket->Param, - p_rsp); + shci_send( SHCI_OPCODE_C2_DEBUG_INIT, + sizeof( SHCI_C2_DEBUG_init_Cmd_Param_t ), + (uint8_t*)&pCmdPacket->Param, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } -SHCI_CmdStatus_t SHCI_C2_FLASH_EraseActivity(SHCI_EraseActivity_t erase_activity) +SHCI_CmdStatus_t SHCI_C2_FLASH_EraseActivity( SHCI_EraseActivity_t erase_activity ) { /** * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; local_buffer[0] = erase_activity; - shci_send(SHCI_OPCODE_C2_FLASH_ERASE_ACTIVITY, - 1, - local_buffer, - p_rsp); + shci_send( SHCI_OPCODE_C2_FLASH_ERASE_ACTIVITY, + 1, + local_buffer, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } -SHCI_CmdStatus_t SHCI_C2_CONCURRENT_SetMode(SHCI_C2_CONCURRENT_Mode_Param_t Mode) +SHCI_CmdStatus_t SHCI_C2_CONCURRENT_SetMode( SHCI_C2_CONCURRENT_Mode_Param_t Mode ) { /** * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; local_buffer[0] = Mode; - shci_send(SHCI_OPCODE_C2_CONCURRENT_SET_MODE, - 1, - local_buffer, - p_rsp); + shci_send( SHCI_OPCODE_C2_CONCURRENT_SET_MODE, + 1, + local_buffer, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_CONCURRENT_GetNextBleEvtTime( SHCI_C2_CONCURRENT_GetNextBleEvtTime_Param_t *pParam ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE+4]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_CONCURRENT_GET_NEXT_BLE_EVT_TIME, + 0, + 0, + p_rsp ); + + memcpy((void*)&(pParam->relative_time), (void*)&((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[1], sizeof(pParam->relative_time)); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} + +SHCI_CmdStatus_t SHCI_C2_CONCURRENT_EnableNext_802154_EvtNotification( void ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + shci_send( SHCI_OPCODE_C2_CONCURRENT_ENABLE_NEXT_802154_EVT_NOTIFICATION, + 0, + 0, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } -SHCI_CmdStatus_t SHCI_C2_FLASH_StoreData(SHCI_C2_FLASH_Ip_t Ip) +SHCI_CmdStatus_t SHCI_C2_FLASH_StoreData( SHCI_C2_FLASH_Ip_t Ip ) { /** * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; local_buffer[0] = Ip; - shci_send(SHCI_OPCODE_C2_FLASH_STORE_DATA, - 1, - local_buffer, - p_rsp); + shci_send( SHCI_OPCODE_C2_FLASH_STORE_DATA, + 1, + local_buffer, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } -SHCI_CmdStatus_t SHCI_C2_FLASH_EraseData(SHCI_C2_FLASH_Ip_t Ip) +SHCI_CmdStatus_t SHCI_C2_FLASH_EraseData( SHCI_C2_FLASH_Ip_t Ip ) { /** * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; local_buffer[0] = Ip; - shci_send(SHCI_OPCODE_C2_FLASH_ERASE_DATA, - 1, - local_buffer, - p_rsp); + shci_send( SHCI_OPCODE_C2_FLASH_ERASE_DATA, + 1, + local_buffer, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } -SHCI_CmdStatus_t SHCI_C2_RADIO_AllowLowPower(SHCI_C2_FLASH_Ip_t Ip, uint8_t FlagRadioLowPowerOn) +SHCI_CmdStatus_t SHCI_C2_RADIO_AllowLowPower( SHCI_C2_FLASH_Ip_t Ip,uint8_t FlagRadioLowPowerOn) { /** * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; local_buffer[0] = Ip; local_buffer[1] = FlagRadioLowPowerOn; - shci_send(SHCI_OPCODE_C2_RADIO_ALLOW_LOW_POWER, - 2, - local_buffer, - p_rsp); + shci_send( SHCI_OPCODE_C2_RADIO_ALLOW_LOW_POWER, + 2, + local_buffer, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } -SHCI_CmdStatus_t SHCI_C2_Reinit(void) +SHCI_CmdStatus_t SHCI_C2_Reinit( void ) { /** * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; - shci_send(SHCI_OPCODE_C2_REINIT, - 0, - 0, - p_rsp); + shci_send( SHCI_OPCODE_C2_REINIT, + 0, + 0, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } SHCI_CmdStatus_t SHCI_C2_ExtpaConfig(uint32_t gpio_port, uint16_t gpio_pin_number, uint8_t gpio_polarity, uint8_t gpio_status) @@ -454,21 +534,21 @@ SHCI_CmdStatus_t SHCI_C2_ExtpaConfig(uint32_t gpio_port, uint16_t gpio_pin_numbe * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; - ((SHCI_C2_EXTPA_CONFIG_Cmd_Param_t *)local_buffer)->gpio_port = gpio_port; - ((SHCI_C2_EXTPA_CONFIG_Cmd_Param_t *)local_buffer)->gpio_pin_number = gpio_pin_number; - ((SHCI_C2_EXTPA_CONFIG_Cmd_Param_t *)local_buffer)->gpio_polarity = gpio_polarity; - ((SHCI_C2_EXTPA_CONFIG_Cmd_Param_t *)local_buffer)->gpio_status = gpio_status; + ((SHCI_C2_EXTPA_CONFIG_Cmd_Param_t*)local_buffer)->gpio_port = gpio_port; + ((SHCI_C2_EXTPA_CONFIG_Cmd_Param_t*)local_buffer)->gpio_pin_number = gpio_pin_number; + ((SHCI_C2_EXTPA_CONFIG_Cmd_Param_t*)local_buffer)->gpio_polarity = gpio_polarity; + ((SHCI_C2_EXTPA_CONFIG_Cmd_Param_t*)local_buffer)->gpio_status = gpio_status; - shci_send(SHCI_OPCODE_C2_EXTPA_CONFIG, - 8, - local_buffer, - p_rsp); + shci_send( SHCI_OPCODE_C2_EXTPA_CONFIG, + 8, + local_buffer, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } SHCI_CmdStatus_t SHCI_C2_SetFlashActivityControl(SHCI_C2_SET_FLASH_ACTIVITY_CONTROL_Source_t Source) @@ -478,18 +558,18 @@ SHCI_CmdStatus_t SHCI_C2_SetFlashActivityControl(SHCI_C2_SET_FLASH_ACTIVITY_CONT * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; local_buffer[0] = (uint8_t)Source; - shci_send(SHCI_OPCODE_C2_SET_FLASH_ACTIVITY_CONTROL, - 1, - local_buffer, - p_rsp); + shci_send( SHCI_OPCODE_C2_SET_FLASH_ACTIVITY_CONTROL, + 1, + local_buffer, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } SHCI_CmdStatus_t SHCI_C2_Config(SHCI_C2_CONFIG_Cmd_Param_t *pCmdPacket) @@ -498,70 +578,129 @@ SHCI_CmdStatus_t SHCI_C2_Config(SHCI_C2_CONFIG_Cmd_Param_t *pCmdPacket) * Buffer is large enough to hold command complete without payload */ uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; - TL_EvtPacket_t *p_rsp; + TL_EvtPacket_t * p_rsp; p_rsp = (TL_EvtPacket_t *)local_buffer; - shci_send(SHCI_OPCODE_C2_CONFIG, - sizeof(SHCI_C2_CONFIG_Cmd_Param_t), - (uint8_t *)pCmdPacket, - p_rsp); + shci_send( SHCI_OPCODE_C2_CONFIG, + sizeof(SHCI_C2_CONFIG_Cmd_Param_t), + (uint8_t*)pCmdPacket, + p_rsp ); - return (SHCI_CmdStatus_t)(((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); } +SHCI_CmdStatus_t SHCI_C2_802_15_4_DeInit( void ) +{ + /** + * Buffer is large enough to hold command complete without payload + */ + uint8_t local_buffer[TL_BLEEVT_CS_BUFFER_SIZE]; + TL_EvtPacket_t * p_rsp; + + p_rsp = (TL_EvtPacket_t *)local_buffer; + + shci_send( SHCI_OPCODE_C2_802_15_4_DEINIT, + 0, + 0, + p_rsp ); + + return (SHCI_CmdStatus_t)(((TL_CcEvt_t*)(p_rsp->evtserial.evt.payload))->payload[0]); +} /** * Local System COMMAND * These commands are NOT sent to the CPU2 */ -SHCI_CmdStatus_t SHCI_GetWirelessFwInfo(WirelessFwInfo_t *pWirelessInfo) +SHCI_CmdStatus_t SHCI_GetWirelessFwInfo( WirelessFwInfo_t* pWirelessInfo ) { uint32_t ipccdba = 0; - MB_RefTable_t *p_RefTable = NULL; - uint32_t version = 0; - uint32_t memorySize = 0; - uint32_t infoStack = 0; + MB_RefTable_t * p_RefTable = NULL; + uint32_t wireless_firmware_version = 0; + uint32_t wireless_firmware_memorySize = 0; + uint32_t wireless_firmware_infoStack = 0; + MB_FUS_DeviceInfoTable_t * p_fus_device_info_table = NULL; + uint32_t fus_version = 0; + uint32_t fus_memorySize = 0; - ipccdba = READ_BIT(FLASH->IPCCBR, FLASH_IPCCBR_IPCCDBA); - p_RefTable = (MB_RefTable_t *)((ipccdba << 2) + SRAM2A_BASE); + ipccdba = READ_BIT( FLASH->IPCCBR, FLASH_IPCCBR_IPCCDBA ); + + /** + * The Device Info Table mapping depends on which firmware is running on CPU2. + * If the FUS is running on CPU2, FUS_DEVICE_INFO_TABLE_VALIDITY_KEYWORD shall be written in the table. + * Otherwise, it means the Wireless Firmware is running on the CPU2 + */ + p_fus_device_info_table = (MB_FUS_DeviceInfoTable_t*)(*(uint32_t*)((ipccdba<<2) + SRAM2A_BASE)); + + if(p_fus_device_info_table->DeviceInfoTableState == FUS_DEVICE_INFO_TABLE_VALIDITY_KEYWORD) + { + /* The FUS is running on CPU2 */ + /** + * Retrieve the WirelessFwInfoTable + * This table is stored in RAM at startup during the TL (transport layer) initialization + */ + wireless_firmware_version = p_fus_device_info_table->WirelessStackVersion; + wireless_firmware_memorySize = p_fus_device_info_table->WirelessStackMemorySize; + wireless_firmware_infoStack = p_fus_device_info_table->WirelessFirmwareBleInfo; + + /** + * Retrieve the FusInfoTable + * This table is stored in RAM at startup during the TL (transport layer) initialization + */ + fus_version = p_fus_device_info_table->FusVersion; + fus_memorySize = p_fus_device_info_table->FusMemorySize; + } + else + { + /* The Wireless Firmware is running on CPU2 */ + p_RefTable = (MB_RefTable_t*)((ipccdba<<2) + SRAM2A_BASE); + + /** + * Retrieve the WirelessFwInfoTable + * This table is stored in RAM at startup during the TL (transport layer) initialization + */ + wireless_firmware_version = p_RefTable->p_device_info_table->WirelessFwInfoTable.Version; + wireless_firmware_memorySize = p_RefTable->p_device_info_table->WirelessFwInfoTable.MemorySize; + wireless_firmware_infoStack = p_RefTable->p_device_info_table->WirelessFwInfoTable.InfoStack; + + /** + * Retrieve the FusInfoTable + * This table is stored in RAM at startup during the TL (transport layer) initialization + */ + fus_version = p_RefTable->p_device_info_table->FusInfoTable.Version; + fus_memorySize = p_RefTable->p_device_info_table->FusInfoTable.MemorySize; + } /** * Retrieve the WirelessFwInfoTable * This table is stored in RAM at startup during the TL (transport layer) initialization */ - version = p_RefTable->p_device_info_table->WirelessFwInfoTable.Version; - pWirelessInfo->VersionMajor = ((version & INFO_VERSION_MAJOR_MASK) >> INFO_VERSION_MAJOR_OFFSET); - pWirelessInfo->VersionMinor = ((version & INFO_VERSION_MINOR_MASK) >> INFO_VERSION_MINOR_OFFSET); - pWirelessInfo->VersionSub = ((version & INFO_VERSION_SUB_MASK) >> INFO_VERSION_SUB_OFFSET); - pWirelessInfo->VersionBranch = ((version & INFO_VERSION_BRANCH_MASK) >> INFO_VERSION_BRANCH_OFFSET); - pWirelessInfo->VersionReleaseType = ((version & INFO_VERSION_TYPE_MASK) >> INFO_VERSION_TYPE_OFFSET); - - memorySize = p_RefTable->p_device_info_table->WirelessFwInfoTable.MemorySize; - pWirelessInfo->MemorySizeSram2B = ((memorySize & INFO_SIZE_SRAM2B_MASK) >> INFO_SIZE_SRAM2B_OFFSET); - pWirelessInfo->MemorySizeSram2A = ((memorySize & INFO_SIZE_SRAM2A_MASK) >> INFO_SIZE_SRAM2A_OFFSET); - pWirelessInfo->MemorySizeSram1 = ((memorySize & INFO_SIZE_SRAM1_MASK) >> INFO_SIZE_SRAM1_OFFSET); - pWirelessInfo->MemorySizeFlash = ((memorySize & INFO_SIZE_FLASH_MASK) >> INFO_SIZE_FLASH_OFFSET); - - infoStack = p_RefTable->p_device_info_table->WirelessFwInfoTable.InfoStack; - pWirelessInfo->StackType = ((infoStack & INFO_STACK_TYPE_MASK) >> INFO_STACK_TYPE_OFFSET); + pWirelessInfo->VersionMajor = ((wireless_firmware_version & INFO_VERSION_MAJOR_MASK) >> INFO_VERSION_MAJOR_OFFSET); + pWirelessInfo->VersionMinor = ((wireless_firmware_version & INFO_VERSION_MINOR_MASK) >> INFO_VERSION_MINOR_OFFSET); + pWirelessInfo->VersionSub = ((wireless_firmware_version & INFO_VERSION_SUB_MASK) >> INFO_VERSION_SUB_OFFSET); + pWirelessInfo->VersionBranch = ((wireless_firmware_version & INFO_VERSION_BRANCH_MASK) >> INFO_VERSION_BRANCH_OFFSET); + pWirelessInfo->VersionReleaseType = ((wireless_firmware_version & INFO_VERSION_TYPE_MASK) >> INFO_VERSION_TYPE_OFFSET); + + pWirelessInfo->MemorySizeSram2B = ((wireless_firmware_memorySize & INFO_SIZE_SRAM2B_MASK) >> INFO_SIZE_SRAM2B_OFFSET); + pWirelessInfo->MemorySizeSram2A = ((wireless_firmware_memorySize & INFO_SIZE_SRAM2A_MASK) >> INFO_SIZE_SRAM2A_OFFSET); + pWirelessInfo->MemorySizeSram1 = ((wireless_firmware_memorySize & INFO_SIZE_SRAM1_MASK) >> INFO_SIZE_SRAM1_OFFSET); + pWirelessInfo->MemorySizeFlash = ((wireless_firmware_memorySize & INFO_SIZE_FLASH_MASK) >> INFO_SIZE_FLASH_OFFSET); + + pWirelessInfo->StackType = ((wireless_firmware_infoStack & INFO_STACK_TYPE_MASK) >> INFO_STACK_TYPE_OFFSET); /** * Retrieve the FusInfoTable * This table is stored in RAM at startup during the TL (transport layer) initialization */ - version = p_RefTable->p_device_info_table->FusInfoTable.Version; - pWirelessInfo->FusVersionMajor = ((version & INFO_VERSION_MAJOR_MASK) >> INFO_VERSION_MAJOR_OFFSET); - pWirelessInfo->FusVersionMinor = ((version & INFO_VERSION_MINOR_MASK) >> INFO_VERSION_MINOR_OFFSET); - pWirelessInfo->FusVersionSub = ((version & INFO_VERSION_SUB_MASK) >> INFO_VERSION_SUB_OFFSET); + pWirelessInfo->FusVersionMajor = ((fus_version & INFO_VERSION_MAJOR_MASK) >> INFO_VERSION_MAJOR_OFFSET); + pWirelessInfo->FusVersionMinor = ((fus_version & INFO_VERSION_MINOR_MASK) >> INFO_VERSION_MINOR_OFFSET); + pWirelessInfo->FusVersionSub = ((fus_version & INFO_VERSION_SUB_MASK) >> INFO_VERSION_SUB_OFFSET); - memorySize = p_RefTable->p_device_info_table->FusInfoTable.MemorySize; - pWirelessInfo->FusMemorySizeSram2B = ((memorySize & INFO_SIZE_SRAM2B_MASK) >> INFO_SIZE_SRAM2B_OFFSET); - pWirelessInfo->FusMemorySizeSram2A = ((memorySize & INFO_SIZE_SRAM2A_MASK) >> INFO_SIZE_SRAM2A_OFFSET); - pWirelessInfo->FusMemorySizeFlash = ((memorySize & INFO_SIZE_FLASH_MASK) >> INFO_SIZE_FLASH_OFFSET); + pWirelessInfo->FusMemorySizeSram2B = ((fus_memorySize & INFO_SIZE_SRAM2B_MASK) >> INFO_SIZE_SRAM2B_OFFSET); + pWirelessInfo->FusMemorySizeSram2A = ((fus_memorySize & INFO_SIZE_SRAM2A_MASK) >> INFO_SIZE_SRAM2A_OFFSET); + pWirelessInfo->FusMemorySizeFlash = ((fus_memorySize & INFO_SIZE_FLASH_MASK) >> INFO_SIZE_FLASH_OFFSET); return (SHCI_Success); } #endif /* STM32WBxx */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/utility/STM32Cube_FW/shci.h b/src/utility/STM32Cube_FW/shci.h index 35227c76..a0f1e4d2 100644 --- a/src/utility/STM32Cube_FW/shci.h +++ b/src/utility/STM32Cube_FW/shci.h @@ -4,17 +4,16 @@ * @author MCD Application Team * @brief HCI command for the system channel ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** */ @@ -26,254 +25,297 @@ extern "C" { #endif -/* Includes ------------------------------------------------------------------*/ + /* Includes ------------------------------------------------------------------*/ #include "mbox_def.h" /* Requested to expose the MB_WirelessFwInfoTable_t structure */ -/* Exported types ------------------------------------------------------------*/ - -/* SYSTEM EVENT */ -typedef enum { - WIRELESS_FW_RUNNING = 0x00, - RSS_FW_RUNNING = 0x01, -} SHCI_SysEvt_Ready_Rsp_t; - -/* ERROR CODES - * - * These error codes are detected on M0 side and are send back to the M4 via a system - * notification message. It is up to the application running on M4 to manage these errors - * - * These errors can be generated by all layers (low level driver, stack, framework infrastructure, etc..) - */ -typedef enum { - ERR_BLE_INIT = 0, - ERR_THREAD_LLD_FATAL_ERROR = 125, /* The LLD driver used on 802_15_4 detected a fatal error */ - ERR_THREAD_UNKNOWN_CMD = 126, /* The command send by the M4 to control the Thread stack is unknown */ -} SCHI_SystemErrCode_t; + /* Exported types ------------------------------------------------------------*/ + + /* SYSTEM EVENT */ + typedef enum + { + WIRELESS_FW_RUNNING = 0x00, + FUS_FW_RUNNING = 0x01, + } SHCI_SysEvt_Ready_Rsp_t; + + /* ERROR CODES + * + * These error codes are detected on CPU2 side and are send back to the CPU1 via a system + * notification message. It is up to the application running on CPU1 to manage these errors + * + * These errors can be generated by all layers (low level driver, stack, framework infrastructure, etc..) + */ + typedef enum + { + ERR_BLE_INIT = 0, /* This event is currently not reported by the CPU2 */ + ERR_THREAD_LLD_FATAL_ERROR = 125, /* The LLD driver used on 802_15_4 detected a fatal error */ + ERR_THREAD_UNKNOWN_CMD = 126, /* The command send by the CPU1 to control the Thread stack is unknown */ + } SCHI_SystemErrCode_t; #define SHCI_EVTCODE ( 0xFF ) #define SHCI_SUB_EVT_CODE_BASE ( 0x9200 ) -/** - * THE ORDER SHALL NOT BE CHANGED TO GUARANTEE COMPATIBILITY WITH THE CPU1 DEFINITION - */ -typedef enum { - SHCI_SUB_EVT_CODE_READY = SHCI_SUB_EVT_CODE_BASE, - SHCI_SUB_EVT_ERROR_NOTIF, - SHCI_SUB_EVT_BLE_NVM_RAM_UPDATE, - SHCI_SUB_EVT_OT_NVM_RAM_UPDATE, - SHCI_SUB_EVT_NVM_START_WRITE, - SHCI_SUB_EVT_NVM_END_WRITE, - SHCI_SUB_EVT_NVM_START_ERASE, - SHCI_SUB_EVT_NVM_END_ERASE, -} SHCI_SUB_EVT_CODE_t; + /** + * THE ORDER SHALL NOT BE CHANGED TO GUARANTEE COMPATIBILITY WITH THE CPU1 DEFINITION + */ + typedef enum + { + SHCI_SUB_EVT_CODE_READY = SHCI_SUB_EVT_CODE_BASE, + SHCI_SUB_EVT_ERROR_NOTIF, + SHCI_SUB_EVT_BLE_NVM_RAM_UPDATE, + SHCI_SUB_EVT_THREAD_NVM_RAM_UPDATE, + SHCI_SUB_EVT_NVM_START_WRITE, + SHCI_SUB_EVT_NVM_END_WRITE, + SHCI_SUB_EVT_NVM_START_ERASE, + SHCI_SUB_EVT_NVM_END_ERASE, + SHCI_SUB_EVT_CODE_CONCURRENT_802154_EVT, + } SHCI_SUB_EVT_CODE_t; -/** - * SHCI_SUB_EVT_CODE_READY - * This notifies the CPU1 that the CPU2 is now ready to receive commands - * It reports as well which firmware is running on CPU2 : The wireless stack of the FUS (previously named RSS) - */ -typedef PACKED_STRUCT{ - SHCI_SysEvt_Ready_Rsp_t sysevt_ready_rsp; -} SHCI_C2_Ready_Evt_t; + /** + * SHCI_SUB_EVT_CODE_READY + * This notifies the CPU1 that the CPU2 is now ready to receive commands + * It reports as well which firmware is running on CPU2 : The wireless stack of the FUS (previously named RSS) + */ + typedef PACKED_STRUCT{ + SHCI_SysEvt_Ready_Rsp_t sysevt_ready_rsp; + } SHCI_C2_Ready_Evt_t; -/** - * SHCI_SUB_EVT_ERROR_NOTIF - * This reports to the CPU1 some error form the CPU2 - */ -typedef PACKED_STRUCT{ - SCHI_SystemErrCode_t errorCode; -} SHCI_C2_ErrorNotif_Evt_t; + /** + * SHCI_SUB_EVT_ERROR_NOTIF + * This reports to the CPU1 some error form the CPU2 + */ + typedef PACKED_STRUCT{ + SCHI_SystemErrCode_t errorCode; + } SHCI_C2_ErrorNotif_Evt_t; -/** - * SHCI_SUB_EVT_BLE_NVM_RAM_UPDATE - * This notifies the CPU1 which part of the BLE NVM RAM has been updated so that only the modified - * section could be written in Flash/NVM - * StartAddress : Start address of the section that has been modified - * Size : Size (in bytes) of the section that has been modified - */ -typedef PACKED_STRUCT{ - uint32_t StartAddress; - uint32_t Size; -} SHCI_C2_BleNvmRamUpdate_Evt_t; + /** + * SHCI_SUB_EVT_BLE_NVM_RAM_UPDATE + * This notifies the CPU1 which part of the BLE NVM RAM has been updated so that only the modified + * section could be written in Flash/NVM + * StartAddress : Start address of the section that has been modified + * Size : Size (in bytes) of the section that has been modified + */ + typedef PACKED_STRUCT{ + uint32_t StartAddress; + uint32_t Size; + } SHCI_C2_BleNvmRamUpdate_Evt_t; -/** - * SHCI_SUB_EVT_OT_NVM_RAM_UPDATE - * This notifies the CPU1 which part of the 'OT NVM RAM' has been updated so that only the modified - * section could be written in Flash/NVM - * StartAddress : Start address of the section that has been modified - * Size : Size (in bytes) of the section that has been modified - */ -typedef PACKED_STRUCT{ - uint32_t StartAddress; - uint32_t Size; -} SHCI_C2_OtNvmRamUpdate_Evt_t; + /** + * SHCI_SUB_EVT_THREAD_NVM_RAM_UPDATE + * This notifies the CPU1 which part of the OT NVM RAM has been updated so that only the modified + * section could be written in Flash/NVM + * StartAddress : Start address of the section that has been modified + * Size : Size (in bytes) of the section that has been modified + */ + typedef PACKED_STRUCT{ + uint32_t StartAddress; + uint32_t Size; + } SHCI_C2_ThreadNvmRamUpdate_Evt_t; -/** - * SHCI_SUB_EVT_NVM_START_WRITE - * This notifies the CPU1 that the CPU2 has started a write procedure in Flash - * NumberOfWords : The number of 64bits data the CPU2 needs to write in Flash. - * For each 64bits data, the algorithm as described in AN5289 is executed. - * When this number is reported to 0, it means the Number of 64bits to be written - * was unknown when the procedure has started. - * When all data are written, the SHCI_SUB_EVT_NVM_END_WRITE event is reported - */ -typedef PACKED_STRUCT{ - uint32_t NumberOfWords; -} SHCI_C2_NvmStartWrite_Evt_t; + /** + * SHCI_SUB_EVT_NVM_START_WRITE + * This notifies the CPU1 that the CPU2 has started a write procedure in Flash + * NumberOfWords : The number of 64bits data the CPU2 needs to write in Flash. + * For each 64bits data, the algorithm as described in AN5289 is executed. + * When this number is reported to 0, it means the Number of 64bits to be written + * was unknown when the procedure has started. + * When all data are written, the SHCI_SUB_EVT_NVM_END_WRITE event is reported + */ + typedef PACKED_STRUCT{ + uint32_t NumberOfWords; + } SHCI_C2_NvmStartWrite_Evt_t; -/** - * SHCI_SUB_EVT_NVM_END_WRITE - * This notifies the CPU1 that the CPU2 has written all expected data in Flash - */ + /** + * SHCI_SUB_EVT_NVM_END_WRITE + * This notifies the CPU1 that the CPU2 has written all expected data in Flash + */ -/** - * SHCI_SUB_EVT_NVM_START_ERASE - * This notifies the CPU1 that the CPU2 has started a erase procedure in Flash - * NumberOfSectors : The number of sectors the CPU2 needs to erase in Flash. - * For each sector, the algorithm as described in AN5289 is executed. - * When this number is reported to 0, it means the Number of sectors to be erased - * was unknown when the procedure has started. - * When all sectors are erased, the SHCI_SUB_EVT_NVM_END_ERASE event is reported - */ -typedef PACKED_STRUCT{ - uint32_t NumberOfSectors; -} SHCI_C2_NvmStartErase_Evt_t; + /** + * SHCI_SUB_EVT_NVM_START_ERASE + * This notifies the CPU1 that the CPU2 has started a erase procedure in Flash + * NumberOfSectors : The number of sectors the CPU2 needs to erase in Flash. + * For each sector, the algorithm as described in AN5289 is executed. + * When this number is reported to 0, it means the Number of sectors to be erased + * was unknown when the procedure has started. + * When all sectors are erased, the SHCI_SUB_EVT_NVM_END_ERASE event is reported + */ + typedef PACKED_STRUCT{ + uint32_t NumberOfSectors; + } SHCI_C2_NvmStartErase_Evt_t; -/** - * SHCI_SUB_EVT_NVM_END_ERASE - * This notifies the CPU1 that the CPU2 has erased all expected flash sectors - */ + /** + * SHCI_SUB_EVT_NVM_END_ERASE + * This notifies the CPU1 that the CPU2 has erased all expected flash sectors + */ -/* SYSTEM COMMAND */ -typedef PACKED_STRUCT { - uint32_t MetaData[3]; -} SHCI_Header_t; - -typedef enum { - SHCI_Success = 0x00, - SHCI_UNKNOWN_CMD = 0x01, - SHCI_ERR_UNSUPPORTED_FEATURE = 0x11, - SHCI_ERR_INVALID_HCI_CMD_PARAMS = 0x12, - SHCI_FUS_CMD_NOT_SUPPORTED = 0xFF, -} SHCI_CmdStatus_t; - -typedef enum { - SHCI_8BITS = 0x01, - SHCI_16BITS = 0x02, - SHCI_32BITS = 0x04, -} SHCI_Busw_t; + /* SYSTEM COMMAND */ + typedef PACKED_STRUCT + { + /** + * MetaData holds : + * 2*32bits for chaining list + * 1*32bits with BLE header (type + Opcode + Length) + */ + uint32_t MetaData[3]; + } SHCI_Header_t; + + typedef enum + { + SHCI_Success = 0x00, + SHCI_UNKNOWN_CMD = 0x01, + SHCI_MEMORY_CAPACITY_EXCEEDED_ERR_CODE= 0x07, + SHCI_ERR_UNSUPPORTED_FEATURE = 0x11, + SHCI_ERR_INVALID_HCI_CMD_PARAMS = 0x12, + SHCI_ERR_INVALID_PARAMS = 0x42, /* only used for release < v1.13.0 */ + SHCI_ERR_INVALID_PARAMS_V2 = 0x92, /* available for release >= v1.13.0 */ + SHCI_FUS_CMD_NOT_SUPPORTED = 0xFF, + } SHCI_CmdStatus_t; + + typedef enum + { + SHCI_8BITS = 0x01, + SHCI_16BITS = 0x02, + SHCI_32BITS = 0x04, + } SHCI_Busw_t; #define SHCI_OGF ( 0x3F ) #define SHCI_OCF_BASE ( 0x50 ) -/** - * THE ORDER SHALL NOT BE CHANGED TO GUARANTEE COMPATIBILITY WITH THE CPU2 DEFINITION - */ -typedef enum { - SHCI_OCF_C2_RESERVED1 = SHCI_OCF_BASE, - SHCI_OCF_C2_RESERVED2, - SHCI_OCF_C2_FUS_GET_STATE, - SHCI_OCF_C2_FUS_RESERVED1, - SHCI_OCF_C2_FUS_FW_UPGRADE, - SHCI_OCF_C2_FUS_FW_DELETE, - SHCI_OCF_C2_FUS_UPDATE_AUTH_KEY, - SHCI_OCF_C2_FUS_LOCK_AUTH_KEY, - SHCI_OCF_C2_FUS_STORE_USR_KEY, - SHCI_OCF_C2_FUS_LOAD_USR_KEY, - SHCI_OCF_C2_FUS_START_WS, - SHCI_OCF_C2_FUS_RESERVED2, - SHCI_OCF_C2_FUS_RESERVED3, - SHCI_OCF_C2_FUS_LOCK_USR_KEY, - SHCI_OCF_C2_FUS_RESERVED5, - SHCI_OCF_C2_FUS_RESERVED6, - SHCI_OCF_C2_FUS_RESERVED7, - SHCI_OCF_C2_FUS_RESERVED8, - SHCI_OCF_C2_FUS_RESERVED9, - SHCI_OCF_C2_FUS_RESERVED10, - SHCI_OCF_C2_FUS_RESERVED11, - SHCI_OCF_C2_FUS_RESERVED12, - SHCI_OCF_C2_BLE_INIT, - SHCI_OCF_C2_THREAD_INIT, - SHCI_OCF_C2_DEBUG_INIT, - SHCI_OCF_C2_FLASH_ERASE_ACTIVITY, - SHCI_OCF_C2_CONCURRENT_SET_MODE, - SHCI_OCF_C2_FLASH_STORE_DATA, - SHCI_OCF_C2_FLASH_ERASE_DATA, - SHCI_OCF_C2_RADIO_ALLOW_LOW_POWER, - SHCI_OCF_C2_REINIT, - SHCI_OCF_C2_LLD_TESTS_INIT, - SHCI_OCF_C2_EXTPA_CONFIG, - SHCI_OCF_C2_SET_FLASH_ACTIVITY_CONTROL, - SHCI_OCF_C2_LLD_BLE_INIT, - SHCI_OCF_C2_CONFIG, -} SHCI_OCF_t; + /** + * THE ORDER SHALL NOT BE CHANGED TO GUARANTEE COMPATIBILITY WITH THE CPU2 DEFINITION + */ + typedef enum + { + SHCI_OCF_C2_RESERVED1 = SHCI_OCF_BASE, + SHCI_OCF_C2_RESERVED2, + SHCI_OCF_C2_FUS_GET_STATE, + SHCI_OCF_C2_FUS_RESERVED1, + SHCI_OCF_C2_FUS_FW_UPGRADE, + SHCI_OCF_C2_FUS_FW_DELETE, + SHCI_OCF_C2_FUS_UPDATE_AUTH_KEY, + SHCI_OCF_C2_FUS_LOCK_AUTH_KEY, + SHCI_OCF_C2_FUS_STORE_USR_KEY, + SHCI_OCF_C2_FUS_LOAD_USR_KEY, + SHCI_OCF_C2_FUS_START_WS, + SHCI_OCF_C2_FUS_RESERVED2, + SHCI_OCF_C2_FUS_RESERVED3, + SHCI_OCF_C2_FUS_LOCK_USR_KEY, + SHCI_OCF_C2_FUS_UNLOAD_USR_KEY, + SHCI_OCF_C2_FUS_ACTIVATE_ANTIROLLBACK, + SHCI_OCF_C2_FUS_RESERVED7, + SHCI_OCF_C2_FUS_RESERVED8, + SHCI_OCF_C2_FUS_RESERVED9, + SHCI_OCF_C2_FUS_RESERVED10, + SHCI_OCF_C2_FUS_RESERVED11, + SHCI_OCF_C2_FUS_RESERVED12, + SHCI_OCF_C2_BLE_INIT, + SHCI_OCF_C2_THREAD_INIT, + SHCI_OCF_C2_DEBUG_INIT, + SHCI_OCF_C2_FLASH_ERASE_ACTIVITY, + SHCI_OCF_C2_CONCURRENT_SET_MODE, + SHCI_OCF_C2_FLASH_STORE_DATA, + SHCI_OCF_C2_FLASH_ERASE_DATA, + SHCI_OCF_C2_RADIO_ALLOW_LOW_POWER, + SHCI_OCF_C2_REINIT, + SHCI_OCF_C2_LLD_TESTS_INIT, + SHCI_OCF_C2_EXTPA_CONFIG, + SHCI_OCF_C2_SET_FLASH_ACTIVITY_CONTROL, + SHCI_OCF_C2_BLE_LLD_INIT, + SHCI_OCF_C2_CONFIG, + SHCI_OCF_C2_CONCURRENT_GET_NEXT_BLE_EVT_TIME, + SHCI_OCF_C2_CONCURRENT_ENABLE_NEXT_802154_EVT_NOTIFICATION, + SHCI_OCF_C2_802_15_4_DEINIT, + } SHCI_OCF_t; #define SHCI_OPCODE_C2_FUS_GET_STATE (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_GET_STATE) /** No command parameters */ /** Response parameters*/ -typedef enum { - FUS_STATE_NO_ERROR = 0x00, - FUS_STATE_IMG_NOT_FOUND = 0x01, - FUS_STATE_IMG_CORRUPT = 0x02, - FUS_STATE_IMG_NOT_AUTHENTIC = 0x03, - FUS_STATE_IMG_NOT_ENOUGH_SPACE = 0x04, - FUS_STATE_ERR_UNKNOWN = 0xFF, -} SHCI_FUS_GetState_ErrorCode_t; +/** It responds a 1 byte value holding FUS State error code when the FUS State value is 0xFF (FUS_STATE_VALUE_ERROR) */ + typedef enum + { + FUS_STATE_ERROR_NO_ERROR = 0x00, + FUS_STATE_ERROR_IMG_NOT_FOUND = 0x01, + FUS_STATE_ERROR_IMG_CORRUPT = 0x02, + FUS_STATE_ERROR_IMG_NOT_AUTHENTIC = 0x03, + FUS_STATE_ERROR_IMG_NOT_ENOUGH_SPACE = 0x04, + FUS_STATE_ERROR_IMAGE_USRABORT = 0x05, + FUS_STATE_ERROR_IMAGE_ERSERROR = 0x06, + FUS_STATE_ERROR_IMAGE_WRTERROR = 0x07, + FUS_STATE_ERROR_AUTH_TAG_ST_NOTFOUND = 0x08, + FUS_STATE_ERROR_AUTH_TAG_CUST_NOTFOUND = 0x09, + FUS_STATE_ERROR_AUTH_KEY_LOCKED = 0x0A, + FUS_STATE_ERROR_FW_ROLLBACK_ERROR = 0x11, + FUS_STATE_ERROR_STATE_NOT_RUNNING = 0xFE, + FUS_STATE_ERROR_ERR_UNKNOWN = 0xFF, + } SHCI_FUS_GetState_ErrorCode_t; + + enum + { + FUS_STATE_VALUE_IDLE = 0x00, + FUS_STATE_VALUE_FW_UPGRD_ONGOING = 0x10, + FUS_STATE_VALUE_FW_UPGRD_ONGOING_END = 0x1F, /* All values between 0x10 and 0x1F has the same meaning */ + FUS_STATE_VALUE_FUS_UPGRD_ONGOING = 0x20, + FUS_STATE_VALUE_FUS_UPGRD_ONGOING_END = 0x2F, /* All values between 0x20 and 0x2F has the same meaning */ + FUS_STATE_VALUE_SERVICE_ONGOING = 0x30, + FUS_STATE_VALUE_SERVICE_ONGOING_END = 0x3F, /* All values between 0x30 and 0x3F has the same meaning */ + FUS_STATE_VALUE_ERROR = 0xFF, + }; #define SHCI_OPCODE_C2_FUS_RESERVED1 (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_RESERVED1) /** No command parameters */ /** No response parameters*/ #define SHCI_OPCODE_C2_FUS_FW_UPGRADE (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_FW_UPGRADE) -/** No structure for command parameters */ -/** No response parameters*/ + /** No structure for command parameters */ + /** No response parameters*/ #define SHCI_OPCODE_C2_FUS_FW_DELETE (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_FW_DELETE) /** No command parameters */ /** No response parameters*/ #define SHCI_OPCODE_C2_FUS_UPDATE_AUTH_KEY (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_UPDATE_AUTH_KEY) -typedef PACKED_STRUCT { + typedef PACKED_STRUCT{ uint8_t KeySize; uint8_t KeyData[64]; -} SHCI_C2_FUS_UpdateAuthKey_Cmd_Param_t; + } SHCI_C2_FUS_UpdateAuthKey_Cmd_Param_t; -/** No response parameters*/ + /** No response parameters*/ #define SHCI_OPCODE_C2_FUS_LOCK_AUTH_KEY (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_LOCK_AUTH_KEY) /** No command parameters */ /** No response parameters*/ #define SHCI_OPCODE_C2_FUS_STORE_USR_KEY (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_STORE_USR_KEY) -/** Command parameters */ -/* List of supported key type */ -enum { - KEYTYPE_NONE = 0x00, - KEYTYPE_SIMPLE = 0x01, - KEYTYPE_MASTER = 0x02, - KEYTYPE_ENCRYPTED = 0x03, -}; - -/* List of supported key size */ -enum { - KEYSIZE_16 = 16, - KEYSIZE_32 = 32, -}; - -typedef PACKED_STRUCT{ + /** Command parameters */ + /* List of supported key type */ + enum + { + KEYTYPE_NONE = 0x00, + KEYTYPE_SIMPLE = 0x01, + KEYTYPE_MASTER = 0x02, + KEYTYPE_ENCRYPTED = 0x03, + }; + + /* List of supported key size */ + enum + { + KEYSIZE_16 = 16, + KEYSIZE_32 = 32, + }; + + typedef PACKED_STRUCT{ uint8_t KeyType; uint8_t KeySize; uint8_t KeyData[32 + 12]; -} SHCI_C2_FUS_StoreUsrKey_Cmd_Param_t; + } SHCI_C2_FUS_StoreUsrKey_Cmd_Param_t; -/** Response parameters*/ -/** It responds a 1 byte value holding the index given for the stored key */ + /** Response parameters*/ + /** It responds a 1 byte value holding the index given for the stored key */ #define SHCI_OPCODE_C2_FUS_LOAD_USR_KEY (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_LOAD_USR_KEY) -/** Command parameters */ -/** 1 byte holding the key index value */ + /** Command parameters */ + /** 1 byte holding the key index value */ -/** No response parameters*/ + /** No response parameters*/ #define SHCI_OPCODE_C2_FUS_START_WS (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_START_WS) /** No command parameters */ @@ -288,16 +330,16 @@ typedef PACKED_STRUCT{ /** No response parameters*/ #define SHCI_OPCODE_C2_FUS_LOCK_USR_KEY (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_LOCK_USR_KEY) -/** Command parameters */ -/** 1 byte holding the key index value */ + /** Command parameters */ + /** 1 byte holding the key index value */ -/** No response parameters*/ + /** No response parameters*/ -#define SHCI_OPCODE_C2_FUS_RESERVED5 (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_RESERVED5) +#define SHCI_OPCODE_C2_FUS_UNLOAD_USR_KEY (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_UNLOAD_USR_KEY) /** No command parameters */ -/** No response parameters*/ +/** 1 byte holding the key index value */ -#define SHCI_OPCODE_C2_FUS_RESERVED6 (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_RESERVED6) +#define SHCI_OPCODE_C2_FUS_ACTIVATE_ANTIROLLBACK (( SHCI_OGF << 10) + SHCI_OCF_C2_FUS_ACTIVATE_ANTIROLLBACK) /** No command parameters */ /** No response parameters*/ @@ -326,91 +368,400 @@ typedef PACKED_STRUCT{ /** No response parameters*/ #define SHCI_OPCODE_C2_BLE_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_BLE_INIT) -/** THE ORDER SHALL NOT BE CHANGED */ -typedef PACKED_STRUCT{ - uint8_t *pBleBufferAddress; /**< NOT USED CURRENTLY */ - uint32_t BleBufferSize; /**< Size of the Buffer allocated in pBleBufferAddress */ + /** THE ORDER SHALL NOT BE CHANGED */ + typedef PACKED_STRUCT{ + uint8_t* pBleBufferAddress; /**< NOT USED - shall be set to 0 */ + uint32_t BleBufferSize; /**< NOT USED - shall be set to 0 */ + + /** + * NumAttrRecord + * Maximum number of attribute records related to all the required characteristics (excluding the services) + * that can be stored in the GATT database, for the specific BLE user application. + * For each characteristic, the number of attribute records goes from two to five depending on the characteristic properties: + * - minimum of two (one for declaration and one for the value) + * - add one more record for each additional property: notify or indicate, broadcast, extended property. + * The total calculated value must be increased by 9, due to the records related to the standard attribute profile and + * GAP service characteristics, and automatically added when initializing GATT and GAP layers + * - Min value: + 9 + * - Max value: depending on the GATT database defined by user application + */ uint16_t NumAttrRecord; + + /** + * NumAttrServ + * Defines the maximum number of services that can be stored in the GATT database. Note that the GAP and GATT services + * are automatically added at initialization so this parameter must be the number of user services increased by two. + * - Min value: + 2 + * - Max value: depending GATT database defined by user application + */ uint16_t NumAttrServ; + + /** + * AttrValueArrSize + * NOTE: This parameter is ignored by the CPU2 when the parameter "Options" is set to "LL_only" ( see Options description in that structure ) + * + * Size of the storage area for the attribute values. + * Each characteristic contributes to the attrValueArrSize value as follows: + * - Characteristic value length plus: + * + 5 bytes if characteristic UUID is 16 bits + * + 19 bytes if characteristic UUID is 128 bits + * + 2 bytes if characteristic has a server configuration descriptor + * + 2 bytes * NumOfLinks if the characteristic has a client configuration descriptor + * + 2 bytes if the characteristic has extended properties + * Each descriptor contributes to the attrValueArrSize value as follows: + * - Descriptor length + */ uint16_t AttrValueArrSize; + + /** + * NumOfLinks + * Maximum number of BLE links supported + * - Min value: 1 + * - Max value: 8 + */ uint8_t NumOfLinks; + + /** + * ExtendedPacketLengthEnable + * Disable/enable the extended packet length BLE 5.0 feature + * - Disable: 0 + * - Enable: 1 + */ uint8_t ExtendedPacketLengthEnable; + + /** + * PrWriteListSize + * NOTE: This parameter is ignored by the CPU2 when the parameter "Options" is set to "LL_only" ( see Options description in that structure ) + * + * Maximum number of supported "prepare write request" + * - Min value: given by the macro DEFAULT_PREP_WRITE_LIST_SIZE + * - Max value: a value higher than the minimum required can be specified, but it is not recommended + */ uint8_t PrWriteListSize; + + /** + * MblockCount + * NOTE: This parameter is overwritten by the CPU2 with an hardcoded optimal value when the parameter "Options" is set to "LL_only" + * ( see Options description in that structure ) + * + * Number of allocated memory blocks for the BLE stack + * - Min value: given by the macro MBLOCKS_CALC + * - Max value: a higher value can improve data throughput performance, but uses more memory + */ uint8_t MblockCount; + + /** + * AttMtu + * NOTE: This parameter is ignored by the CPU2 when the parameter "Options" is set to "LL_only" ( see Options description in that structure ) + * + * Maximum ATT MTU size supported + * - Min value: 23 + * - Max value: 512 + */ uint16_t AttMtu; + + /** + * SlaveSca + * The sleep clock accuracy (ppm value) that used in BLE connected slave mode to calculate the window widening + * (in combination with the sleep clock accuracy sent by master in CONNECT_REQ PDU), + * refer to BLE 5.0 specifications - Vol 6 - Part B - chap 4.5.7 and 4.2.2 + * - Min value: 0 + * - Max value: 500 (worst possible admitted by specification) + */ uint16_t SlaveSca; + + /** + * MasterSca + * The sleep clock accuracy handled in master mode. It is used to determine the connection and advertising events timing. + * It is transmitted to the slave in CONNEC_REQ PDU used by the slave to calculate the window widening, + * see SlaveSca and Bluetooth Core Specification v5.0 Vol 6 - Part B - chap 4.5.7 and 4.2.2 + * Possible values: + * - 251 ppm to 500 ppm: 0 + * - 151 ppm to 250 ppm: 1 + * - 101 ppm to 150 ppm: 2 + * - 76 ppm to 100 ppm: 3 + * - 51 ppm to 75 ppm: 4 + * - 31 ppm to 50 ppm: 5 + * - 21 ppm to 30 ppm: 6 + * - 0 ppm to 20 ppm: 7 + */ uint8_t MasterSca; + + /** + * LsSource + * Some information for Low speed clock mapped in bits field + * - bit 0: 1: Calibration for the RF system wakeup clock source 0: No calibration for the RF system wakeup clock source + * - bit 1: 1: STM32W5M Module device 0: Other devices as STM32WBxx SOC, STM32WB1M module + * - bit 2: 1: HSE/1024 Clock config 0: LSE Clock config + */ uint8_t LsSource; + + /** + * MaxConnEventLength + * This parameter determines the maximum duration of a slave connection event. When this duration is reached the slave closes + * the current connections event (whatever is the CE_length parameter specified by the master in HCI_CREATE_CONNECTION HCI command), + * expressed in units of 625/256 µs (~2.44 µs) + * - Min value: 0 (if 0 is specified, the master and slave perform only a single TX-RX exchange per connection event) + * - Max value: 1638400 (4000 ms). A higher value can be specified (max 0xFFFFFFFF) but results in a maximum connection time + * of 4000 ms as specified. In this case the parameter is not applied, and the predicted CE length calculated on slave is not shortened + */ uint32_t MaxConnEventLength; + + /** + * HsStartupTime + * Startup time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 µs (~2.44 µs). + * - Min value: 0 + * - Max value: 820 (~2 ms). A higher value can be specified, but the value that implemented in stack is forced to ~2 ms + */ uint16_t HsStartupTime; + + /** + * ViterbiEnable + * Viterbi implementation in BLE LL reception. + * - 0: Enable + * - 1: Disable + */ uint8_t ViterbiEnable; - uint8_t LlOnly; + + /** + * Options flags + * - bit 0: 1: LL only 0: LL + host + * - bit 1: 1: no service change desc. 0: with service change desc. + * - bit 2: 1: device name Read-Only 0: device name R/W + * - bit 3: 1: extended advertizing supported 0: extended advertizing not supported + * - bit 4: 1: CS Algo #2 supported 0: CS Algo #2 not supported + * - bit 5: 1: Reduced GATT database in NVM 0: Full GATT database in NVM + * - bit 6: 1: GATT caching is used 0: GATT caching is not used + * - bit 7: 1: LE Power Class 1 0: LE Power Classe 2-3 + * - bit 8: 1: appearance Writable 0: appearance Read-Only + * - bit 9: 1: Enhanced ATT supported 0: Enhanced ATT not supported + * - other bits: reserved ( shall be set to 0) + */ + uint8_t Options; + + /** + * HwVersion + * Reserved for future use - shall be set to 0 + */ uint8_t HwVersion; -} SHCI_C2_Ble_Init_Cmd_Param_t; -typedef PACKED_STRUCT{ - SHCI_Header_t Header; /** Does not need to be initialized by the user */ - SHCI_C2_Ble_Init_Cmd_Param_t Param; -} SHCI_C2_Ble_Init_Cmd_Packet_t; + /** + * Maximum number of connection-oriented channels in initiator mode. + * Range: 0 .. 64 + */ + uint8_t max_coc_initiator_nbr; -/** No response parameters*/ + /** + * Minimum transmit power in dBm supported by the Controller. + * Range: -127 .. 20 + */ + int8_t min_tx_power; + + /** + * Maximum transmit power in dBm supported by the Controller. + * Range: -127 .. 20 + */ + int8_t max_tx_power; + + /** + * RX model configuration + * - bit 0: 1: agc_rssi model improved vs RF blockers 0: Legacy agc_rssi model + * - other bits: reserved ( shall be set to 0) + */ + uint8_t rx_model_config; + + /* Maximum number of advertising sets. + * Range: 1 .. 8 with limitation: + * This parameter is linked to max_adv_data_len such as both compliant with allocated Total memory computed with BLE_EXT_ADV_BUFFER_SIZE based + * on Max Extended advertising configuration supported. + * This parameter is considered by the CPU2 when Options has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set + */ + uint8_t max_adv_set_nbr; + + /* Maximum advertising data length (in bytes) + * Range: 31 .. 1650 with limitation: + * This parameter is linked to max_adv_set_nbr such as both compliant with allocated Total memory computed with BLE_EXT_ADV_BUFFER_SIZE based + * on Max Extended advertising configuration supported. + * This parameter is considered by the CPU2 when Options has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set + */ + uint16_t max_adv_data_len; + + /* RF TX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. + * Range: -1280 .. 1280 + */ + int16_t tx_path_compens; + + /* RF RX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. + * Range: -1280 .. 1280 + */ + int16_t rx_path_compens; + + /* BLE core specification version (8-bit unsigned integer). + * values as: 11(5.2), 12(5.3) + */ + uint8_t ble_core_version; + + } SHCI_C2_Ble_Init_Cmd_Param_t; + + typedef PACKED_STRUCT{ + SHCI_Header_t Header; /** Does not need to be initialized by the user */ + SHCI_C2_Ble_Init_Cmd_Param_t Param; + } SHCI_C2_Ble_Init_Cmd_Packet_t; + + /** + * Options + * Each definition below may be added together to build the Options value + * WARNING : Only one definition per bit shall be added to build the Options value + */ +#define SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY (1<<0) +#define SHCI_C2_BLE_INIT_OPTIONS_LL_HOST (0<<0) + +#define SHCI_C2_BLE_INIT_OPTIONS_NO_SVC_CHANGE_DESC (1<<1) +#define SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC (0<<1) + +#define SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RO (1<<2) +#define SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RW (0<<2) + +#define SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV (1<<3) +#define SHCI_C2_BLE_INIT_OPTIONS_NO_EXT_ADV (0<<3) + +#define SHCI_C2_BLE_INIT_OPTIONS_CS_ALGO2 (1<<4) +#define SHCI_C2_BLE_INIT_OPTIONS_NO_CS_ALGO2 (0<<4) + +#define SHCI_C2_BLE_INIT_OPTIONS_REDUC_GATTDB_NVM (1<<5) +#define SHCI_C2_BLE_INIT_OPTIONS_FULL_GATTDB_NVM (0<<5) + +#define SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_USED (1<<6) +#define SHCI_C2_BLE_INIT_OPTIONS_GATT_CACHING_NOTUSED (0<<6) + +#define SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_1 (1<<7) +#define SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3 (0<<7) + +#define SHCI_C2_BLE_INIT_OPTIONS_APPEARANCE_WRITABLE (1<<8) +#define SHCI_C2_BLE_INIT_OPTIONS_APPEARANCE_READONLY (0<<8) + +#define SHCI_C2_BLE_INIT_OPTIONS_ENHANCED_ATT_SUPPORTED (1<<9) +#define SHCI_C2_BLE_INIT_OPTIONS_ENHANCED_ATT_NOTSUPPORTED (0<<9) + + /** + * RX models configuration + */ +#define SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_LEGACY (0<<0) +#define SHCI_C2_BLE_INIT_RX_MODEL_AGC_RSSI_BLOCKER (1<<0) + + /** + * BLE core version + */ +#define SHCI_C2_BLE_INIT_BLE_CORE_5_2 11 +#define SHCI_C2_BLE_INIT_BLE_CORE_5_3 12 + + /** + * LsSource information + */ +#define SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB (0<<0) +#define SHCI_C2_BLE_INIT_CFG_BLE_LS_CALIB (1<<0) +#define SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV (0<<1) +#define SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV (1<<1) +#define SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE (0<<2) +#define SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_HSE_1024 (1<<2) #define SHCI_OPCODE_C2_THREAD_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_THREAD_INIT) /** No command parameters */ /** No response parameters*/ #define SHCI_OPCODE_C2_DEBUG_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_DEBUG_INIT) -/** Command parameters */ -typedef PACKED_STRUCT { - uint8_t thread_config; - uint8_t ble_config; -} SHCI_C2_DEBUG_TracesConfig_t; - -typedef PACKED_STRUCT { - uint8_t ble_dtb_cfg; - uint8_t reserved[3]; -} SHCI_C2_DEBUG_GeneralConfig_t; - -typedef PACKED_STRUCT{ - uint8_t *pGpioConfig; - uint8_t *pTracesConfig; - uint8_t *pGeneralConfig; - uint8_t GpioConfigSize; - uint8_t TracesConfigSize; - uint8_t GeneralConfigSize; -} SHCI_C2_DEBUG_init_Cmd_Param_t; - -typedef PACKED_STRUCT{ - SHCI_Header_t Header; /** Does not need to be initialized by the user */ - SHCI_C2_DEBUG_init_Cmd_Param_t Param; -} SHCI_C2_DEBUG_Init_Cmd_Packet_t; -/** No response parameters*/ + /** Command parameters */ + typedef PACKED_STRUCT + { + uint8_t thread_config; + uint8_t ble_config; + } SHCI_C2_DEBUG_TracesConfig_t; + + typedef PACKED_STRUCT + { + uint8_t ble_dtb_cfg; + /** + * sys_dbg_cfg1 options flag + * - bit 0: 0: IP BLE core in LP mode 1: IP BLE core in run mode (no LP supported) + * - bit 1: 0: CPU2 STOP mode Enable 1: CPU2 STOP mode Disable + * - bit [2-7]: bits reserved ( shall be set to 0) + */ + uint8_t sys_dbg_cfg1; + uint8_t reserved[2]; + uint16_t STBY_DebugGpioaPinList; + uint16_t STBY_DebugGpiobPinList; + uint16_t STBY_DebugGpiocPinList; + uint16_t STBY_DtbGpioaPinList; + uint16_t STBY_DtbGpiobPinList; + } SHCI_C2_DEBUG_GeneralConfig_t; + + typedef PACKED_STRUCT{ + uint8_t *pGpioConfig; + uint8_t *pTracesConfig; + uint8_t *pGeneralConfig; + uint8_t GpioConfigSize; + uint8_t TracesConfigSize; + uint8_t GeneralConfigSize; + } SHCI_C2_DEBUG_init_Cmd_Param_t; + + typedef PACKED_STRUCT{ + SHCI_Header_t Header; /** Does not need to be initialized by the user */ + SHCI_C2_DEBUG_init_Cmd_Param_t Param; + } SHCI_C2_DEBUG_Init_Cmd_Packet_t; + /** No response parameters*/ + + /** + * Options + * Each definition below may be added together to build the Options value + * WARNING : Only one definition per bit shall be added to build the Options value + */ +#define SHCI_C2_DEBUG_OPTIONS_IPCORE_LP (0<<0) +#define SHCI_C2_DEBUG_OPTIONS_IPCORE_NO_LP (1<<0) + +#define SHCI_C2_DEBUG_OPTIONS_CPU2_STOP_EN (0<<1) +#define SHCI_C2_DEBUG_OPTIONS_CPU2_STOP_DIS (1<<1) + #define SHCI_OPCODE_C2_FLASH_ERASE_ACTIVITY (( SHCI_OGF << 10) + SHCI_OCF_C2_FLASH_ERASE_ACTIVITY) -/** Command parameters */ -typedef enum { - ERASE_ACTIVITY_OFF = 0x00, - ERASE_ACTIVITY_ON = 0x01, -} SHCI_EraseActivity_t; + /** Command parameters */ + typedef enum + { + ERASE_ACTIVITY_OFF = 0x00, + ERASE_ACTIVITY_ON = 0x01, + } SHCI_EraseActivity_t; -/** No response parameters*/ + /** No response parameters*/ #define SHCI_OPCODE_C2_CONCURRENT_SET_MODE (( SHCI_OGF << 10) + SHCI_OCF_C2_CONCURRENT_SET_MODE) /** command parameters */ -typedef enum { - BLE_ENABLE, - THREAD_ENABLE, -} SHCI_C2_CONCURRENT_Mode_Param_t; -/** No response parameters*/ + typedef enum + { + BLE_ENABLE, + THREAD_ENABLE, + } SHCI_C2_CONCURRENT_Mode_Param_t; + /** No response parameters*/ + +#define SHCI_OPCODE_C2_CONCURRENT_GET_NEXT_BLE_EVT_TIME (( SHCI_OGF << 10) + SHCI_OCF_C2_CONCURRENT_GET_NEXT_BLE_EVT_TIME) +/** command parameters */ + typedef PACKED_STRUCT + { + uint32_t relative_time; + } SHCI_C2_CONCURRENT_GetNextBleEvtTime_Param_t; + /** No response parameters*/ + +#define SHCI_OPCODE_C2_CONCURRENT_ENABLE_NEXT_802154_EVT_NOTIFICATION (( SHCI_OGF << 10) + SHCI_OCF_C2_CONCURRENT_ENABLE_NEXT_802154_EVT_NOTIFICATION) + /** No command parameters */ + /** No response parameters*/ #define SHCI_OPCODE_C2_FLASH_STORE_DATA (( SHCI_OGF << 10) + SHCI_OCF_C2_FLASH_STORE_DATA) #define SHCI_OPCODE_C2_FLASH_ERASE_DATA (( SHCI_OGF << 10) + SHCI_OCF_C2_FLASH_ERASE_DATA) /** command parameters */ -typedef enum { - BLE_IP, - THREAD_IP, -} SHCI_C2_FLASH_Ip_t; -/** No response parameters*/ + typedef enum + { + BLE_IP, + THREAD_IP, + } SHCI_C2_FLASH_Ip_t; + /** No response parameters*/ #define SHCI_OPCODE_C2_RADIO_ALLOW_LOW_POWER (( SHCI_OGF << 10) + SHCI_OCF_C2_RADIO_ALLOW_LOW_POWER) @@ -418,48 +769,55 @@ typedef enum { #define SHCI_OPCODE_C2_LLD_TESTS_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_LLD_TESTS_INIT) -#define SHCI_OPCODE_C2_LLD_BLE_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_LLD_BLE_INIT) +#define SHCI_OPCODE_C2_BLE_LLD_INIT (( SHCI_OGF << 10) + SHCI_OCF_C2_BLE_LLD_INIT) #define SHCI_OPCODE_C2_EXTPA_CONFIG (( SHCI_OGF << 10) + SHCI_OCF_C2_EXTPA_CONFIG) -/** Command parameters */ -enum { - EXT_PA_ENABLED_LOW, - EXT_PA_ENABLED_HIGH, -}/* gpio_polarity */; - -enum { - EXT_PA_DISABLED, - EXT_PA_ENABLED, -}/* gpio_status */; - -typedef PACKED_STRUCT{ - uint32_t gpio_port; - uint16_t gpio_pin_number; - uint8_t gpio_polarity; - uint8_t gpio_status; -} SHCI_C2_EXTPA_CONFIG_Cmd_Param_t; - -/** No response parameters*/ + /** Command parameters */ + enum + { + EXT_PA_ENABLED_LOW, + EXT_PA_ENABLED_HIGH, + }/* gpio_polarity */; + + enum + { + EXT_PA_DISABLED, + EXT_PA_ENABLED, + }/* gpio_status */; + + typedef PACKED_STRUCT{ + uint32_t gpio_port; + uint16_t gpio_pin_number; + uint8_t gpio_polarity; + uint8_t gpio_status; + } SHCI_C2_EXTPA_CONFIG_Cmd_Param_t; + + /** No response parameters*/ #define SHCI_OPCODE_C2_SET_FLASH_ACTIVITY_CONTROL (( SHCI_OGF << 10) + SHCI_OCF_C2_SET_FLASH_ACTIVITY_CONTROL) -/** Command parameters */ -typedef enum { - FLASH_ACTIVITY_CONTROL_PES, - FLASH_ACTIVITY_CONTROL_SEM7, -} SHCI_C2_SET_FLASH_ACTIVITY_CONTROL_Source_t; + /** Command parameters */ + typedef enum + { + FLASH_ACTIVITY_CONTROL_PES, + FLASH_ACTIVITY_CONTROL_SEM7, + }SHCI_C2_SET_FLASH_ACTIVITY_CONTROL_Source_t; -/** No response parameters*/ + /** No response parameters*/ #define SHCI_OPCODE_C2_CONFIG (( SHCI_OGF << 10) + SHCI_OCF_C2_CONFIG) -/** Command parameters */ -typedef PACKED_STRUCT{ - uint8_t PayloadCmdSize; - uint8_t Config1; - uint8_t EvtMask1; - uint8_t Spare1; - uint32_t BleNvmRamAddress; - uint32_t ThreadNvmRamAddress; -} SHCI_C2_CONFIG_Cmd_Param_t; + /** Command parameters */ + typedef PACKED_STRUCT{ + uint8_t PayloadCmdSize; + uint8_t Config1; + uint8_t EvtMask1; + uint8_t Spare1; + uint32_t BleNvmRamAddress; + uint32_t ThreadNvmRamAddress; + uint16_t RevisionID; + uint16_t DeviceID; + } SHCI_C2_CONFIG_Cmd_Param_t; + +#define SHCI_OPCODE_C2_802_15_4_DEINIT (( SHCI_OGF << 10) + SHCI_OCF_C2_802_15_4_DEINIT) /** * PayloadCmdSize @@ -467,6 +825,19 @@ typedef PACKED_STRUCT{ */ #define SHCI_C2_CONFIG_PAYLOAD_CMD_SIZE (sizeof(SHCI_C2_CONFIG_Cmd_Param_t) - 1) +/** + * Device revision ID + */ +#define SHCI_C2_CONFIG_CUT2_0 (0x2000) +#define SHCI_C2_CONFIG_CUT2_1 (0x2001) +#define SHCI_C2_CONFIG_CUT2_2 (0x2003) + +/** + * Device ID + */ +#define SHCI_C2_CONFIG_STM32WB55xx (0x495) +#define SHCI_C2_CONFIG_STM32WB15xx (0x494) + /** * Config1 * Each definition below may be added together to build the Config1 value @@ -483,7 +854,7 @@ typedef PACKED_STRUCT{ */ #define SHCI_C2_CONFIG_EVTMASK1_BIT0_ERROR_NOTIF_ENABLE (1<<0) #define SHCI_C2_CONFIG_EVTMASK1_BIT1_BLE_NVM_RAM_UPDATE_ENABLE (1<<1) -#define SHCI_C2_CONFIG_EVTMASK1_BIT2_OT_NVM_RAM_UPDATE_ENABLE (1<<2) +#define SHCI_C2_CONFIG_EVTMASK1_BIT2_THREAD_NVM_RAM_UPDATE_ENABLE (1<<2) #define SHCI_C2_CONFIG_EVTMASK1_BIT3_NVM_START_WRITE_ENABLE (1<<3) #define SHCI_C2_CONFIG_EVTMASK1_BIT4_NVM_END_WRITE_ENABLE (1<<4) #define SHCI_C2_CONFIG_EVTMASK1_BIT5_NVM_START_ERASE_ENABLE (1<<5) @@ -504,21 +875,20 @@ typedef PACKED_STRUCT{ #define THREAD_NVM_SRAM_SIZE (1016) -/** No response parameters*/ - -/* Exported type --------------------------------------------------------*/ + /** No response parameters*/ -typedef MB_WirelessFwInfoTable_t SHCI_WirelessFwInfoTable_t; + /* Exported type --------------------------------------------------------*/ +#define FUS_DEVICE_INFO_TABLE_VALIDITY_KEYWORD (0xA94656B9) /* * At startup, the information relative to the wireless binary are stored in RAM through a structure defined by - * SHCI_WirelessFwInfoTable_t.This structure contains 4 fields (Version,MemorySize, Stack_info and a reserved part) + * MB_WirelessFwInfoTable_t.This structure contains 4 fields (Version,MemorySize, Stack_info and a reserved part) * each of those coded on 32 bits as shown on the table below: * * * |7 |6 |5 |4 |3 |2 |1 |0 |7 |6 |5 |4 |3 |2 |1 |0 |7 |6 |5 |4 |3 |2 |1 |0 |7 |6 |5 |4 |3 |2 |1 |0 | * ------------------------------------------------------------------------------------------------- - * Version | Major version | Minor version | Sub version | Branch |Release Type| + * Version | Major version | Minor version | Sub version | Branch |ReleaseType| * ------------------------------------------------------------------------------------------------- * MemorySize | SRAM2B (kB) | SRAM2A (kB) | SRAM1 (kB) | FLASH (4kb) | * ------------------------------------------------------------------------------------------------- @@ -558,22 +928,29 @@ typedef MB_WirelessFwInfoTable_t SHCI_WirelessFwInfoTable_t; #define INFO_STACK_TYPE_MASK 0x000000ff #define INFO_STACK_TYPE_NONE 0 -#define INFO_STACK_TYPE_BLE_STANDARD 0x01 +#define INFO_STACK_TYPE_BLE_FULL 0x01 #define INFO_STACK_TYPE_BLE_HCI 0x02 #define INFO_STACK_TYPE_BLE_LIGHT 0x03 +#define INFO_STACK_TYPE_BLE_BEACON 0x04 +#define INFO_STACK_TYPE_BLE_BASIC 0x05 +#define INFO_STACK_TYPE_BLE_FULL_EXT_ADV 0x06 +#define INFO_STACK_TYPE_BLE_HCI_EXT_ADV 0x07 #define INFO_STACK_TYPE_THREAD_FTD 0x10 #define INFO_STACK_TYPE_THREAD_MTD 0x11 #define INFO_STACK_TYPE_BLE_THREAD_FTD_STATIC 0x50 -#define INFO_STACK_TYPE_BLE_THREAD_FTD_DYAMIC 0x51 +#define INFO_STACK_TYPE_BLE_THREAD_FTD_DYAMIC 0x51 +#define INFO_STACK_TYPE_802154_LLD_TESTS 0x60 +#define INFO_STACK_TYPE_802154_PHY_VALID 0x61 #define INFO_STACK_TYPE_BLE_PHY_VALID 0x62 #define INFO_STACK_TYPE_BLE_LLD_TESTS 0x63 #define INFO_STACK_TYPE_BLE_RLV 0x64 +#define INFO_STACK_TYPE_802154_RLV 0x65 #define INFO_STACK_TYPE_RLV 0x80 typedef struct { - /** - * Wireless Info - */ +/** + * Wireless Info + */ uint8_t VersionMajor; uint8_t VersionMinor; uint8_t VersionSub; @@ -584,305 +961,361 @@ typedef struct { uint8_t MemorySizeSram1; /*< Multiple of 1K */ uint8_t MemorySizeFlash; /*< Multiple of 4K */ uint8_t StackType; - /** - * Fus Info - */ +/** + * Fus Info + */ uint8_t FusVersionMajor; uint8_t FusVersionMinor; uint8_t FusVersionSub; uint8_t FusMemorySizeSram2B; /*< Multiple of 1K */ uint8_t FusMemorySizeSram2A; /*< Multiple of 1K */ uint8_t FusMemorySizeFlash; /*< Multiple of 4K */ -} WirelessFwInfo_t; +}WirelessFwInfo_t; /* Exported functions ------------------------------------------------------- */ -/** - * For all SHCI_C2_FUS_xxx() command: - * When the wireless FW is running on the CPU2, the command returns SHCI_FUS_CMD_NOT_SUPPORTED - * When any FUS command is sent after the SHCI_FUS_CMD_NOT_SUPPORTED has been received, - * the CPU2 switches on the RSS ( This reboots automatically the device ) - */ -/** -* SHCI_C2_FUS_GetState -* @brief Read the FUS State -* If the user is not interested by the Error code response, a null value may -* be passed as parameter -* -* @param p_rsp : return the error code when the FUS State Value = 0xFF -* @retval FUS State Values -*/ -uint8_t SHCI_C2_FUS_GetState(SHCI_FUS_GetState_ErrorCode_t *p_rsp); + /** + * SHCI_C2_FUS_GetState + * @brief Read the FUS State + * If the user is not interested by the Error code response, a null value may + * be passed as parameter + * + * Note: This command is fully supported only by the FUS. + * When the wireless firmware receives that command, it responds SHCI_FUS_CMD_NOT_SUPPORTED the first time. + * When the wireless firmware receives that command a second time, it reboots the full device with the FUS running on CPU2 + * + * @param p_rsp : return the error code when the FUS State Value = 0xFF + * @retval FUS State Values + */ + uint8_t SHCI_C2_FUS_GetState( SHCI_FUS_GetState_ErrorCode_t *p_rsp ); -/** -* SHCI_C2_FUS_FwUpgrade -* @brief Request the FUS to install the CPU2 firmware update -* -* @param fw_src_add: Address of the firmware image location -* @param fw_dest_add: Address of the firmware destination -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_FUS_FwUpgrade(uint32_t fw_src_add, uint32_t fw_dest_add); + /** + * SHCI_C2_FUS_FwUpgrade + * @brief Request the FUS to install the CPU2 firmware update + * Note: This command is only supported by the FUS. + * + * @param fw_src_add: Address of the firmware image location + * @param fw_dest_add: Address of the firmware destination + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_FwUpgrade( uint32_t fw_src_add, uint32_t fw_dest_add ); -/** -* SHCI_C2_FUS_FwDelete -* @brief Delete the wireless stack on CPU2 -* -* @param None -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_FUS_FwDelete(void); + /** + * SHCI_C2_FUS_FwDelete + * @brief Delete the wireless stack on CPU2 + * Note: This command is only supported by the FUS. + * + * @param None + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_FwDelete( void ); -/** -* SHCI_C2_FUS_UpdateAuthKey -* @brief Request the FUS to update the authentication key -* -* @param pCmdPacket -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_FUS_UpdateAuthKey(SHCI_C2_FUS_UpdateAuthKey_Cmd_Param_t *pParam); + /** + * SHCI_C2_FUS_UpdateAuthKey + * @brief Request the FUS to update the authentication key + * Note: This command is only supported by the FUS. + * + * @param pCmdPacket + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_UpdateAuthKey( SHCI_C2_FUS_UpdateAuthKey_Cmd_Param_t *pParam ); -/** -* SHCI_C2_FUS_LockAuthKey -* @brief Request the FUS to prevent any future update of the authentication key -* -* @param None -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_FUS_LockAuthKey(void); + /** + * SHCI_C2_FUS_LockAuthKey + * @brief Request the FUS to prevent any future update of the authentication key + * Note: This command is only supported by the FUS. + * + * @param None + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_LockAuthKey( void ); -/** -* SHCI_C2_FUS_StoreUsrKey -* @brief Request the FUS to store the user key -* -* @param pParam : command parameter -* @param p_key_index : Index allocated by the FUS to the stored key -* -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_FUS_StoreUsrKey(SHCI_C2_FUS_StoreUsrKey_Cmd_Param_t *pParam, uint8_t *p_key_index); + /** + * SHCI_C2_FUS_StoreUsrKey + * @brief Request the FUS to store the user key + * Note: This command is supported by both the FUS and the wireless stack. + * + * @param pParam : command parameter + * @param p_key_index : Index allocated by the FUS to the stored key + * + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_StoreUsrKey( SHCI_C2_FUS_StoreUsrKey_Cmd_Param_t *pParam, uint8_t *p_key_index ); -/** -* SHCI_C2_FUS_LoadUsrKey -* @brief Request the FUS to load the user key into the AES -* -* @param key_index : index of the user key to load in AES1 -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_FUS_LoadUsrKey(uint8_t key_index); + /** + * SHCI_C2_FUS_LoadUsrKey + * @brief Request the FUS to load the user key into the AES + * Note: This command is supported by both the FUS and the wireless stack. + * + * @param key_index : index of the user key to load in AES1 + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_LoadUsrKey( uint8_t key_index ); -/** -* SHCI_C2_FUS_StartWs -* @brief Request the FUS to reboot on the wireless stack -* -* @param None -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_FUS_StartWs(void); + /** + * SHCI_C2_FUS_StartWs + * @brief Request the FUS to reboot on the wireless stack + * Note: This command is only supported by the FUS. + * + * @param None + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_StartWs( void ); -/** -* SHCI_C2_FUS_LockUsrKey -* @brief Request the FUS to lock the user key so that it cannot be updated later on -* -* @param key_index : index of the user key to lock -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_FUS_LockUsrKey(uint8_t key_index); + /** + * SHCI_C2_FUS_LockUsrKey + * @brief Request the FUS to lock the user key so that it cannot be updated later on + * Note: This command is supported by both the FUS and the wireless stack. + * + * @param key_index : index of the user key to lock + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_LockUsrKey( uint8_t key_index ); -/** -* SHCI_C2_BLE_Init -* @brief Provides parameters and starts the BLE Stack -* -* @param pCmdPacket : Parameters to be provided to the BLE Stack -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_BLE_Init(SHCI_C2_Ble_Init_Cmd_Packet_t *pCmdPacket); + /** + * SHCI_C2_FUS_UnloadUsrKey + * @brief Request the FUS to Unload the user key so that the CPU1 may use the AES with another Key + * Note: This command is supported by both the FUS and the wireless stack. + * + * @param key_index : index of the user key to unload + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_UnloadUsrKey( uint8_t key_index ); -/** -* SHCI_C2_THREAD_Init -* @brief Starts the THREAD Stack -* -* @param None -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_THREAD_Init(void); + /** + * SHCI_C2_FUS_ActivateAntiRollback + * @brief Request the FUS to enable the AntiRollback feature so that it is not possible to update the wireless firmware + * with an older version than the current one. + * Note: + * - This command is only supported by the FUS. + * - Once this feature is enabled, it is not possible anymore to disable it. + * + * @param None + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FUS_ActivateAntiRollback( void ); -/** -* SHCI_C2_LLDTESTS_Init -* @brief Starts the LLD tests CLI -* -* @param param_size : Nb of bytes -* @param p_param : pointer with data to give from M4 to M0 -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_LLDTESTS_Init(uint8_t param_size, uint8_t *p_param); + /** + * SHCI_C2_BLE_Init + * @brief Provides parameters and starts the BLE Stack + * + * @param pCmdPacket : Parameters are described SHCI_C2_Ble_Init_Cmd_Packet_t declaration + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_BLE_Init( SHCI_C2_Ble_Init_Cmd_Packet_t *pCmdPacket ); -/** -* SHCI_C2_LLD_BLE_Init -* @brief Starts the LLD tests CLI -* -* @param param_size : Nb of bytes -* @param p_param : pointer with data to give from M4 to M0 -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_LLD_BLE_Init(uint8_t param_size, uint8_t *p_param); + /** + * SHCI_C2_THREAD_Init + * @brief Starts the THREAD Stack + * + * @param None + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_THREAD_Init( void ); -/** -* SHCI_C2_DEBUG_Init -* @brief Starts the Traces -* -* @param None -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_DEBUG_Init(SHCI_C2_DEBUG_Init_Cmd_Packet_t *pCmdPacket); + /** + * SHCI_C2_LLDTESTS_Init + * @brief Starts the LLD tests CLI + * + * @param param_size : Nb of bytes + * @param p_param : pointer with data to give from M4 to M0 + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_LLDTESTS_Init( uint8_t param_size, uint8_t * p_param ); -/** -* SHCI_C2_FLASH_EraseActivity -* @brief Provides the information of the start and the end of a flash erase window on the CPU1 -* -* @param erase_activity: Start/End of erase activity -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_FLASH_EraseActivity(SHCI_EraseActivity_t erase_activity); + /** + * SHCI_C2_BLE_LLD_Init + * @brief Starts the LLD tests BLE + * + * @param param_size : Nb of bytes + * @param p_param : pointer with data to give from M4 to M0 + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_BLE_LLD_Init( uint8_t param_size, uint8_t * p_param ); -/** -* SHCI_C2_CONCURRENT_SetMode -* @brief Enable/Disable Thread on CPU2 (M0+) -* -* @param Mode: BLE or Thread enable flag -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_CONCURRENT_SetMode(SHCI_C2_CONCURRENT_Mode_Param_t Mode); + /** + * SHCI_C2_DEBUG_Init + * @brief Starts the Traces + * + * @param None + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_DEBUG_Init( SHCI_C2_DEBUG_Init_Cmd_Packet_t *pCmdPacket ); -/** -* SHCI_C2_FLASH_StoreData -* @brief Store Data in Flash -* -* @param Ip: BLE or THREAD -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_FLASH_StoreData(SHCI_C2_FLASH_Ip_t Ip); + /** + * SHCI_C2_FLASH_EraseActivity + * @brief Provides the information of the start and the end of a flash erase window on the CPU1 + * The protection will be active until next end of radio event. + * + * @param erase_activity: Start/End of erase activity + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FLASH_EraseActivity( SHCI_EraseActivity_t erase_activity ); -/** -* SHCI_C2_FLASH_EraseData -* @brief Erase Data in Flash -* -* @param Ip: BLE or THREAD -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_FLASH_EraseData(SHCI_C2_FLASH_Ip_t Ip); + /** + * SHCI_C2_CONCURRENT_SetMode + * @brief Enable/Disable Thread on CPU2 (M0+) + * + * @param Mode: BLE or Thread enable flag + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_CONCURRENT_SetMode( SHCI_C2_CONCURRENT_Mode_Param_t Mode ); -/** -* SHCI_C2_RADIO_AllowLowPower -* @brief Allow or forbid IP_radio (802_15_4 or BLE) to enter in low power mode. -* -* @param Ip: BLE or 802_15_5 -* @param FlagRadioLowPowerOn: True or false -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_RADIO_AllowLowPower(SHCI_C2_FLASH_Ip_t Ip, uint8_t FlagRadioLowPowerOn); + /** + * SHCI_C2_CONCURRENT_GetNextBleEvtTime + * @brief Get the next BLE event date (relative time) + * + * @param Command Packet + * @retval None + */ + SHCI_CmdStatus_t SHCI_C2_CONCURRENT_GetNextBleEvtTime( SHCI_C2_CONCURRENT_GetNextBleEvtTime_Param_t *pParam ); -/** - * SHCI_GetWirelessFwInfo - * @brief This function read back the information relative to the wireless binary loaded. - * Refer yourself to SHCI_WirelessFwInfoTable_t structure to get the significance - * of the different parameters returned. - * @param pWirelessInfo : Pointer to WirelessFwInfo_t. - * - * @retval SHCI_Success - */ -SHCI_CmdStatus_t SHCI_GetWirelessFwInfo(WirelessFwInfo_t *pWirelessInfo); + /** + * SHCI_C2_CONCURRENT_EnableNext_802154_EvtNotification + * @brief Activate the next 802.15.4 event notification (one shot) + * + * @param None + * @retval None + */ + SHCI_CmdStatus_t SHCI_C2_CONCURRENT_EnableNext_802154_EvtNotification( void ); -/** -* SHCI_C2_Reinit -* @brief This is required to allow the CPU1 to fake a set C2BOOT when it has already been set. -* In order to fake a C2BOOT, the CPU1 shall : -* - Send SHCI_C2_Reinit() -* - call SEV instruction -* WARNING: -* This function is intended to be used by the SBSFU -* -* @param None -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_Reinit(void); + /** + * SHCI_C2_FLASH_StoreData + * @brief Store Data in Flash + * + * @param Ip: BLE or THREAD + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FLASH_StoreData( SHCI_C2_FLASH_Ip_t Ip ); -/** -* SHCI_C2_ExtpaConfig -* @brief Send the Ext PA configuration -* When the CPU2 receives the command, it controls the Ext PA as requested by the configuration -* This configures only which IO is used to enable/disable the ExtPA and the associated polarity -* This command has no effect on the other IO that is used to control the mode of the Ext PA (Rx/Tx) -* -* @param gpio_port: GPIOx where x can be (A..F) to select the GPIO peripheral for STM32WBxx family -* @param gpio_pin_number: This parameter can be one of GPIO_PIN_x (= LL_GPIO_PIN_x) where x can be (0..15). -* @param gpio_polarity: This parameter can be either -* - EXT_PA_ENABLED_LOW: ExtPA is enabled when GPIO is low -* - EXT_PA_ENABLED_HIGH: ExtPA is enabled when GPIO is high -* @param gpio_status: This parameter can be either -* - EXT_PA_DISABLED: Stop driving the ExtPA -* - EXT_PA_ENABLED: Drive the ExtPA according to radio activity -* (ON before the Event and OFF at the end of the event) -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_ExtpaConfig(uint32_t gpio_port, uint16_t gpio_pin_number, uint8_t gpio_polarity, uint8_t gpio_status); + /** + * SHCI_C2_FLASH_EraseData + * @brief Erase Data in Flash + * + * @param Ip: BLE or THREAD + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_FLASH_EraseData( SHCI_C2_FLASH_Ip_t Ip ); -/** -* SHCI_C2_SetFlashActivityControl -* @brief Set the mechanism to be used on CPU2 to prevent the CPU1 to either write or erase in flash -* -* @param Source: It can be one of the following list -* - FLASH_ACTIVITY_CONTROL_PES : The CPU2 set the PES bit to prevent the CPU1 to either read or write in flash -* - FLASH_ACTIVITY_CONTROL_SEM7 : The CPU2 gets the semaphore 7 to prevent the CPU1 to either read or write in flash. -* This requires the CPU1 to first get semaphore 7 before erasing or writing the flash. -* -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_SetFlashActivityControl(SHCI_C2_SET_FLASH_ACTIVITY_CONTROL_Source_t Source); + /** + * SHCI_C2_RADIO_AllowLowPower + * @brief Allow or forbid IP_radio (802_15_4 or BLE) to enter in low power mode. + * + * @param Ip: BLE or 802_15_5 + * @param FlagRadioLowPowerOn: True or false + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_RADIO_AllowLowPower( SHCI_C2_FLASH_Ip_t Ip,uint8_t FlagRadioLowPowerOn); -/** -* SHCI_C2_Config -* @brief Send the system configuration to the CPU2 -* -* @param pCmdPacket: address of the buffer holding following parameters -* uint8_t PayloadCmdSize : Size of the payload - shall be SHCI_C2_CONFIG_PAYLOAD_CMD_SIZE -* uint8_t Config1 : -* - bit0 : 0 - BLE NVM Data data are flushed in internal secure flash -* 1 - BLE NVM Data are written in SRAM cache pointed by BleNvmRamAddress -* - bit1 : 0 - THREAD NVM Data data are flushed in internal secure flash -* 1 - THREAD NVM Data are written in SRAM cache pointed by ThreadNvmRamAddress -* - bit2 to bit7 : Unused, shall be set to 0 -* uint8_t EvtMask1 : -* When a bit is set to 0, the event is not reported -* bit0 : Asynchronous Event with Sub Evt Code 0x9201 (= SHCI_SUB_EVT_ERROR_NOTIF) -* ... -* bit31 : Asynchronous Event with Sub Evt Code 0x9220 -* uint8_t Spare1 : Unused, shall be set to 0 -* uint32_t BleNvmRamAddress : -* Only considered when Config1.bit0 = 1 -* When set to 0, data are kept in internal SRAM on CPU2 -* Otherwise, data are copied in the cache pointed by BleNvmRamAddress -* The size of the buffer shall be BLE_NVM_SRAM_SIZE (number of 32bits) -* The buffer shall be allocated in SRAM2 -* uint32_t ThreadNvmRamAddress : -* Only considered when Config1.bit1 = 1 -* When set to 0, data are kept in internal SRAM on CPU2 -* Otherwise, data are copied in the cache pointed by ThreadNvmRamAddress -* The size of the buffer shall be THREAD_NVM_SRAM_SIZE (number of 32bits) -* The buffer shall be allocated in SRAM2 -* -* Please check macro definition to be used for this function -* They are defined in this file next to the definition of SHCI_OPCODE_C2_CONFIG -* -* @retval Status -*/ -SHCI_CmdStatus_t SHCI_C2_Config(SHCI_C2_CONFIG_Cmd_Param_t *pCmdPacket); + /** + * SHCI_GetWirelessFwInfo + * @brief This function read back the informations relative to the wireless binary loaded. + * Refer yourself to MB_WirelessFwInfoTable_t structure to get the significance + * of the different parameters returned. + * @param pWirelessInfo : Pointer to WirelessFwInfo_t. + * + * @retval SHCI_Success + */ + SHCI_CmdStatus_t SHCI_GetWirelessFwInfo( WirelessFwInfo_t* pWirelessInfo ); -#ifdef __cplusplus + /** + * SHCI_C2_Reinit + * @brief This is required to allow the CPU1 to fake a set C2BOOT when it has already been set. + * In order to fake a C2BOOT, the CPU1 shall : + * - Send SHCI_C2_Reinit() + * - call SEV instruction + * WARNING: + * This function is intended to be used by the SBSFU + * + * @param None + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_Reinit( void ); + + /** + * SHCI_C2_ExtpaConfig + * @brief Send the Ext PA configuration + * When the CPU2 receives the command, it controls the Ext PA as requested by the configuration + * This configures only which IO is used to enable/disable the ExtPA and the associated polarity + * This command has no effect on the other IO that is used to control the mode of the Ext PA (Rx/Tx) + * + * @param gpio_port: GPIOx where x can be (A..F) to select the GPIO peripheral for STM32WBxx family + * @param gpio_pin_number: This parameter can be one of GPIO_PIN_x (= LL_GPIO_PIN_x) where x can be (0..15). + * @param gpio_polarity: This parameter can be either + * - EXT_PA_ENABLED_LOW: ExtPA is enabled when GPIO is low + * - EXT_PA_ENABLED_HIGH: ExtPA is enabled when GPIO is high + * @param gpio_status: This parameter can be either + * - EXT_PA_DISABLED: Stop driving the ExtPA + * - EXT_PA_ENABLED: Drive the ExtPA according to radio activity + * (ON before the Event and OFF at the end of the event) + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_ExtpaConfig(uint32_t gpio_port, uint16_t gpio_pin_number, uint8_t gpio_polarity, uint8_t gpio_status); + + /** + * SHCI_C2_SetFlashActivityControl + * @brief Set the mechanism to be used on CPU2 to prevent the CPU1 to either write or erase in flash + * + * @param Source: It can be one of the following list + * - FLASH_ACTIVITY_CONTROL_PES : The CPU2 set the PES bit to prevent the CPU1 to either read or write in flash + * - FLASH_ACTIVITY_CONTROL_SEM7 : The CPU2 gets the semaphore 7 to prevent the CPU1 to either read or write in flash. + * This requires the CPU1 to first get semaphore 7 before erasing or writing the flash. + * + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_SetFlashActivityControl(SHCI_C2_SET_FLASH_ACTIVITY_CONTROL_Source_t Source); + + /** + * SHCI_C2_Config + * @brief Send the system configuration to the CPU2 + * + * @param pCmdPacket: address of the buffer holding following parameters + * uint8_t PayloadCmdSize : Size of the payload - shall be SHCI_C2_CONFIG_PAYLOAD_CMD_SIZE + * uint8_t Config1 : + * - bit0 : 0 - BLE NVM Data data are flushed in internal secure flash + * 1 - BLE NVM Data are written in SRAM cache pointed by BleNvmRamAddress + * - bit1 : 0 - THREAD NVM Data data are flushed in internal secure flash + * 1 - THREAD NVM Data are written in SRAM cache pointed by ThreadNvmRamAddress + * - bit2 to bit7 : Unused, shall be set to 0 + * uint8_t EvtMask1 : + * When a bit is set to 0, the event is not reported + * bit0 : Asynchronous Event with Sub Evt Code 0x9201 (= SHCI_SUB_EVT_ERROR_NOTIF) + * ... + * bit31 : Asynchronous Event with Sub Evt Code 0x9220 + * uint8_t Spare1 : Unused, shall be set to 0 + * uint32_t BleNvmRamAddress : + * Only considered when Config1.bit0 = 1 + * When set to 0, data are kept in internal SRAM on CPU2 + * Otherwise, data are copied in the cache pointed by BleNvmRamAddress + * The size of the buffer shall be BLE_NVM_SRAM_SIZE (number of 32bits) + * The buffer shall be allocated in SRAM2 + * uint32_t ThreadNvmRamAddress : + * Only considered when Config1.bit1 = 1 + * When set to 0, data are kept in internal SRAM on CPU2 + * Otherwise, data are copied in the cache pointed by ThreadNvmRamAddress + * The size of the buffer shall be THREAD_NVM_SRAM_SIZE (number of 32bits) + * The buffer shall be allocated in SRAM1 + * + * Please check macro definition to be used for this function + * They are defined in this file next to the definition of SHCI_OPCODE_C2_CONFIG + * + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_Config(SHCI_C2_CONFIG_Cmd_Param_t *pCmdPacket); + + /** + * SHCI_C2_802_15_4_DeInit + * @brief Deinit 802.15.4 layer (to be used before entering StandBy mode) + * + * @param None + * @retval Status + */ + SHCI_CmdStatus_t SHCI_C2_802_15_4_DeInit( void ); + + #ifdef __cplusplus } #endif #endif /*__SHCI_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/utility/STM32Cube_FW/shci_tl.c b/src/utility/STM32Cube_FW/shci_tl.c index c2d7589e..1abd1be9 100644 --- a/src/utility/STM32Cube_FW/shci_tl.c +++ b/src/utility/STM32Cube_FW/shci_tl.c @@ -4,56 +4,30 @@ * @author MCD Application Team * @brief System HCI command implementation ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** */ #if defined(STM32WBxx) /* Includes ------------------------------------------------------------------*/ #include "stm32_wpan_common.h" -#include - #include "stm_list.h" #include "shci_tl.h" #include "stm32_def.h" - -/** - * These traces are not yet supported in an usual way in the delivery package - * They can enabled by adding the definition of TL_SHCI_CMD_DBG_EN and/or TL_SHCI_EVT_DBG_EN in the preprocessor option in the IDE - */ -#if ( (TL_SHCI_CMD_DBG_EN != 0) || (TL_SHCI_EVT_DBG_EN != 0) ) - #include "app_conf.h" - #include "dbg_trace.h" -#endif - -#if (TL_SHCI_CMD_DBG_EN != 0) - #define TL_SHCI_CMD_DBG_MSG PRINT_MESG_DBG - #define TL_SHCI_CMD_DBG_BUF PRINT_LOG_BUFF_DBG -#else - #define TL_SHCI_CMD_DBG_MSG(...) - #define TL_SHCI_CMD_DBG_BUF(...) -#endif - -#if (TL_SHCI_EVT_DBG_EN != 0) - #define TL_SHCI_EVT_DBG_MSG PRINT_MESG_DBG - #define TL_SHCI_EVT_DBG_BUF PRINT_LOG_BUFF_DBG -#else - #define TL_SHCI_EVT_DBG_MSG(...) - #define TL_SHCI_EVT_DBG_BUF(...) -#endif +#include "wiring_time.h" /* Private typedef -----------------------------------------------------------*/ -typedef enum { +typedef enum +{ SHCI_TL_CMD_RESP_RELEASE, SHCI_TL_CMD_RESP_WAIT, } SHCI_TL_CmdRespStatus_t; @@ -79,7 +53,7 @@ PLACE_IN_SECTION("SYSTEM_DRIVER_CONTEXT") SHCI_TL_UserEventFlowStatus_t SHCI_TL_ */ static tSHciContext shciContext; -static void (* StatusNotCallBackFunction)(SHCI_TL_CmdStatus_t status); +static void (* StatusNotCallBackFunction) (SHCI_TL_CmdStatus_t status); static volatile SHCI_TL_CmdRespStatus_t CmdRspStatusFlag; @@ -87,22 +61,17 @@ static volatile SHCI_TL_CmdRespStatus_t CmdRspStatusFlag; static void Cmd_SetStatus(SHCI_TL_CmdStatus_t shcicmdstatus); static void TlCmdEvtReceived(TL_EvtPacket_t *shcievt); static void TlUserEvtReceived(TL_EvtPacket_t *shcievt); -static void TlInit(TL_CmdPacket_t *p_cmdbuffer); -static void OutputCmdTrace(TL_CmdPacket_t *pCmdBuffer); -static void OutputRspTrace(TL_EvtPacket_t *p_rsp); -static void OutputEvtTrace(TL_EvtPacket_t *phcievtbuffer); +static void TlInit( TL_CmdPacket_t * p_cmdbuffer ); /* Interface ------- ---------------------------------------------------------*/ -void shci_init(void(* UserEvtRx)(void *pData), void *pConf) +void shci_init(void(* UserEvtRx)(void* pData), void* pConf) { StatusNotCallBackFunction = ((SHCI_TL_HciInitConf_t *)pConf)->StatusNotCallBack; shciContext.UserEvtRx = UserEvtRx; - shci_register_io_bus(&shciContext.io); + shci_register_io_bus (&shciContext.io); TlInit((TL_CmdPacket_t *)(((SHCI_TL_HciInitConf_t *)pConf)->p_cmdbuffer)); - - return; } void shci_user_evt_proc(void) @@ -124,38 +93,43 @@ void shci_user_evt_proc(void) * It is more secure to use LST_remove_head()/LST_insert_head() compare to LST_get_next_node()/LST_remove_node() * in case the user overwrite the header where the next/prev pointers are located */ - if ((LST_is_empty(&SHciAsynchEventQueue) == FALSE) && (SHCI_TL_UserEventFlow != SHCI_TL_UserEventFlow_Disable)) { - LST_remove_head(&SHciAsynchEventQueue, (tListNode **)&phcievtbuffer); - - OutputEvtTrace(phcievtbuffer); + if((LST_is_empty(&SHciAsynchEventQueue) == FALSE) && (SHCI_TL_UserEventFlow != SHCI_TL_UserEventFlow_Disable)) + { + LST_remove_head ( &SHciAsynchEventQueue, (tListNode **)&phcievtbuffer ); - if (shciContext.UserEvtRx != NULL) { + if (shciContext.UserEvtRx != NULL) + { UserEvtRxParam.pckt = phcievtbuffer; UserEvtRxParam.status = SHCI_TL_UserEventFlow_Enable; shciContext.UserEvtRx((void *)&UserEvtRxParam); SHCI_TL_UserEventFlow = UserEvtRxParam.status; - } else { + } + else + { SHCI_TL_UserEventFlow = SHCI_TL_UserEventFlow_Enable; } - if (SHCI_TL_UserEventFlow != SHCI_TL_UserEventFlow_Disable) { - TL_MM_EvtDone(phcievtbuffer); - } else { + if(SHCI_TL_UserEventFlow != SHCI_TL_UserEventFlow_Disable) + { + TL_MM_EvtDone( phcievtbuffer ); + } + else + { /** * put back the event in the queue */ - LST_insert_head(&SHciAsynchEventQueue, (tListNode *)phcievtbuffer); + LST_insert_head ( &SHciAsynchEventQueue, (tListNode *)phcievtbuffer ); } } - if ((LST_is_empty(&SHciAsynchEventQueue) == FALSE) && (SHCI_TL_UserEventFlow != SHCI_TL_UserEventFlow_Disable)) { - shci_notify_asynch_evt((void *) &SHciAsynchEventQueue); + if((LST_is_empty(&SHciAsynchEventQueue) == FALSE) && (SHCI_TL_UserEventFlow != SHCI_TL_UserEventFlow_Disable)) + { + shci_notify_asynch_evt((void*) &SHciAsynchEventQueue); } - return; } -void shci_resume_flow(void) +void shci_resume_flow( void ) { SHCI_TL_UserEventFlow = SHCI_TL_UserEventFlow_Enable; @@ -163,23 +137,19 @@ void shci_resume_flow(void) * It is better to go through the background process as it is not sure from which context this API may * be called */ - shci_notify_asynch_evt((void *) &SHciAsynchEventQueue); - - return; + shci_notify_asynch_evt((void*) &SHciAsynchEventQueue); } -void shci_send(uint16_t cmd_code, uint8_t len_cmd_payload, uint8_t *p_cmd_payload, TL_EvtPacket_t *p_rsp) +void shci_send( uint16_t cmd_code, uint8_t len_cmd_payload, uint8_t * p_cmd_payload, TL_EvtPacket_t * p_rsp ) { Cmd_SetStatus(SHCI_TL_CmdBusy); pCmdBuffer->cmdserial.cmd.cmdcode = cmd_code; pCmdBuffer->cmdserial.cmd.plen = len_cmd_payload; - memcpy(pCmdBuffer->cmdserial.cmd.payload, p_cmd_payload, len_cmd_payload); + memcpy(pCmdBuffer->cmdserial.cmd.payload, p_cmd_payload, len_cmd_payload ); - OutputCmdTrace(pCmdBuffer); - - shciContext.io.Send(0, 0); + shciContext.io.Send(0,0); shci_cmd_resp_wait(SHCI_TL_DEFAULT_TIMEOUT); @@ -187,13 +157,9 @@ void shci_send(uint16_t cmd_code, uint8_t len_cmd_payload, uint8_t *p_cmd_payloa * The command complete of a system command does not have the header * It starts immediately with the evtserial field */ - memcpy(&(p_rsp->evtserial), pCmdBuffer, ((TL_EvtSerial_t *)pCmdBuffer)->evt.plen + TL_EVT_HDR_SIZE); - - OutputRspTrace(p_rsp); + memcpy( &(p_rsp->evtserial), pCmdBuffer, ((TL_EvtSerial_t*)pCmdBuffer)->evt.plen + TL_EVT_HDR_SIZE ); Cmd_SetStatus(SHCI_TL_CmdAvailable); - - return; } void shci_notify_asynch_evt(void *pdata) @@ -211,115 +177,59 @@ void shci_register_io_bus(tSHciIO *fops) } /* Private functions ---------------------------------------------------------*/ -static void TlInit(TL_CmdPacket_t *p_cmdbuffer) +static void TlInit( TL_CmdPacket_t * p_cmdbuffer ) { TL_SYS_InitConf_t Conf; pCmdBuffer = p_cmdbuffer; - LST_init_head(&SHciAsynchEventQueue); + LST_init_head (&SHciAsynchEventQueue); Cmd_SetStatus(SHCI_TL_CmdAvailable); SHCI_TL_UserEventFlow = SHCI_TL_UserEventFlow_Enable; /* Initialize low level driver */ - if (shciContext.io.Init) { + if (shciContext.io.Init) + { Conf.p_cmdbuffer = (uint8_t *)p_cmdbuffer; Conf.IoBusCallBackCmdEvt = TlCmdEvtReceived; Conf.IoBusCallBackUserEvt = TlUserEvtReceived; shciContext.io.Init(&Conf); } - - return; } static void Cmd_SetStatus(SHCI_TL_CmdStatus_t shcicmdstatus) { - if (shcicmdstatus == SHCI_TL_CmdBusy) { - if (StatusNotCallBackFunction != 0) { - StatusNotCallBackFunction(SHCI_TL_CmdBusy); + if(shcicmdstatus == SHCI_TL_CmdBusy) + { + if(StatusNotCallBackFunction != 0) + { + StatusNotCallBackFunction( SHCI_TL_CmdBusy ); } SHCICmdStatus = SHCI_TL_CmdBusy; - } else { + } + else + { SHCICmdStatus = SHCI_TL_CmdAvailable; - if (StatusNotCallBackFunction != 0) { - StatusNotCallBackFunction(SHCI_TL_CmdAvailable); + if(StatusNotCallBackFunction != 0) + { + StatusNotCallBackFunction( SHCI_TL_CmdAvailable ); } } - - return; } static void TlCmdEvtReceived(TL_EvtPacket_t *shcievt) { (void)(shcievt); shci_cmd_resp_release(0); /**< Notify the application the Cmd response has been received */ - - return; } static void TlUserEvtReceived(TL_EvtPacket_t *shcievt) { LST_insert_tail(&SHciAsynchEventQueue, (tListNode *)shcievt); - shci_notify_asynch_evt((void *) &SHciAsynchEventQueue); /**< Notify the application a full HCI event has been received */ - - return; -} - -static void OutputCmdTrace(TL_CmdPacket_t *pCmdBuffer) -{ - TL_SHCI_CMD_DBG_MSG("sys cmd: 0x%04X", pCmdBuffer->cmdserial.cmd.cmdcode); - - if (pCmdBuffer->cmdserial.cmd.plen != 0) { - TL_SHCI_CMD_DBG_MSG(" payload:"); - TL_SHCI_CMD_DBG_BUF(pCmdBuffer->cmdserial.cmd.payload, pCmdBuffer->cmdserial.cmd.plen, ""); - } - TL_SHCI_CMD_DBG_MSG("\r\n"); - - return; -} - -static void OutputRspTrace(TL_EvtPacket_t *p_rsp) -{ - switch (p_rsp->evtserial.evt.evtcode) { - case TL_BLEEVT_CC_OPCODE: - TL_SHCI_CMD_DBG_MSG("sys rsp: 0x%02X", p_rsp->evtserial.evt.evtcode); - TL_SHCI_CMD_DBG_MSG(" cmd opcode: 0x%02X", ((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->cmdcode); - TL_SHCI_CMD_DBG_MSG(" status: 0x%02X", ((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[0]); - if ((p_rsp->evtserial.evt.plen - 4) != 0) { - TL_SHCI_CMD_DBG_MSG(" payload:"); - TL_SHCI_CMD_DBG_BUF(&((TL_CcEvt_t *)(p_rsp->evtserial.evt.payload))->payload[1], p_rsp->evtserial.evt.plen - 4, ""); - } - break; - - default: - TL_SHCI_CMD_DBG_MSG("unknown sys rsp received: %02X", p_rsp->evtserial.evt.evtcode); - break; - } - - TL_SHCI_CMD_DBG_MSG("\r\n"); - - return; -} - -static void OutputEvtTrace(TL_EvtPacket_t *phcievtbuffer) -{ - if (phcievtbuffer->evtserial.evt.evtcode != TL_BLEEVT_VS_OPCODE) { - TL_SHCI_EVT_DBG_MSG("unknown sys evt received: %02X", phcievtbuffer->evtserial.evt.evtcode); - } else { - TL_SHCI_EVT_DBG_MSG("sys evt: 0x%02X", phcievtbuffer->evtserial.evt.evtcode); - TL_SHCI_EVT_DBG_MSG(" subevtcode: 0x%04X", ((TL_AsynchEvt_t *)(phcievtbuffer->evtserial.evt.payload))->subevtcode); - if ((phcievtbuffer->evtserial.evt.plen - 2) != 0) { - TL_SHCI_EVT_DBG_MSG(" payload:"); - TL_SHCI_EVT_DBG_BUF(((TL_AsynchEvt_t *)(phcievtbuffer->evtserial.evt.payload))->payload, phcievtbuffer->evtserial.evt.plen - 2, ""); - } - } - - TL_SHCI_EVT_DBG_MSG("\r\n"); - - return; + shci_notify_asynch_evt((void*) &SHciAsynchEventQueue); /**< Notify the application a full HCI event has been received */ } /* Weak implementation ----------------------------------------------------------------*/ @@ -331,7 +241,6 @@ __WEAK void shci_cmd_resp_wait(uint32_t timeout) break; } } - return; } __WEAK void shci_cmd_resp_release(uint32_t flag) @@ -339,9 +248,5 @@ __WEAK void shci_cmd_resp_release(uint32_t flag) (void)flag; CmdRspStatusFlag = SHCI_TL_CMD_RESP_RELEASE; - - return; } - #endif /* STM32WBxx */ - diff --git a/src/utility/STM32Cube_FW/shci_tl.h b/src/utility/STM32Cube_FW/shci_tl.h index f6cc8043..74d0ff38 100644 --- a/src/utility/STM32Cube_FW/shci_tl.h +++ b/src/utility/STM32Cube_FW/shci_tl.h @@ -4,20 +4,18 @@ * @author MCD Application Team * @brief System HCI command header for the system channel ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** */ - #ifndef __SHCI_TL_H_ #define __SHCI_TL_H_ @@ -28,12 +26,14 @@ extern "C" { #include "tl.h" /* Exported defines -----------------------------------------------------------*/ -typedef enum { +typedef enum +{ SHCI_TL_UserEventFlow_Disable, SHCI_TL_UserEventFlow_Enable, } SHCI_TL_UserEventFlowStatus_t; -typedef enum { +typedef enum +{ SHCI_TL_CmdBusy, SHCI_TL_CmdAvailable } SHCI_TL_CmdStatus_t; @@ -42,15 +42,16 @@ typedef enum { * @brief Structure used to manage the BUS IO operations. * All the structure fields will point to functions defined at user level. * @{ - */ -typedef struct { - int32_t (* Init)(void *pConf); /**< Pointer to SHCI TL function for the IO Bus initialization */ - int32_t (* DeInit)(void); /**< Pointer to SHCI TL function for the IO Bus de-initialization */ - int32_t (* Reset)(void); /**< Pointer to SHCI TL function for the IO Bus reset */ - int32_t (* Receive)(uint8_t *, uint16_t); /**< Pointer to SHCI TL function for the IO Bus data reception */ - int32_t (* Send)(uint8_t *, uint16_t); /**< Pointer to SHCI TL function for the IO Bus data transmission */ - int32_t (* DataAck)(uint8_t *, uint16_t *len); /**< Pointer to SHCI TL function for the IO Bus data ack reception */ - int32_t (* GetTick)(void); /**< Pointer to BSP function for getting the HAL time base timestamp */ + */ +typedef struct +{ + int32_t (* Init) (void* pConf); /**< Pointer to SHCI TL function for the IO Bus initialization */ + int32_t (* DeInit) (void); /**< Pointer to SHCI TL function for the IO Bus de-initialization */ + int32_t (* Reset) (void); /**< Pointer to SHCI TL function for the IO Bus reset */ + int32_t (* Receive) (uint8_t*, uint16_t); /**< Pointer to SHCI TL function for the IO Bus data reception */ + int32_t (* Send) (uint8_t*, uint16_t); /**< Pointer to SHCI TL function for the IO Bus data transmission */ + int32_t (* DataAck) (uint8_t*, uint16_t* len); /**< Pointer to SHCI TL function for the IO Bus data ack reception */ + int32_t (* GetTick) (void); /**< Pointer to BSP function for getting the HAL time base timestamp */ } tSHciIO; /** * @} @@ -60,19 +61,22 @@ typedef struct { * @brief Contain the SHCI context * @{ */ -typedef struct { +typedef struct +{ tSHciIO io; /**< Manage the BUS IO operations */ - void (* UserEvtRx)(void *pData); /**< User System events callback function pointer */ + void (* UserEvtRx) (void * pData); /**< User System events callback function pointer */ } tSHciContext; -typedef struct { +typedef struct +{ SHCI_TL_UserEventFlowStatus_t status; TL_EvtPacket_t *pckt; } tSHCI_UserEvtRxParam; -typedef struct { +typedef struct +{ uint8_t *p_cmdbuffer; - void (* StatusNotCallBack)(SHCI_TL_CmdStatus_t status); + void (* StatusNotCallBack) (SHCI_TL_CmdStatus_t status); } SHCI_TL_HciInitConf_t; /** @@ -85,14 +89,14 @@ typedef struct { * @param : p_rsp_status = Address of the full buffer holding the command complete event * @retval : None */ -void shci_send(uint16_t cmd_code, uint8_t len_cmd_payload, uint8_t *p_cmd_payload, TL_EvtPacket_t *p_rsp_status); - +void shci_send( uint16_t cmd_code, uint8_t len_cmd_payload, uint8_t * p_cmd_payload, TL_EvtPacket_t * p_rsp_status ); + /** * @brief Register IO bus services. * @param fops The SHCI IO structure managing the IO BUS * @retval None */ -void shci_register_io_bus(tSHciIO *fops); +void shci_register_io_bus(tSHciIO* fops); /** * @brief Interrupt service routine that must be called when the system channel @@ -101,10 +105,10 @@ void shci_register_io_bus(tSHciIO *fops); * @param pdata Packet or event pointer * @retval None */ -void shci_notify_asynch_evt(void *pdata); +void shci_notify_asynch_evt(void* pdata); /** - * @brief This function resume the User Event Flow which has been stopped on return + * @brief This function resume the User Event Flow which has been stopped on return * from UserEvtRx() when the User Event has not been processed. * * @param None @@ -154,13 +158,13 @@ void shci_user_evt_proc(void); * @brief Initialize the System Host Controller Interface. * This function must be called before any communication on the System Channel * - * @param pData: System events callback function pointer + * @param UserEvtRx: System events callback function pointer * This callback is triggered when an user event is received on * the System Channel from CPU2. * @param pConf: Configuration structure pointer * @retval None */ -void shci_init(void(* UserEvtRx)(void *pData), void *pConf); +void shci_init(void(* UserEvtRx)(void* pData), void* pConf); #ifdef __cplusplus } diff --git a/src/utility/STM32Cube_FW/stm32_wpan_common.h b/src/utility/STM32Cube_FW/stm32_wpan_common.h index 12f1a583..5a2b2a55 100644 --- a/src/utility/STM32Cube_FW/stm32_wpan_common.h +++ b/src/utility/STM32Cube_FW/stm32_wpan_common.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2018 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under Ultimate Liberty license - * SLA0044, the "License"; You may not use this file except in compliance with - * the License. You may obtain a copy of the License at: - * www.st.com/SLA0044 + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -37,9 +36,9 @@ extern "C" { #include #include "cmsis_compiler.h" -/* -------------------------------- * - * Basic definitions * - * -------------------------------- */ + /* -------------------------------- * + * Basic definitions * + * -------------------------------- */ #undef NULL #define NULL 0U @@ -50,9 +49,9 @@ extern "C" { #undef TRUE #define TRUE (!0U) -/* -------------------------------- * - * Critical Section definition * - * -------------------------------- */ + /* -------------------------------- * + * Critical Section definition * + * -------------------------------- */ #undef BACKUP_PRIMASK #define BACKUP_PRIMASK() uint32_t primask_bit= __get_PRIMASK() @@ -62,18 +61,18 @@ extern "C" { #undef RESTORE_PRIMASK #define RESTORE_PRIMASK() __set_PRIMASK(primask_bit) -/* -------------------------------- * - * Macro delimiters * - * -------------------------------- */ + /* -------------------------------- * + * Macro delimiters * + * -------------------------------- */ #undef M_BEGIN #define M_BEGIN do { #undef M_END #define M_END } while(0) -/* -------------------------------- * - * Some useful macro definitions * - * -------------------------------- */ + /* -------------------------------- * + * Some useful macro definitions * + * -------------------------------- */ #undef MAX #define MAX(a, b) (((a) > (b)) ? (a) : (b)) @@ -139,5 +138,3 @@ extern "C" { #endif #endif /*__STM32_WPAN_COMMON_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/utility/STM32Cube_FW/stm_list.c b/src/utility/STM32Cube_FW/stm_list.c index 509b2b57..98924414 100644 --- a/src/utility/STM32Cube_FW/stm_list.c +++ b/src/utility/STM32Cube_FW/stm_list.c @@ -4,18 +4,17 @@ * @author MCD Application Team * @brief TCircular Linked List Implementation. ****************************************************************************** - * @attention + * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** - */ + */ #if defined(STM32WBxx) /****************************************************************************** @@ -28,30 +27,33 @@ /****************************************************************************** * Function Definitions ******************************************************************************/ -void LST_init_head(tListNode *listHead) +void LST_init_head (tListNode * listHead) { listHead->next = listHead; listHead->prev = listHead; } -bool LST_is_empty(tListNode *listHead) +bool LST_is_empty (tListNode * listHead) { uint32_t primask_bit; bool return_value; primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ - if (listHead->next == listHead) { - return_value = TRUE; - } else { - return_value = FALSE; + if(listHead->next == listHead) + { + return_value = true; + } + else + { + return_value = false; } __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ return return_value; } -void LST_insert_head(tListNode *listHead, tListNode *node) +void LST_insert_head (tListNode * listHead, tListNode * node) { uint32_t primask_bit; @@ -67,7 +69,7 @@ void LST_insert_head(tListNode *listHead, tListNode *node) } -void LST_insert_tail(tListNode *listHead, tListNode *node) +void LST_insert_tail (tListNode * listHead, tListNode * node) { uint32_t primask_bit; @@ -83,7 +85,7 @@ void LST_insert_tail(tListNode *listHead, tListNode *node) } -void LST_remove_node(tListNode *node) +void LST_remove_node (tListNode * node) { uint32_t primask_bit; @@ -97,7 +99,7 @@ void LST_remove_node(tListNode *node) } -void LST_remove_head(tListNode *listHead, tListNode **node) +void LST_remove_head (tListNode * listHead, tListNode ** node ) { uint32_t primask_bit; @@ -105,13 +107,13 @@ void LST_remove_head(tListNode *listHead, tListNode **node) __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ *node = listHead->next; - LST_remove_node(listHead->next); + LST_remove_node (listHead->next); __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ } -void LST_remove_tail(tListNode *listHead, tListNode **node) +void LST_remove_tail (tListNode * listHead, tListNode ** node ) { uint32_t primask_bit; @@ -119,13 +121,13 @@ void LST_remove_tail(tListNode *listHead, tListNode **node) __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ *node = listHead->prev; - LST_remove_node(listHead->prev); + LST_remove_node (listHead->prev); __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ } -void LST_insert_node_after(tListNode *node, tListNode *ref_node) +void LST_insert_node_after (tListNode * node, tListNode * ref_node) { uint32_t primask_bit; @@ -141,7 +143,7 @@ void LST_insert_node_after(tListNode *node, tListNode *ref_node) } -void LST_insert_node_before(tListNode *node, tListNode *ref_node) +void LST_insert_node_before (tListNode * node, tListNode * ref_node) { uint32_t primask_bit; @@ -157,17 +159,18 @@ void LST_insert_node_before(tListNode *node, tListNode *ref_node) } -int LST_get_size(tListNode *listHead) +int LST_get_size (tListNode * listHead) { int size = 0; - tListNode *temp; + tListNode * temp; uint32_t primask_bit; primask_bit = __get_PRIMASK(); /**< backup PRIMASK bit */ __disable_irq(); /**< Disable all interrupts by setting PRIMASK bit on Cortex*/ temp = listHead->next; - while (temp != listHead) { + while (temp != listHead) + { size++; temp = temp->next; } @@ -177,7 +180,7 @@ int LST_get_size(tListNode *listHead) return (size); } -void LST_get_next_node(tListNode *ref_node, tListNode **node) +void LST_get_next_node (tListNode * ref_node, tListNode ** node) { uint32_t primask_bit; @@ -190,7 +193,7 @@ void LST_get_next_node(tListNode *ref_node, tListNode **node) } -void LST_get_prev_node(tListNode *ref_node, tListNode **node) +void LST_get_prev_node (tListNode * ref_node, tListNode ** node) { uint32_t primask_bit; @@ -201,6 +204,4 @@ void LST_get_prev_node(tListNode *ref_node, tListNode **node) __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/ } - #endif /* STM32WBxx */ - diff --git a/src/utility/STM32Cube_FW/stm_list.h b/src/utility/STM32Cube_FW/stm_list.h index 885b50c1..769c2113 100644 --- a/src/utility/STM32Cube_FW/stm_list.h +++ b/src/utility/STM32Cube_FW/stm_list.h @@ -4,63 +4,54 @@ * @author MCD Application Team * @brief Header file for linked list library. ****************************************************************************** - * @attention + * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** - */ + */ #ifndef _STM_LIST_H_ #define _STM_LIST_H_ /* Includes ------------------------------------------------------------------*/ - +#include "stdint.h" #include "stdbool.h" #include "stm32_wpan_common.h" -#ifdef __cplusplus -extern "C" { -#endif - typedef PACKED_STRUCT _tListNode { - struct _tListNode *next; - struct _tListNode *prev; + struct _tListNode * next; + struct _tListNode * prev; } tListNode; -void LST_init_head(tListNode *listHead); - -bool LST_is_empty(tListNode *listHead); +void LST_init_head (tListNode * listHead); -void LST_insert_head(tListNode *listHead, tListNode *node); +bool LST_is_empty (tListNode * listHead); -void LST_insert_tail(tListNode *listHead, tListNode *node); +void LST_insert_head (tListNode * listHead, tListNode * node); -void LST_remove_node(tListNode *node); +void LST_insert_tail (tListNode * listHead, tListNode * node); -void LST_remove_head(tListNode *listHead, tListNode **node); +void LST_remove_node (tListNode * node); -void LST_remove_tail(tListNode *listHead, tListNode **node); +void LST_remove_head (tListNode * listHead, tListNode ** node ); -void LST_insert_node_after(tListNode *node, tListNode *ref_node); +void LST_remove_tail (tListNode * listHead, tListNode ** node ); -void LST_insert_node_before(tListNode *node, tListNode *ref_node); +void LST_insert_node_after (tListNode * node, tListNode * ref_node); -int LST_get_size(tListNode *listHead); +void LST_insert_node_before (tListNode * node, tListNode * ref_node); -void LST_get_next_node(tListNode *ref_node, tListNode **node); +int LST_get_size (tListNode * listHead); -void LST_get_prev_node(tListNode *ref_node, tListNode **node); +void LST_get_next_node (tListNode * ref_node, tListNode ** node); -#ifdef __cplusplus -} -#endif +void LST_get_prev_node (tListNode * ref_node, tListNode ** node); #endif /* _STM_LIST_H_ */ diff --git a/src/utility/STM32Cube_FW/tl.h b/src/utility/STM32Cube_FW/tl.h index f8abf288..982bb586 100644 --- a/src/utility/STM32Cube_FW/tl.h +++ b/src/utility/STM32Cube_FW/tl.h @@ -4,17 +4,16 @@ * @author MCD Application Team * @brief Header for tl module ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** + * @attention + * + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** */ @@ -64,7 +63,8 @@ extern "C" { /* Exported types ------------------------------------------------------------*/ /**< Packet header */ -typedef PACKED_STRUCT { +typedef PACKED_STRUCT +{ uint32_t *next; uint32_t *prev; } TL_PacketHeader_t; @@ -76,36 +76,44 @@ typedef PACKED_STRUCT { /** * This the payload of TL_Evt_t for a command status event */ -typedef PACKED_STRUCT { +typedef PACKED_STRUCT +{ uint8_t status; uint8_t numcmd; uint16_t cmdcode; } TL_CsEvt_t; /** - * This the payload of TL_Evt_t for a command complete event + * This the payload of TL_Evt_t for a command complete event, only used a pointer */ -typedef PACKED_STRUCT { +typedef PACKED_STRUCT +{ uint8_t numcmd; uint16_t cmdcode; - uint8_t payload[1]; + uint8_t payload[255]; } TL_CcEvt_t; /** - * This the payload of TL_Evt_t for an asynchronous event + * This the payload of TL_Evt_t for an asynchronous event, only used a pointer */ -typedef PACKED_STRUCT { +typedef PACKED_STRUCT +{ uint16_t subevtcode; - uint8_t payload[1]; + uint8_t payload[255]; } TL_AsynchEvt_t; -typedef PACKED_STRUCT { +/** + * This the payload of TL_Evt_t, only used a pointer + */ +typedef PACKED_STRUCT +{ uint8_t evtcode; uint8_t plen; - uint8_t payload[1]; + uint8_t payload[255]; } TL_Evt_t; -typedef PACKED_STRUCT { +typedef PACKED_STRUCT +{ uint8_t type; TL_Evt_t evt; } TL_EvtSerial_t; @@ -118,7 +126,8 @@ typedef PACKED_STRUCT { * include the header and shall use TL_EvtPacket_t format. Only the command response format on the * system channel is different. */ -typedef PACKED_STRUCT { +typedef PACKED_STRUCT +{ TL_PacketHeader_t header; TL_EvtSerial_t evtserial; } TL_EvtPacket_t; @@ -127,18 +136,21 @@ typedef PACKED_STRUCT { * Command type */ -typedef PACKED_STRUCT { +typedef PACKED_STRUCT +{ uint16_t cmdcode; uint8_t plen; uint8_t payload[255]; } TL_Cmd_t; -typedef PACKED_STRUCT { +typedef PACKED_STRUCT +{ uint8_t type; TL_Cmd_t cmd; } TL_CmdSerial_t; -typedef PACKED_STRUCT { +typedef PACKED_STRUCT +{ TL_PacketHeader_t header; TL_CmdSerial_t cmdserial; } TL_CmdPacket_t; @@ -146,19 +158,22 @@ typedef PACKED_STRUCT { /***************************************************************************************** * HCI ACL DATA type */ -typedef PACKED_STRUCT { +typedef PACKED_STRUCT +{ uint8_t type; uint16_t handle; uint16_t length; uint8_t acl_data[1]; } TL_AclDataSerial_t; -typedef PACKED_STRUCT { +typedef PACKED_STRUCT +{ TL_PacketHeader_t header; TL_AclDataSerial_t AclDataSerial; } TL_AclDataPacket_t; -typedef struct { +typedef struct +{ uint8_t *p_BleSpareEvtBuffer; uint8_t *p_SystemSpareEvtBuffer; uint8_t *p_AsynchEvtPool; @@ -167,40 +182,34 @@ typedef struct { uint32_t TracesEvtPoolSize; } TL_MM_Config_t; -typedef struct { +typedef struct +{ uint8_t *p_ThreadOtCmdRspBuffer; uint8_t *p_ThreadCliRspBuffer; uint8_t *p_ThreadNotAckBuffer; + uint8_t *p_ThreadCliNotBuffer; } TL_TH_Config_t; -typedef struct { +typedef struct +{ uint8_t *p_LldTestsCliCmdRspBuffer; uint8_t *p_LldTestsM0CmdBuffer; } TL_LLD_tests_Config_t; -typedef struct { - uint8_t *p_LldBleCmdRspBuffer; - uint8_t *p_LldBleM0CmdBuffer; -} TL_LLD_BLE_Config_t; - -typedef struct { - uint8_t *p_Mac_802_15_4_CmdRspBuffer; - uint8_t *p_Mac_802_15_4_NotAckBuffer; -} TL_MAC_802_15_4_Config_t; - -typedef struct { - uint8_t *p_ZigbeeOtCmdRspBuffer; - uint8_t *p_ZigbeeNotAckBuffer; - uint8_t *p_ZigbeeNotifRequestBuffer; -} TL_ZIGBEE_Config_t; +typedef struct +{ + uint8_t *p_BleLldCmdRspBuffer; + uint8_t *p_BleLldM0CmdBuffer; +} TL_BLE_LLD_Config_t; /** * @brief Contain the BLE HCI Init Configuration * @{ */ -typedef struct { - void (* IoBusEvtCallBack)(TL_EvtPacket_t *phcievt); - void (* IoBusAclDataTxAck)(void); +typedef struct +{ + void (* IoBusEvtCallBack) ( TL_EvtPacket_t *phcievt ); + void (* IoBusAclDataTxAck) ( void ); uint8_t *p_cmdbuffer; uint8_t *p_AclDataBuffer; } TL_BLE_InitConf_t; @@ -209,9 +218,10 @@ typedef struct { * @brief Contain the SYSTEM HCI Init Configuration * @{ */ -typedef struct { - void (* IoBusCallBackCmdEvt)(TL_EvtPacket_t *phcievt); - void (* IoBusCallBackUserEvt)(TL_EvtPacket_t *phcievt); +typedef struct +{ + void (* IoBusCallBackCmdEvt) (TL_EvtPacket_t *phcievt); + void (* IoBusCallBackUserEvt) (TL_EvtPacket_t *phcievt); uint8_t *p_cmdbuffer; } TL_SYS_InitConf_t; @@ -223,67 +233,67 @@ typedef struct { /****************************************************************************** * GENERAL ******************************************************************************/ -void TL_Enable(void); -void TL_Init(void); +void TL_Enable( void ); +void TL_Init( void ); /****************************************************************************** * BLE ******************************************************************************/ -int32_t TL_BLE_Init(void *pConf); -int32_t TL_BLE_SendCmd(uint8_t *buffer, uint16_t size); -int32_t TL_BLE_SendAclData(uint8_t *buffer, uint16_t size); +int32_t TL_BLE_Init( void* pConf ); +int32_t TL_BLE_SendCmd( uint8_t* buffer, uint16_t size ); +int32_t TL_BLE_SendAclData( uint8_t* buffer, uint16_t size ); /****************************************************************************** * SYSTEM ******************************************************************************/ -int32_t TL_SYS_Init(void *pConf); -int32_t TL_SYS_SendCmd(uint8_t *buffer, uint16_t size); +int32_t TL_SYS_Init( void* pConf ); +int32_t TL_SYS_SendCmd( uint8_t* buffer, uint16_t size ); /****************************************************************************** * THREAD ******************************************************************************/ -void TL_THREAD_Init(TL_TH_Config_t *p_Config); -void TL_OT_SendCmd(void); -void TL_CLI_SendCmd(void); -void TL_OT_CmdEvtReceived(TL_EvtPacket_t *Otbuffer); -void TL_THREAD_NotReceived(TL_EvtPacket_t *Notbuffer); -void TL_THREAD_SendAck(void); -void TL_THREAD_CliSendAck(void); -void TL_THREAD_CliNotReceived(TL_EvtPacket_t *Notbuffer); +void TL_THREAD_Init( TL_TH_Config_t *p_Config ); +void TL_OT_SendCmd( void ); +void TL_CLI_SendCmd( void ); +void TL_OT_CmdEvtReceived( TL_EvtPacket_t * Otbuffer ); +void TL_THREAD_NotReceived( TL_EvtPacket_t * Notbuffer ); +void TL_THREAD_SendAck ( void ); +void TL_THREAD_CliSendAck ( void ); +void TL_THREAD_CliNotReceived( TL_EvtPacket_t * Notbuffer ); /****************************************************************************** * LLD TESTS ******************************************************************************/ -void TL_LLDTESTS_Init(TL_LLD_tests_Config_t *p_Config); -void TL_LLDTESTS_SendCliCmd(void); -void TL_LLDTESTS_ReceiveCliRsp(TL_CmdPacket_t *Notbuffer); -void TL_LLDTESTS_SendCliRspAck(void); -void TL_LLDTESTS_ReceiveM0Cmd(TL_CmdPacket_t *Notbuffer); -void TL_LLDTESTS_SendM0CmdAck(void); +void TL_LLDTESTS_Init( TL_LLD_tests_Config_t *p_Config ); +void TL_LLDTESTS_SendCliCmd( void ); +void TL_LLDTESTS_ReceiveCliRsp( TL_CmdPacket_t * Notbuffer ); +void TL_LLDTESTS_SendCliRspAck( void ); +void TL_LLDTESTS_ReceiveM0Cmd( TL_CmdPacket_t * Notbuffer ); +void TL_LLDTESTS_SendM0CmdAck( void ); /****************************************************************************** - * LLD BLE + * BLE LLD ******************************************************************************/ -void TL_LLD_BLE_Init(TL_LLD_BLE_Config_t *p_Config); -void TL_LLD_BLE_SendCliCmd(void); -void TL_LLD_BLE_ReceiveCliRsp(TL_CmdPacket_t *Notbuffer); -void TL_LLD_BLE_SendCliRspAck(void); -void TL_LLD_BLE_ReceiveM0Cmd(TL_CmdPacket_t *Notbuffer); -void TL_LLD_BLE_SendM0CmdAck(void); -void TL_LLD_BLE_SendCmd(void); -void TL_LLD_BLE_ReceiveRsp(TL_CmdPacket_t *Notbuffer); -void TL_LLD_BLE_SendRspAck(void); +void TL_BLE_LLD_Init( TL_BLE_LLD_Config_t *p_Config ); +void TL_BLE_LLD_SendCliCmd( void ); +void TL_BLE_LLD_ReceiveCliRsp( TL_CmdPacket_t * Notbuffer ); +void TL_BLE_LLD_SendCliRspAck( void ); +void TL_BLE_LLD_ReceiveM0Cmd( TL_CmdPacket_t * Notbuffer ); +void TL_BLE_LLD_SendM0CmdAck( void ); +void TL_BLE_LLD_SendCmd( void ); +void TL_BLE_LLD_ReceiveRsp( TL_CmdPacket_t * Notbuffer ); +void TL_BLE_LLD_SendRspAck( void ); /****************************************************************************** * MEMORY MANAGER ******************************************************************************/ -void TL_MM_Init(TL_MM_Config_t *p_Config); -void TL_MM_EvtDone(TL_EvtPacket_t *hcievt); +void TL_MM_Init( TL_MM_Config_t *p_Config ); +void TL_MM_EvtDone( TL_EvtPacket_t * hcievt ); /****************************************************************************** * TRACES ******************************************************************************/ -void TL_TRACES_Init(void); -void TL_TRACES_EvtReceived(TL_EvtPacket_t *hcievt); +void TL_TRACES_Init( void ); +void TL_TRACES_EvtReceived( TL_EvtPacket_t * hcievt ); #ifdef __cplusplus } /* extern "C" */ @@ -291,4 +301,3 @@ void TL_TRACES_EvtReceived(TL_EvtPacket_t *hcievt); #endif /*__TL_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/utility/STM32Cube_FW/tl_dbg_conf.h b/src/utility/STM32Cube_FW/tl_dbg_conf.h new file mode 100644 index 00000000..841d1968 --- /dev/null +++ b/src/utility/STM32Cube_FW/tl_dbg_conf.h @@ -0,0 +1,140 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * File Name : tl_dbg_conf.h + * Description : Debug configuration file for stm32wpan transport layer interface. + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019-2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef TL_DBG_CONF_H +#define TL_DBG_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* USER CODE BEGIN Tl_Conf */ + +/* Includes ------------------------------------------------------------------*/ +#include "core_debug.h" + +/** + * Enable or Disable traces + * The raw data output is the hci binary packet format as specified by the BT specification * + */ +#ifndef TL_SHCI_CMD_DBG_EN +#define TL_SHCI_CMD_DBG_EN 1 /* Reports System commands sent to CPU2 and the command response */ +#endif + +#ifndef TL_SHCI_EVT_DBG_EN +#define TL_SHCI_EVT_DBG_EN 1 /* Reports System Asynchronous Events received from CPU2 */ +#endif + +#ifndef TL_HCI_CMD_DBG_EN +#define TL_HCI_CMD_DBG_EN 1 /* Reports BLE command sent to CPU2 and the command response */ +#endif + +#ifndef TL_HCI_EVT_DBG_EN +#define TL_HCI_EVT_DBG_EN 1 /* Reports BLE Asynchronous Events received from CPU2 */ +#endif + +#ifndef TL_MM_DBG_EN +#define TL_MM_DBG_EN 1 /* Reports the information of the buffer released to CPU2 */ +#endif + +/** + * Macro definition + */ + +/** + * System Transport Layer + */ +#if (TL_SHCI_CMD_DBG_EN != 0) +#define TL_SHCI_CMD_DBG_MSG core_debug +#define TL_SHCI_CMD_DBG_BUF PRINT_LOG_BUFF_DBG +#else +#define TL_SHCI_CMD_DBG_MSG(...) +#define TL_SHCI_CMD_DBG_BUF(...) +#endif + +#define TL_SHCI_CMD_DBG_RAW(...) + +#if (TL_SHCI_EVT_DBG_EN != 0) +#define TL_SHCI_EVT_DBG_MSG core_debug +#define TL_SHCI_EVT_DBG_BUF PRINT_LOG_BUFF_DBG +#else +#define TL_SHCI_EVT_DBG_MSG(...) +#define TL_SHCI_EVT_DBG_BUF(...) +#endif + +#define TL_SHCI_EVT_DBG_RAW(...) + +/** + * BLE Transport Layer + */ +#if (TL_HCI_CMD_DBG_EN != 0) +#define TL_HCI_CMD_DBG_MSG core_debug +#define TL_HCI_CMD_DBG_BUF PRINT_LOG_BUFF_DBG +#else +#define TL_HCI_CMD_DBG_MSG(...) +#define TL_HCI_CMD_DBG_BUF(...) +#endif + +#define TL_HCI_CMD_DBG_RAW(...) + +#if (TL_HCI_EVT_DBG_EN != 0) +#define TL_HCI_EVT_DBG_MSG core_debug +#define TL_HCI_EVT_DBG_BUF PRINT_LOG_BUFF_DBG +#else +#define TL_HCI_EVT_DBG_MSG(...) +#define TL_HCI_EVT_DBG_BUF(...) +#endif + +#define TL_HCI_EVT_DBG_RAW(...) + +/** + * Memory Manager - Released buffer tracing + */ +#if (TL_MM_DBG_EN != 0) +#define TL_MM_DBG_MSG core_debug +#else +#define TL_MM_DBG_MSG(...) +#endif + + +#define PRINT_LOG_BUFF_DBG(...) DbgTraceBuffer(__VA_ARGS__) + +void DbgTraceBuffer(const void *pBuffer, uint32_t u32Length, const char *strFormat, ...) +{ + va_list vaArgs; + uint32_t u32Index; + va_start(vaArgs, strFormat); + vprintf(strFormat, vaArgs); + va_end(vaArgs); + for (u32Index = 0; u32Index < u32Length; u32Index ++) + { + core_debug(" %02X", ((const uint8_t *) pBuffer)[u32Index]); + } +} + +/* USER CODE END Tl_Conf */ + +#ifdef __cplusplus +} +#endif + +#endif /* TL_DBG_CONF_H */ + diff --git a/src/utility/STM32Cube_FW/tl_mbox.c b/src/utility/STM32Cube_FW/tl_mbox.c index a235493d..a9abb181 100644 --- a/src/utility/STM32Cube_FW/tl_mbox.c +++ b/src/utility/STM32Cube_FW/tl_mbox.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -25,23 +24,20 @@ #include "stm_list.h" #include "tl.h" #include "mbox_def.h" - -/** - * These traces are not yet supported in an usual way in the delivery package - * They can enabled by adding the definition of TL_MM_DBG_EN in the preprocessor option in the IDE - */ -#if(TL_MM_DBG_EN != 0) - #include "app_conf.h" - #include "dbg_trace.h" -#endif - -#if (TL_MM_DBG_EN != 0) - #define TL_MM_DBG__MSG PRINT_MESG_DBG -#else - #define TL_MM_DBG__MSG(...) -#endif +#include "tl_dbg_conf.h" /* Private typedef -----------------------------------------------------------*/ +typedef enum +{ + TL_MB_MM_RELEASE_BUFFER, + TL_MB_BLE_CMD, + TL_MB_BLE_CMD_RSP, + TL_MB_BLE_ASYNCH_EVT, + TL_MB_SYS_CMD, + TL_MB_SYS_CMD_RSP, + TL_MB_SYS_ASYNCH_EVT, +} TL_MB_PacketType_t; + /* Private defines -----------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/ @@ -52,7 +48,7 @@ PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_DeviceInfoTable_t TL_DeviceInfoTa PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_BleTable_t TL_BleTable; PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_ThreadTable_t TL_ThreadTable; PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_LldTestsTable_t TL_LldTestsTable; -PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_LldBleTable_t TL_LldBleTable; +PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_BleLldTable_t TL_BleLldTable; PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_SysTable_t TL_SysTable; PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_MemManagerTable_t TL_MemManagerTable; PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static MB_TracesTable_t TL_TracesTable; @@ -66,23 +62,23 @@ PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static tListNode SystemEvtQueue; static tListNode LocalFreeBufQueue; -static void (* BLE_IoBusEvtCallBackFunction)(TL_EvtPacket_t *phcievt); -static void (* BLE_IoBusAclDataTxAck)(void); -static void (* SYS_CMD_IoBusCallBackFunction)(TL_EvtPacket_t *phcievt); -static void (* SYS_EVT_IoBusCallBackFunction)(TL_EvtPacket_t *phcievt); +static void (* BLE_IoBusEvtCallBackFunction) (TL_EvtPacket_t *phcievt); +static void (* BLE_IoBusAclDataTxAck) ( void ); +static void (* SYS_CMD_IoBusCallBackFunction) (TL_EvtPacket_t *phcievt); +static void (* SYS_EVT_IoBusCallBackFunction) (TL_EvtPacket_t *phcievt); /* Global variables ----------------------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/ -static void SendFreeBuf(void); -static void OutputMemReleaseTrace(TL_EvtPacket_t *phcievt); +static void SendFreeBuf( void ); +static void OutputDbgTrace(TL_MB_PacketType_t packet_type, uint8_t* buffer); /* Public Functions Definition ------------------------------------------------------*/ /****************************************************************************** * GENERAL ******************************************************************************/ -void TL_Enable(void) +void TL_Enable( void ) { HW_IPCC_Enable(); @@ -90,17 +86,16 @@ void TL_Enable(void) } -void TL_Init(void) +void TL_Init( void ) { TL_RefTable.p_device_info_table = &TL_DeviceInfoTable; TL_RefTable.p_ble_table = &TL_BleTable; TL_RefTable.p_thread_table = &TL_ThreadTable; TL_RefTable.p_lld_tests_table = &TL_LldTestsTable; - TL_RefTable.p_lld_ble_table = &TL_LldBleTable; + TL_RefTable.p_ble_lld_table = &TL_BleLldTable; TL_RefTable.p_sys_table = &TL_SysTable; TL_RefTable.p_mem_manager_table = &TL_MemManagerTable; TL_RefTable.p_traces_table = &TL_TracesTable; - HW_IPCC_Init(); return; @@ -109,20 +104,20 @@ void TL_Init(void) /****************************************************************************** * BLE ******************************************************************************/ -int32_t TL_BLE_Init(void *pConf) +int32_t TL_BLE_Init( void* pConf ) { - MB_BleTable_t *p_bletable; + MB_BleTable_t * p_bletable; TL_BLE_InitConf_t *pInitHciConf = (TL_BLE_InitConf_t *) pConf; - LST_init_head(&EvtQueue); + LST_init_head (&EvtQueue); p_bletable = TL_RefTable.p_ble_table; p_bletable->pcmd_buffer = pInitHciConf->p_cmdbuffer; p_bletable->phci_acl_data_buffer = pInitHciConf->p_AclDataBuffer; - p_bletable->pcs_buffer = (uint8_t *)CsBuffer; - p_bletable->pevt_queue = (uint8_t *)&EvtQueue; + p_bletable->pcs_buffer = (uint8_t*)CsBuffer; + p_bletable->pevt_queue = (uint8_t*)&EvtQueue; HW_IPCC_BLE_Init(); @@ -132,12 +127,14 @@ int32_t TL_BLE_Init(void *pConf) return 0; } -int32_t TL_BLE_SendCmd(uint8_t *buffer, uint16_t size) +int32_t TL_BLE_SendCmd( uint8_t* buffer, uint16_t size ) { (void)(buffer); (void)(size); - ((TL_CmdPacket_t *)(TL_RefTable.p_ble_table->pcmd_buffer))->cmdserial.type = TL_BLECMD_PKT_TYPE; + ((TL_CmdPacket_t*)(TL_RefTable.p_ble_table->pcmd_buffer))->cmdserial.type = TL_BLECMD_PKT_TYPE; + + OutputDbgTrace(TL_MB_BLE_CMD, TL_RefTable.p_ble_table->pcmd_buffer); HW_IPCC_BLE_SendCmd(); @@ -148,8 +145,18 @@ void HW_IPCC_BLE_RxEvtNot(void) { TL_EvtPacket_t *phcievt; - while (LST_is_empty(&EvtQueue) == FALSE) { - LST_remove_head(&EvtQueue, (tListNode **)&phcievt); + while(LST_is_empty(&EvtQueue) == FALSE) + { + LST_remove_head (&EvtQueue, (tListNode **)&phcievt); + + if ( ((phcievt->evtserial.evt.evtcode) == TL_BLEEVT_CS_OPCODE) || ((phcievt->evtserial.evt.evtcode) == TL_BLEEVT_CC_OPCODE ) ) + { + OutputDbgTrace(TL_MB_BLE_CMD_RSP, (uint8_t*)phcievt); + } + else + { + OutputDbgTrace(TL_MB_BLE_ASYNCH_EVT, (uint8_t*)phcievt); + } BLE_IoBusEvtCallBackFunction(phcievt); } @@ -157,7 +164,7 @@ void HW_IPCC_BLE_RxEvtNot(void) return; } -int32_t TL_BLE_SendAclData(uint8_t *buffer, uint16_t size) +int32_t TL_BLE_SendAclData( uint8_t* buffer, uint16_t size ) { (void)(buffer); (void)(size); @@ -171,7 +178,7 @@ int32_t TL_BLE_SendAclData(uint8_t *buffer, uint16_t size) void HW_IPCC_BLE_AclDataAckNot(void) { - BLE_IoBusAclDataTxAck(); + BLE_IoBusAclDataTxAck( ); return; } @@ -179,16 +186,16 @@ void HW_IPCC_BLE_AclDataAckNot(void) /****************************************************************************** * SYSTEM ******************************************************************************/ -int32_t TL_SYS_Init(void *pConf) +int32_t TL_SYS_Init( void* pConf ) { - MB_SysTable_t *p_systable; + MB_SysTable_t * p_systable; TL_SYS_InitConf_t *pInitHciConf = (TL_SYS_InitConf_t *) pConf; - LST_init_head(&SystemEvtQueue); + LST_init_head (&SystemEvtQueue); p_systable = TL_RefTable.p_sys_table; p_systable->pcmd_buffer = pInitHciConf->p_cmdbuffer; - p_systable->sys_queue = (uint8_t *)&SystemEvtQueue; + p_systable->sys_queue = (uint8_t*)&SystemEvtQueue; HW_IPCC_SYS_Init(); @@ -198,13 +205,15 @@ int32_t TL_SYS_Init(void *pConf) return 0; } -int32_t TL_SYS_SendCmd(uint8_t *buffer, uint16_t size) +int32_t TL_SYS_SendCmd( uint8_t* buffer, uint16_t size ) { (void)(buffer); (void)(size); ((TL_CmdPacket_t *)(TL_RefTable.p_sys_table->pcmd_buffer))->cmdserial.type = TL_SYSCMD_PKT_TYPE; + OutputDbgTrace(TL_MB_SYS_CMD, TL_RefTable.p_sys_table->pcmd_buffer); + HW_IPCC_SYS_SendCmd(); return 0; @@ -212,18 +221,24 @@ int32_t TL_SYS_SendCmd(uint8_t *buffer, uint16_t size) void HW_IPCC_SYS_CmdEvtNot(void) { - SYS_CMD_IoBusCallBackFunction((TL_EvtPacket_t *)(TL_RefTable.p_sys_table->pcmd_buffer)); + OutputDbgTrace(TL_MB_SYS_CMD_RSP, (uint8_t*)(TL_RefTable.p_sys_table->pcmd_buffer) ); + + SYS_CMD_IoBusCallBackFunction( (TL_EvtPacket_t*)(TL_RefTable.p_sys_table->pcmd_buffer) ); return; } -void HW_IPCC_SYS_EvtNot(void) +void HW_IPCC_SYS_EvtNot( void ) { TL_EvtPacket_t *p_evt; - while (LST_is_empty(&SystemEvtQueue) == FALSE) { - LST_remove_head(&SystemEvtQueue, (tListNode **)&p_evt); - SYS_EVT_IoBusCallBackFunction(p_evt); + while(LST_is_empty(&SystemEvtQueue) == FALSE) + { + LST_remove_head (&SystemEvtQueue, (tListNode **)&p_evt); + + OutputDbgTrace(TL_MB_SYS_ASYNCH_EVT, (uint8_t*)p_evt ); + + SYS_EVT_IoBusCallBackFunction( p_evt ); } return; @@ -233,22 +248,23 @@ void HW_IPCC_SYS_EvtNot(void) * THREAD ******************************************************************************/ #ifdef THREAD_WB -void TL_THREAD_Init(TL_TH_Config_t *p_Config) +void TL_THREAD_Init( TL_TH_Config_t *p_Config ) { - MB_ThreadTable_t *p_thread_table; + MB_ThreadTable_t * p_thread_table; p_thread_table = TL_RefTable.p_thread_table; p_thread_table->clicmdrsp_buffer = p_Config->p_ThreadCliRspBuffer; p_thread_table->otcmdrsp_buffer = p_Config->p_ThreadOtCmdRspBuffer; p_thread_table->notack_buffer = p_Config->p_ThreadNotAckBuffer; + p_thread_table->clinot_buffer = p_Config->p_ThreadCliNotBuffer; HW_IPCC_THREAD_Init(); return; } -void TL_OT_SendCmd(void) +void TL_OT_SendCmd( void ) { ((TL_CmdPacket_t *)(TL_RefTable.p_thread_table->otcmdrsp_buffer))->cmdserial.type = TL_OTCMD_PKT_TYPE; @@ -257,7 +273,7 @@ void TL_OT_SendCmd(void) return; } -void TL_CLI_SendCmd(void) +void TL_CLI_SendCmd( void ) { ((TL_CmdPacket_t *)(TL_RefTable.p_thread_table->clicmdrsp_buffer))->cmdserial.type = TL_CLICMD_PKT_TYPE; @@ -266,7 +282,7 @@ void TL_CLI_SendCmd(void) return; } -void TL_THREAD_SendAck(void) +void TL_THREAD_SendAck ( void ) { ((TL_CmdPacket_t *)(TL_RefTable.p_thread_table->notack_buffer))->cmdserial.type = TL_OTACK_PKT_TYPE; @@ -275,7 +291,7 @@ void TL_THREAD_SendAck(void) return; } -void TL_THREAD_CliSendAck(void) +void TL_THREAD_CliSendAck ( void ) { ((TL_CmdPacket_t *)(TL_RefTable.p_thread_table->notack_buffer))->cmdserial.type = TL_OTACK_PKT_TYPE; @@ -286,28 +302,28 @@ void TL_THREAD_CliSendAck(void) void HW_IPCC_OT_CmdEvtNot(void) { - TL_OT_CmdEvtReceived((TL_EvtPacket_t *)(TL_RefTable.p_thread_table->otcmdrsp_buffer)); + TL_OT_CmdEvtReceived( (TL_EvtPacket_t*)(TL_RefTable.p_thread_table->otcmdrsp_buffer) ); return; } -void HW_IPCC_THREAD_EvtNot(void) +void HW_IPCC_THREAD_EvtNot( void ) { - TL_THREAD_NotReceived((TL_EvtPacket_t *)(TL_RefTable.p_thread_table->notack_buffer)); + TL_THREAD_NotReceived( (TL_EvtPacket_t*)(TL_RefTable.p_thread_table->notack_buffer) ); return; } -void HW_IPCC_THREAD_CliEvtNot(void) +void HW_IPCC_THREAD_CliEvtNot( void ) { - TL_THREAD_CliNotReceived((TL_EvtPacket_t *)(TL_RefTable.p_thread_table->clicmdrsp_buffer)); + TL_THREAD_CliNotReceived( (TL_EvtPacket_t*)(TL_RefTable.p_thread_table->clinot_buffer) ); return; } -__WEAK void TL_OT_CmdEvtReceived(TL_EvtPacket_t *Otbuffer) {}; -__WEAK void TL_THREAD_NotReceived(TL_EvtPacket_t *Notbuffer) {}; -__WEAK void TL_THREAD_CliNotReceived(TL_EvtPacket_t *Notbuffer) {}; +__WEAK void TL_OT_CmdEvtReceived( TL_EvtPacket_t * Otbuffer ){}; +__WEAK void TL_THREAD_NotReceived( TL_EvtPacket_t * Notbuffer ){}; +__WEAK void TL_THREAD_CliNotReceived( TL_EvtPacket_t * Notbuffer ){}; #endif /* THREAD_WB */ @@ -315,9 +331,9 @@ __WEAK void TL_THREAD_CliNotReceived(TL_EvtPacket_t *Notbuffer) {}; * LLD TESTS ******************************************************************************/ #ifdef LLD_TESTS_WB -void TL_LLDTESTS_Init(TL_LLD_tests_Config_t *p_Config) +void TL_LLDTESTS_Init( TL_LLD_tests_Config_t *p_Config ) { - MB_LldTestsTable_t *p_lld_tests_table; + MB_LldTestsTable_t * p_lld_tests_table; p_lld_tests_table = TL_RefTable.p_lld_tests_table; p_lld_tests_table->clicmdrsp_buffer = p_Config->p_LldTestsCliCmdRspBuffer; @@ -326,128 +342,128 @@ void TL_LLDTESTS_Init(TL_LLD_tests_Config_t *p_Config) return; } -void TL_LLDTESTS_SendCliCmd(void) +void TL_LLDTESTS_SendCliCmd( void ) { ((TL_CmdPacket_t *)(TL_RefTable.p_lld_tests_table->clicmdrsp_buffer))->cmdserial.type = TL_CLICMD_PKT_TYPE; HW_IPCC_LLDTESTS_SendCliCmd(); return; } -void HW_IPCC_LLDTESTS_ReceiveCliRsp(void) +void HW_IPCC_LLDTESTS_ReceiveCliRsp( void ) { - TL_LLDTESTS_ReceiveCliRsp((TL_CmdPacket_t *)(TL_RefTable.p_lld_tests_table->clicmdrsp_buffer)); + TL_LLDTESTS_ReceiveCliRsp( (TL_CmdPacket_t*)(TL_RefTable.p_lld_tests_table->clicmdrsp_buffer) ); return; } -void TL_LLDTESTS_SendCliRspAck(void) +void TL_LLDTESTS_SendCliRspAck( void ) { HW_IPCC_LLDTESTS_SendCliRspAck(); return; } -void HW_IPCC_LLDTESTS_ReceiveM0Cmd(void) +void HW_IPCC_LLDTESTS_ReceiveM0Cmd( void ) { - TL_LLDTESTS_ReceiveM0Cmd((TL_CmdPacket_t *)(TL_RefTable.p_lld_tests_table->m0cmd_buffer)); + TL_LLDTESTS_ReceiveM0Cmd( (TL_CmdPacket_t*)(TL_RefTable.p_lld_tests_table->m0cmd_buffer) ); return; } -void TL_LLDTESTS_SendM0CmdAck(void) +void TL_LLDTESTS_SendM0CmdAck( void ) { HW_IPCC_LLDTESTS_SendM0CmdAck(); return; } -__WEAK void TL_LLDTESTS_ReceiveCliRsp(TL_CmdPacket_t *Notbuffer) {}; -__WEAK void TL_LLDTESTS_ReceiveM0Cmd(TL_CmdPacket_t *Notbuffer) {}; +__WEAK void TL_LLDTESTS_ReceiveCliRsp( TL_CmdPacket_t * Notbuffer ){}; +__WEAK void TL_LLDTESTS_ReceiveM0Cmd( TL_CmdPacket_t * Notbuffer ){}; #endif /* LLD_TESTS_WB */ /****************************************************************************** - * LLD BLE + * BLE LLD ******************************************************************************/ -#ifdef LLD_BLE_WB -void TL_LLD_BLE_Init(TL_LLD_BLE_Config_t *p_Config) +#ifdef BLE_LLD_WB +void TL_BLE_LLD_Init( TL_BLE_LLD_Config_t *p_Config ) { - MB_LldBleTable_t *p_lld_ble_table; + MB_BleLldTable_t * p_ble_lld_table; - p_lld_ble_table = TL_RefTable.p_lld_ble_table; - p_lld_ble_table->cmdrsp_buffer = p_Config->p_LldBleCmdRspBuffer; - p_lld_ble_table->m0cmd_buffer = p_Config->p_LldBleM0CmdBuffer; - HW_IPCC_LLD_BLE_Init(); + p_ble_lld_table = TL_RefTable.p_ble_lld_table; + p_ble_lld_table->cmdrsp_buffer = p_Config->p_BleLldCmdRspBuffer; + p_ble_lld_table->m0cmd_buffer = p_Config->p_BleLldM0CmdBuffer; + HW_IPCC_BLE_LLD_Init(); return; } -void TL_LLD_BLE_SendCliCmd(void) +void TL_BLE_LLD_SendCliCmd( void ) { - ((TL_CmdPacket_t *)(TL_RefTable.p_lld_ble_table->cmdrsp_buffer))->cmdserial.type = TL_CLICMD_PKT_TYPE; - HW_IPCC_LLD_BLE_SendCliCmd(); + ((TL_CmdPacket_t *)(TL_RefTable.p_ble_lld_table->cmdrsp_buffer))->cmdserial.type = TL_CLICMD_PKT_TYPE; + HW_IPCC_BLE_LLD_SendCliCmd(); return; } -void HW_IPCC_LLD_BLE_ReceiveCliRsp(void) +void HW_IPCC_BLE_LLD_ReceiveCliRsp( void ) { - TL_LLD_BLE_ReceiveCliRsp((TL_CmdPacket_t *)(TL_RefTable.p_lld_ble_table->cmdrsp_buffer)); + TL_BLE_LLD_ReceiveCliRsp( (TL_CmdPacket_t*)(TL_RefTable.p_ble_lld_table->cmdrsp_buffer) ); return; } -void TL_LLD_BLE_SendCliRspAck(void) +void TL_BLE_LLD_SendCliRspAck( void ) { - HW_IPCC_LLD_BLE_SendCliRspAck(); + HW_IPCC_BLE_LLD_SendCliRspAck(); return; } -void HW_IPCC_LLD_BLE_ReceiveM0Cmd(void) +void HW_IPCC_BLE_LLD_ReceiveM0Cmd( void ) { - TL_LLD_BLE_ReceiveM0Cmd((TL_CmdPacket_t *)(TL_RefTable.p_lld_ble_table->m0cmd_buffer)); + TL_BLE_LLD_ReceiveM0Cmd( (TL_CmdPacket_t*)(TL_RefTable.p_ble_lld_table->m0cmd_buffer) ); return; } -void TL_LLD_BLE_SendM0CmdAck(void) +void TL_BLE_LLD_SendM0CmdAck( void ) { - HW_IPCC_LLD_BLE_SendM0CmdAck(); + HW_IPCC_BLE_LLD_SendM0CmdAck(); return; } -__WEAK void TL_LLD_BLE_ReceiveCliRsp(TL_CmdPacket_t *Notbuffer) {}; -__WEAK void TL_LLD_BLE_ReceiveM0Cmd(TL_CmdPacket_t *Notbuffer) {}; +__WEAK void TL_BLE_LLD_ReceiveCliRsp( TL_CmdPacket_t * Notbuffer ){}; +__WEAK void TL_BLE_LLD_ReceiveM0Cmd( TL_CmdPacket_t * Notbuffer ){}; /* Transparent Mode */ -void TL_LLD_BLE_SendCmd(void) +void TL_BLE_LLD_SendCmd( void ) { - ((TL_CmdPacket_t *)(TL_RefTable.p_lld_ble_table->cmdrsp_buffer))->cmdserial.type = TL_CLICMD_PKT_TYPE; - HW_IPCC_LLD_BLE_SendCmd(); + ((TL_CmdPacket_t *)(TL_RefTable.p_ble_lld_table->cmdrsp_buffer))->cmdserial.type = TL_CLICMD_PKT_TYPE; + HW_IPCC_BLE_LLD_SendCmd(); return; } -void HW_IPCC_LLD_BLE_ReceiveRsp(void) +void HW_IPCC_BLE_LLD_ReceiveRsp( void ) { - TL_LLD_BLE_ReceiveRsp((TL_CmdPacket_t *)(TL_RefTable.p_lld_ble_table->cmdrsp_buffer)); + TL_BLE_LLD_ReceiveRsp( (TL_CmdPacket_t*)(TL_RefTable.p_ble_lld_table->cmdrsp_buffer) ); return; } -void TL_LLD_BLE_SendRspAck(void) +void TL_BLE_LLD_SendRspAck( void ) { - HW_IPCC_LLD_BLE_SendRspAck(); + HW_IPCC_BLE_LLD_SendRspAck(); return; } -#endif /* LLD_BLE_WB */ +#endif /* BLE_LLD_WB */ /****************************************************************************** * MEMORY MANAGER ******************************************************************************/ -void TL_MM_Init(TL_MM_Config_t *p_Config) +void TL_MM_Init( TL_MM_Config_t *p_Config ) { - static MB_MemManagerTable_t *p_mem_manager_table; + static MB_MemManagerTable_t * p_mem_manager_table; - LST_init_head(&FreeBufQueue); - LST_init_head(&LocalFreeBufQueue); + LST_init_head (&FreeBufQueue); + LST_init_head (&LocalFreeBufQueue); p_mem_manager_table = TL_RefTable.p_mem_manager_table; p_mem_manager_table->blepool = p_Config->p_AsynchEvtPool; p_mem_manager_table->blepoolsize = p_Config->AsynchEvtPoolSize; - p_mem_manager_table->pevt_free_buffer_queue = (uint8_t *)&FreeBufQueue; + p_mem_manager_table->pevt_free_buffer_queue = (uint8_t*)&FreeBufQueue; p_mem_manager_table->spare_ble_buffer = p_Config->p_BleSpareEvtBuffer; p_mem_manager_table->spare_sys_buffer = p_Config->p_SystemSpareEvtBuffer; p_mem_manager_table->traces_evt_pool = p_Config->p_TracesEvtPool; @@ -456,69 +472,38 @@ void TL_MM_Init(TL_MM_Config_t *p_Config) return; } -void TL_MM_EvtDone(TL_EvtPacket_t *phcievt) +void TL_MM_EvtDone(TL_EvtPacket_t * phcievt) { LST_insert_tail(&LocalFreeBufQueue, (tListNode *)phcievt); - OutputMemReleaseTrace(phcievt); + OutputDbgTrace(TL_MB_MM_RELEASE_BUFFER, (uint8_t*)phcievt); - HW_IPCC_MM_SendFreeBuf(SendFreeBuf); + HW_IPCC_MM_SendFreeBuf( SendFreeBuf ); return; } -static void SendFreeBuf(void) +static void SendFreeBuf( void ) { tListNode *p_node; - while (FALSE == LST_is_empty(&LocalFreeBufQueue)) { - LST_remove_head(&LocalFreeBufQueue, (tListNode **)&p_node); - LST_insert_tail((tListNode *)(TL_RefTable.p_mem_manager_table->pevt_free_buffer_queue), p_node); - } - - return; -} - -static void OutputMemReleaseTrace(TL_EvtPacket_t *phcievt) -{ - switch (phcievt->evtserial.evt.evtcode) { - case TL_BLEEVT_CS_OPCODE: - TL_MM_DBG__MSG("mm evt released: 0x%02X", phcievt->evtserial.evt.evtcode); - TL_MM_DBG__MSG(" cmd opcode: 0x%04X", ((TL_CsEvt_t *)(phcievt->evtserial.evt.payload))->cmdcode); - TL_MM_DBG__MSG(" buffer addr: 0x%08X", phcievt); - break; - - case TL_BLEEVT_CC_OPCODE: - TL_MM_DBG__MSG("mm evt released: 0x%02X", phcievt->evtserial.evt.evtcode); - TL_MM_DBG__MSG(" cmd opcode: 0x%04X", ((TL_CcEvt_t *)(phcievt->evtserial.evt.payload))->cmdcode); - TL_MM_DBG__MSG(" buffer addr: 0x%08X", phcievt); - break; - - case TL_BLEEVT_VS_OPCODE: - TL_MM_DBG__MSG("mm evt released: 0x%02X", phcievt->evtserial.evt.evtcode); - TL_MM_DBG__MSG(" subevtcode: 0x%04X", ((TL_AsynchEvt_t *)(phcievt->evtserial.evt.payload))->subevtcode); - TL_MM_DBG__MSG(" buffer addr: 0x%08X", phcievt); - break; - - default: - TL_MM_DBG__MSG("mm evt released: 0x%02X", phcievt->evtserial.evt.evtcode); - TL_MM_DBG__MSG(" buffer addr: 0x%08X", phcievt); - break; + while ( FALSE == LST_is_empty (&LocalFreeBufQueue) ) + { + LST_remove_head( &LocalFreeBufQueue, (tListNode **)&p_node ); + LST_insert_tail( (tListNode*)(TL_RefTable.p_mem_manager_table->pevt_free_buffer_queue), p_node ); } - TL_MM_DBG__MSG("\r\n"); - return; } /****************************************************************************** * TRACES ******************************************************************************/ -void TL_TRACES_Init(void) +void TL_TRACES_Init( void ) { - LST_init_head(&TracesEvtQueue); + LST_init_head (&TracesEvtQueue); - TL_RefTable.p_traces_table->traces_queue = (uint8_t *)&TracesEvtQueue; + TL_RefTable.p_traces_table->traces_queue = (uint8_t*)&TracesEvtQueue; HW_IPCC_TRACES_Init(); @@ -529,17 +514,200 @@ void HW_IPCC_TRACES_EvtNot(void) { TL_EvtPacket_t *phcievt; - while (LST_is_empty(&TracesEvtQueue) == FALSE) { - LST_remove_head(&TracesEvtQueue, (tListNode **)&phcievt); - TL_TRACES_EvtReceived(phcievt); + while(LST_is_empty(&TracesEvtQueue) == FALSE) + { + LST_remove_head (&TracesEvtQueue, (tListNode **)&phcievt); + TL_TRACES_EvtReceived( phcievt ); } return; } -__WEAK void TL_TRACES_EvtReceived(TL_EvtPacket_t *hcievt) +__WEAK void TL_TRACES_EvtReceived( TL_EvtPacket_t * hcievt ) { (void)(hcievt); } + +/****************************************************************************** + * DEBUG INFORMATION + ******************************************************************************/ +static void OutputDbgTrace(TL_MB_PacketType_t packet_type, uint8_t* buffer) +{ + TL_EvtPacket_t *p_evt_packet; + TL_CmdPacket_t *p_cmd_packet; + + switch(packet_type) + { + case TL_MB_MM_RELEASE_BUFFER: + p_evt_packet = (TL_EvtPacket_t*)buffer; + switch(p_evt_packet->evtserial.evt.evtcode) + { + case TL_BLEEVT_CS_OPCODE: + TL_MM_DBG_MSG("mm evt released: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_MM_DBG_MSG(" cmd opcode: 0x%04X", ((TL_CsEvt_t*)(p_evt_packet->evtserial.evt.payload))->cmdcode); + TL_MM_DBG_MSG(" buffer addr: 0x%08X", p_evt_packet); + break; + + case TL_BLEEVT_CC_OPCODE: + TL_MM_DBG_MSG("mm evt released: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_MM_DBG_MSG(" cmd opcode: 0x%04X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->cmdcode); + TL_MM_DBG_MSG(" buffer addr: 0x%08X", p_evt_packet); + break; + + case TL_BLEEVT_VS_OPCODE: + TL_MM_DBG_MSG("mm evt released: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_MM_DBG_MSG(" subevtcode: 0x%04X", ((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->subevtcode); + TL_MM_DBG_MSG(" buffer addr: 0x%08X", p_evt_packet); + break; + + default: + TL_MM_DBG_MSG("mm evt released: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_MM_DBG_MSG(" buffer addr: 0x%08X", p_evt_packet); + break; + } + + TL_MM_DBG_MSG("\r\n"); + break; + + case TL_MB_BLE_CMD: + p_cmd_packet = (TL_CmdPacket_t*)buffer; + TL_HCI_CMD_DBG_MSG("ble cmd: 0x%04X", p_cmd_packet->cmdserial.cmd.cmdcode); + if(p_cmd_packet->cmdserial.cmd.plen != 0) + { + TL_HCI_CMD_DBG_MSG(" payload:"); + TL_HCI_CMD_DBG_BUF(p_cmd_packet->cmdserial.cmd.payload, p_cmd_packet->cmdserial.cmd.plen, ""); + } + TL_HCI_CMD_DBG_MSG("\r\n"); + + TL_HCI_CMD_DBG_RAW(&p_cmd_packet->cmdserial, p_cmd_packet->cmdserial.cmd.plen+TL_CMD_HDR_SIZE); + break; + + case TL_MB_BLE_CMD_RSP: + p_evt_packet = (TL_EvtPacket_t*)buffer; + switch(p_evt_packet->evtserial.evt.evtcode) + { + case TL_BLEEVT_CS_OPCODE: + TL_HCI_CMD_DBG_MSG("ble rsp: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_HCI_CMD_DBG_MSG(" cmd opcode: 0x%04X", ((TL_CsEvt_t*)(p_evt_packet->evtserial.evt.payload))->cmdcode); + TL_HCI_CMD_DBG_MSG(" numhci: 0x%02X", ((TL_CsEvt_t*)(p_evt_packet->evtserial.evt.payload))->numcmd); + TL_HCI_CMD_DBG_MSG(" status: 0x%02X", ((TL_CsEvt_t*)(p_evt_packet->evtserial.evt.payload))->status); + break; + + case TL_BLEEVT_CC_OPCODE: + TL_HCI_CMD_DBG_MSG("ble rsp: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_HCI_CMD_DBG_MSG(" cmd opcode: 0x%04X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->cmdcode); + TL_HCI_CMD_DBG_MSG(" numhci: 0x%02X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->numcmd); + TL_HCI_CMD_DBG_MSG(" status: 0x%02X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload[0]); + if((p_evt_packet->evtserial.evt.plen-4) != 0) + { + TL_HCI_CMD_DBG_MSG(" payload:"); + TL_HCI_CMD_DBG_BUF(&((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload[1], p_evt_packet->evtserial.evt.plen-4, ""); + } + break; + + default: + TL_HCI_CMD_DBG_MSG("unknown ble rsp received: %02X", p_evt_packet->evtserial.evt.evtcode); + break; + } + + TL_HCI_CMD_DBG_MSG("\r\n"); + + TL_HCI_CMD_DBG_RAW(&p_evt_packet->evtserial, p_evt_packet->evtserial.evt.plen+TL_EVT_HDR_SIZE); + break; + + case TL_MB_BLE_ASYNCH_EVT: + p_evt_packet = (TL_EvtPacket_t*)buffer; + if(p_evt_packet->evtserial.evt.evtcode != TL_BLEEVT_VS_OPCODE) + { + TL_HCI_EVT_DBG_MSG("ble evt: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + if((p_evt_packet->evtserial.evt.plen) != 0) + { + TL_HCI_EVT_DBG_MSG(" payload:"); + TL_HCI_EVT_DBG_BUF(p_evt_packet->evtserial.evt.payload, p_evt_packet->evtserial.evt.plen, ""); + } + } + else + { + TL_HCI_EVT_DBG_MSG("ble evt: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_HCI_EVT_DBG_MSG(" subevtcode: 0x%04X", ((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->subevtcode); + if((p_evt_packet->evtserial.evt.plen-2) != 0) + { + TL_HCI_EVT_DBG_MSG(" payload:"); + TL_HCI_EVT_DBG_BUF(((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload, p_evt_packet->evtserial.evt.plen-2, ""); + } + } + + TL_HCI_EVT_DBG_MSG("\r\n"); + + TL_HCI_EVT_DBG_RAW(&p_evt_packet->evtserial, p_evt_packet->evtserial.evt.plen+TL_EVT_HDR_SIZE); + break; + + case TL_MB_SYS_CMD: + p_cmd_packet = (TL_CmdPacket_t*)buffer; + + TL_SHCI_CMD_DBG_MSG("sys cmd: 0x%04X", p_cmd_packet->cmdserial.cmd.cmdcode); + + if(p_cmd_packet->cmdserial.cmd.plen != 0) + { + TL_SHCI_CMD_DBG_MSG(" payload:"); + TL_SHCI_CMD_DBG_BUF(p_cmd_packet->cmdserial.cmd.payload, p_cmd_packet->cmdserial.cmd.plen, ""); + } + TL_SHCI_CMD_DBG_MSG("\r\n"); + + TL_SHCI_CMD_DBG_RAW(&p_cmd_packet->cmdserial, p_cmd_packet->cmdserial.cmd.plen+TL_CMD_HDR_SIZE); + break; + + case TL_MB_SYS_CMD_RSP: + p_evt_packet = (TL_EvtPacket_t*)buffer; + switch(p_evt_packet->evtserial.evt.evtcode) + { + case TL_BLEEVT_CC_OPCODE: + TL_SHCI_CMD_DBG_MSG("sys rsp: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_SHCI_CMD_DBG_MSG(" cmd opcode: 0x%02X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->cmdcode); + TL_SHCI_CMD_DBG_MSG(" status: 0x%02X", ((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload[0]); + if((p_evt_packet->evtserial.evt.plen-4) != 0) + { + TL_SHCI_CMD_DBG_MSG(" payload:"); + TL_SHCI_CMD_DBG_BUF(&((TL_CcEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload[1], p_evt_packet->evtserial.evt.plen-4, ""); + } + break; + + default: + TL_SHCI_CMD_DBG_MSG("unknown sys rsp received: %02X", p_evt_packet->evtserial.evt.evtcode); + break; + } + + TL_SHCI_CMD_DBG_MSG("\r\n"); + + TL_SHCI_CMD_DBG_RAW(&p_evt_packet->evtserial, p_evt_packet->evtserial.evt.plen+TL_EVT_HDR_SIZE); + break; + + case TL_MB_SYS_ASYNCH_EVT: + p_evt_packet = (TL_EvtPacket_t*)buffer; + if(p_evt_packet->evtserial.evt.evtcode != TL_BLEEVT_VS_OPCODE) + { + TL_SHCI_EVT_DBG_MSG("unknown sys evt received: %02X", p_evt_packet->evtserial.evt.evtcode); + } + else + { + TL_SHCI_EVT_DBG_MSG("sys evt: 0x%02X", p_evt_packet->evtserial.evt.evtcode); + TL_SHCI_EVT_DBG_MSG(" subevtcode: 0x%04X", ((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->subevtcode); + if((p_evt_packet->evtserial.evt.plen-2) != 0) + { + TL_SHCI_EVT_DBG_MSG(" payload:"); + TL_SHCI_EVT_DBG_BUF(((TL_AsynchEvt_t*)(p_evt_packet->evtserial.evt.payload))->payload, p_evt_packet->evtserial.evt.plen-2, ""); + } + } + + TL_SHCI_EVT_DBG_MSG("\r\n"); + + TL_SHCI_EVT_DBG_RAW(&p_evt_packet->evtserial, p_evt_packet->evtserial.evt.plen+TL_EVT_HDR_SIZE); + break; + + default: + break; + } + + return; +} #endif /* STM32WBxx */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/