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[InstCombine] reduce code duplication; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@360051 91177308-0d34-0410-b5e6-96231b3b80d8
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+19
-22
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1 file changed

+19
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‎lib/Transforms/InstCombine/InstCombineCalls.cpp

Lines changed: 19 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -1963,7 +1963,8 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
19631963
return SimplifyDemandedVectorElts(Op, DemandedElts, UndefElts);
19641964
};
19651965

1966-
switch (II->getIntrinsicID()) {
1966+
Intrinsic::ID IID = II->getIntrinsicID();
1967+
switch (IID) {
19671968
default: break;
19681969
case Intrinsic::objectsize:
19691970
if (Value *V = lowerObjectSizeCall(II, DL, &TLI, /*MustSucceed=*/false))
@@ -2046,14 +2047,14 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
20462047
// Canonicalize funnel shift right by constant to funnel shift left. This
20472048
// is not entirely arbitrary. For historical reasons, the backend may
20482049
// recognize rotate left patterns but miss rotate right patterns.
2049-
if (II->getIntrinsicID() == Intrinsic::fshr) {
2050+
if (IID == Intrinsic::fshr) {
20502051
// fshr X, Y, C --> fshl X, Y, (BitWidth - C)
20512052
Constant *LeftShiftC = ConstantExpr::getSub(WidthC, ShAmtC);
20522053
Module *Mod = II->getModule();
20532054
Function *Fshl = Intrinsic::getDeclaration(Mod, Intrinsic::fshl, Ty);
20542055
return CallInst::Create(Fshl, { Op0, Op1, LeftShiftC });
20552056
}
2056-
assert(II->getIntrinsicID() == Intrinsic::fshl &&
2057+
assert(IID == Intrinsic::fshl &&
20572058
"All funnel shifts by simple constants should go left");
20582059

20592060
// fshl(X, 0, C) --> shl X, C
@@ -2097,7 +2098,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
20972098
const APInt *C0, *C1;
20982099
Value *Arg0 = II->getArgOperand(0);
20992100
Value *Arg1 = II->getArgOperand(1);
2100-
bool IsSigned = II->getIntrinsicID() == Intrinsic::sadd_with_overflow;
2101+
bool IsSigned = IID == Intrinsic::sadd_with_overflow;
21012102
bool HasNWAdd = IsSigned ? match(Arg0, m_NSWAdd(m_Value(X), m_APInt(C0)))
21022103
: match(Arg0, m_NUWAdd(m_Value(X), m_APInt(C0)));
21032104
if (HasNWAdd && match(Arg1, m_APInt(C1))) {
@@ -2107,8 +2108,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
21072108
if (!Overflow)
21082109
return replaceInstUsesWith(
21092110
*II, Builder.CreateBinaryIntrinsic(
2110-
II->getIntrinsicID(), X,
2111-
ConstantInt::get(Arg1->getType(), NewC)));
2111+
IID, X, ConstantInt::get(Arg1->getType(), NewC)));
21122112
}
21132113
break;
21142114
}
@@ -2156,7 +2156,6 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
21562156
case Intrinsic::ssub_sat: {
21572157
Value *Arg0 = II->getArgOperand(0);
21582158
Value *Arg1 = II->getArgOperand(1);
2159-
Intrinsic::ID IID = II->getIntrinsicID();
21602159

21612160
// Make use of known overflow information.
21622161
OverflowResult OR;
@@ -2208,7 +2207,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
22082207
APInt NewVal;
22092208
bool IsUnsigned =
22102209
IID == Intrinsic::uadd_sat || IID == Intrinsic::usub_sat;
2211-
if (Other->getIntrinsicID() == II->getIntrinsicID() &&
2210+
if (Other->getIntrinsicID() == IID &&
22122211
match(Arg1, m_APInt(Val)) &&
22132212
match(Other->getArgOperand(0), m_Value(X)) &&
22142213
match(Other->getArgOperand(1), m_APInt(Val2))) {
@@ -2243,7 +2242,6 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
22432242
return I;
22442243
Value *Arg0 = II->getArgOperand(0);
22452244
Value *Arg1 = II->getArgOperand(1);
2246-
Intrinsic::ID IID = II->getIntrinsicID();
22472245
Value *X, *Y;
22482246
if (match(Arg0, m_FNeg(m_Value(X))) && match(Arg1, m_FNeg(m_Value(Y))) &&
22492247
(Arg0->hasOneUse() || Arg1->hasOneUse())) {
@@ -2373,8 +2371,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
23732371
Value *ExtSrc;
23742372
if (match(II->getArgOperand(0), m_OneUse(m_FPExt(m_Value(ExtSrc))))) {
23752373
// Narrow the call: intrinsic (fpext x) -> fpext (intrinsic x)
2376-
Value *NarrowII =
2377-
Builder.CreateUnaryIntrinsic(II->getIntrinsicID(), ExtSrc, II);
2374+
Value *NarrowII = Builder.CreateUnaryIntrinsic(IID, ExtSrc, II);
23782375
return new FPExtInst(NarrowII, II->getType());
23792376
}
23802377
break;
@@ -2727,7 +2724,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
27272724
Value *Arg1 = II->getArgOperand(1);
27282725

27292726
Value *V;
2730-
switch (II->getIntrinsicID()) {
2727+
switch (IID) {
27312728
default: llvm_unreachable("Case stmts out of sync!");
27322729
case Intrinsic::x86_avx512_add_ps_512:
27332730
case Intrinsic::x86_avx512_add_pd_512:
@@ -2771,7 +2768,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
27712768
Value *RHS = Builder.CreateExtractElement(Arg1, (uint64_t)0);
27722769

27732770
Value *V;
2774-
switch (II->getIntrinsicID()) {
2771+
switch (IID) {
27752772
default: llvm_unreachable("Case stmts out of sync!");
27762773
case Intrinsic::x86_avx512_mask_add_ss_round:
27772774
case Intrinsic::x86_avx512_mask_add_sd_round:
@@ -3363,8 +3360,8 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
33633360
}
33643361

33653362
// Check for constant LHS & RHS - in this case we just simplify.
3366-
bool Zext = (II->getIntrinsicID() == Intrinsic::arm_neon_vmullu ||
3367-
II->getIntrinsicID() == Intrinsic::aarch64_neon_umull);
3363+
bool Zext = (IID == Intrinsic::arm_neon_vmullu ||
3364+
IID == Intrinsic::aarch64_neon_umull);
33683365
VectorType *NewVT = cast<VectorType>(II->getType());
33693366
if (Constant *CV0 = dyn_cast<Constant>(Arg0)) {
33703367
if (Constant *CV1 = dyn_cast<Constant>(Arg1)) {
@@ -3441,7 +3438,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
34413438
APFloat Significand = frexp(C->getValueAPF(), Exp,
34423439
APFloat::rmNearestTiesToEven);
34433440

3444-
if (II->getIntrinsicID() == Intrinsic::amdgcn_frexp_mant) {
3441+
if (IID == Intrinsic::amdgcn_frexp_mant) {
34453442
return replaceInstUsesWith(CI, ConstantFP::get(II->getContext(),
34463443
Significand));
34473444
}
@@ -3626,7 +3623,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
36263623
}
36273624
}
36283625

3629-
bool Signed = II->getIntrinsicID() == Intrinsic::amdgcn_sbfe;
3626+
bool Signed = IID == Intrinsic::amdgcn_sbfe;
36303627

36313628
if (!CWidth || !COffset)
36323629
break;
@@ -3659,7 +3656,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
36593656
if (EnBits == 0xf)
36603657
break; // All inputs enabled.
36613658

3662-
bool IsCompr = II->getIntrinsicID() == Intrinsic::amdgcn_exp_compr;
3659+
bool IsCompr = IID == Intrinsic::amdgcn_exp_compr;
36633660
bool Changed = false;
36643661
for (int I = 0; I < (IsCompr ? 2 : 4); ++I) {
36653662
if ((!IsCompr && (EnBits & (1 << I)) == 0) ||
@@ -3747,7 +3744,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
37473744
const ConstantInt *CC = cast<ConstantInt>(II->getArgOperand(2));
37483745
// Guard against invalid arguments.
37493746
int64_t CCVal = CC->getZExtValue();
3750-
bool IsInteger = II->getIntrinsicID() == Intrinsic::amdgcn_icmp;
3747+
bool IsInteger = IID == Intrinsic::amdgcn_icmp;
37513748
if ((IsInteger && (CCVal < CmpInst::FIRST_ICMP_PREDICATE ||
37523749
CCVal > CmpInst::LAST_ICMP_PREDICATE)) ||
37533750
(!IsInteger && (CCVal < CmpInst::FIRST_FCMP_PREDICATE ||
@@ -3930,14 +3927,14 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
39303927
break;
39313928
}
39323929
if (CallInst *BCI = dyn_cast<CallInst>(BI)) {
3933-
if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(BCI)) {
3930+
if (auto *II2 = dyn_cast<IntrinsicInst>(BCI)) {
39343931
// If there is a stackrestore below this one, remove this one.
3935-
if (II->getIntrinsicID() == Intrinsic::stackrestore)
3932+
if (II2->getIntrinsicID() == Intrinsic::stackrestore)
39363933
return eraseInstFromFunction(CI);
39373934

39383935
// Bail if we cross over an intrinsic with side effects, such as
39393936
// llvm.stacksave, llvm.read_register, or llvm.setjmp.
3940-
if (II->mayHaveSideEffects()) {
3937+
if (II2->mayHaveSideEffects()) {
39413938
CannotRemove = true;
39423939
break;
39433940
}

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